src/mesa/drivers/dri/r300/r300_context.h

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /**
  31  * \file
  32  *
  33  * \author Keith Whitwell <keith@tungstengraphics.com>
  34  * \author Nicolai Haehnle <prefect_@gmx.net>
  35  */
  36
  37 #ifndef __R300_CONTEXT_H__
  38 #define __R300_CONTEXT_H__
  39
  40 #include "tnl/t_vertex.h"
  41 #include "drm.h"
  42 #include "radeon_drm.h"
  43 #include "dri_util.h"
  44 #include "texmem.h"
  45
  46 #include "main/macros.h"
  47 #include "main/mtypes.h"
  48 #include "main/colormac.h"
  49
  50 #define USER_BUFFERS
  51
  52 struct r300_context;
  53 typedef struct r300_context r300ContextRec;
  54 typedef struct r300_context *r300ContextPtr;
  55
  56 #include "radeon_lock.h"
  57 #include "main/mm.h"
  58
  59 /* From http://gcc.gnu.org/onlinedocs/gcc-3.2.3/gcc/Variadic-Macros.html .
  60    I suppose we could inline this and use macro to fetch out __LINE__ and stuff in case we run into trouble
  61    with other compilers ... GLUE!
  62 */
  63 #define WARN_ONCE(a, ...)       { \
  64         static int warn##__LINE__=1; \
  65         if(warn##__LINE__){ \
  66                 fprintf(stderr, "*********************************WARN_ONCE*********************************\n"); \
  67                 fprintf(stderr, "File %s function %s line %d\n", \
  68                         __FILE__, __FUNCTION__, __LINE__); \
  69                 fprintf(stderr,  a, ## __VA_ARGS__);\
  70                 fprintf(stderr, "***************************************************************************\n"); \
  71                 warn##__LINE__=0;\
  72                 } \
  73         }
  74
  75 #include "r300_vertprog.h"
  76 #include "r500_fragprog.h"
  77
  78 /**
  79  * This function takes a float and packs it into a uint32_t
  80  */
  81 static INLINE uint32_t r300PackFloat32(float fl)
  82 {
  83         union {
  84                 float fl;
  85                 uint32_t u;
  86         } u;
  87
  88         u.fl = fl;
  89         return u.u;
  90 }
  91
  92 /* This is probably wrong for some values, I need to test this
  93  * some more.  Range checking would be a good idea also..
  94  *
  95  * But it works for most things.  I'll fix it later if someone
  96  * else with a better clue doesn't
  97  */
  98 static INLINE uint32_t r300PackFloat24(float f)
  99 {
 100         float mantissa;
 101         int exponent;
 102         uint32_t float24 = 0;
 103
 104         if (f == 0.0)
 105                 return 0;
 106
 107         mantissa = frexpf(f, &exponent);
 108
 109         /* Handle -ve */
 110         if (mantissa < 0) {
 111                 float24 |= (1 << 23);
 112                 mantissa = mantissa * -1.0;
 113         }
 114         /* Handle exponent, bias of 63 */
 115         exponent += 62;
 116         float24 |= (exponent << 16);
 117         /* Kill 7 LSB of mantissa */
 118         float24 |= (r300PackFloat32(mantissa) & 0x7FFFFF) >> 7;
 119
 120         return float24;
 121 }
 122
 123 /************ DMA BUFFERS **************/
 124
 125 /* Need refcounting on dma buffers:
 126  */
 127 struct r300_dma_buffer {
 128         int refcount;           /**< the number of retained regions in buf */
 129         drmBufPtr buf;
 130         int id;
 131 };
 132 #undef GET_START
 133 #ifdef USER_BUFFERS
 134 #define GET_START(rvb) (r300GartOffsetFromVirtual(rmesa, (rvb)->address+(rvb)->start))
 135 #else
 136 #define GET_START(rvb) (rmesa->radeon.radeonScreen->gart_buffer_offset +                \
 137                         (rvb)->address - rmesa->dma.buf0_address +      \
 138                         (rvb)->start)
 139 #endif
 140 /* A retained region, eg vertices for indexed vertices.
 141  */
 142 struct r300_dma_region {
 143         struct r300_dma_buffer *buf;
 144         char *address;          /* == buf->address */
 145         int start, end, ptr;    /* offsets from start of buf */
 146
 147         int aos_offset;         /* address in GART memory */
 148         int aos_stride;         /* distance between elements, in dwords */
 149         int aos_size;           /* number of components (1-4) */
 150 };
 151
 152 struct r300_dma {
 153         /* Active dma region.  Allocations for vertices and retained
 154          * regions come from here.  Also used for emitting random vertices,
 155          * these may be flushed by calling flush_current();
 156          */
 157         struct r300_dma_region current;
 158
 159         void (*flush) (r300ContextPtr);
 160
 161         char *buf0_address;     /* start of buf[0], for index calcs */
 162
 163         /* Number of "in-flight" DMA buffers, i.e. the number of buffers
 164          * for which a DISCARD command is currently queued in the command buffer.
 165          */
 166         GLuint nr_released_bufs;
 167 };
 168
 169        /* Texture related */
 170
 171 typedef struct r300_tex_obj r300TexObj, *r300TexObjPtr;
 172
 173 /* Maximum number of mipmap levels supported by any supported GPU
 174  */
 175 #define R300_MAX_TEXTURE_LEVELS 13
 176
 177 /* Texture object in locally shared texture space.
 178  */
 179 struct r300_tex_obj {
 180         driTextureObject base;
 181
 182         GLuint bufAddr;         /* Offset to start of locally
 183                                    shared texture block */
 184
 185         drm_radeon_tex_image_t image[6][R300_MAX_TEXTURE_LEVELS];
 186         /* Six, for the cube faces */
 187
 188         GLboolean image_override;       /* Image overridden by GLX_EXT_tfp */
 189
 190         GLuint pitch;           /* this isn't sent to hardware just used in calculations */
 191         /* hardware register values */
 192         /* Note that R200 has 8 registers per texture and R300 only 7 */
 193         GLuint filter;
 194         GLuint filter_1;
 195         GLuint pitch_reg;
 196         GLuint size;            /* npot only */
 197         GLuint format;
 198         GLuint offset;          /* Image location in the card's address space.
 199                                    All cube faces follow. */
 200         GLuint unknown4;
 201         GLuint unknown5;
 202         /* end hardware registers */
 203
 204         /* registers computed by r200 code - keep them here to
 205            compare against what is actually written.
 206
 207            to be removed later.. */
 208         GLuint pp_border_color;
 209         GLuint pp_cubic_faces;  /* cube face 1,2,3,4 log2 sizes */
 210         GLuint format_x;
 211
 212         GLboolean border_fallback;
 213
 214         GLuint tile_bits;       /* hw texture tile bits used on this texture */
 215 };
 216
 217 struct r300_texture_env_state {
 218         struct gl_texture_object *texobj;
 219         GLenum format;
 220         GLenum envMode;
 221 };
 222
 223 /* The blit width for texture uploads
 224  */
 225 #define R300_BLIT_WIDTH_BYTES 1024
 226 #define R300_MAX_TEXTURE_UNITS 8
 227
 228 struct r300_texture_state {
 229         struct r300_texture_env_state unit[R300_MAX_TEXTURE_UNITS];
 230         int tc_count;           /* number of incoming texture coordinates from VAP */
 231 };
 232
 233 /**
 234  * A block of hardware state.
 235  *
 236  * When check returns non-zero, the returned number of dwords must be
 237  * copied verbatim into the command buffer in order to update a state atom
 238  * when it is dirty.
 239  */
 240 struct r300_state_atom {
 241         struct r300_state_atom *next, *prev;
 242         const char *name;       /* for debug */
 243         int cmd_size;           /* maximum size in dwords */
 244         GLuint idx;             /* index in an array (e.g. textures) */
 245         uint32_t *cmd;
 246         GLboolean dirty;
 247
 248         int (*check) (r300ContextPtr, struct r300_state_atom * atom);
 249 };
 250
 251 #define R300_VPT_CMD_0          0
 252 #define R300_VPT_XSCALE         1
 253 #define R300_VPT_XOFFSET        2
 254 #define R300_VPT_YSCALE         3
 255 #define R300_VPT_YOFFSET        4
 256 #define R300_VPT_ZSCALE         5
 257 #define R300_VPT_ZOFFSET        6
 258 #define R300_VPT_CMDSIZE        7
 259
 260 #define R300_VIR_CMD_0          0       /* vir is variable size (at least 1) */
 261 #define R300_VIR_CNTL_0         1
 262 #define R300_VIR_CNTL_1         2
 263 #define R300_VIR_CNTL_2         3
 264 #define R300_VIR_CNTL_3         4
 265 #define R300_VIR_CNTL_4         5
 266 #define R300_VIR_CNTL_5         6
 267 #define R300_VIR_CNTL_6         7
 268 #define R300_VIR_CNTL_7         8
 269 #define R300_VIR_CMDSIZE        9
 270
 271 #define R300_VIC_CMD_0          0
 272 #define R300_VIC_CNTL_0         1
 273 #define R300_VIC_CNTL_1         2
 274 #define R300_VIC_CMDSIZE        3
 275
 276 #define R300_VOF_CMD_0          0
 277 #define R300_VOF_CNTL_0         1
 278 #define R300_VOF_CNTL_1         2
 279 #define R300_VOF_CMDSIZE        3
 280
 281 #define R300_PVS_CMD_0          0
 282 #define R300_PVS_CNTL_1         1
 283 #define R300_PVS_CNTL_2         2
 284 #define R300_PVS_CNTL_3         3
 285 #define R300_PVS_CMDSIZE        4
 286
 287 #define R300_GB_MISC_CMD_0              0
 288 #define R300_GB_MISC_MSPOS_0            1
 289 #define R300_GB_MISC_MSPOS_1            2
 290 #define R300_GB_MISC_TILE_CONFIG        3
 291 #define R300_GB_MISC_SELECT             4
 292 #define R300_GB_MISC_AA_CONFIG          5
 293 #define R300_GB_MISC_CMDSIZE            6
 294
 295 #define R300_TXE_CMD_0          0
 296 #define R300_TXE_ENABLE         1
 297 #define R300_TXE_CMDSIZE        2
 298
 299 #define R300_PS_CMD_0           0
 300 #define R300_PS_POINTSIZE       1
 301 #define R300_PS_CMDSIZE         2
 302
 303 #define R300_ZBS_CMD_0          0
 304 #define R300_ZBS_T_FACTOR       1
 305 #define R300_ZBS_T_CONSTANT     2
 306 #define R300_ZBS_W_FACTOR       3
 307 #define R300_ZBS_W_CONSTANT     4
 308 #define R300_ZBS_CMDSIZE        5
 309
 310 #define R300_CUL_CMD_0          0
 311 #define R300_CUL_CULL           1
 312 #define R300_CUL_CMDSIZE        2
 313
 314 #define R300_RC_CMD_0           0
 315 #define R300_RC_CNTL_0          1
 316 #define R300_RC_CNTL_1          2
 317 #define R300_RC_CMDSIZE         3
 318
 319 #define R300_RI_CMD_0           0
 320 #define R300_RI_INTERP_0        1
 321 #define R300_RI_INTERP_1        2
 322 #define R300_RI_INTERP_2        3
 323 #define R300_RI_INTERP_3        4
 324 #define R300_RI_INTERP_4        5
 325 #define R300_RI_INTERP_5        6
 326 #define R300_RI_INTERP_6        7
 327 #define R300_RI_INTERP_7        8
 328 #define R300_RI_CMDSIZE         9
 329
 330 #define R500_RI_CMDSIZE        17
 331
 332 #define R300_RR_CMD_0           0       /* rr is variable size (at least 1) */
 333 #define R300_RR_INST_0          1
 334 #define R300_RR_INST_1          2
 335 #define R300_RR_INST_2          3
 336 #define R300_RR_INST_3          4
 337 #define R300_RR_INST_4          5
 338 #define R300_RR_INST_5          6
 339 #define R300_RR_INST_6          7
 340 #define R300_RR_INST_7          8
 341 #define R300_RR_CMDSIZE         9
 342
 343 #define R300_FP_CMD_0           0
 344 #define R300_FP_CNTL0           1
 345 #define R300_FP_CNTL1           2
 346 #define R300_FP_CNTL2           3
 347 #define R300_FP_CMD_1           4
 348 #define R300_FP_NODE0           5
 349 #define R300_FP_NODE1           6
 350 #define R300_FP_NODE2           7
 351 #define R300_FP_NODE3           8
 352 #define R300_FP_CMDSIZE         9
 353
 354 #define R500_FP_CMD_0           0
 355 #define R500_FP_CNTL            1
 356 #define R500_FP_PIXSIZE         2
 357 #define R500_FP_CMD_1           3
 358 #define R500_FP_CODE_ADDR       4
 359 #define R500_FP_CODE_RANGE      5
 360 #define R500_FP_CODE_OFFSET     6
 361 #define R500_FP_CMD_2           7
 362 #define R500_FP_FC_CNTL         8
 363 #define R500_FP_CMDSIZE         9
 364
 365 #define R300_FPT_CMD_0          0
 366 #define R300_FPT_INSTR_0        1
 367 #define R300_FPT_CMDSIZE        65
 368
 369 #define R300_FPI_CMD_0          0
 370 #define R300_FPI_INSTR_0        1
 371 #define R300_FPI_CMDSIZE        65
 372 /* R500 has space for 512 instructions - 6 dwords per instruction */
 373 #define R500_FPI_CMDSIZE        (512*6+1)
 374
 375 #define R300_FPP_CMD_0          0
 376 #define R300_FPP_PARAM_0        1
 377 #define R300_FPP_CMDSIZE        (32*4+1)
 378 /* R500 has spcae for 256 constants - 4 dwords per constant */
 379 #define R500_FPP_CMDSIZE        (256*4+1)
 380
 381 #define R300_FOGS_CMD_0         0
 382 #define R300_FOGS_STATE         1
 383 #define R300_FOGS_CMDSIZE       2
 384
 385 #define R300_FOGC_CMD_0         0
 386 #define R300_FOGC_R             1
 387 #define R300_FOGC_G             2
 388 #define R300_FOGC_B             3
 389 #define R300_FOGC_CMDSIZE       4
 390
 391 #define R300_FOGP_CMD_0         0
 392 #define R300_FOGP_SCALE         1
 393 #define R300_FOGP_START         2
 394 #define R300_FOGP_CMDSIZE       3
 395
 396 #define R300_AT_CMD_0           0
 397 #define R300_AT_ALPHA_TEST      1
 398 #define R300_AT_UNKNOWN         2
 399 #define R300_AT_CMDSIZE         3
 400
 401 #define R300_BLD_CMD_0          0
 402 #define R300_BLD_CBLEND         1
 403 #define R300_BLD_ABLEND         2
 404 #define R300_BLD_CMDSIZE        3
 405
 406 #define R300_CMK_CMD_0          0
 407 #define R300_CMK_COLORMASK      1
 408 #define R300_CMK_CMDSIZE        2
 409
 410 #define R300_CB_CMD_0           0
 411 #define R300_CB_OFFSET          1
 412 #define R300_CB_CMD_1           2
 413 #define R300_CB_PITCH           3
 414 #define R300_CB_CMDSIZE         4
 415
 416 #define R300_ZS_CMD_0           0
 417 #define R300_ZS_CNTL_0          1
 418 #define R300_ZS_CNTL_1          2
 419 #define R300_ZS_CNTL_2          3
 420 #define R300_ZS_CMDSIZE         4
 421
 422 #define R300_ZB_CMD_0           0
 423 #define R300_ZB_OFFSET          1
 424 #define R300_ZB_PITCH           2
 425 #define R300_ZB_CMDSIZE         3
 426
 427 #define R300_VAP_CNTL_FLUSH     0
 428 #define R300_VAP_CNTL_FLUSH_1   1
 429 #define R300_VAP_CNTL_CMD       2
 430 #define R300_VAP_CNTL_INSTR     3
 431 #define R300_VAP_CNTL_SIZE      4
 432
 433 #define R300_VPI_CMD_0          0
 434 #define R300_VPI_INSTR_0        1
 435 #define R300_VPI_CMDSIZE        1025    /* 256 16 byte instructions */
 436
 437 #define R300_VPP_CMD_0          0
 438 #define R300_VPP_PARAM_0        1
 439 #define R300_VPP_CMDSIZE        1025    /* 256 4-component parameters */
 440
 441 #define R300_VPUCP_CMD_0                0
 442 #define R300_VPUCP_X            1
 443 #define R300_VPUCP_Y            2
 444 #define R300_VPUCP_Z            3
 445 #define R300_VPUCP_W            4
 446 #define R300_VPUCP_CMDSIZE      5       /* 256 4-component parameters */
 447
 448 #define R300_VPS_CMD_0          0
 449 #define R300_VPS_ZERO_0         1
 450 #define R300_VPS_ZERO_1         2
 451 #define R300_VPS_POINTSIZE      3
 452 #define R300_VPS_ZERO_3         4
 453 #define R300_VPS_CMDSIZE        5
 454
 455         /* the layout is common for all fields inside tex */
 456 #define R300_TEX_CMD_0          0
 457 #define R300_TEX_VALUE_0        1
 458 /* We don't really use this, instead specify mtu+1 dynamically
 459 #define R300_TEX_CMDSIZE        (MAX_TEXTURE_UNITS+1)
 460 */
 461
 462 /**
 463  * Cache for hardware register state.
 464  */
 465 struct r300_hw_state {
 466         struct r300_state_atom atomlist;
 467
 468         GLboolean is_dirty;
 469         GLboolean all_dirty;
 470         int max_state_size;     /* in dwords */
 471
 472         struct r300_state_atom vpt;     /* viewport (1D98) */
 473         struct r300_state_atom vap_cntl;
 474         struct r300_state_atom vap_index_offset; /* 0x208c r5xx only */
 475         struct r300_state_atom vof;     /* VAP output format register 0x2090 */
 476         struct r300_state_atom vte;     /* (20B0) */
 477         struct r300_state_atom vap_vf_max_vtx_indx;     /* Maximum Vertex Indx Clamp (2134) */
 478         struct r300_state_atom vap_cntl_status;
 479         struct r300_state_atom vir[2];  /* vap input route (2150/21E0) */
 480         struct r300_state_atom vic;     /* vap input control (2180) */
 481         struct r300_state_atom vap_psc_sgn_norm_cntl; /* Programmable Stream Control Signed Normalize Control (21DC) */
 482         struct r300_state_atom vap_clip_cntl;
 483         struct r300_state_atom vap_clip;
 484         struct r300_state_atom vap_pvs_vtx_timeout_reg; /* Vertex timeout register (2288) */
 485         struct r300_state_atom pvs;     /* pvs_cntl (22D0) */
 486         struct r300_state_atom gb_enable;       /* (4008) */
 487         struct r300_state_atom gb_misc; /* Multisampling position shifts ? (4010) */
 488         struct r300_state_atom ga_point_s0;     /* S Texture Coordinate of Vertex 0 for Point texture stuffing (LLC) (4200) */
 489         struct r300_state_atom ga_triangle_stipple;     /* (4214) */
 490         struct r300_state_atom ps;      /* pointsize (421C) */
 491         struct r300_state_atom ga_point_minmax; /* (4230) */
 492         struct r300_state_atom lcntl;   /* line control */
 493         struct r300_state_atom ga_line_stipple; /* (4260) */
 494         struct r300_state_atom shade;
 495         struct r300_state_atom polygon_mode;
 496         struct r300_state_atom fogp;    /* fog parameters (4294) */
 497         struct r300_state_atom ga_soft_reset;   /* (429C) */
 498         struct r300_state_atom zbias_cntl;
 499         struct r300_state_atom zbs;     /* zbias (42A4) */
 500         struct r300_state_atom occlusion_cntl;
 501         struct r300_state_atom cul;     /* cull cntl (42B8) */
 502         struct r300_state_atom su_depth_scale;  /* (42C0) */
 503         struct r300_state_atom rc;      /* rs control (4300) */
 504         struct r300_state_atom ri;      /* rs interpolators (4310) */
 505         struct r300_state_atom rr;      /* rs route (4330) */
 506         struct r300_state_atom sc_hyperz;       /* (43A4) */
 507         struct r300_state_atom sc_screendoor;   /* (43E8) */
 508         struct r300_state_atom fp;      /* fragment program cntl + nodes (4600) */
 509         struct r300_state_atom fpt;     /* texi - (4620) */
 510         struct r300_state_atom us_out_fmt;      /* (46A4) */
 511         struct r300_state_atom r500fp;  /* r500 fp instructions */
 512         struct r300_state_atom r500fp_const;    /* r500 fp constants */
 513         struct r300_state_atom fpi[4];  /* fp instructions (46C0/47C0/48C0/49C0) */
 514         struct r300_state_atom fogs;    /* fog state (4BC0) */
 515         struct r300_state_atom fogc;    /* fog color (4BC8) */
 516         struct r300_state_atom at;      /* alpha test (4BD4) */
 517         struct r300_state_atom fg_depth_src;    /* (4BD8) */
 518         struct r300_state_atom fpp;     /* 0x4C00 and following */
 519         struct r300_state_atom rb3d_cctl;       /* (4E00) */
 520         struct r300_state_atom bld;     /* blending (4E04) */
 521         struct r300_state_atom cmk;     /* colormask (4E0C) */
 522         struct r300_state_atom blend_color;     /* constant blend color */
 523         struct r300_state_atom rop;     /* ropcntl */
 524         struct r300_state_atom cb;      /* colorbuffer (4E28) */
 525         struct r300_state_atom rb3d_dither_ctl; /* (4E50) */
 526         struct r300_state_atom rb3d_aaresolve_ctl;      /* (4E88) */
 527         struct r300_state_atom rb3d_discard_src_pixel_lte_threshold;    /* (4E88) I saw it only written on RV350 hardware..  */
 528         struct r300_state_atom zs;      /* zstencil control (4F00) */
 529         struct r300_state_atom zstencil_format;
 530         struct r300_state_atom zb;      /* z buffer (4F20) */
 531         struct r300_state_atom zb_depthclearvalue;      /* (4F28) */
 532         struct r300_state_atom unk4F30; /* (4F30) */
 533         struct r300_state_atom zb_hiz_offset;   /* (4F44) */
 534         struct r300_state_atom zb_hiz_pitch;    /* (4F54) */
 535
 536         struct r300_state_atom vpi;     /* vp instructions */
 537         struct r300_state_atom vpp;     /* vp parameters */
 538         struct r300_state_atom vps;     /* vertex point size (?) */
 539         struct r300_state_atom vpucp[6];        /* vp user clip plane - 6 */
 540         /* 8 texture units */
 541         /* the state is grouped by function and not by
 542            texture unit. This makes single unit updates
 543            really awkward - we are much better off
 544            updating the whole thing at once */
 545         struct {
 546                 struct r300_state_atom filter;
 547                 struct r300_state_atom filter_1;
 548                 struct r300_state_atom size;
 549                 struct r300_state_atom format;
 550                 struct r300_state_atom pitch;
 551                 struct r300_state_atom offset;
 552                 struct r300_state_atom chroma_key;
 553                 struct r300_state_atom border_color;
 554         } tex;
 555         struct r300_state_atom txe;     /* tex enable (4104) */
 556 };
 557
 558 /**
 559  * This structure holds the command buffer while it is being constructed.
 560  *
 561  * The first batch of commands in the buffer is always the state that needs
 562  * to be re-emitted when the context is lost. This batch can be skipped
 563  * otherwise.
 564  */
 565 struct r300_cmdbuf {
 566         int size;               /* DWORDs allocated for buffer */
 567         uint32_t *cmd_buf;
 568         int count_used;         /* DWORDs filled so far */
 569         int count_reemit;       /* size of re-emission batch */
 570 };
 571
 572 /**
 573  * State cache
 574  */
 575
 576 struct r300_depthbuffer_state {
 577         GLfloat scale;
 578 };
 579
 580 struct r300_stencilbuffer_state {
 581         GLboolean hw_stencil;
 582 };
 583
 584 /* Vertex shader state */
 585
 586 /* Perhaps more if we store programs in vmem? */
 587 /* drm_r300_cmd_header_t->vpu->count is unsigned char */
 588 #define VSF_MAX_FRAGMENT_LENGTH (255*4)
 589
 590 /* Can be tested with colormat currently. */
 591 #define VSF_MAX_FRAGMENT_TEMPS (14)
 592
 593 #define STATE_R300_WINDOW_DIMENSION (STATE_INTERNAL_DRIVER+0)
 594 #define STATE_R300_TEXRECT_FACTOR (STATE_INTERNAL_DRIVER+1)
 595
 596 struct r300_vertex_shader_fragment {
 597         int length;
 598         union {
 599                 GLuint d[VSF_MAX_FRAGMENT_LENGTH];
 600                 float f[VSF_MAX_FRAGMENT_LENGTH];
 601                 GLuint i[VSF_MAX_FRAGMENT_LENGTH];
 602         } body;
 603 };
 604
 605 struct r300_vertex_shader_state {
 606         struct r300_vertex_shader_fragment program;
 607 };
 608
 609 extern int hw_tcl_on;
 610
 611 #define COLOR_IS_RGBA
 612 #define TAG(x) r300##x
 613 #include "tnl_dd/t_dd_vertex.h"
 614 #undef TAG
 615
 616 //#define CURRENT_VERTEX_SHADER(ctx) (ctx->VertexProgram._Current)
 617 #define CURRENT_VERTEX_SHADER(ctx) (R300_CONTEXT(ctx)->selected_vp)
 618
 619 /* Should but doesnt work */
 620 //#define CURRENT_VERTEX_SHADER(ctx) (R300_CONTEXT(ctx)->curr_vp)
 621
 622 /* r300_vertex_shader_state and r300_vertex_program should probably be merged together someday.
 623  * Keeping them them seperate for now should ensure fixed pipeline keeps functioning properly.
 624  */
 625
 626 struct r300_vertex_program_key {
 627         GLuint InputsRead;
 628         GLuint OutputsWritten;
 629         GLuint OutputsAdded;
 630 };
 631
 632 struct r300_vertex_program {
 633         struct r300_vertex_program *next;
 634         struct r300_vertex_program_key key;
 635         int translated;
 636
 637         struct r300_vertex_shader_fragment program;
 638
 639         int pos_end;
 640         int num_temporaries;    /* Number of temp vars used by program */
 641         int wpos_idx;
 642         int inputs[VERT_ATTRIB_MAX];
 643         int outputs[VERT_RESULT_MAX];
 644         int native;
 645         int ref_count;
 646         int use_ref_count;
 647 };
 648
 649 struct r300_vertex_program_cont {
 650         struct gl_vertex_program mesa_program;  /* Must be first */
 651         struct r300_vertex_shader_fragment params;
 652         struct r300_vertex_program *progs;
 653 };
 654
 655 #define PFS_MAX_ALU_INST        64
 656 #define PFS_MAX_TEX_INST        64
 657 #define PFS_MAX_TEX_INDIRECT 4
 658 #define PFS_NUM_TEMP_REGS       32
 659 #define PFS_NUM_CONST_REGS      16
 660
 661 struct r300_pfs_compile_state;
 662
 663
 664 /**
 665  * Stores state that influences the compilation of a fragment program.
 666  */
 667 struct r300_fragment_program_external_state {
 668         struct {
 669                 /**
 670                  * If the sampler is used as a shadow sampler,
 671                  * this field is:
 672                  *  0 - GL_LUMINANCE
 673                  *  1 - GL_INTENSITY
 674                  *  2 - GL_ALPHA
 675                  * depending on the depth texture mode.
 676                  */
 677                 GLuint depth_texture_mode : 2;
 678
 679                 /**
 680                  * If the sampler is used as a shadow sampler,
 681                  * this field is (texture_compare_func - GL_NEVER).
 682                  * [e.g. if compare function is GL_LEQUAL, this field is 3]
 683                  *
 684                  * Otherwise, this field is 0.
 685                  */
 686                 GLuint texture_compare_func : 3;
 687         } unit[16];
 688 };
 689
 690
 691 struct r300_fragment_program_node {
 692         int tex_offset; /**< first tex instruction */
 693         int tex_end; /**< last tex instruction, relative to tex_offset */
 694         int alu_offset; /**< first ALU instruction */
 695         int alu_end; /**< last ALU instruction, relative to alu_offset */
 696         int flags;
 697 };
 698
 699 /**
 700  * Stores an R300 fragment program in its compiled-to-hardware form.
 701  */
 702 struct r300_fragment_program_code {
 703         struct {
 704                 int length; /**< total # of texture instructions used */
 705                 GLuint inst[PFS_MAX_TEX_INST];
 706         } tex;
 707
 708         struct {
 709                 int length; /**< total # of ALU instructions used */
 710                 struct {
 711                         GLuint inst0;
 712                         GLuint inst1;
 713                         GLuint inst2;
 714                         GLuint inst3;
 715                 } inst[PFS_MAX_ALU_INST];
 716         } alu;
 717
 718         struct r300_fragment_program_node node[4];
 719         int cur_node;
 720         int first_node_has_tex;
 721
 722         /**
 723          * Remember which program register a given hardware constant
 724          * belongs to.
 725          */
 726         struct prog_src_register constant[PFS_NUM_CONST_REGS];
 727         int const_nr;
 728
 729         int max_temp_idx;
 730 };
 731
 732 /**
 733  * Store everything about a fragment program that is needed
 734  * to render with that program.
 735  */
 736 struct r300_fragment_program {
 737         struct gl_fragment_program mesa_program;
 738
 739         GLboolean translated;
 740         GLboolean error;
 741
 742         struct r300_fragment_program_external_state state;
 743         struct r300_fragment_program_code code;
 744
 745         GLboolean WritesDepth;
 746         GLuint optimization;
 747 };
 748
 749 struct r500_pfs_compile_state;
 750
 751 struct r500_fragment_program_external_state {
 752         struct {
 753                 /**
 754                  * If the sampler is used as a shadow sampler,
 755                  * this field is:
 756                  *  0 - GL_LUMINANCE
 757                  *  1 - GL_INTENSITY
 758                  *  2 - GL_ALPHA
 759                  * depending on the depth texture mode.
 760                  */
 761                 GLuint depth_texture_mode : 2;
 762
 763                 /**
 764                  * If the sampler is used as a shadow sampler,
 765                  * this field is (texture_compare_func - GL_NEVER).
 766                  * [e.g. if compare function is GL_LEQUAL, this field is 3]
 767                  *
 768                  * Otherwise, this field is 0.
 769                  */
 770                 GLuint texture_compare_func : 3;
 771         } unit[16];
 772 };
 773
 774 struct r500_fragment_program_code {
 775         struct {
 776                 GLuint inst0;
 777                 GLuint inst1;
 778                 GLuint inst2;
 779                 GLuint inst3;
 780                 GLuint inst4;
 781                 GLuint inst5;
 782         } inst[512];
 783
 784         int inst_offset;
 785         int inst_end;
 786
 787         /**
 788          * Remember which program register a given hardware constant
 789          * belongs to.
 790          */
 791         struct prog_src_register constant[PFS_NUM_CONST_REGS];
 792         int const_nr;
 793
 794         int max_temp_idx;
 795 };
 796
 797 struct r500_fragment_program {
 798         struct gl_fragment_program mesa_program;
 799
 800         GLcontext *ctx;
 801         GLboolean translated;
 802         GLboolean error;
 803
 804         struct r500_fragment_program_external_state state;
 805         struct r500_fragment_program_code code;
 806
 807         GLboolean writes_depth;
 808
 809         GLuint optimization;
 810 };
 811
 812 #define R300_MAX_AOS_ARRAYS             16
 813
 814 #define REG_COORDS      0
 815 #define REG_COLOR0      1
 816 #define REG_TEX0        2
 817
 818 struct r300_state {
 819         struct r300_depthbuffer_state depth;
 820         struct r300_texture_state texture;
 821         int sw_tcl_inputs[VERT_ATTRIB_MAX];
 822         struct r300_vertex_shader_state vertex_shader;
 823         struct r300_dma_region aos[R300_MAX_AOS_ARRAYS];
 824         int aos_count;
 825
 826         GLuint *Elts;
 827         struct r300_dma_region elt_dma;
 828
 829         struct r300_dma_region swtcl_dma;
 830         DECLARE_RENDERINPUTS(render_inputs_bitset);     /* actual render inputs that R300 was configured for.
 831                                                            They are the same as tnl->render_inputs for fixed pipeline */
 832
 833         struct r300_stencilbuffer_state stencil;
 834
 835 };
 836
 837 #define R300_FALLBACK_NONE 0
 838 #define R300_FALLBACK_TCL 1
 839 #define R300_FALLBACK_RAST 2
 840
 841 /* r300_swtcl.c
 842  */
 843 struct r300_swtcl_info {
 844    GLuint RenderIndex;
 845
 846    /**
 847     * Size of a hardware vertex.  This is calculated when \c ::vertex_attrs is
 848     * installed in the Mesa state vector.
 849     */
 850    GLuint vertex_size;
 851
 852    /**
 853     * Attributes instructing the Mesa TCL pipeline where / how to put vertex
 854     * data in the hardware buffer.
 855     */
 856    struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
 857
 858    /**
 859     * Number of elements of \c ::vertex_attrs that are actually used.
 860     */
 861    GLuint vertex_attr_count;
 862
 863    /**
 864     * Cached pointer to the buffer where Mesa will store vertex data.
 865     */
 866    GLubyte *verts;
 867
 868    /* Fallback rasterization functions
 869     */
 870   //   r200_point_func draw_point;
 871   //   r200_line_func draw_line;
 872   //   r200_tri_func draw_tri;
 873
 874    GLuint hw_primitive;
 875    GLenum render_primitive;
 876    GLuint numverts;
 877
 878    /**
 879     * Offset of the 4UB color data within a hardware (swtcl) vertex.
 880     */
 881    GLuint coloroffset;
 882
 883    /**
 884     * Offset of the 3UB specular color data within a hardware (swtcl) vertex.
 885     */
 886    GLuint specoffset;
 887
 888    /**
 889     * Should Mesa project vertex data or will the hardware do it?
 890     */
 891    GLboolean needproj;
 892
 893    struct r300_dma_region indexed_verts;
 894 };
 895
 896
 897 /**
 898  * \brief R300 context structure.
 899  */
 900 struct r300_context {
 901         struct radeon_context radeon;   /* parent class, must be first */
 902
 903         struct r300_hw_state hw;
 904         struct r300_cmdbuf cmdbuf;
 905         struct r300_state state;
 906         struct gl_vertex_program *curr_vp;
 907         struct r300_vertex_program *selected_vp;
 908
 909         /* Vertex buffers
 910          */
 911         struct r300_dma dma;
 912         GLboolean save_on_next_unlock;
 913         GLuint NewGLState;
 914
 915         /* Texture object bookkeeping
 916          */
 917         unsigned nr_heaps;
 918         driTexHeap *texture_heaps[RADEON_NR_TEX_HEAPS];
 919         driTextureObject swapped;
 920         int texture_depth;
 921         float initialMaxAnisotropy;
 922
 923         /* Clientdata textures;
 924          */
 925         GLuint prefer_gart_client_texturing;
 926
 927 #ifdef USER_BUFFERS
 928         struct r300_memory_manager *rmm;
 929 #endif
 930
 931         GLvector4f dummy_attrib[_TNL_ATTRIB_MAX];
 932         GLvector4f *temp_attrib[_TNL_ATTRIB_MAX];
 933
 934         GLboolean disable_lowimpact_fallback;
 935
 936         DECLARE_RENDERINPUTS(tnl_index_bitset); /* index of bits for last tnl_install_attrs */
 937         struct r300_swtcl_info swtcl;
 938 };
 939
 940 struct r300_buffer_object {
 941         struct gl_buffer_object mesa_obj;
 942         int id;
 943 };
 944
 945 #define R300_CONTEXT(ctx)               ((r300ContextPtr)(ctx->DriverCtx))
 946
 947 extern void r300DestroyContext(__DRIcontextPrivate * driContextPriv);
 948 extern GLboolean r300CreateContext(const __GLcontextModes * glVisual,
 949                                    __DRIcontextPrivate * driContextPriv,
 950                                    void *sharedContextPrivate);
 951
 952 extern void r300SelectVertexShader(r300ContextPtr r300);
 953 extern void r300InitShaderFuncs(struct dd_function_table *functions);
 954 extern int r300VertexProgUpdateParams(GLcontext * ctx,
 955                                       struct r300_vertex_program_cont *vp,
 956                                       float *dst);
 957
 958 #define RADEON_D_CAPTURE 0
 959 #define RADEON_D_PLAYBACK 1
 960 #define RADEON_D_PLAYBACK_RAW 2
 961 #define RADEON_D_T 3
 962
 963 #endif                          /* __R300_CONTEXT_H__ */