src/mesa/drivers/dri/r300/r300_context.h

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /**
  31  * \file
  32  *
  33  * \author Keith Whitwell <keith@tungstengraphics.com>
  34  * \author Nicolai Haehnle <prefect_@gmx.net>
  35  */
  36
  37 #ifndef __R300_CONTEXT_H__
  38 #define __R300_CONTEXT_H__
  39
  40 #include "tnl/t_vertex.h"
  41 #include "drm.h"
  42 #include "radeon_drm.h"
  43 #include "dri_util.h"
  44 #include "texmem.h"
  45
  46 #include "main/macros.h"
  47 #include "main/mtypes.h"
  48 #include "main/colormac.h"
  49
  50 #define USER_BUFFERS
  51
  52 struct r300_context;
  53 typedef struct r300_context r300ContextRec;
  54 typedef struct r300_context *r300ContextPtr;
  55
  56 #include "radeon_lock.h"
  57 #include "main/mm.h"
  58
  59 /* From http://gcc.gnu.org/onlinedocs/gcc-3.2.3/gcc/Variadic-Macros.html .
  60    I suppose we could inline this and use macro to fetch out __LINE__ and stuff in case we run into trouble
  61    with other compilers ... GLUE!
  62 */
  63 #define WARN_ONCE(a, ...)       { \
  64         static int warn##__LINE__=1; \
  65         if(warn##__LINE__){ \
  66                 fprintf(stderr, "*********************************WARN_ONCE*********************************\n"); \
  67                 fprintf(stderr, "File %s function %s line %d\n", \
  68                         __FILE__, __FUNCTION__, __LINE__); \
  69                 fprintf(stderr,  a, ## __VA_ARGS__);\
  70                 fprintf(stderr, "***************************************************************************\n"); \
  71                 warn##__LINE__=0;\
  72                 } \
  73         }
  74
  75 #include "r300_vertprog.h"
  76 #include "r500_fragprog.h"
  77
  78 /**
  79  * This function takes a float and packs it into a uint32_t
  80  */
  81 static INLINE uint32_t r300PackFloat32(float fl)
  82 {
  83         union {
  84                 float fl;
  85                 uint32_t u;
  86         } u;
  87
  88         u.fl = fl;
  89         return u.u;
  90 }
  91
  92 /* This is probably wrong for some values, I need to test this
  93  * some more.  Range checking would be a good idea also..
  94  *
  95  * But it works for most things.  I'll fix it later if someone
  96  * else with a better clue doesn't
  97  */
  98 static INLINE uint32_t r300PackFloat24(float f)
  99 {
 100         float mantissa;
 101         int exponent;
 102         uint32_t float24 = 0;
 103
 104         if (f == 0.0)
 105                 return 0;
 106
 107         mantissa = frexpf(f, &exponent);
 108
 109         /* Handle -ve */
 110         if (mantissa < 0) {
 111                 float24 |= (1 << 23);
 112                 mantissa = mantissa * -1.0;
 113         }
 114         /* Handle exponent, bias of 63 */
 115         exponent += 62;
 116         float24 |= (exponent << 16);
 117         /* Kill 7 LSB of mantissa */
 118         float24 |= (r300PackFloat32(mantissa) & 0x7FFFFF) >> 7;
 119
 120         return float24;
 121 }
 122
 123 /************ DMA BUFFERS **************/
 124
 125 /* Need refcounting on dma buffers:
 126  */
 127 struct r300_dma_buffer {
 128         int refcount;           /**< the number of retained regions in buf */
 129         drmBufPtr buf;
 130         int id;
 131 };
 132 #undef GET_START
 133 #ifdef USER_BUFFERS
 134 #define GET_START(rvb) (r300GartOffsetFromVirtual(rmesa, (rvb)->address+(rvb)->start))
 135 #else
 136 #define GET_START(rvb) (rmesa->radeon.radeonScreen->gart_buffer_offset +                \
 137                         (rvb)->address - rmesa->dma.buf0_address +      \
 138                         (rvb)->start)
 139 #endif
 140 /* A retained region, eg vertices for indexed vertices.
 141  */
 142 struct r300_dma_region {
 143         struct r300_dma_buffer *buf;
 144         char *address;          /* == buf->address */
 145         int start, end, ptr;    /* offsets from start of buf */
 146
 147         int aos_offset;         /* address in GART memory */
 148         int aos_stride;         /* distance between elements, in dwords */
 149         int aos_size;           /* number of components (1-4) */
 150 };
 151
 152 struct r300_dma {
 153         /* Active dma region.  Allocations for vertices and retained
 154          * regions come from here.  Also used for emitting random vertices,
 155          * these may be flushed by calling flush_current();
 156          */
 157         struct r300_dma_region current;
 158
 159         void (*flush) (r300ContextPtr);
 160
 161         char *buf0_address;     /* start of buf[0], for index calcs */
 162
 163         /* Number of "in-flight" DMA buffers, i.e. the number of buffers
 164          * for which a DISCARD command is currently queued in the command buffer.
 165          */
 166         GLuint nr_released_bufs;
 167 };
 168
 169        /* Texture related */
 170
 171 typedef struct r300_tex_obj r300TexObj, *r300TexObjPtr;
 172
 173 /* Texture object in locally shared texture space.
 174  */
 175 struct r300_tex_obj {
 176         driTextureObject base;
 177
 178         GLuint bufAddr;         /* Offset to start of locally
 179                                    shared texture block */
 180
 181         drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];
 182         /* Six, for the cube faces */
 183
 184         GLboolean image_override;       /* Image overridden by GLX_EXT_tfp */
 185
 186         GLuint pitch;           /* this isn't sent to hardware just used in calculations */
 187         /* hardware register values */
 188         /* Note that R200 has 8 registers per texture and R300 only 7 */
 189         GLuint filter;
 190         GLuint filter_1;
 191         GLuint pitch_reg;
 192         GLuint size;            /* npot only */
 193         GLuint format;
 194         GLuint offset;          /* Image location in the card's address space.
 195                                    All cube faces follow. */
 196         GLuint unknown4;
 197         GLuint unknown5;
 198         /* end hardware registers */
 199
 200         /* registers computed by r200 code - keep them here to
 201            compare against what is actually written.
 202
 203            to be removed later.. */
 204         GLuint pp_border_color;
 205         GLuint pp_cubic_faces;  /* cube face 1,2,3,4 log2 sizes */
 206         GLuint format_x;
 207
 208         GLboolean border_fallback;
 209
 210         GLuint tile_bits;       /* hw texture tile bits used on this texture */
 211 };
 212
 213 struct r300_texture_env_state {
 214         r300TexObjPtr texobj;
 215         GLenum format;
 216         GLenum envMode;
 217 };
 218
 219 /* The blit width for texture uploads
 220  */
 221 #define R300_BLIT_WIDTH_BYTES 1024
 222 #define R300_MAX_TEXTURE_UNITS 8
 223
 224 struct r300_texture_state {
 225         struct r300_texture_env_state unit[R300_MAX_TEXTURE_UNITS];
 226         int tc_count;           /* number of incoming texture coordinates from VAP */
 227 };
 228
 229 /**
 230  * A block of hardware state.
 231  *
 232  * When check returns non-zero, the returned number of dwords must be
 233  * copied verbatim into the command buffer in order to update a state atom
 234  * when it is dirty.
 235  */
 236 struct r300_state_atom {
 237         struct r300_state_atom *next, *prev;
 238         const char *name;       /* for debug */
 239         int cmd_size;           /* maximum size in dwords */
 240         GLuint idx;             /* index in an array (e.g. textures) */
 241         uint32_t *cmd;
 242         GLboolean dirty;
 243
 244         int (*check) (r300ContextPtr, struct r300_state_atom * atom);
 245 };
 246
 247 #define R300_VPT_CMD_0          0
 248 #define R300_VPT_XSCALE         1
 249 #define R300_VPT_XOFFSET        2
 250 #define R300_VPT_YSCALE         3
 251 #define R300_VPT_YOFFSET        4
 252 #define R300_VPT_ZSCALE         5
 253 #define R300_VPT_ZOFFSET        6
 254 #define R300_VPT_CMDSIZE        7
 255
 256 #define R300_VIR_CMD_0          0       /* vir is variable size (at least 1) */
 257 #define R300_VIR_CNTL_0         1
 258 #define R300_VIR_CNTL_1         2
 259 #define R300_VIR_CNTL_2         3
 260 #define R300_VIR_CNTL_3         4
 261 #define R300_VIR_CNTL_4         5
 262 #define R300_VIR_CNTL_5         6
 263 #define R300_VIR_CNTL_6         7
 264 #define R300_VIR_CNTL_7         8
 265 #define R300_VIR_CMDSIZE        9
 266
 267 #define R300_VIC_CMD_0          0
 268 #define R300_VIC_CNTL_0         1
 269 #define R300_VIC_CNTL_1         2
 270 #define R300_VIC_CMDSIZE        3
 271
 272 #define R300_VOF_CMD_0          0
 273 #define R300_VOF_CNTL_0         1
 274 #define R300_VOF_CNTL_1         2
 275 #define R300_VOF_CMDSIZE        3
 276
 277 #define R300_PVS_CMD_0          0
 278 #define R300_PVS_CNTL_1         1
 279 #define R300_PVS_CNTL_2         2
 280 #define R300_PVS_CNTL_3         3
 281 #define R300_PVS_CMDSIZE        4
 282
 283 #define R300_GB_MISC_CMD_0              0
 284 #define R300_GB_MISC_MSPOS_0            1
 285 #define R300_GB_MISC_MSPOS_1            2
 286 #define R300_GB_MISC_TILE_CONFIG        3
 287 #define R300_GB_MISC_SELECT             4
 288 #define R300_GB_MISC_AA_CONFIG          5
 289 #define R300_GB_MISC_CMDSIZE            6
 290
 291 #define R300_TXE_CMD_0          0
 292 #define R300_TXE_ENABLE         1
 293 #define R300_TXE_CMDSIZE        2
 294
 295 #define R300_PS_CMD_0           0
 296 #define R300_PS_POINTSIZE       1
 297 #define R300_PS_CMDSIZE         2
 298
 299 #define R300_ZBS_CMD_0          0
 300 #define R300_ZBS_T_FACTOR       1
 301 #define R300_ZBS_T_CONSTANT     2
 302 #define R300_ZBS_W_FACTOR       3
 303 #define R300_ZBS_W_CONSTANT     4
 304 #define R300_ZBS_CMDSIZE        5
 305
 306 #define R300_CUL_CMD_0          0
 307 #define R300_CUL_CULL           1
 308 #define R300_CUL_CMDSIZE        2
 309
 310 #define R300_RC_CMD_0           0
 311 #define R300_RC_CNTL_0          1
 312 #define R300_RC_CNTL_1          2
 313 #define R300_RC_CMDSIZE         3
 314
 315 #define R300_RI_CMD_0           0
 316 #define R300_RI_INTERP_0        1
 317 #define R300_RI_INTERP_1        2
 318 #define R300_RI_INTERP_2        3
 319 #define R300_RI_INTERP_3        4
 320 #define R300_RI_INTERP_4        5
 321 #define R300_RI_INTERP_5        6
 322 #define R300_RI_INTERP_6        7
 323 #define R300_RI_INTERP_7        8
 324 #define R300_RI_CMDSIZE         9
 325
 326 #define R500_RI_CMDSIZE        17
 327
 328 #define R300_RR_CMD_0           0       /* rr is variable size (at least 1) */
 329 #define R300_RR_INST_0          1
 330 #define R300_RR_INST_1          2
 331 #define R300_RR_INST_2          3
 332 #define R300_RR_INST_3          4
 333 #define R300_RR_INST_4          5
 334 #define R300_RR_INST_5          6
 335 #define R300_RR_INST_6          7
 336 #define R300_RR_INST_7          8
 337 #define R300_RR_CMDSIZE         9
 338
 339 #define R300_FP_CMD_0           0
 340 #define R300_FP_CNTL0           1
 341 #define R300_FP_CNTL1           2
 342 #define R300_FP_CNTL2           3
 343 #define R300_FP_CMD_1           4
 344 #define R300_FP_NODE0           5
 345 #define R300_FP_NODE1           6
 346 #define R300_FP_NODE2           7
 347 #define R300_FP_NODE3           8
 348 #define R300_FP_CMDSIZE         9
 349
 350 #define R500_FP_CMD_0           0
 351 #define R500_FP_CNTL            1
 352 #define R500_FP_PIXSIZE         2
 353 #define R500_FP_CMD_1           3
 354 #define R500_FP_CODE_ADDR       4
 355 #define R500_FP_CODE_RANGE      5
 356 #define R500_FP_CODE_OFFSET     6
 357 #define R500_FP_CMD_2           7
 358 #define R500_FP_FC_CNTL         8
 359 #define R500_FP_CMDSIZE         9
 360
 361 #define R300_FPT_CMD_0          0
 362 #define R300_FPT_INSTR_0        1
 363 #define R300_FPT_CMDSIZE        65
 364
 365 #define R300_FPI_CMD_0          0
 366 #define R300_FPI_INSTR_0        1
 367 #define R300_FPI_CMDSIZE        65
 368 /* R500 has space for 512 instructions - 6 dwords per instruction */
 369 #define R500_FPI_CMDSIZE        (512*6+1)
 370
 371 #define R300_FPP_CMD_0          0
 372 #define R300_FPP_PARAM_0        1
 373 #define R300_FPP_CMDSIZE        (32*4+1)
 374 /* R500 has spcae for 256 constants - 4 dwords per constant */
 375 #define R500_FPP_CMDSIZE        (256*4+1)
 376
 377 #define R300_FOGS_CMD_0         0
 378 #define R300_FOGS_STATE         1
 379 #define R300_FOGS_CMDSIZE       2
 380
 381 #define R300_FOGC_CMD_0         0
 382 #define R300_FOGC_R             1
 383 #define R300_FOGC_G             2
 384 #define R300_FOGC_B             3
 385 #define R300_FOGC_CMDSIZE       4
 386
 387 #define R300_FOGP_CMD_0         0
 388 #define R300_FOGP_SCALE         1
 389 #define R300_FOGP_START         2
 390 #define R300_FOGP_CMDSIZE       3
 391
 392 #define R300_AT_CMD_0           0
 393 #define R300_AT_ALPHA_TEST      1
 394 #define R300_AT_UNKNOWN         2
 395 #define R300_AT_CMDSIZE         3
 396
 397 #define R300_BLD_CMD_0          0
 398 #define R300_BLD_CBLEND         1
 399 #define R300_BLD_ABLEND         2
 400 #define R300_BLD_CMDSIZE        3
 401
 402 #define R300_CMK_CMD_0          0
 403 #define R300_CMK_COLORMASK      1
 404 #define R300_CMK_CMDSIZE        2
 405
 406 #define R300_CB_CMD_0           0
 407 #define R300_CB_OFFSET          1
 408 #define R300_CB_CMD_1           2
 409 #define R300_CB_PITCH           3
 410 #define R300_CB_CMDSIZE         4
 411
 412 #define R300_ZS_CMD_0           0
 413 #define R300_ZS_CNTL_0          1
 414 #define R300_ZS_CNTL_1          2
 415 #define R300_ZS_CNTL_2          3
 416 #define R300_ZS_CMDSIZE         4
 417
 418 #define R300_ZB_CMD_0           0
 419 #define R300_ZB_OFFSET          1
 420 #define R300_ZB_PITCH           2
 421 #define R300_ZB_CMDSIZE         3
 422
 423 #define R300_VAP_CNTL_FLUSH     0
 424 #define R300_VAP_CNTL_FLUSH_1   1
 425 #define R300_VAP_CNTL_CMD       2
 426 #define R300_VAP_CNTL_INSTR     3
 427 #define R300_VAP_CNTL_SIZE      4
 428
 429 #define R300_VPI_CMD_0          0
 430 #define R300_VPI_INSTR_0        1
 431 #define R300_VPI_CMDSIZE        1025    /* 256 16 byte instructions */
 432
 433 #define R300_VPP_CMD_0          0
 434 #define R300_VPP_PARAM_0        1
 435 #define R300_VPP_CMDSIZE        1025    /* 256 4-component parameters */
 436
 437 #define R300_VPUCP_CMD_0                0
 438 #define R300_VPUCP_X            1
 439 #define R300_VPUCP_Y            2
 440 #define R300_VPUCP_Z            3
 441 #define R300_VPUCP_W            4
 442 #define R300_VPUCP_CMDSIZE      5       /* 256 4-component parameters */
 443
 444 #define R300_VPS_CMD_0          0
 445 #define R300_VPS_ZERO_0         1
 446 #define R300_VPS_ZERO_1         2
 447 #define R300_VPS_POINTSIZE      3
 448 #define R300_VPS_ZERO_3         4
 449 #define R300_VPS_CMDSIZE        5
 450
 451         /* the layout is common for all fields inside tex */
 452 #define R300_TEX_CMD_0          0
 453 #define R300_TEX_VALUE_0        1
 454 /* We don't really use this, instead specify mtu+1 dynamically
 455 #define R300_TEX_CMDSIZE        (MAX_TEXTURE_UNITS+1)
 456 */
 457
 458 /**
 459  * Cache for hardware register state.
 460  */
 461 struct r300_hw_state {
 462         struct r300_state_atom atomlist;
 463
 464         GLboolean is_dirty;
 465         GLboolean all_dirty;
 466         int max_state_size;     /* in dwords */
 467
 468         struct r300_state_atom vpt;     /* viewport (1D98) */
 469         struct r300_state_atom vap_cntl;
 470         struct r300_state_atom vap_index_offset; /* 0x208c r5xx only */
 471         struct r300_state_atom vof;     /* VAP output format register 0x2090 */
 472         struct r300_state_atom vte;     /* (20B0) */
 473         struct r300_state_atom vap_vf_max_vtx_indx;     /* Maximum Vertex Indx Clamp (2134) */
 474         struct r300_state_atom vap_cntl_status;
 475         struct r300_state_atom vir[2];  /* vap input route (2150/21E0) */
 476         struct r300_state_atom vic;     /* vap input control (2180) */
 477         struct r300_state_atom vap_psc_sgn_norm_cntl; /* Programmable Stream Control Signed Normalize Control (21DC) */
 478         struct r300_state_atom vap_clip_cntl;
 479         struct r300_state_atom vap_clip;
 480         struct r300_state_atom vap_pvs_vtx_timeout_reg; /* Vertex timeout register (2288) */
 481         struct r300_state_atom pvs;     /* pvs_cntl (22D0) */
 482         struct r300_state_atom gb_enable;       /* (4008) */
 483         struct r300_state_atom gb_misc; /* Multisampling position shifts ? (4010) */
 484         struct r300_state_atom ga_point_s0;     /* S Texture Coordinate of Vertex 0 for Point texture stuffing (LLC) (4200) */
 485         struct r300_state_atom ga_triangle_stipple;     /* (4214) */
 486         struct r300_state_atom ps;      /* pointsize (421C) */
 487         struct r300_state_atom ga_point_minmax; /* (4230) */
 488         struct r300_state_atom lcntl;   /* line control */
 489         struct r300_state_atom ga_line_stipple; /* (4260) */
 490         struct r300_state_atom shade;
 491         struct r300_state_atom polygon_mode;
 492         struct r300_state_atom fogp;    /* fog parameters (4294) */
 493         struct r300_state_atom ga_soft_reset;   /* (429C) */
 494         struct r300_state_atom zbias_cntl;
 495         struct r300_state_atom zbs;     /* zbias (42A4) */
 496         struct r300_state_atom occlusion_cntl;
 497         struct r300_state_atom cul;     /* cull cntl (42B8) */
 498         struct r300_state_atom su_depth_scale;  /* (42C0) */
 499         struct r300_state_atom rc;      /* rs control (4300) */
 500         struct r300_state_atom ri;      /* rs interpolators (4310) */
 501         struct r300_state_atom rr;      /* rs route (4330) */
 502         struct r300_state_atom sc_hyperz;       /* (43A4) */
 503         struct r300_state_atom sc_screendoor;   /* (43E8) */
 504         struct r300_state_atom fp;      /* fragment program cntl + nodes (4600) */
 505         struct r300_state_atom fpt;     /* texi - (4620) */
 506         struct r300_state_atom us_out_fmt;      /* (46A4) */
 507         struct r300_state_atom r500fp;  /* r500 fp instructions */
 508         struct r300_state_atom r500fp_const;    /* r500 fp constants */
 509         struct r300_state_atom fpi[4];  /* fp instructions (46C0/47C0/48C0/49C0) */
 510         struct r300_state_atom fogs;    /* fog state (4BC0) */
 511         struct r300_state_atom fogc;    /* fog color (4BC8) */
 512         struct r300_state_atom at;      /* alpha test (4BD4) */
 513         struct r300_state_atom fg_depth_src;    /* (4BD8) */
 514         struct r300_state_atom fpp;     /* 0x4C00 and following */
 515         struct r300_state_atom rb3d_cctl;       /* (4E00) */
 516         struct r300_state_atom bld;     /* blending (4E04) */
 517         struct r300_state_atom cmk;     /* colormask (4E0C) */
 518         struct r300_state_atom blend_color;     /* constant blend color */
 519         struct r300_state_atom rop;     /* ropcntl */
 520         struct r300_state_atom cb;      /* colorbuffer (4E28) */
 521         struct r300_state_atom rb3d_dither_ctl; /* (4E50) */
 522         struct r300_state_atom rb3d_aaresolve_ctl;      /* (4E88) */
 523         struct r300_state_atom rb3d_discard_src_pixel_lte_threshold;    /* (4E88) I saw it only written on RV350 hardware..  */
 524         struct r300_state_atom zs;      /* zstencil control (4F00) */
 525         struct r300_state_atom zstencil_format;
 526         struct r300_state_atom zb;      /* z buffer (4F20) */
 527         struct r300_state_atom zb_depthclearvalue;      /* (4F28) */
 528         struct r300_state_atom unk4F30; /* (4F30) */
 529         struct r300_state_atom zb_hiz_offset;   /* (4F44) */
 530         struct r300_state_atom zb_hiz_pitch;    /* (4F54) */
 531
 532         struct r300_state_atom vpi;     /* vp instructions */
 533         struct r300_state_atom vpp;     /* vp parameters */
 534         struct r300_state_atom vps;     /* vertex point size (?) */
 535         struct r300_state_atom vpucp[6];        /* vp user clip plane - 6 */
 536         /* 8 texture units */
 537         /* the state is grouped by function and not by
 538            texture unit. This makes single unit updates
 539            really awkward - we are much better off
 540            updating the whole thing at once */
 541         struct {
 542                 struct r300_state_atom filter;
 543                 struct r300_state_atom filter_1;
 544                 struct r300_state_atom size;
 545                 struct r300_state_atom format;
 546                 struct r300_state_atom pitch;
 547                 struct r300_state_atom offset;
 548                 struct r300_state_atom chroma_key;
 549                 struct r300_state_atom border_color;
 550         } tex;
 551         struct r300_state_atom txe;     /* tex enable (4104) */
 552 };
 553
 554 /**
 555  * This structure holds the command buffer while it is being constructed.
 556  *
 557  * The first batch of commands in the buffer is always the state that needs
 558  * to be re-emitted when the context is lost. This batch can be skipped
 559  * otherwise.
 560  */
 561 struct r300_cmdbuf {
 562         int size;               /* DWORDs allocated for buffer */
 563         uint32_t *cmd_buf;
 564         int count_used;         /* DWORDs filled so far */
 565         int count_reemit;       /* size of re-emission batch */
 566 };
 567
 568 /**
 569  * State cache
 570  */
 571
 572 struct r300_depthbuffer_state {
 573         GLfloat scale;
 574 };
 575
 576 struct r300_stencilbuffer_state {
 577         GLboolean hw_stencil;
 578 };
 579
 580 /* Vertex shader state */
 581
 582 /* Perhaps more if we store programs in vmem? */
 583 /* drm_r300_cmd_header_t->vpu->count is unsigned char */
 584 #define VSF_MAX_FRAGMENT_LENGTH (255*4)
 585
 586 /* Can be tested with colormat currently. */
 587 #define VSF_MAX_FRAGMENT_TEMPS (14)
 588
 589 #define STATE_R300_WINDOW_DIMENSION (STATE_INTERNAL_DRIVER+0)
 590 #define STATE_R300_TEXRECT_FACTOR (STATE_INTERNAL_DRIVER+1)
 591
 592 struct r300_vertex_shader_fragment {
 593         int length;
 594         union {
 595                 GLuint d[VSF_MAX_FRAGMENT_LENGTH];
 596                 float f[VSF_MAX_FRAGMENT_LENGTH];
 597                 GLuint i[VSF_MAX_FRAGMENT_LENGTH];
 598         } body;
 599 };
 600
 601 struct r300_vertex_shader_state {
 602         struct r300_vertex_shader_fragment program;
 603 };
 604
 605 extern int hw_tcl_on;
 606
 607 #define COLOR_IS_RGBA
 608 #define TAG(x) r300##x
 609 #include "tnl_dd/t_dd_vertex.h"
 610 #undef TAG
 611
 612 //#define CURRENT_VERTEX_SHADER(ctx) (ctx->VertexProgram._Current)
 613 #define CURRENT_VERTEX_SHADER(ctx) (R300_CONTEXT(ctx)->selected_vp)
 614
 615 /* Should but doesnt work */
 616 //#define CURRENT_VERTEX_SHADER(ctx) (R300_CONTEXT(ctx)->curr_vp)
 617
 618 /* r300_vertex_shader_state and r300_vertex_program should probably be merged together someday.
 619  * Keeping them them seperate for now should ensure fixed pipeline keeps functioning properly.
 620  */
 621
 622 struct r300_vertex_program_key {
 623         GLuint InputsRead;
 624         GLuint OutputsWritten;
 625         GLuint OutputsAdded;
 626 };
 627
 628 struct r300_vertex_program {
 629         struct r300_vertex_program *next;
 630         struct r300_vertex_program_key key;
 631         int translated;
 632
 633         struct r300_vertex_shader_fragment program;
 634
 635         int pos_end;
 636         int num_temporaries;    /* Number of temp vars used by program */
 637         int wpos_idx;
 638         int inputs[VERT_ATTRIB_MAX];
 639         int outputs[VERT_RESULT_MAX];
 640         int native;
 641         int ref_count;
 642         int use_ref_count;
 643 };
 644
 645 struct r300_vertex_program_cont {
 646         struct gl_vertex_program mesa_program;  /* Must be first */
 647         struct r300_vertex_shader_fragment params;
 648         struct r300_vertex_program *progs;
 649 };
 650
 651 #define PFS_MAX_ALU_INST        64
 652 #define PFS_MAX_TEX_INST        64
 653 #define PFS_MAX_TEX_INDIRECT 4
 654 #define PFS_NUM_TEMP_REGS       32
 655 #define PFS_NUM_CONST_REGS      16
 656
 657 struct r300_pfs_compile_state;
 658
 659
 660 /**
 661  * Stores state that influences the compilation of a fragment program.
 662  */
 663 struct r300_fragment_program_external_state {
 664         struct {
 665                 /**
 666                  * If the sampler is used as a shadow sampler,
 667                  * this field is:
 668                  *  0 - GL_LUMINANCE
 669                  *  1 - GL_INTENSITY
 670                  *  2 - GL_ALPHA
 671                  * depending on the depth texture mode.
 672                  */
 673                 GLuint depth_texture_mode : 2;
 674
 675                 /**
 676                  * If the sampler is used as a shadow sampler,
 677                  * this field is (texture_compare_func - GL_NEVER).
 678                  * [e.g. if compare function is GL_LEQUAL, this field is 3]
 679                  *
 680                  * Otherwise, this field is 0.
 681                  */
 682                 GLuint texture_compare_func : 3;
 683         } unit[16];
 684 };
 685
 686
 687 struct r300_fragment_program_node {
 688         int tex_offset; /**< first tex instruction */
 689         int tex_end; /**< last tex instruction, relative to tex_offset */
 690         int alu_offset; /**< first ALU instruction */
 691         int alu_end; /**< last ALU instruction, relative to alu_offset */
 692         int flags;
 693 };
 694
 695 /**
 696  * Stores an R300 fragment program in its compiled-to-hardware form.
 697  */
 698 struct r300_fragment_program_code {
 699         struct {
 700                 int length; /**< total # of texture instructions used */
 701                 GLuint inst[PFS_MAX_TEX_INST];
 702         } tex;
 703
 704         struct {
 705                 int length; /**< total # of ALU instructions used */
 706                 struct {
 707                         GLuint inst0;
 708                         GLuint inst1;
 709                         GLuint inst2;
 710                         GLuint inst3;
 711                 } inst[PFS_MAX_ALU_INST];
 712         } alu;
 713
 714         struct r300_fragment_program_node node[4];
 715         int cur_node;
 716         int first_node_has_tex;
 717
 718         /**
 719          * Remember which program register a given hardware constant
 720          * belongs to.
 721          */
 722         struct prog_src_register constant[PFS_NUM_CONST_REGS];
 723         int const_nr;
 724
 725         int max_temp_idx;
 726 };
 727
 728 /**
 729  * Store everything about a fragment program that is needed
 730  * to render with that program.
 731  */
 732 struct r300_fragment_program {
 733         struct gl_fragment_program mesa_program;
 734
 735         GLboolean translated;
 736         GLboolean error;
 737
 738         struct r300_fragment_program_external_state state;
 739         struct r300_fragment_program_code code;
 740
 741         GLboolean WritesDepth;
 742         GLuint optimization;
 743 };
 744
 745 struct r500_pfs_compile_state;
 746
 747 struct r500_fragment_program_external_state {
 748         struct {
 749                 /**
 750                  * If the sampler is used as a shadow sampler,
 751                  * this field is:
 752                  *  0 - GL_LUMINANCE
 753                  *  1 - GL_INTENSITY
 754                  *  2 - GL_ALPHA
 755                  * depending on the depth texture mode.
 756                  */
 757                 GLuint depth_texture_mode : 2;
 758
 759                 /**
 760                  * If the sampler is used as a shadow sampler,
 761                  * this field is (texture_compare_func - GL_NEVER).
 762                  * [e.g. if compare function is GL_LEQUAL, this field is 3]
 763                  *
 764                  * Otherwise, this field is 0.
 765                  */
 766                 GLuint texture_compare_func : 3;
 767         } unit[16];
 768 };
 769
 770 struct r500_fragment_program_code {
 771         struct {
 772                 GLuint inst0;
 773                 GLuint inst1;
 774                 GLuint inst2;
 775                 GLuint inst3;
 776                 GLuint inst4;
 777                 GLuint inst5;
 778         } inst[512];
 779
 780         int inst_offset;
 781         int inst_end;
 782
 783         /**
 784          * Remember which program register a given hardware constant
 785          * belongs to.
 786          */
 787         struct prog_src_register constant[PFS_NUM_CONST_REGS];
 788         int const_nr;
 789
 790         int max_temp_idx;
 791 };
 792
 793 struct r500_fragment_program {
 794         struct gl_fragment_program mesa_program;
 795
 796         GLcontext *ctx;
 797         GLboolean translated;
 798         GLboolean error;
 799
 800         struct r500_fragment_program_external_state state;
 801         struct r500_fragment_program_code code;
 802
 803         GLboolean writes_depth;
 804
 805         GLuint optimization;
 806 };
 807
 808 #define R300_MAX_AOS_ARRAYS             16
 809
 810 #define REG_COORDS      0
 811 #define REG_COLOR0      1
 812 #define REG_TEX0        2
 813
 814 struct r300_state {
 815         struct r300_depthbuffer_state depth;
 816         struct r300_texture_state texture;
 817         int sw_tcl_inputs[VERT_ATTRIB_MAX];
 818         struct r300_vertex_shader_state vertex_shader;
 819         struct r300_dma_region aos[R300_MAX_AOS_ARRAYS];
 820         int aos_count;
 821
 822         GLuint *Elts;
 823         struct r300_dma_region elt_dma;
 824
 825         struct r300_dma_region swtcl_dma;
 826         DECLARE_RENDERINPUTS(render_inputs_bitset);     /* actual render inputs that R300 was configured for.
 827                                                            They are the same as tnl->render_inputs for fixed pipeline */
 828
 829         struct r300_stencilbuffer_state stencil;
 830
 831 };
 832
 833 #define R300_FALLBACK_NONE 0
 834 #define R300_FALLBACK_TCL 1
 835 #define R300_FALLBACK_RAST 2
 836
 837 /* r300_swtcl.c
 838  */
 839 struct r300_swtcl_info {
 840    GLuint RenderIndex;
 841
 842    /**
 843     * Size of a hardware vertex.  This is calculated when \c ::vertex_attrs is
 844     * installed in the Mesa state vector.
 845     */
 846    GLuint vertex_size;
 847
 848    /**
 849     * Attributes instructing the Mesa TCL pipeline where / how to put vertex
 850     * data in the hardware buffer.
 851     */
 852    struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
 853
 854    /**
 855     * Number of elements of \c ::vertex_attrs that are actually used.
 856     */
 857    GLuint vertex_attr_count;
 858
 859    /**
 860     * Cached pointer to the buffer where Mesa will store vertex data.
 861     */
 862    GLubyte *verts;
 863
 864    /* Fallback rasterization functions
 865     */
 866   //   r200_point_func draw_point;
 867   //   r200_line_func draw_line;
 868   //   r200_tri_func draw_tri;
 869
 870    GLuint hw_primitive;
 871    GLenum render_primitive;
 872    GLuint numverts;
 873
 874    /**
 875     * Offset of the 4UB color data within a hardware (swtcl) vertex.
 876     */
 877    GLuint coloroffset;
 878
 879    /**
 880     * Offset of the 3UB specular color data within a hardware (swtcl) vertex.
 881     */
 882    GLuint specoffset;
 883
 884    /**
 885     * Should Mesa project vertex data or will the hardware do it?
 886     */
 887    GLboolean needproj;
 888
 889    struct r300_dma_region indexed_verts;
 890 };
 891
 892
 893 /**
 894  * \brief R300 context structure.
 895  */
 896 struct r300_context {
 897         struct radeon_context radeon;   /* parent class, must be first */
 898
 899         struct r300_hw_state hw;
 900         struct r300_cmdbuf cmdbuf;
 901         struct r300_state state;
 902         struct gl_vertex_program *curr_vp;
 903         struct r300_vertex_program *selected_vp;
 904
 905         /* Vertex buffers
 906          */
 907         struct r300_dma dma;
 908         GLboolean save_on_next_unlock;
 909         GLuint NewGLState;
 910
 911         /* Texture object bookkeeping
 912          */
 913         unsigned nr_heaps;
 914         driTexHeap *texture_heaps[RADEON_NR_TEX_HEAPS];
 915         driTextureObject swapped;
 916         int texture_depth;
 917         float initialMaxAnisotropy;
 918
 919         /* Clientdata textures;
 920          */
 921         GLuint prefer_gart_client_texturing;
 922
 923 #ifdef USER_BUFFERS
 924         struct r300_memory_manager *rmm;
 925 #endif
 926
 927         GLvector4f dummy_attrib[_TNL_ATTRIB_MAX];
 928         GLvector4f *temp_attrib[_TNL_ATTRIB_MAX];
 929
 930         GLboolean disable_lowimpact_fallback;
 931
 932         DECLARE_RENDERINPUTS(tnl_index_bitset); /* index of bits for last tnl_install_attrs */
 933         struct r300_swtcl_info swtcl;
 934 };
 935
 936 struct r300_buffer_object {
 937         struct gl_buffer_object mesa_obj;
 938         int id;
 939 };
 940
 941 #define R300_CONTEXT(ctx)               ((r300ContextPtr)(ctx->DriverCtx))
 942
 943 extern void r300DestroyContext(__DRIcontextPrivate * driContextPriv);
 944 extern GLboolean r300CreateContext(const __GLcontextModes * glVisual,
 945                                    __DRIcontextPrivate * driContextPriv,
 946                                    void *sharedContextPrivate);
 947
 948 extern void r300SelectVertexShader(r300ContextPtr r300);
 949 extern void r300InitShaderFuncs(struct dd_function_table *functions);
 950 extern int r300VertexProgUpdateParams(GLcontext * ctx,
 951                                       struct r300_vertex_program_cont *vp,
 952                                       float *dst);
 953
 954 #define RADEON_D_CAPTURE 0
 955 #define RADEON_D_PLAYBACK 1
 956 #define RADEON_D_PLAYBACK_RAW 2
 957 #define RADEON_D_T 3
 958
 959 #endif                          /* __R300_CONTEXT_H__ */