src/mesa/drivers/dri/r300/r300_context.h

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /**
  31  * \file
  32  *
  33  * \author Keith Whitwell <keith@tungstengraphics.com>
  34  * \author Nicolai Haehnle <prefect_@gmx.net>
  35  */
  36
  37 #ifndef __R300_CONTEXT_H__
  38 #define __R300_CONTEXT_H__
  39
  40 #include "tnl/t_vertex.h"
  41 #include "drm.h"
  42 #include "radeon_drm.h"
  43 #include "dri_util.h"
  44 #include "texmem.h"
  45
  46 #include "macros.h"
  47 #include "mtypes.h"
  48 #include "colormac.h"
  49
  50 #define USER_BUFFERS
  51
  52 //#define OPTIMIZE_ELTS
  53
  54 struct r300_context;
  55 typedef struct r300_context r300ContextRec;
  56 typedef struct r300_context *r300ContextPtr;
  57
  58 #include "radeon_lock.h"
  59 #include "mm.h"
  60
  61 /* From http://gcc.gnu.org/onlinedocs/gcc-3.2.3/gcc/Variadic-Macros.html .
  62    I suppose we could inline this and use macro to fetch out __LINE__ and stuff in case we run into trouble
  63    with other compilers ... GLUE!
  64 */
  65 #define WARN_ONCE(a, ...)       { \
  66         static int warn##__LINE__=1; \
  67         if(warn##__LINE__){ \
  68                 fprintf(stderr, "*********************************WARN_ONCE*********************************\n"); \
  69                 fprintf(stderr, "File %s function %s line %d\n", \
  70                         __FILE__, __FUNCTION__, __LINE__); \
  71                 fprintf(stderr,  a, ## __VA_ARGS__);\
  72                 fprintf(stderr, "***************************************************************************\n"); \
  73                 warn##__LINE__=0;\
  74                 } \
  75         }
  76
  77 #include "r300_vertprog.h"
  78 #include "r300_fragprog.h"
  79
  80 /**
  81  * This function takes a float and packs it into a uint32_t
  82  */
  83 static __inline__ uint32_t r300PackFloat32(float fl)
  84 {
  85         union {
  86                 float fl;
  87                 uint32_t u;
  88         } u;
  89
  90         u.fl = fl;
  91         return u.u;
  92 }
  93
  94 /* This is probably wrong for some values, I need to test this
  95  * some more.  Range checking would be a good idea also..
  96  *
  97  * But it works for most things.  I'll fix it later if someone
  98  * else with a better clue doesn't
  99  */
 100 static __inline__ uint32_t r300PackFloat24(float f)
 101 {
 102         float mantissa;
 103         int exponent;
 104         uint32_t float24 = 0;
 105
 106         if (f == 0.0)
 107                 return 0;
 108
 109         mantissa = frexpf(f, &exponent);
 110
 111         /* Handle -ve */
 112         if (mantissa < 0) {
 113                 float24 |= (1 << 23);
 114                 mantissa = mantissa * -1.0;
 115         }
 116         /* Handle exponent, bias of 63 */
 117         exponent += 62;
 118         float24 |= (exponent << 16);
 119         /* Kill 7 LSB of mantissa */
 120         float24 |= (r300PackFloat32(mantissa) & 0x7FFFFF) >> 7;
 121
 122         return float24;
 123 }
 124
 125 /************ DMA BUFFERS **************/
 126
 127 /* Need refcounting on dma buffers:
 128  */
 129 struct r300_dma_buffer {
 130         int refcount;           /**< the number of retained regions in buf */
 131         drmBufPtr buf;
 132         int id;
 133 };
 134 #undef GET_START
 135 #ifdef USER_BUFFERS
 136 #define GET_START(rvb) (r300GartOffsetFromVirtual(rmesa, (rvb)->address+(rvb)->start))
 137 #else
 138 #define GET_START(rvb) (rmesa->radeon.radeonScreen->gart_buffer_offset +                \
 139                         (rvb)->address - rmesa->dma.buf0_address +      \
 140                         (rvb)->start)
 141 #endif
 142 /* A retained region, eg vertices for indexed vertices.
 143  */
 144 struct r300_dma_region {
 145         struct r300_dma_buffer *buf;
 146         char *address;          /* == buf->address */
 147         int start, end, ptr;    /* offsets from start of buf */
 148
 149         int aos_offset;         /* address in GART memory */
 150         int aos_stride;         /* distance between elements, in dwords */
 151         int aos_size;           /* number of components (1-4) */
 152         int aos_reg;            /* VAP register assignment */
 153 };
 154
 155 struct r300_dma {
 156         /* Active dma region.  Allocations for vertices and retained
 157          * regions come from here.  Also used for emitting random vertices,
 158          * these may be flushed by calling flush_current();
 159          */
 160         struct r300_dma_region current;
 161
 162         void (*flush) (r300ContextPtr);
 163
 164         char *buf0_address;     /* start of buf[0], for index calcs */
 165
 166         /* Number of "in-flight" DMA buffers, i.e. the number of buffers
 167          * for which a DISCARD command is currently queued in the command buffer.
 168          */
 169         GLuint nr_released_bufs;
 170 };
 171
 172        /* Texture related */
 173
 174 typedef struct r300_tex_obj r300TexObj, *r300TexObjPtr;
 175
 176 /* Texture object in locally shared texture space.
 177  */
 178 struct r300_tex_obj {
 179         driTextureObject base;
 180
 181         GLuint bufAddr;         /* Offset to start of locally
 182                                    shared texture block */
 183
 184         GLuint dirty_state;     /* Flags (1 per texunit) for
 185                                    whether or not this texobj
 186                                    has dirty hardware state
 187                                    (pp_*) that needs to be
 188                                    brought into the
 189                                    texunit. */
 190
 191         drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];
 192         /* Six, for the cube faces */
 193
 194         GLuint pitch;           /* this isn't sent to hardware just used in calculations */
 195         /* hardware register values */
 196         /* Note that R200 has 8 registers per texture and R300 only 7 */
 197         GLuint filter;
 198         GLuint filter_1;
 199         GLuint pitch_reg;
 200         GLuint size;            /* npot only */
 201         GLuint format;
 202         GLuint offset;          /* Image location in the card's address space.
 203                                    All cube faces follow. */
 204         GLuint unknown4;
 205         GLuint unknown5;
 206         /* end hardware registers */
 207
 208         /* registers computed by r200 code - keep them here to
 209            compare against what is actually written.
 210
 211            to be removed later.. */
 212         GLuint pp_border_color;
 213         GLuint pp_cubic_faces;  /* cube face 1,2,3,4 log2 sizes */
 214         GLuint format_x;
 215
 216         GLboolean border_fallback;
 217
 218         GLuint tile_bits;       /* hw texture tile bits used on this texture */
 219 };
 220
 221 struct r300_texture_env_state {
 222         r300TexObjPtr texobj;
 223         GLenum format;
 224         GLenum envMode;
 225 };
 226
 227 /* The blit width for texture uploads
 228  */
 229 #define R300_BLIT_WIDTH_BYTES 1024
 230 #define R300_MAX_TEXTURE_UNITS 8
 231
 232 struct r300_texture_state {
 233         struct r300_texture_env_state unit[R300_MAX_TEXTURE_UNITS];
 234         int tc_count;           /* number of incoming texture coordinates from VAP */
 235 };
 236
 237 /**
 238  * A block of hardware state.
 239  *
 240  * When check returns non-zero, the returned number of dwords must be
 241  * copied verbatim into the command buffer in order to update a state atom
 242  * when it is dirty.
 243  */
 244 struct r300_state_atom {
 245         struct r300_state_atom *next, *prev;
 246         const char *name;       /* for debug */
 247         int cmd_size;           /* maximum size in dwords */
 248         GLuint idx;             /* index in an array (e.g. textures) */
 249         uint32_t *cmd;
 250         GLboolean dirty;
 251
 252         int (*check) (r300ContextPtr, struct r300_state_atom * atom);
 253 };
 254
 255 #define R300_VPT_CMD_0          0
 256 #define R300_VPT_XSCALE         1
 257 #define R300_VPT_XOFFSET        2
 258 #define R300_VPT_YSCALE         3
 259 #define R300_VPT_YOFFSET        4
 260 #define R300_VPT_ZSCALE         5
 261 #define R300_VPT_ZOFFSET        6
 262 #define R300_VPT_CMDSIZE        7
 263
 264 #define R300_VIR_CMD_0          0       /* vir is variable size (at least 1) */
 265 #define R300_VIR_CNTL_0         1
 266 #define R300_VIR_CNTL_1         2
 267 #define R300_VIR_CNTL_2         3
 268 #define R300_VIR_CNTL_3         4
 269 #define R300_VIR_CNTL_4         5
 270 #define R300_VIR_CNTL_5         6
 271 #define R300_VIR_CNTL_6         7
 272 #define R300_VIR_CNTL_7         8
 273 #define R300_VIR_CMDSIZE        9
 274
 275 #define R300_VIC_CMD_0          0
 276 #define R300_VIC_CNTL_0         1
 277 #define R300_VIC_CNTL_1         2
 278 #define R300_VIC_CMDSIZE        3
 279
 280 #define R300_VOF_CMD_0          0
 281 #define R300_VOF_CNTL_0         1
 282 #define R300_VOF_CNTL_1         2
 283 #define R300_VOF_CMDSIZE        3
 284
 285 #define R300_PVS_CMD_0          0
 286 #define R300_PVS_CNTL_1         1
 287 #define R300_PVS_CNTL_2         2
 288 #define R300_PVS_CNTL_3         3
 289 #define R300_PVS_CMDSIZE        4
 290
 291 #define R300_GB_MISC_CMD_0              0
 292 #define R300_GB_MISC_MSPOS_0            1
 293 #define R300_GB_MISC_MSPOS_1            2
 294 #define R300_GB_MISC_TILE_CONFIG        3
 295 #define R300_GB_MISC_SELECT             4
 296 #define R300_GB_MISC_AA_CONFIG          5
 297 #define R300_GB_MISC_CMDSIZE            6
 298
 299 #define R300_TXE_CMD_0          0
 300 #define R300_TXE_ENABLE         1
 301 #define R300_TXE_CMDSIZE        2
 302
 303 #define R300_PS_CMD_0           0
 304 #define R300_PS_POINTSIZE       1
 305 #define R300_PS_CMDSIZE         2
 306
 307 #define R300_ZBS_CMD_0          0
 308 #define R300_ZBS_T_FACTOR       1
 309 #define R300_ZBS_T_CONSTANT     2
 310 #define R300_ZBS_W_FACTOR       3
 311 #define R300_ZBS_W_CONSTANT     4
 312 #define R300_ZBS_CMDSIZE        5
 313
 314 #define R300_CUL_CMD_0          0
 315 #define R300_CUL_CULL           1
 316 #define R300_CUL_CMDSIZE        2
 317
 318 #define R300_RC_CMD_0           0
 319 #define R300_RC_CNTL_0          1
 320 #define R300_RC_CNTL_1          2
 321 #define R300_RC_CMDSIZE         3
 322
 323 #define R300_RI_CMD_0           0
 324 #define R300_RI_INTERP_0        1
 325 #define R300_RI_INTERP_1        2
 326 #define R300_RI_INTERP_2        3
 327 #define R300_RI_INTERP_3        4
 328 #define R300_RI_INTERP_4        5
 329 #define R300_RI_INTERP_5        6
 330 #define R300_RI_INTERP_6        7
 331 #define R300_RI_INTERP_7        8
 332 #define R300_RI_CMDSIZE         9
 333
 334 #define R300_RR_CMD_0           0       /* rr is variable size (at least 1) */
 335 #define R300_RR_ROUTE_0         1
 336 #define R300_RR_ROUTE_1         2
 337 #define R300_RR_ROUTE_2         3
 338 #define R300_RR_ROUTE_3         4
 339 #define R300_RR_ROUTE_4         5
 340 #define R300_RR_ROUTE_5         6
 341 #define R300_RR_ROUTE_6         7
 342 #define R300_RR_ROUTE_7         8
 343 #define R300_RR_CMDSIZE         9
 344
 345 #define R300_FP_CMD_0           0
 346 #define R300_FP_CNTL0           1
 347 #define R300_FP_CNTL1           2
 348 #define R300_FP_CNTL2           3
 349 #define R300_FP_CMD_1           4
 350 #define R300_FP_NODE0           5
 351 #define R300_FP_NODE1           6
 352 #define R300_FP_NODE2           7
 353 #define R300_FP_NODE3           8
 354 #define R300_FP_CMDSIZE         9
 355
 356 #define R300_FPT_CMD_0          0
 357 #define R300_FPT_INSTR_0        1
 358 #define R300_FPT_CMDSIZE        65
 359
 360 #define R300_FPI_CMD_0          0
 361 #define R300_FPI_INSTR_0        1
 362 #define R300_FPI_CMDSIZE        65
 363
 364 #define R300_FPP_CMD_0          0
 365 #define R300_FPP_PARAM_0        1
 366 #define R300_FPP_CMDSIZE        (32*4+1)
 367
 368 #define R300_FOGS_CMD_0         0
 369 #define R300_FOGS_STATE         1
 370 #define R300_FOGS_CMDSIZE       2
 371
 372 #define R300_FOGC_CMD_0         0
 373 #define R300_FOGC_R             1
 374 #define R300_FOGC_G             2
 375 #define R300_FOGC_B             3
 376 #define R300_FOGC_CMDSIZE       4
 377
 378 #define R300_FOGP_CMD_0         0
 379 #define R300_FOGP_SCALE         1
 380 #define R300_FOGP_START         2
 381 #define R300_FOGP_CMDSIZE       3
 382
 383 #define R300_AT_CMD_0           0
 384 #define R300_AT_ALPHA_TEST      1
 385 #define R300_AT_UNKNOWN         2
 386 #define R300_AT_CMDSIZE         3
 387
 388 #define R300_BLD_CMD_0          0
 389 #define R300_BLD_CBLEND         1
 390 #define R300_BLD_ABLEND         2
 391 #define R300_BLD_CMDSIZE        3
 392
 393 #define R300_CMK_CMD_0          0
 394 #define R300_CMK_COLORMASK      1
 395 #define R300_CMK_CMDSIZE        2
 396
 397 #define R300_CB_CMD_0           0
 398 #define R300_CB_OFFSET          1
 399 #define R300_CB_CMD_1           2
 400 #define R300_CB_PITCH           3
 401 #define R300_CB_CMDSIZE         4
 402
 403 #define R300_ZS_CMD_0           0
 404 #define R300_ZS_CNTL_0          1
 405 #define R300_ZS_CNTL_1          2
 406 #define R300_ZS_CNTL_2          3
 407 #define R300_ZS_CMDSIZE         4
 408
 409 #define R300_ZB_CMD_0           0
 410 #define R300_ZB_OFFSET          1
 411 #define R300_ZB_PITCH           2
 412 #define R300_ZB_CMDSIZE         3
 413
 414 #define R300_VPI_CMD_0          0
 415 #define R300_VPI_INSTR_0        1
 416 #define R300_VPI_CMDSIZE        1025    /* 256 16 byte instructions */
 417
 418 #define R300_VPP_CMD_0          0
 419 #define R300_VPP_PARAM_0        1
 420 #define R300_VPP_CMDSIZE        1025    /* 256 4-component parameters */
 421
 422 #define R300_VPS_CMD_0          0
 423 #define R300_VPS_ZERO_0         1
 424 #define R300_VPS_ZERO_1         2
 425 #define R300_VPS_POINTSIZE      3
 426 #define R300_VPS_ZERO_3         4
 427 #define R300_VPS_CMDSIZE        5
 428
 429         /* the layout is common for all fields inside tex */
 430 #define R300_TEX_CMD_0          0
 431 #define R300_TEX_VALUE_0        1
 432 /* We don't really use this, instead specify mtu+1 dynamically
 433 #define R300_TEX_CMDSIZE        (MAX_TEXTURE_UNITS+1)
 434 */
 435
 436 /**
 437  * Cache for hardware register state.
 438  */
 439 struct r300_hw_state {
 440         struct r300_state_atom atomlist;
 441
 442         GLboolean is_dirty;
 443         GLboolean all_dirty;
 444         int max_state_size;     /* in dwords */
 445
 446         struct r300_state_atom vpt;     /* viewport (1D98) */
 447         struct r300_state_atom vap_cntl;
 448         struct r300_state_atom vof;     /* VAP output format register 0x2090 */
 449         struct r300_state_atom vte;     /* (20B0) */
 450         struct r300_state_atom unk2134; /* (2134) */
 451         struct r300_state_atom vap_cntl_status;
 452         struct r300_state_atom vir[2];  /* vap input route (2150/21E0) */
 453         struct r300_state_atom vic;     /* vap input control (2180) */
 454         struct r300_state_atom unk21DC; /* (21DC) */
 455         struct r300_state_atom unk221C; /* (221C) */
 456         struct r300_state_atom unk2220; /* (2220) */
 457         struct r300_state_atom unk2288; /* (2288) */
 458         struct r300_state_atom pvs;     /* pvs_cntl (22D0) */
 459         struct r300_state_atom gb_enable;       /* (4008) */
 460         struct r300_state_atom gb_misc; /* Multisampling position shifts ? (4010) */
 461         struct r300_state_atom unk4200; /* (4200) */
 462         struct r300_state_atom unk4214; /* (4214) */
 463         struct r300_state_atom ps;      /* pointsize (421C) */
 464         struct r300_state_atom unk4230; /* (4230) */
 465         struct r300_state_atom lcntl;   /* line control */
 466         struct r300_state_atom unk4260; /* (4260) */
 467         struct r300_state_atom shade;
 468         struct r300_state_atom polygon_mode;
 469         struct r300_state_atom fogp;    /* fog parameters (4294) */
 470         struct r300_state_atom unk429C; /* (429C) */
 471         struct r300_state_atom zbias_cntl;
 472         struct r300_state_atom zbs;     /* zbias (42A4) */
 473         struct r300_state_atom occlusion_cntl;
 474         struct r300_state_atom cul;     /* cull cntl (42B8) */
 475         struct r300_state_atom unk42C0; /* (42C0) */
 476         struct r300_state_atom rc;      /* rs control (4300) */
 477         struct r300_state_atom ri;      /* rs interpolators (4310) */
 478         struct r300_state_atom rr;      /* rs route (4330) */
 479         struct r300_state_atom unk43A4; /* (43A4) */
 480         struct r300_state_atom unk43E8; /* (43E8) */
 481         struct r300_state_atom fp;      /* fragment program cntl + nodes (4600) */
 482         struct r300_state_atom fpt;     /* texi - (4620) */
 483         struct r300_state_atom unk46A4; /* (46A4) */
 484         struct r300_state_atom fpi[4];  /* fp instructions (46C0/47C0/48C0/49C0) */
 485         struct r300_state_atom fogs;    /* fog state (4BC0) */
 486         struct r300_state_atom fogc;    /* fog color (4BC8) */
 487         struct r300_state_atom at;      /* alpha test (4BD4) */
 488         struct r300_state_atom unk4BD8; /* (4BD8) */
 489         struct r300_state_atom fpp;     /* 0x4C00 and following */
 490         struct r300_state_atom unk4E00; /* (4E00) */
 491         struct r300_state_atom bld;     /* blending (4E04) */
 492         struct r300_state_atom cmk;     /* colormask (4E0C) */
 493         struct r300_state_atom blend_color;     /* constant blend color */
 494         struct r300_state_atom cb;      /* colorbuffer (4E28) */
 495         struct r300_state_atom unk4E50; /* (4E50) */
 496         struct r300_state_atom unk4E88; /* (4E88) */
 497         struct r300_state_atom unk4EA0; /* (4E88) I saw it only written on RV350 hardware..  */
 498         struct r300_state_atom zs;      /* zstencil control (4F00) */
 499         struct r300_state_atom zstencil_format;
 500         struct r300_state_atom zb;      /* z buffer (4F20) */
 501         struct r300_state_atom unk4F28; /* (4F28) */
 502         struct r300_state_atom unk4F30; /* (4F30) */
 503         struct r300_state_atom unk4F44; /* (4F44) */
 504         struct r300_state_atom unk4F54; /* (4F54) */
 505
 506         struct r300_state_atom vpi;     /* vp instructions */
 507         struct r300_state_atom vpp;     /* vp parameters */
 508         struct r300_state_atom vps;     /* vertex point size (?) */
 509         /* 8 texture units */
 510         /* the state is grouped by function and not by
 511            texture unit. This makes single unit updates
 512            really awkward - we are much better off
 513            updating the whole thing at once */
 514         struct {
 515                 struct r300_state_atom filter;
 516                 struct r300_state_atom filter_1;
 517                 struct r300_state_atom size;
 518                 struct r300_state_atom format;
 519                 struct r300_state_atom pitch;
 520                 struct r300_state_atom offset;
 521                 struct r300_state_atom chroma_key;
 522                 struct r300_state_atom border_color;
 523         } tex;
 524         struct r300_state_atom txe;     /* tex enable (4104) */
 525 };
 526
 527 /**
 528  * This structure holds the command buffer while it is being constructed.
 529  *
 530  * The first batch of commands in the buffer is always the state that needs
 531  * to be re-emitted when the context is lost. This batch can be skipped
 532  * otherwise.
 533  */
 534 struct r300_cmdbuf {
 535         int size;               /* DWORDs allocated for buffer */
 536         uint32_t *cmd_buf;
 537         int count_used;         /* DWORDs filled so far */
 538         int count_reemit;       /* size of re-emission batch */
 539 };
 540
 541 /**
 542  * State cache
 543  */
 544
 545 struct r300_depthbuffer_state {
 546         GLfloat scale;
 547 };
 548
 549 struct r300_stencilbuffer_state {
 550         GLuint clear;
 551         GLboolean hw_stencil;
 552
 553 };
 554
 555 /* Vertex shader state */
 556
 557 /* Perhaps more if we store programs in vmem? */
 558 /* drm_r300_cmd_header_t->vpu->count is unsigned char */
 559 #define VSF_MAX_FRAGMENT_LENGTH (255*4)
 560
 561 /* Can be tested with colormat currently. */
 562 #define VSF_MAX_FRAGMENT_TEMPS (14)
 563
 564 #define STATE_R300_WINDOW_DIMENSION (STATE_INTERNAL_DRIVER+0)
 565 #define STATE_R300_TEXRECT_FACTOR (STATE_INTERNAL_DRIVER+1)
 566
 567 struct r300_vertex_shader_fragment {
 568         int length;
 569         union {
 570                 GLuint d[VSF_MAX_FRAGMENT_LENGTH];
 571                 float f[VSF_MAX_FRAGMENT_LENGTH];
 572                 VERTEX_SHADER_INSTRUCTION i[VSF_MAX_FRAGMENT_LENGTH / 4];
 573         } body;
 574 };
 575
 576 #define VSF_DEST_PROGRAM        0x0
 577 #define VSF_DEST_MATRIX0        0x200
 578 #define VSF_DEST_MATRIX1        0x204
 579 #define VSF_DEST_MATRIX2        0x208
 580 #define VSF_DEST_VECTOR0        0x20c
 581 #define VSF_DEST_VECTOR1        0x20d
 582 #define VSF_DEST_UNKNOWN1       0x400
 583 #define VSF_DEST_UNKNOWN2       0x406
 584
 585 struct r300_vertex_shader_state {
 586         struct r300_vertex_shader_fragment program;
 587
 588         struct r300_vertex_shader_fragment unknown1;
 589         struct r300_vertex_shader_fragment unknown2;
 590
 591         int program_start;
 592         int unknown_ptr1;       /* pointer within program space */
 593         int program_end;
 594
 595         int param_offset;
 596         int param_count;
 597
 598         int unknown_ptr2;       /* pointer within program space */
 599         int unknown_ptr3;       /* pointer within program space */
 600 };
 601
 602 extern int hw_tcl_on;
 603
 604 //#define CURRENT_VERTEX_SHADER(ctx) (ctx->VertexProgram._Current)
 605 #define CURRENT_VERTEX_SHADER(ctx) (R300_CONTEXT(ctx)->selected_vp)
 606
 607 /* Should but doesnt work */
 608 //#define CURRENT_VERTEX_SHADER(ctx) (R300_CONTEXT(ctx)->curr_vp)
 609
 610 /* r300_vertex_shader_state and r300_vertex_program should probably be merged together someday.
 611  * Keeping them them seperate for now should ensure fixed pipeline keeps functioning properly.
 612  */
 613
 614 struct r300_vertex_program_key {
 615         GLuint InputsRead;
 616         GLuint OutputsWritten;
 617 };
 618
 619 struct r300_vertex_program {
 620         struct r300_vertex_program *next;
 621         struct r300_vertex_program_key key;
 622         int translated;
 623
 624         struct r300_vertex_shader_fragment program;
 625
 626         int pos_end;
 627         int num_temporaries;    /* Number of temp vars used by program */
 628         int wpos_idx;
 629         int inputs[VERT_ATTRIB_MAX];
 630         int outputs[VERT_RESULT_MAX];
 631         int native;
 632         int ref_count;
 633         int use_ref_count;
 634 };
 635
 636 struct r300_vertex_program_cont {
 637         struct gl_vertex_program mesa_program;  /* Must be first */
 638         struct r300_vertex_shader_fragment params;
 639         struct r300_vertex_program *progs;
 640 };
 641
 642 #define PFS_MAX_ALU_INST        64
 643 #define PFS_MAX_TEX_INST        64
 644 #define PFS_MAX_TEX_INDIRECT 4
 645 #define PFS_NUM_TEMP_REGS       32
 646 #define PFS_NUM_CONST_REGS      16
 647
 648 /* Mapping Mesa registers to R300 temporaries */
 649 struct reg_acc {
 650         int reg;                /* Assigned hw temp */
 651         unsigned int refcount;  /* Number of uses by mesa program */
 652 };
 653
 654 /**
 655  * Describe the current lifetime information for an R300 temporary
 656  */
 657 struct reg_lifetime {
 658         /* Index of the first slot where this register is free in the sense
 659            that it can be used as a new destination register.
 660            This is -1 if the register has been assigned to a Mesa register
 661            and the last access to the register has not yet been emitted */
 662         int free;
 663
 664         /* Index of the first slot where this register is currently reserved.
 665            This is used to stop e.g. a scalar operation from being moved
 666            before the allocation time of a register that was first allocated
 667            for a vector operation. */
 668         int reserved;
 669
 670         /* Index of the first slot in which the register can be used as a
 671            source without losing the value that is written by the last
 672            emitted instruction that writes to the register */
 673         int vector_valid;
 674         int scalar_valid;
 675
 676         /* Index to the slot where the register was last read.
 677            This is also the first slot in which the register may be written again */
 678         int vector_lastread;
 679         int scalar_lastread;
 680 };
 681
 682 /**
 683  * Store usage information about an ALU instruction slot during the
 684  * compilation of a fragment program.
 685  */
 686 #define SLOT_SRC_VECTOR  (1<<0)
 687 #define SLOT_SRC_SCALAR  (1<<3)
 688 #define SLOT_SRC_BOTH    (SLOT_SRC_VECTOR | SLOT_SRC_SCALAR)
 689 #define SLOT_OP_VECTOR   (1<<16)
 690 #define SLOT_OP_SCALAR   (1<<17)
 691 #define SLOT_OP_BOTH     (SLOT_OP_VECTOR | SLOT_OP_SCALAR)
 692
 693 struct r300_pfs_compile_slot {
 694         /* Bitmask indicating which parts of the slot are used, using SLOT_ constants
 695            defined above */
 696         unsigned int used;
 697
 698         /* Selected sources */
 699         int vsrc[3];
 700         int ssrc[3];
 701 };
 702
 703 /**
 704  * Store information during compilation of fragment programs.
 705  */
 706 struct r300_pfs_compile_state {
 707         int nrslots;            /* number of ALU slots used so far */
 708
 709         /* Track which (parts of) slots are already filled with instructions */
 710         struct r300_pfs_compile_slot slot[PFS_MAX_ALU_INST];
 711
 712         /* Track the validity of R300 temporaries */
 713         struct reg_lifetime hwtemps[PFS_NUM_TEMP_REGS];
 714
 715         /* Used to map Mesa's inputs/temps onto hardware temps */
 716         int temp_in_use;
 717         struct reg_acc temps[PFS_NUM_TEMP_REGS];
 718         struct reg_acc inputs[32];      /* don't actually need 32... */
 719
 720         /* Track usage of hardware temps, for register allocation,
 721          * indirection detection, etc. */
 722         GLuint used_in_node;
 723         GLuint dest_in_node;
 724 };
 725
 726 /**
 727  * Store everything about a fragment program that is needed
 728  * to render with that program.
 729  */
 730 struct r300_fragment_program {
 731         struct gl_fragment_program mesa_program;
 732
 733         GLcontext *ctx;
 734         GLboolean translated;
 735         GLboolean error;
 736         struct r300_pfs_compile_state *cs;
 737
 738         struct {
 739                 int length;
 740                 GLuint inst[PFS_MAX_TEX_INST];
 741         } tex;
 742
 743         struct {
 744                 struct {
 745                         GLuint inst0;
 746                         GLuint inst1;
 747                         GLuint inst2;
 748                         GLuint inst3;
 749                 } inst[PFS_MAX_ALU_INST];
 750         } alu;
 751
 752         struct {
 753                 int tex_offset;
 754                 int tex_end;
 755                 int alu_offset;
 756                 int alu_end;
 757                 int flags;
 758         } node[4];
 759         int cur_node;
 760         int first_node_has_tex;
 761
 762         int alu_offset;
 763         int alu_end;
 764         int tex_offset;
 765         int tex_end;
 766
 767         /* Hardware constants.
 768          * Contains a pointer to the value. The destination of the pointer
 769          * is supposed to be updated when GL state changes.
 770          * Typically, this is either a pointer into
 771          * gl_program_parameter_list::ParameterValues, or a pointer to a
 772          * global constant (e.g. for sin/cos-approximation)
 773          */
 774         const GLfloat *constant[PFS_NUM_CONST_REGS];
 775         int const_nr;
 776
 777         int max_temp_idx;
 778
 779         GLuint optimization;
 780 };
 781
 782 #define R300_MAX_AOS_ARRAYS             16
 783
 784 #define AOS_FORMAT_USHORT       0
 785 #define AOS_FORMAT_FLOAT        1
 786 #define AOS_FORMAT_UBYTE        2
 787 #define AOS_FORMAT_FLOAT_COLOR  3
 788
 789 #define REG_COORDS      0
 790 #define REG_COLOR0      1
 791 #define REG_TEX0        2
 792
 793 struct r300_state {
 794         struct r300_depthbuffer_state depth;
 795         struct r300_texture_state texture;
 796         int sw_tcl_inputs[VERT_ATTRIB_MAX];
 797         struct r300_vertex_shader_state vertex_shader;
 798         struct r300_pfs_compile_state pfs_compile;
 799         struct r300_dma_region aos[R300_MAX_AOS_ARRAYS];
 800         int aos_count;
 801
 802         GLuint *Elts;
 803         struct r300_dma_region elt_dma;
 804
 805          DECLARE_RENDERINPUTS(render_inputs_bitset);    /* actual render inputs that R300 was configured for.
 806                                                            They are the same as tnl->render_inputs for fixed pipeline */
 807
 808         struct {
 809                 int transform_offset;   /* Transform matrix offset, -1 if none */
 810         } vap_param;            /* vertex processor parameter allocation - tells where to write parameters */
 811
 812         struct r300_stencilbuffer_state stencil;
 813
 814 };
 815
 816 #define R300_FALLBACK_NONE 0
 817 #define R300_FALLBACK_TCL 1
 818 #define R300_FALLBACK_RAST 2
 819
 820 /**
 821  * \brief R300 context structure.
 822  */
 823 struct r300_context {
 824         struct radeon_context radeon;   /* parent class, must be first */
 825
 826         struct r300_hw_state hw;
 827         struct r300_cmdbuf cmdbuf;
 828         struct r300_state state;
 829         struct gl_vertex_program *curr_vp;
 830         struct r300_vertex_program *selected_vp;
 831
 832         /* Vertex buffers
 833          */
 834         struct r300_dma dma;
 835         GLboolean save_on_next_unlock;
 836         GLuint NewGLState;
 837
 838         /* Texture object bookkeeping
 839          */
 840         unsigned nr_heaps;
 841         driTexHeap *texture_heaps[RADEON_NR_TEX_HEAPS];
 842         driTextureObject swapped;
 843         int texture_depth;
 844         float initialMaxAnisotropy;
 845
 846         /* Clientdata textures;
 847          */
 848         GLuint prefer_gart_client_texturing;
 849
 850 #ifdef USER_BUFFERS
 851         struct r300_memory_manager *rmm;
 852 #endif
 853
 854         GLvector4f dummy_attrib[_TNL_ATTRIB_MAX];
 855         GLvector4f *temp_attrib[_TNL_ATTRIB_MAX];
 856
 857         GLboolean disable_lowimpact_fallback;
 858 };
 859
 860 struct r300_buffer_object {
 861         struct gl_buffer_object mesa_obj;
 862         int id;
 863 };
 864
 865 #define R300_CONTEXT(ctx)               ((r300ContextPtr)(ctx->DriverCtx))
 866
 867 extern void r300DestroyContext(__DRIcontextPrivate * driContextPriv);
 868 extern GLboolean r300CreateContext(const __GLcontextModes * glVisual,
 869                                    __DRIcontextPrivate * driContextPriv,
 870                                    void *sharedContextPrivate);
 871
 872 extern void r300SelectVertexShader(r300ContextPtr r300);
 873 extern void r300InitShaderFuncs(struct dd_function_table *functions);
 874 extern int r300VertexProgUpdateParams(GLcontext * ctx,
 875                                       struct r300_vertex_program_cont *vp,
 876                                       float *dst);
 877
 878 #define RADEON_D_CAPTURE 0
 879 #define RADEON_D_PLAYBACK 1
 880 #define RADEON_D_PLAYBACK_RAW 2
 881 #define RADEON_D_T 3
 882
 883 #endif                          /* __R300_CONTEXT_H__ */