src/mesa/drivers/dri/r300/r300_context.h

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /*
  31  * Authors:
  32  *   Keith Whitwell <keith@tungstengraphics.com>
  33  *   Nicolai Haehnle <prefect_@gmx.net>
  34  */
  35
  36 #ifndef __R300_CONTEXT_H__
  37 #define __R300_CONTEXT_H__
  38
  39 #include "tnl/t_vertex.h"
  40 #include "drm.h"
  41 #include "radeon_drm.h"
  42 #include "dri_util.h"
  43 #include "texmem.h"
  44
  45 #include "macros.h"
  46 #include "mtypes.h"
  47 #include "colormac.h"
  48 #include "radeon_context.h"
  49
  50 struct r300_context;
  51 typedef struct r300_context r300ContextRec;
  52 typedef struct r300_context *r300ContextPtr;
  53
  54 #include "radeon_lock.h"
  55 #include "mm.h"
  56
  57 typedef GLuint uint32_t;
  58 typedef GLubyte uint8_t;
  59
  60
  61 static __inline__ uint32_t r300PackFloat32(float fl)
  62 {
  63         union { float fl; uint32_t u; } u;
  64
  65         u.fl = fl;
  66         return u.u;
  67 }
  68
  69        /* Texture related */
  70
  71 #define TEX_0   0x1
  72 #define TEX_1   0x2
  73 #define TEX_2   0x4
  74 #define TEX_3   0x8
  75 #define TEX_4   0x10
  76 #define TEX_5   0x20
  77 #define TEX_6   0x20
  78 #define TEX_7   0x20
  79 #define TEX_ALL 0xff
  80
  81 typedef struct r300_tex_obj r300TexObj, *r300TexObjPtr;
  82
  83 /* Texture object in locally shared texture space.
  84  */
  85 struct r300_tex_obj {
  86         driTextureObject base;
  87
  88         GLuint bufAddr;         /* Offset to start of locally
  89                                    shared texture block */
  90
  91         GLuint dirty_state;     /* Flags (1 per texunit) for
  92                                    whether or not this texobj
  93                                    has dirty hardware state
  94                                    (pp_*) that needs to be
  95                                    brought into the
  96                                    texunit. */
  97
  98         drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];
  99         /* Six, for the cube faces */
 100
 101
 102         /* hardware register values */
 103         /* Note that R200 has 8 registers per texture and R300 only 7 */
 104         GLuint filter;
 105         GLuint pitch; /* one of the unknown registers.. unknown 1 ?*/
 106         GLuint size;    /* npot only */
 107         GLuint format;
 108         GLuint offset;  /* Image location in texmem.
 109                                    All cube faces follow. */
 110         GLuint unknown4;
 111         GLuint unknown5;
 112         /* end hardware registers */
 113
 114         GLboolean border_fallback;
 115 };
 116
 117
 118 /**
 119  * A block of hardware state.
 120  *
 121  * When check returns non-zero, the returned number of dwords must be
 122  * copied verbatim into the command buffer in order to update a state atom
 123  * when it is dirty.
 124  */
 125 struct r300_state_atom {
 126         struct r300_state_atom *next, *prev;
 127         const char* name;       /* for debug */
 128         int cmd_size;           /* maximum size in dwords */
 129         GLuint idx;             /* index in an array (e.g. textures) */
 130         uint32_t* cmd;
 131         GLboolean dirty;
 132
 133         int (*check)(r300ContextPtr, struct r300_state_atom* atom);
 134 };
 135
 136
 137 #define R300_VPT_CMD_0          0
 138 #define R300_VPT_XSCALE         1
 139 #define R300_VPT_XOFFSET        2
 140 #define R300_VPT_YSCALE         3
 141 #define R300_VPT_YOFFSET        4
 142 #define R300_VPT_ZSCALE         5
 143 #define R300_VPT_ZOFFSET        6
 144 #define R300_VPT_CMDSIZE        7
 145
 146 #define R300_OVF_CMD_0          0
 147 #define R300_OVF_FMT_0          1
 148 #define R300_OVF_FMT_1          2
 149 #define R300_OVF_CMDSIZE        3
 150
 151 #define R300_VIR_CMD_0          0 /* vir is variable size (at least 1) */
 152 #define R300_VIR_CNTL_0         1
 153 #define R300_VIR_CNTL_1         2
 154 #define R300_VIR_CNTL_2         3
 155 #define R300_VIR_CNTL_3         4
 156 #define R300_VIR_CNTL_4         5
 157 #define R300_VIR_CNTL_5         6
 158 #define R300_VIR_CNTL_6         7
 159 #define R300_VIR_CNTL_7         8
 160 #define R300_VIR_CMDSIZE        9
 161
 162 #define R300_VIC_CMD_0          0
 163 #define R300_VIC_CNTL_0         1
 164 #define R300_VIC_CNTL_1         2
 165 #define R300_VIC_CMDSIZE        3
 166
 167 #define R300_VOF_CMD_0          0
 168 #define R300_VOF_CNTL_0         1
 169 #define R300_VOF_CNTL_1         2
 170 #define R300_VOF_CMDSIZE        3
 171
 172
 173 #define R300_PVS_CMD_0          0
 174 #define R300_PVS_CNTL_1         1
 175 #define R300_PVS_CNTL_2         2
 176 #define R300_PVS_CNTL_3         3
 177 #define R300_PVS_CMDSIZE        4
 178
 179 #define R300_GB_MISC_CMD_0              0
 180 #define R300_GB_MISC_MSPOS_0            1
 181 #define R300_GB_MISC_MSPOS_1            2
 182 #define R300_GB_MISC_TILE_CONFIG        3
 183 #define R300_GB_MISC_SELECT             4
 184 #define R300_GB_MISC_AA_CONFIG          5
 185 #define R300_GB_MISC_CMDSIZE            6
 186
 187 #define R300_TXE_CMD_0          0
 188 #define R300_TXE_ENABLE         1
 189 #define R300_TXE_CMDSIZE        2
 190
 191 #define R300_PS_CMD_0           0
 192 #define R300_PS_POINTSIZE       1
 193 #define R300_PS_CMDSIZE         2
 194
 195 #define R300_CUL_CMD_0          0
 196 #define R300_CUL_CULL           1
 197 #define R300_CUL_CMDSIZE        2
 198
 199 #define R300_RC_CMD_0           0
 200 #define R300_RC_CNTL_0          1
 201 #define R300_RC_CNTL_1          2
 202 #define R300_RC_CMDSIZE         3
 203
 204 #define R300_RI_CMD_0           0
 205 #define R300_RI_INTERP_0        1
 206 #define R300_RI_INTERP_1        2
 207 #define R300_RI_INTERP_2        3
 208 #define R300_RI_INTERP_3        4
 209 #define R300_RI_INTERP_4        5
 210 #define R300_RI_INTERP_5        6
 211 #define R300_RI_INTERP_6        7
 212 #define R300_RI_INTERP_7        8
 213 #define R300_RI_CMDSIZE         9
 214
 215 #define R300_RR_CMD_0           0 /* rr is variable size (at least 1) */
 216 #define R300_RR_ROUTE_0         1
 217 #define R300_RR_ROUTE_1         2
 218 #define R300_RR_ROUTE_2         3
 219 #define R300_RR_ROUTE_3         4
 220 #define R300_RR_ROUTE_4         5
 221 #define R300_RR_ROUTE_5         6
 222 #define R300_RR_ROUTE_6         7
 223 #define R300_RR_ROUTE_7         8
 224 #define R300_RR_CMDSIZE         9
 225
 226 #define R300_FP_CMD_0           0
 227 #define R300_FP_CNTL0           1
 228 #define R300_FP_CNTL1           2
 229 #define R300_FP_CNTL2           3
 230 #define R300_FP_CMD_1           4
 231 #define R300_FP_NODE0           5
 232 #define R300_FP_NODE1           6
 233 #define R300_FP_NODE2           7
 234 #define R300_FP_NODE3           8
 235 #define R300_FP_CMDSIZE         9
 236
 237 #define R300_FPI_CMD_0          0
 238 #define R300_FPI_INSTR_0        1
 239 #define R300_FPI_CMDSIZE        65
 240
 241 #define R300_AT_CMD_0           0
 242 #define R300_AT_ALPHA_TEST      1
 243 #define R300_AT_CMDSIZE         2
 244
 245 #define R300_BLD_CMD_0          0
 246 #define R300_BLD_CBLEND         1
 247 #define R300_BLD_ABLEND         2
 248 #define R300_BLD_CMDSIZE        3
 249
 250 #define R300_CMK_CMD_0          0
 251 #define R300_CMK_COLORMASK      1
 252 #define R300_CMK_CMDSIZE        2
 253
 254 #define R300_CB_CMD_0           0
 255 #define R300_CB_OFFSET          1
 256 #define R300_CB_CMD_1           2
 257 #define R300_CB_PITCH           3
 258 #define R300_CB_CMDSIZE         4
 259
 260 #define R300_ZC_CMD_0           0
 261 #define R300_ZC_CNTL_0          1
 262 #define R300_ZC_CNTL_1          2
 263 #define R300_ZC_CMDSIZE         3
 264
 265 #define R300_ZB_CMD_0           0
 266 #define R300_ZB_OFFSET          1
 267 #define R300_ZB_PITCH           2
 268 #define R300_ZB_CMDSIZE         3
 269
 270 #define R300_VPI_CMD_0          0
 271 #define R300_VPI_INSTR_0        1
 272 #define R300_VPI_CMDSIZE        1025 /* 256 16 byte instructions */
 273
 274 #define R300_VPP_CMD_0          0
 275 #define R300_VPP_PARAM_0        1
 276 #define R300_VPP_CMDSIZE        1025 /* 256 4-component parameters */
 277
 278 #define R300_VPS_CMD_0          0
 279 #define R300_VPS_ZERO_0         1
 280 #define R300_VPS_ZERO_1         2
 281 #define R300_VPS_POINTSIZE      3
 282 #define R300_VPS_ZERO_3         4
 283 #define R300_VPS_CMDSIZE        5
 284
 285         /* the layout is common for all fields inside tex */
 286 #define R300_TEX_CMD_0          0
 287 #define R300_TEX_VALUE_0        1
 288 /* We don't really use this, instead specify mtu+1 dynamically
 289 #define R300_TEX_CMDSIZE        (MAX_TEXTURE_UNITS+1)
 290 */
 291
 292 /**
 293  * Cache for hardware register state.
 294  */
 295 struct r300_hw_state {
 296         struct r300_state_atom atomlist;
 297
 298         GLboolean       is_dirty;
 299         GLboolean       all_dirty;
 300         int             max_state_size; /* in dwords */
 301
 302         struct r300_state_atom vpt;     /* viewport (1D98) */
 303         struct r300_state_atom unk2080; /* (2080) */
 304         struct r300_state_atom ovf;     /* output vertex format (2090) */
 305         struct r300_state_atom vte;     /* (20B0) */
 306         struct r300_state_atom unk2134; /* (2134) */
 307         struct r300_state_atom unk2140; /* (2140) */
 308         struct r300_state_atom vir[2];  /* vap input route (2150/21E0) */
 309         struct r300_state_atom vic;     /* vap input control (2180) */
 310         struct r300_state_atom unk21DC; /* (21DC) */
 311         struct r300_state_atom unk221C; /* (221C) */
 312         struct r300_state_atom unk2220; /* (2220) */
 313         struct r300_state_atom unk2288; /* (2288) */
 314         struct r300_state_atom pvs;     /* pvs_cntl (22D0) */
 315         struct r300_state_atom vof;     /* VAP output format register 0x4000 */
 316         struct r300_state_atom gb_enable; /* (4008) */
 317         struct r300_state_atom gb_misc; /* Multisampling position shifts ? (4010) */
 318         struct r300_state_atom txe;     /* tex enable (4104) */
 319         struct r300_state_atom unk4200; /* (4200) */
 320         struct r300_state_atom unk4214; /* (4214) */
 321         struct r300_state_atom ps;      /* pointsize (421C) */
 322         struct r300_state_atom unk4230; /* (4230) */
 323         struct r300_state_atom unk4260; /* (4260) */
 324         struct r300_state_atom unk4274; /* (4274) */
 325         struct r300_state_atom unk4288; /* (4288) */
 326         struct r300_state_atom unk42A0; /* (42A0) */
 327         struct r300_state_atom unk42B4; /* (42B4) */
 328         struct r300_state_atom cul;     /* cull cntl (42B8) */
 329         struct r300_state_atom unk42C0; /* (42C0) */
 330         struct r300_state_atom rc;      /* rs control (4300) */
 331         struct r300_state_atom ri;      /* rs interpolators (4310) */
 332         struct r300_state_atom rr;      /* rs route (4330) */
 333         struct r300_state_atom unk43A4; /* (43A4) */
 334         struct r300_state_atom unk43E8; /* (43E8) */
 335         struct r300_state_atom fp;      /* fragment program cntl + nodes (4600) */
 336         struct r300_state_atom unk46A4; /* (46A4) */
 337         struct r300_state_atom fpi[4];  /* fp instructions (46C0/47C0/48C0/49C0) */
 338         struct r300_state_atom unk4BC0; /* (4BC0) */
 339         struct r300_state_atom unk4BC8; /* (4BC8) */
 340         struct r300_state_atom at;      /* alpha test (4BD4) */
 341         struct r300_state_atom unk4BD8; /* (4BD8) */
 342         struct r300_state_atom unk4E00; /* (4E00) */
 343         struct r300_state_atom bld;     /* blending (4E04) */
 344         struct r300_state_atom cmk;     /* colormask (4E0C) */
 345         struct r300_state_atom unk4E10; /* (4E10) */
 346         struct r300_state_atom cb;      /* colorbuffer (4E28) */
 347         struct r300_state_atom unk4E50; /* (4E50) */
 348         struct r300_state_atom unk4E88; /* (4E88) */
 349         struct r300_state_atom unk4EA0; /* (4E88) I saw it only written on RV350 hardware..  */
 350         struct r300_state_atom zc;      /* z control (4F00) */
 351         struct r300_state_atom unk4F08; /* (4F08) */
 352         struct r300_state_atom unk4F10; /* (4F10) */
 353         struct r300_state_atom zb;      /* z buffer (4F20) */
 354         struct r300_state_atom unk4F28; /* (4F28) */
 355         struct r300_state_atom unk4F30; /* (4F30) */
 356         struct r300_state_atom unk4F44; /* (4F44) */
 357         struct r300_state_atom unk4F54; /* (4F54) */
 358
 359         struct r300_state_atom vpi;     /* vp instructions */
 360         struct r300_state_atom vpp;     /* vp parameters */
 361         struct r300_state_atom vps;     /* vertex point size (?) */
 362
 363                 /* 8 texture units */
 364                 /* the state is grouped by function and not by
 365                    texture unit. This makes single unit updates
 366                    really awkward - we are much better off
 367                    updating the whole thing at once */
 368         struct {
 369                 struct r300_state_atom filter;
 370                 struct r300_state_atom unknown1;
 371                 struct r300_state_atom size;
 372                 struct r300_state_atom format;
 373                 struct r300_state_atom offset;
 374                 struct r300_state_atom unknown4;
 375                 struct r300_state_atom unknown5;
 376                 } tex;
 377 };
 378
 379
 380 /**
 381  * This structure holds the command buffer while it is being constructed.
 382  *
 383  * The first batch of commands in the buffer is always the state that needs
 384  * to be re-emitted when the context is lost. This batch can be skipped
 385  * otherwise.
 386  */
 387 struct r300_cmdbuf {
 388         int             size;           /* DWORDs allocated for buffer */
 389         uint32_t*       cmd_buf;
 390         int             count_used;     /* DWORDs filled so far */
 391         int             count_reemit;   /* size of re-emission batch */
 392 };
 393
 394
 395 /**
 396  * State cache
 397  */
 398
 399 struct r300_depthbuffer_state {
 400         GLfloat scale;
 401 };
 402
 403 struct r300_state {
 404         struct r300_depthbuffer_state depth;
 405 };
 406
 407
 408 /**
 409  * R300 context structure.
 410  */
 411 struct r300_context {
 412         struct radeon_context radeon; /* parent class, must be first */
 413
 414         struct r300_hw_state hw;
 415         struct r300_cmdbuf cmdbuf;
 416         struct r300_state state;
 417
 418         /* Vertex buffers */
 419         int elt_count;  /* size of the buffer for vertices */
 420         int attrib_count; /* size of the buffer for vertex attributes.. Somehow it can be different ? */
 421
 422 };
 423
 424 #define R300_CONTEXT(ctx)               ((r300ContextPtr)(ctx->DriverCtx))
 425
 426 extern void r300DestroyContext(__DRIcontextPrivate * driContextPriv);
 427 extern GLboolean r300CreateContext(const __GLcontextModes * glVisual,
 428                                    __DRIcontextPrivate * driContextPriv,
 429                                    void *sharedContextPrivate);
 430
 431 #endif                          /* __R300_CONTEXT_H__ */