src/mesa/drivers/dri/r300/r300_context.h

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /*
  31  * Authors:
  32  *   Keith Whitwell <keith@tungstengraphics.com>
  33  *   Nicolai Haehnle <prefect_@gmx.net>
  34  */
  35
  36 #ifndef __R300_CONTEXT_H__
  37 #define __R300_CONTEXT_H__
  38
  39 #include "tnl/t_vertex.h"
  40 #include "drm.h"
  41 #include "radeon_drm.h"
  42 #include "dri_util.h"
  43 #include "texmem.h"
  44
  45 #include "macros.h"
  46 #include "mtypes.h"
  47 #include "colormac.h"
  48 #include "radeon_context.h"
  49
  50 #define USE_ARB_F_P 1
  51 //#define USER_BUFFERS
  52 //#define RADEON_VTXFMT_A
  53 //#define HW_VBOS
  54 //#define OPTIMIZE_ELTS
  55 //#define CB_DPATH
  56
  57 struct r300_context;
  58 typedef struct r300_context r300ContextRec;
  59 typedef struct r300_context *r300ContextPtr;
  60
  61 #include "radeon_lock.h"
  62 #include "mm.h"
  63
  64 /* Checkpoint.. for convenience */
  65 #define CPT     { fprintf(stderr, "%s:%s line %d\n", __FILE__, __FUNCTION__, __LINE__); }
  66 /* From http://gcc.gnu.org/onlinedocs/gcc-3.2.3/gcc/Variadic-Macros.html .
  67    I suppose we could inline this and use macro to fetch out __LINE__ and stuff in case we run into trouble
  68    with other compilers ... GLUE!
  69 */
  70 #if 1
  71 #define WARN_ONCE(a, ...)       { \
  72         static int warn##__LINE__=1; \
  73         if(warn##__LINE__){ \
  74                 fprintf(stderr, "*********************************WARN_ONCE*********************************\n"); \
  75                 fprintf(stderr, "File %s function %s line %d\n", \
  76                         __FILE__, __FUNCTION__, __LINE__); \
  77                 fprintf(stderr,  a, ## __VA_ARGS__);\
  78                 fprintf(stderr, "***************************************************************************\n"); \
  79                 warn##__LINE__=0;\
  80                 } \
  81         }
  82 #else
  83 #define WARN_ONCE(a, ...) {}
  84 #endif
  85
  86 typedef GLuint uint32_t;
  87 typedef GLubyte uint8_t;
  88 struct r300_fragment_program;
  89
  90   /* We should probably change types within vertex_shader
  91       and pixel_shader structure later on */
  92 #define CARD32 GLuint
  93 #include "vertex_shader.h"
  94 #if USE_ARB_F_P == 1
  95 #include "r300_fragprog.h"
  96 #else
  97 #include "pixel_shader.h"
  98 #endif
  99 #undef CARD32
 100
 101 static __inline__ uint32_t r300PackFloat32(float fl)
 102 {
 103         union { float fl; uint32_t u; } u;
 104
 105         u.fl = fl;
 106         return u.u;
 107 }
 108
 109
 110 /************ DMA BUFFERS **************/
 111
 112 /* Need refcounting on dma buffers:
 113  */
 114 struct r300_dma_buffer {
 115         int refcount;           /* the number of retained regions in buf */
 116         drmBufPtr buf;
 117         int id;
 118 };
 119 #ifdef USER_BUFFERS
 120 #define GET_START(rvb) (r300GartOffsetFromVirtual(rmesa, (rvb)->address+(rvb)->start))
 121 #else
 122 #define GET_START(rvb) (rmesa->radeon.radeonScreen->gart_buffer_offset +                \
 123                         (rvb)->address - rmesa->dma.buf0_address +      \
 124                         (rvb)->start)
 125 #endif
 126 /* A retained region, eg vertices for indexed vertices.
 127  */
 128 struct r300_dma_region {
 129         struct r300_dma_buffer *buf;
 130         char *address;          /* == buf->address */
 131         int start, end, ptr;    /* offsets from start of buf */
 132
 133     int aos_offset;     /* address in GART memory */
 134     int aos_stride;     /* distance between elements, in dwords */
 135     int aos_size;       /* number of components (1-4) */
 136     int aos_format;     /* format of components */
 137     int aos_reg;        /* VAP register assignment */
 138 };
 139
 140 struct r300_dma {
 141         /* Active dma region.  Allocations for vertices and retained
 142          * regions come from here.  Also used for emitting random vertices,
 143          * these may be flushed by calling flush_current();
 144          */
 145         struct r300_dma_region current;
 146
 147         void (*flush) (r300ContextPtr);
 148
 149         char *buf0_address;     /* start of buf[0], for index calcs */
 150
 151         /* Number of "in-flight" DMA buffers, i.e. the number of buffers
 152          * for which a DISCARD command is currently queued in the command buffer.
 153          */
 154         GLuint nr_released_bufs;
 155 };
 156
 157        /* Texture related */
 158
 159 typedef struct r300_tex_obj r300TexObj, *r300TexObjPtr;
 160
 161 /* Texture object in locally shared texture space.
 162  */
 163 struct r300_tex_obj {
 164         driTextureObject base;
 165
 166         GLuint bufAddr;         /* Offset to start of locally
 167                                    shared texture block */
 168
 169         GLuint dirty_state;     /* Flags (1 per texunit) for
 170                                    whether or not this texobj
 171                                    has dirty hardware state
 172                                    (pp_*) that needs to be
 173                                    brought into the
 174                                    texunit. */
 175
 176         drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];
 177         /* Six, for the cube faces */
 178
 179
 180         /* hardware register values */
 181         /* Note that R200 has 8 registers per texture and R300 only 7 */
 182         GLuint filter;
 183         GLuint pitch; /* one of the unknown registers.. unknown 1 ?*/
 184         GLuint size;    /* npot only */
 185         GLuint format;
 186         GLuint offset;  /* Image location in the card's address space.
 187                                    All cube faces follow. */
 188         GLuint unknown4;
 189         GLuint unknown5;
 190         /* end hardware registers */
 191
 192         /* registers computed by r200 code - keep them here to
 193            compare against what is actually written.
 194
 195            to be removed later.. */
 196         GLuint pp_border_color;
 197         GLuint pp_cubic_faces;  /* cube face 1,2,3,4 log2 sizes */
 198         GLuint format_x;
 199
 200
 201         GLboolean border_fallback;
 202 };
 203
 204 struct r300_texture_env_state {
 205         r300TexObjPtr texobj;
 206         GLenum format;
 207         GLenum envMode;
 208 };
 209
 210 #define R300_MAX_TEXTURE_UNITS 8
 211
 212 struct r300_texture_state {
 213         struct r300_texture_env_state unit[R300_MAX_TEXTURE_UNITS];
 214         int tc_count; /* number of incoming texture coordinates from VAP */
 215 };
 216
 217 /**
 218  * A block of hardware state.
 219  *
 220  * When check returns non-zero, the returned number of dwords must be
 221  * copied verbatim into the command buffer in order to update a state atom
 222  * when it is dirty.
 223  */
 224 struct r300_state_atom {
 225         struct r300_state_atom *next, *prev;
 226         const char* name;       /* for debug */
 227         int cmd_size;           /* maximum size in dwords */
 228         GLuint idx;             /* index in an array (e.g. textures) */
 229         uint32_t* cmd;
 230         GLboolean dirty;
 231
 232         int (*check)(r300ContextPtr, struct r300_state_atom* atom);
 233 };
 234
 235
 236 #define R300_VPT_CMD_0          0
 237 #define R300_VPT_XSCALE         1
 238 #define R300_VPT_XOFFSET        2
 239 #define R300_VPT_YSCALE         3
 240 #define R300_VPT_YOFFSET        4
 241 #define R300_VPT_ZSCALE         5
 242 #define R300_VPT_ZOFFSET        6
 243 #define R300_VPT_CMDSIZE        7
 244
 245 #define R300_VIR_CMD_0          0 /* vir is variable size (at least 1) */
 246 #define R300_VIR_CNTL_0         1
 247 #define R300_VIR_CNTL_1         2
 248 #define R300_VIR_CNTL_2         3
 249 #define R300_VIR_CNTL_3         4
 250 #define R300_VIR_CNTL_4         5
 251 #define R300_VIR_CNTL_5         6
 252 #define R300_VIR_CNTL_6         7
 253 #define R300_VIR_CNTL_7         8
 254 #define R300_VIR_CMDSIZE        9
 255
 256 #define R300_VIC_CMD_0          0
 257 #define R300_VIC_CNTL_0         1
 258 #define R300_VIC_CNTL_1         2
 259 #define R300_VIC_CMDSIZE        3
 260
 261 #define R300_VOF_CMD_0          0
 262 #define R300_VOF_CNTL_0         1
 263 #define R300_VOF_CNTL_1         2
 264 #define R300_VOF_CMDSIZE        3
 265
 266
 267 #define R300_PVS_CMD_0          0
 268 #define R300_PVS_CNTL_1         1
 269 #define R300_PVS_CNTL_2         2
 270 #define R300_PVS_CNTL_3         3
 271 #define R300_PVS_CMDSIZE        4
 272
 273 #define R300_GB_MISC_CMD_0              0
 274 #define R300_GB_MISC_MSPOS_0            1
 275 #define R300_GB_MISC_MSPOS_1            2
 276 #define R300_GB_MISC_TILE_CONFIG        3
 277 #define R300_GB_MISC_SELECT             4
 278 #define R300_GB_MISC_AA_CONFIG          5
 279 #define R300_GB_MISC_CMDSIZE            6
 280
 281 #define R300_TXE_CMD_0          0
 282 #define R300_TXE_ENABLE         1
 283 #define R300_TXE_CMDSIZE        2
 284
 285 #define R300_PS_CMD_0           0
 286 #define R300_PS_POINTSIZE       1
 287 #define R300_PS_CMDSIZE         2
 288
 289 #define R300_ZBS_CMD_0          0
 290 #define R300_ZBS_T_FACTOR       1
 291 #define R300_ZBS_T_CONSTANT     2
 292 #define R300_ZBS_W_FACTOR       3
 293 #define R300_ZBS_W_CONSTANT     4
 294 #define R300_ZBS_CMDSIZE        5
 295
 296 #define R300_CUL_CMD_0          0
 297 #define R300_CUL_CULL           1
 298 #define R300_CUL_CMDSIZE        2
 299
 300 #define R300_RC_CMD_0           0
 301 #define R300_RC_CNTL_0          1
 302 #define R300_RC_CNTL_1          2
 303 #define R300_RC_CMDSIZE         3
 304
 305 #define R300_RI_CMD_0           0
 306 #define R300_RI_INTERP_0        1
 307 #define R300_RI_INTERP_1        2
 308 #define R300_RI_INTERP_2        3
 309 #define R300_RI_INTERP_3        4
 310 #define R300_RI_INTERP_4        5
 311 #define R300_RI_INTERP_5        6
 312 #define R300_RI_INTERP_6        7
 313 #define R300_RI_INTERP_7        8
 314 #define R300_RI_CMDSIZE         9
 315
 316 #define R300_RR_CMD_0           0 /* rr is variable size (at least 1) */
 317 #define R300_RR_ROUTE_0         1
 318 #define R300_RR_ROUTE_1         2
 319 #define R300_RR_ROUTE_2         3
 320 #define R300_RR_ROUTE_3         4
 321 #define R300_RR_ROUTE_4         5
 322 #define R300_RR_ROUTE_5         6
 323 #define R300_RR_ROUTE_6         7
 324 #define R300_RR_ROUTE_7         8
 325 #define R300_RR_CMDSIZE         9
 326
 327 #define R300_FP_CMD_0           0
 328 #define R300_FP_CNTL0           1
 329 #define R300_FP_CNTL1           2
 330 #define R300_FP_CNTL2           3
 331 #define R300_FP_CMD_1           4
 332 #define R300_FP_NODE0           5
 333 #define R300_FP_NODE1           6
 334 #define R300_FP_NODE2           7
 335 #define R300_FP_NODE3           8
 336 #define R300_FP_CMDSIZE         9
 337
 338 #define R300_FPT_CMD_0          0
 339 #define R300_FPT_INSTR_0        1
 340 #define R300_FPT_CMDSIZE        65
 341
 342 #define R300_FPI_CMD_0          0
 343 #define R300_FPI_INSTR_0        1
 344 #define R300_FPI_CMDSIZE        65
 345
 346 #define R300_FPP_CMD_0          0
 347 #define R300_FPP_PARAM_0        1
 348 #define R300_FPP_CMDSIZE        (32*4+1)
 349
 350 #define R300_AT_CMD_0           0
 351 #define R300_AT_ALPHA_TEST      1
 352 #define R300_AT_UNKNOWN         2
 353 #define R300_AT_CMDSIZE         3
 354
 355 #define R300_BLD_CMD_0          0
 356 #define R300_BLD_CBLEND         1
 357 #define R300_BLD_ABLEND         2
 358 #define R300_BLD_CMDSIZE        3
 359
 360 #define R300_CMK_CMD_0          0
 361 #define R300_CMK_COLORMASK      1
 362 #define R300_CMK_CMDSIZE        2
 363
 364 #define R300_CB_CMD_0           0
 365 #define R300_CB_OFFSET          1
 366 #define R300_CB_CMD_1           2
 367 #define R300_CB_PITCH           3
 368 #define R300_CB_CMDSIZE         4
 369
 370 #define R300_ZS_CMD_0           0
 371 #define R300_ZS_CNTL_0          1
 372 #define R300_ZS_CNTL_1          2
 373 #define R300_ZS_CNTL_2          3
 374 #define R300_ZS_CMDSIZE         4
 375
 376 #define R300_ZB_CMD_0           0
 377 #define R300_ZB_OFFSET          1
 378 #define R300_ZB_PITCH           2
 379 #define R300_ZB_CMDSIZE         3
 380
 381 #define R300_VPI_CMD_0          0
 382 #define R300_VPI_INSTR_0        1
 383 #define R300_VPI_CMDSIZE        1025 /* 256 16 byte instructions */
 384
 385 #define R300_VPP_CMD_0          0
 386 #define R300_VPP_PARAM_0        1
 387 #define R300_VPP_CMDSIZE        1025 /* 256 4-component parameters */
 388
 389 #define R300_VPS_CMD_0          0
 390 #define R300_VPS_ZERO_0         1
 391 #define R300_VPS_ZERO_1         2
 392 #define R300_VPS_POINTSIZE      3
 393 #define R300_VPS_ZERO_3         4
 394 #define R300_VPS_CMDSIZE        5
 395
 396         /* the layout is common for all fields inside tex */
 397 #define R300_TEX_CMD_0          0
 398 #define R300_TEX_VALUE_0        1
 399 /* We don't really use this, instead specify mtu+1 dynamically
 400 #define R300_TEX_CMDSIZE        (MAX_TEXTURE_UNITS+1)
 401 */
 402
 403 /**
 404  * Cache for hardware register state.
 405  */
 406 struct r300_hw_state {
 407         struct r300_state_atom atomlist;
 408
 409         GLboolean       is_dirty;
 410         GLboolean       all_dirty;
 411         int             max_state_size; /* in dwords */
 412
 413         struct r300_state_atom vpt;     /* viewport (1D98) */
 414         struct r300_state_atom unk2080; /* (2080) */
 415         struct r300_state_atom vof;     /* VAP output format register 0x2090 */
 416         struct r300_state_atom vte;     /* (20B0) */
 417         struct r300_state_atom unk2134; /* (2134) */
 418         struct r300_state_atom unk2140; /* (2140) */
 419         struct r300_state_atom vir[2];  /* vap input route (2150/21E0) */
 420         struct r300_state_atom vic;     /* vap input control (2180) */
 421         struct r300_state_atom unk21DC; /* (21DC) */
 422         struct r300_state_atom unk221C; /* (221C) */
 423         struct r300_state_atom unk2220; /* (2220) */
 424         struct r300_state_atom unk2288; /* (2288) */
 425         struct r300_state_atom pvs;     /* pvs_cntl (22D0) */
 426         struct r300_state_atom gb_enable; /* (4008) */
 427         struct r300_state_atom gb_misc; /* Multisampling position shifts ? (4010) */
 428         struct r300_state_atom unk4200; /* (4200) */
 429         struct r300_state_atom unk4214; /* (4214) */
 430         struct r300_state_atom ps;      /* pointsize (421C) */
 431         struct r300_state_atom unk4230; /* (4230) */
 432         struct r300_state_atom lcntl;   /* line control */
 433         struct r300_state_atom unk4260; /* (4260) */
 434         struct r300_state_atom unk4274; /* (4274) */
 435         struct r300_state_atom unk4288; /* (4288) */
 436         struct r300_state_atom unk42A0; /* (42A0) */
 437         struct r300_state_atom zbs;     /* zbias (42A4) */
 438         struct r300_state_atom unk42B4; /* (42B4) */
 439         struct r300_state_atom cul;     /* cull cntl (42B8) */
 440         struct r300_state_atom unk42C0; /* (42C0) */
 441         struct r300_state_atom rc;      /* rs control (4300) */
 442         struct r300_state_atom ri;      /* rs interpolators (4310) */
 443         struct r300_state_atom rr;      /* rs route (4330) */
 444         struct r300_state_atom unk43A4; /* (43A4) */
 445         struct r300_state_atom unk43E8; /* (43E8) */
 446         struct r300_state_atom fp;      /* fragment program cntl + nodes (4600) */
 447         struct r300_state_atom fpt;     /* texi - (4620) */
 448         struct r300_state_atom unk46A4; /* (46A4) */
 449         struct r300_state_atom fpi[4];  /* fp instructions (46C0/47C0/48C0/49C0) */
 450         struct r300_state_atom unk4BC0; /* (4BC0) */
 451         struct r300_state_atom unk4BC8; /* (4BC8) */
 452         struct r300_state_atom at;      /* alpha test (4BD4) */
 453         struct r300_state_atom unk4BD8; /* (4BD8) */
 454         struct r300_state_atom fpp;     /* 0x4C00 and following */
 455         struct r300_state_atom unk4E00; /* (4E00) */
 456         struct r300_state_atom bld;     /* blending (4E04) */
 457         struct r300_state_atom cmk;     /* colormask (4E0C) */
 458         struct r300_state_atom unk4E10; /* constant blend color + ??? (4E10) */
 459         struct r300_state_atom cb;      /* colorbuffer (4E28) */
 460         struct r300_state_atom unk4E50; /* (4E50) */
 461         struct r300_state_atom unk4E88; /* (4E88) */
 462         struct r300_state_atom unk4EA0; /* (4E88) I saw it only written on RV350 hardware..  */
 463         struct r300_state_atom zs;      /* zstencil control (4F00) */
 464         struct r300_state_atom unk4F10; /* (4F10) */
 465         struct r300_state_atom zb;      /* z buffer (4F20) */
 466         struct r300_state_atom unk4F28; /* (4F28) */
 467         struct r300_state_atom unk4F30; /* (4F30) */
 468         struct r300_state_atom unk4F44; /* (4F44) */
 469         struct r300_state_atom unk4F54; /* (4F54) */
 470
 471         struct r300_state_atom vpi;     /* vp instructions */
 472         struct r300_state_atom vpp;     /* vp parameters */
 473         struct r300_state_atom vps;     /* vertex point size (?) */
 474                 /* 8 texture units */
 475                 /* the state is grouped by function and not by
 476                    texture unit. This makes single unit updates
 477                    really awkward - we are much better off
 478                    updating the whole thing at once */
 479         struct {
 480                 struct r300_state_atom filter;
 481                 struct r300_state_atom unknown1;
 482                 struct r300_state_atom size;
 483                 struct r300_state_atom format;
 484                 struct r300_state_atom offset;
 485                 struct r300_state_atom unknown4;
 486                 struct r300_state_atom border_color;
 487                 } tex;
 488         struct r300_state_atom txe;     /* tex enable (4104) */
 489 };
 490
 491
 492 /**
 493  * This structure holds the command buffer while it is being constructed.
 494  *
 495  * The first batch of commands in the buffer is always the state that needs
 496  * to be re-emitted when the context is lost. This batch can be skipped
 497  * otherwise.
 498  */
 499 struct r300_cmdbuf {
 500         int             size;           /* DWORDs allocated for buffer */
 501         uint32_t*       cmd_buf;
 502         int             count_used;     /* DWORDs filled so far */
 503         int             count_reemit;   /* size of re-emission batch */
 504 };
 505
 506
 507 /**
 508  * State cache
 509  */
 510
 511 struct r300_depthbuffer_state {
 512         GLfloat scale;
 513 };
 514
 515 struct r300_stencilbuffer_state {
 516         GLuint clear;
 517         GLboolean hw_stencil;
 518
 519 };
 520
 521 struct r300_vap_reg_state {
 522            /* input register assigments */
 523            int i_coords;
 524            int i_normal;
 525            int i_color[2];
 526            int i_fog;
 527            int i_tex[R300_MAX_TEXTURE_UNITS];
 528            int i_index;
 529            int i_pointsize;
 530         };
 531
 532 /* Vertex shader state */
 533
 534 /* Perhaps more if we store programs in vmem? */
 535 #define VSF_MAX_FRAGMENT_LENGTH (256*4)
 536
 537 /* Can be tested with colormat currently. */
 538 #define VSF_MAX_FRAGMENT_TEMPS (14)
 539
 540
 541 struct r300_vertex_shader_fragment {
 542         int length;
 543         union {
 544                 GLuint d[VSF_MAX_FRAGMENT_LENGTH];
 545                 float f[VSF_MAX_FRAGMENT_LENGTH];
 546                 VERTEX_SHADER_INSTRUCTION i[VSF_MAX_FRAGMENT_LENGTH/4];
 547                 } body;
 548         };
 549
 550 #define VSF_DEST_PROGRAM        0x0
 551 #define VSF_DEST_MATRIX0        0x200
 552 #define VSF_DEST_MATRIX1        0x204
 553 #define VSF_DEST_MATRIX2        0x208
 554 #define VSF_DEST_VECTOR0        0x20c
 555 #define VSF_DEST_VECTOR1        0x20d
 556 #define VSF_DEST_UNKNOWN1       0x400
 557 #define VSF_DEST_UNKNOWN2       0x406
 558
 559 struct r300_vertex_shader_state {
 560         struct r300_vertex_shader_fragment program;
 561
 562         /* a bit of a waste - each uses only a subset of allocated space..
 563             but easier to program */
 564         struct r300_vertex_shader_fragment matrix[3];
 565         struct r300_vertex_shader_fragment vector[2];
 566
 567         struct r300_vertex_shader_fragment unknown1;
 568         struct r300_vertex_shader_fragment unknown2;
 569
 570         int program_start;
 571         int unknown_ptr1;  /* pointer within program space */
 572         int program_end;
 573
 574         int param_offset;
 575         int param_count;
 576
 577         int unknown_ptr2;  /* pointer within program space */
 578         int unknown_ptr3;  /* pointer within program space */
 579         };
 580
 581 extern int hw_tcl_on;
 582
 583 #define CURRENT_VERTEX_SHADER(ctx) (ctx->VertexProgram._Current)
 584
 585 //#define TMU_ENABLED(ctx, unit) (hw_tcl_on ? ctx->Texture.Unit[unit]._ReallyEnabled && (OutputsWritten & (1<<(VERT_RESULT_TEX0+(unit)))) :
 586 //      (r300->state.render_inputs & (_TNL_BIT_TEX0<<(unit))))
 587 #define TMU_ENABLED(ctx, unit) (hw_tcl_on ? ctx->Texture.Unit[unit]._ReallyEnabled && OutputsWritten & (1<<(VERT_RESULT_TEX0+(unit))) : \
 588         ctx->Texture.Unit[unit]._ReallyEnabled && r300->state.render_inputs & (_TNL_BIT_TEX0<<(unit)))
 589
 590 /* r300_vertex_shader_state and r300_vertex_program should probably be merged together someday.
 591  * Keeping them them seperate for now should ensure fixed pipeline keeps functioning properly.
 592  */
 593 struct r300_vertex_program {
 594         struct vertex_program mesa_program; /* Must be first */
 595         int translated;
 596
 597         struct r300_vertex_shader_fragment program;
 598         struct r300_vertex_shader_fragment params;
 599
 600         int pos_end;
 601         int num_temporaries; /* Number of temp vars used by program */
 602         int inputs[VERT_ATTRIB_MAX];
 603         int outputs[VERT_RESULT_MAX];
 604 };
 605
 606 #if USE_ARB_F_P == 1
 607 #define PFS_MAX_ALU_INST        64
 608 #define PFS_MAX_TEX_INST        64
 609 #define PFS_MAX_TEX_INDIRECT 4
 610 #define PFS_NUM_TEMP_REGS       32
 611 #define PFS_NUM_CONST_REGS      32
 612 struct r300_fragment_program {
 613         struct fragment_program mesa_program;
 614
 615         GLcontext *ctx;
 616         GLboolean translated;
 617         GLboolean error;
 618
 619         struct {
 620                 int length;
 621                 GLuint inst[PFS_MAX_TEX_INST];
 622         } tex;
 623
 624         struct {
 625                 struct {
 626                         GLuint inst0;
 627                         GLuint inst1;
 628                         GLuint inst2;
 629                         GLuint inst3;
 630                 } inst[PFS_MAX_ALU_INST];
 631         } alu;
 632         int v_pos;
 633         int s_pos;
 634
 635         struct {
 636                 int tex_offset;
 637                 int tex_end;
 638                 int alu_offset;
 639                 int alu_end;
 640         } node[4];
 641         int cur_node;
 642         int first_node_has_tex;
 643
 644         int alu_offset;
 645         int alu_end;
 646         int tex_offset;
 647         int tex_end;
 648
 649         /* Hardware constants */
 650         GLfloat constant[PFS_NUM_CONST_REGS][4];
 651         int const_nr;
 652
 653         /* Tracked parameters */
 654         struct {
 655                 int idx;                        /* hardware index */
 656                 GLfloat *values;        /* pointer to values */
 657         } param[PFS_NUM_CONST_REGS];
 658         int param_nr;
 659         GLboolean params_uptodate;
 660
 661         GLuint temps[PFS_NUM_TEMP_REGS];
 662         int temp_in_use;
 663         GLuint used_in_node;
 664         GLuint dest_in_node;
 665         GLuint inputs[32]; /* don't actually need 32... */
 666
 667         int hwreg_in_use;
 668         int max_temp_idx;
 669 };
 670
 671 #else
 672 /* 64 appears to be the maximum */
 673 #define PSF_MAX_PROGRAM_LENGTH 64
 674
 675 struct r300_pixel_shader_program {
 676         struct {
 677                 int length;
 678                 GLuint inst[PSF_MAX_PROGRAM_LENGTH];
 679                 } tex;
 680
 681         /* ALU intructions (logic and integer) */
 682         struct {
 683                 int length;
 684                 struct {
 685                         GLuint inst0;
 686                         GLuint inst1;
 687                         GLuint inst2;
 688                         GLuint inst3;
 689                         } inst[PSF_MAX_PROGRAM_LENGTH];
 690                 } alu;
 691
 692         /* node information */
 693         /* nodes are used to synchronize ALU and TEX streams */
 694         /* There could be up to 4 nodes each consisting of
 695            a number of TEX instructions followed by some ALU
 696            instructions */
 697         /* the last node of a program should always be node3 */
 698         struct {
 699                 int tex_offset;
 700                 int tex_end;
 701                 int alu_offset;
 702                 int alu_end;
 703                 } node[4];
 704
 705         int active_nodes;       /* must be between 1 and 4, inclusive */
 706         int first_node_has_tex;  /* other nodes always have it */
 707
 708         int temp_register_count;  /* magic value goes into PFS_CNTL_1 */
 709
 710         /* entire program */
 711         int tex_offset;
 712         int tex_end;
 713         int alu_offset;
 714         int alu_end;
 715
 716         };
 717
 718 #define MAX_PIXEL_SHADER_PARAMS 32
 719 struct r300_pixel_shader_state {
 720         struct r300_pixel_shader_program program;
 721
 722         int translated;
 723         int have_sample;
 724         GLuint color_reg;
 725         GLuint src_previous;
 726
 727         /* parameters */
 728         int param_length;  /* to limit the number of unnecessary writes */
 729         struct {
 730                 float x;
 731                 float y;
 732                 float z;
 733                 float w;
 734                 } param[MAX_PIXEL_SHADER_PARAMS];
 735         };
 736 #endif // USE_ARB_F_P
 737
 738 /* 8 is somewhat bogus... it is probably something like 24 */
 739 #define R300_MAX_AOS_ARRAYS             16
 740
 741 #define AOS_FORMAT_FLOAT        1
 742 #define AOS_FORMAT_UBYTE        2
 743 #define AOS_FORMAT_FLOAT_COLOR  3
 744
 745 #define REG_COORDS      0
 746 #define REG_COLOR0      1
 747 #define REG_TEX0        2
 748
 749 #ifdef USER_BUFFERS
 750 struct dt {
 751         GLint size;
 752         GLenum type;
 753         GLsizei stride;
 754         void *data;
 755 };
 756
 757 struct radeon_vertex_buffer {
 758         int Count;
 759         void *Elts;
 760         int elt_size;
 761         int elt_min, elt_max; /* debug */
 762
 763         struct dt AttribPtr[VERT_ATTRIB_MAX];
 764
 765         struct tnl_prim  *Primitive;
 766         GLuint      PrimitiveCount;
 767         GLint LockFirst;
 768         GLsizei LockCount;
 769         int lock_uptodate;
 770 };
 771 #endif
 772
 773 struct r300_aos_rec {
 774         GLuint offset;
 775         int element_size; /* in dwords */
 776         int stride;       /* distance between elements, in dwords */
 777
 778         int format;
 779
 780         int ncomponents; /* number of components - between 1 and 4, inclusive */
 781
 782         int reg; /* which register they are assigned to. */
 783
 784         };
 785
 786 struct r300_state {
 787         struct r300_depthbuffer_state depth;
 788         struct r300_texture_state texture;
 789         struct r300_vap_reg_state vap_reg;
 790         struct r300_vertex_shader_state vertex_shader;
 791 #if USE_ARB_F_P == 0
 792         struct r300_pixel_shader_state pixel_shader;
 793 #endif
 794         struct r300_dma_region aos[R300_MAX_AOS_ARRAYS];
 795         int aos_count;
 796 #ifdef USER_BUFFERS
 797         struct radeon_vertex_buffer VB;
 798 #endif
 799
 800         GLuint *Elts;
 801         struct r300_dma_region elt_dma;
 802
 803         GLuint render_inputs; /* actual render inputs that R300 was configured for.
 804                                  They are the same as tnl->render_inputs for fixed pipeline */
 805
 806         struct {
 807                 int transform_offset;  /* Transform matrix offset, -1 if none */
 808                 } vap_param;  /* vertex processor parameter allocation - tells where to write parameters */
 809
 810         struct r300_stencilbuffer_state stencil;
 811
 812 };
 813
 814
 815 /**
 816  * R300 context structure.
 817  */
 818 struct r300_context {
 819         struct radeon_context radeon; /* parent class, must be first */
 820
 821         struct r300_hw_state hw;
 822         struct r300_cmdbuf cmdbuf;
 823         struct r300_state state;
 824
 825         /* Vertex buffers
 826          */
 827         struct r300_dma dma;
 828         GLboolean save_on_next_unlock;
 829         GLuint NewGLState;
 830
 831         /* Texture object bookkeeping
 832          */
 833         unsigned nr_heaps;
 834         driTexHeap *texture_heaps[RADEON_NR_TEX_HEAPS];
 835         driTextureObject swapped;
 836         int texture_depth;
 837         float initialMaxAnisotropy;
 838
 839         /* Clientdata textures;
 840          */
 841         GLuint prefer_gart_client_texturing;
 842
 843 #ifdef USER_BUFFERS
 844         key_t mm_ipc_key;
 845         int mm_shm_id;
 846         int mm_sem_id;
 847         struct radeon_memory_manager *rmm;
 848 #endif
 849 };
 850
 851 struct r300_buffer_object {
 852         struct gl_buffer_object mesa_obj;
 853         int id;
 854 };
 855
 856 #define R300_CONTEXT(ctx)               ((r300ContextPtr)(ctx->DriverCtx))
 857
 858 static __inline GLuint r300PackColor( GLuint cpp,
 859                                         GLubyte r, GLubyte g,
 860                                         GLubyte b, GLubyte a )
 861 {
 862    switch ( cpp ) {
 863    case 2:
 864       return PACK_COLOR_565( r, g, b );
 865    case 4:
 866       return PACK_COLOR_8888( r, g, b, a );
 867    default:
 868       return 0;
 869    }
 870 }
 871 extern void r300DestroyContext(__DRIcontextPrivate * driContextPriv);
 872 extern GLboolean r300CreateContext(const __GLcontextModes * glVisual,
 873                                    __DRIcontextPrivate * driContextPriv,
 874                                    void *sharedContextPrivate);
 875
 876 void translate_vertex_shader(struct r300_vertex_program *vp);
 877 extern void r300InitShaderFuncs(struct dd_function_table *functions);
 878 extern int r300VertexProgUpdateParams(GLcontext *ctx, struct r300_vertex_program *vp, float *dst);
 879 extern GLboolean r300Fallback(GLcontext *ctx);
 880
 881 #ifdef RADEON_VTXFMT_A
 882 extern void radeon_init_vtxfmt_a(r300ContextPtr rmesa);
 883 #endif
 884
 885 #ifdef HW_VBOS
 886 extern void r300_init_vbo_funcs(struct dd_function_table *functions);
 887 #endif
 888
 889 #endif                          /* __R300_CONTEXT_H__ */