r300: cleanup vertex program related functions
[mesa.git] / src / mesa / drivers / dri / r300 / r300_emit.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file
32 *
33 * \author Keith Whitwell <keith@tungstengraphics.com>
34 */
35
36 #include "main/glheader.h"
37 #include "main/mtypes.h"
38 #include "main/colormac.h"
39 #include "main/imports.h"
40 #include "main/macros.h"
41 #include "main/image.h"
42
43 #include "swrast_setup/swrast_setup.h"
44 #include "math/m_translate.h"
45 #include "tnl/tnl.h"
46 #include "tnl/t_context.h"
47
48 #include "r300_context.h"
49 #include "r300_state.h"
50 #include "r300_emit.h"
51 #include "r300_ioctl.h"
52
53
54 #if SWIZZLE_X != R300_INPUT_ROUTE_SELECT_X || \
55 SWIZZLE_Y != R300_INPUT_ROUTE_SELECT_Y || \
56 SWIZZLE_Z != R300_INPUT_ROUTE_SELECT_Z || \
57 SWIZZLE_W != R300_INPUT_ROUTE_SELECT_W || \
58 SWIZZLE_ZERO != R300_INPUT_ROUTE_SELECT_ZERO || \
59 SWIZZLE_ONE != R300_INPUT_ROUTE_SELECT_ONE
60 #error Cannot change these!
61 #endif
62
63 #define DEBUG_ALL DEBUG_VERTS
64
65 #define DW_SIZE(x) ((inputs[tab[(x)]] << R300_DST_VEC_LOC_SHIFT) | \
66 (attribptr[tab[(x)]]->size - 1) << R300_DATA_TYPE_0_SHIFT)
67
68 GLuint r300VAPInputRoute0(uint32_t * dst, GLvector4f ** attribptr,
69 int *inputs, GLint * tab, GLuint nr)
70 {
71 GLuint i, dw;
72
73 /* type, inputs, stop bit, size */
74 for (i = 0; i < nr; i += 2) {
75 /* make sure input is valid, would lockup the gpu */
76 assert(inputs[tab[i]] != -1);
77 dw = (R300_SIGNED | DW_SIZE(i));
78 if (i + 1 == nr) {
79 dw |= R300_LAST_VEC << R300_DATA_TYPE_0_SHIFT;
80 } else {
81 assert(inputs[tab[i + 1]] != -1);
82 dw |= (R300_SIGNED |
83 DW_SIZE(i + 1)) << R300_DATA_TYPE_1_SHIFT;
84 if (i + 2 == nr) {
85 dw |= R300_LAST_VEC << R300_DATA_TYPE_1_SHIFT;
86 }
87 }
88 dst[i >> 1] = dw;
89 }
90
91 return (nr + 1) >> 1;
92 }
93
94 static GLuint r300VAPInputRoute1Swizzle(int swizzle[4])
95 {
96 return (swizzle[0] << R300_SWIZZLE_SELECT_X_SHIFT) |
97 (swizzle[1] << R300_SWIZZLE_SELECT_Y_SHIFT) |
98 (swizzle[2] << R300_SWIZZLE_SELECT_Z_SHIFT) |
99 (swizzle[3] << R300_SWIZZLE_SELECT_W_SHIFT);
100 }
101
102 GLuint r300VAPInputRoute1(uint32_t * dst, int swizzle[][4], GLuint nr)
103 {
104 GLuint i, dw;
105
106 for (i = 0; i < nr; i += 2) {
107 dw = (r300VAPInputRoute1Swizzle(swizzle[i]) |
108 ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y |
109 R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE0_SHIFT;
110 if (i + 1 < nr) {
111 dw |= (r300VAPInputRoute1Swizzle(swizzle[i + 1]) |
112 ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y |
113 R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE1_SHIFT;
114 }
115 dst[i >> 1] = dw;
116 }
117
118 return (nr + 1) >> 1;
119 }
120
121 GLuint r300VAPInputCntl0(GLcontext * ctx, GLuint InputsRead)
122 {
123 /* No idea what this value means. I have seen other values written to
124 * this register... */
125 return 0x5555;
126 }
127
128 GLuint r300VAPInputCntl1(GLcontext * ctx, GLuint InputsRead)
129 {
130 GLuint i, vic_1 = 0;
131
132 if (InputsRead & (1 << VERT_ATTRIB_POS))
133 vic_1 |= R300_INPUT_CNTL_POS;
134
135 if (InputsRead & (1 << VERT_ATTRIB_NORMAL))
136 vic_1 |= R300_INPUT_CNTL_NORMAL;
137
138 if (InputsRead & (1 << VERT_ATTRIB_COLOR0))
139 vic_1 |= R300_INPUT_CNTL_COLOR;
140
141 for (i = 0; i < ctx->Const.MaxTextureUnits; i++)
142 if (InputsRead & (1 << (VERT_ATTRIB_TEX0 + i))) {
143 vic_1 |= R300_INPUT_CNTL_TC0 << i;
144 }
145
146 return vic_1;
147 }
148
149 GLuint r300VAPOutputCntl0(GLcontext * ctx, GLuint OutputsWritten)
150 {
151 GLuint ret = 0;
152
153 if (OutputsWritten & (1 << VERT_RESULT_HPOS))
154 ret |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT;
155
156 if (OutputsWritten & (1 << VERT_RESULT_COL0))
157 ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT;
158
159 if (OutputsWritten & (1 << VERT_RESULT_COL1))
160 ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT;
161
162 if (OutputsWritten & (1 << VERT_RESULT_BFC0)
163 || OutputsWritten & (1 << VERT_RESULT_BFC1))
164 ret |=
165 R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT |
166 R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT |
167 R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT;
168
169 if (OutputsWritten & (1 << VERT_RESULT_PSIZ))
170 ret |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT;
171
172 return ret;
173 }
174
175 GLuint r300VAPOutputCntl1(GLcontext * ctx, GLuint OutputsWritten)
176 {
177 GLuint i, ret = 0, first_free_texcoord = 0;
178
179 for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
180 if (OutputsWritten & (1 << (VERT_RESULT_TEX0 + i))) {
181 ret |= (4 << (3 * i));
182 ++first_free_texcoord;
183 }
184 }
185
186 if (OutputsWritten & (1 << VERT_RESULT_FOGC)) {
187 if (first_free_texcoord > 8) {
188 fprintf(stderr, "\tout of free texcoords to write fog coord\n");
189 _mesa_exit(-1);
190 }
191 ret |= 1 << (3 * first_free_texcoord);
192 }
193
194 return ret;
195 }
196
197 /* Emit vertex data to GART memory
198 * Route inputs to the vertex processor
199 */
200 void r300EmitArrays(GLcontext * ctx)
201 {
202 r300ContextPtr rmesa = R300_CONTEXT(ctx);
203 TNLcontext *tnl = TNL_CONTEXT(ctx);
204 struct vertex_buffer *vb = &tnl->vb;
205 GLuint nr;
206 GLuint count = vb->Count;
207 GLuint i;
208 GLuint InputsRead = 0, OutputsWritten = 0;
209 int *inputs = NULL;
210 int vir_inputs[VERT_ATTRIB_MAX];
211 GLint tab[VERT_ATTRIB_MAX];
212 int swizzle[VERT_ATTRIB_MAX][4];
213 struct r300_vertex_program *prog = rmesa->selected_vp;
214
215 if (rmesa->options.hw_tcl_enabled) {
216 inputs = prog->inputs;
217 InputsRead = prog->key.InputsRead;
218 OutputsWritten = prog->key.OutputsWritten;
219 } else {
220 inputs = rmesa->swtcl.sw_tcl_inputs;
221
222 DECLARE_RENDERINPUTS(render_inputs_bitset);
223 RENDERINPUTS_COPY(render_inputs_bitset, tnl->render_inputs_bitset);
224
225 vb->AttribPtr[VERT_ATTRIB_POS] = vb->ClipPtr;
226
227 assert(RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_POS));
228 assert(RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_NORMAL) == 0);
229
230 if (RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_POS)) {
231 InputsRead |= 1 << VERT_ATTRIB_POS;
232 OutputsWritten |= 1 << VERT_RESULT_HPOS;
233 }
234
235 if (RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_COLOR0)) {
236 InputsRead |= 1 << VERT_ATTRIB_COLOR0;
237 OutputsWritten |= 1 << VERT_RESULT_COL0;
238 }
239
240 if (RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_COLOR1)) {
241 InputsRead |= 1 << VERT_ATTRIB_COLOR1;
242 OutputsWritten |= 1 << VERT_RESULT_COL1;
243 }
244
245 for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
246 if (RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_TEX(i))) {
247 InputsRead |= 1 << (VERT_ATTRIB_TEX0 + i);
248 OutputsWritten |= 1 << (VERT_RESULT_TEX0 + i);
249 }
250 }
251
252 for (i = 0, nr = 0; i < VERT_ATTRIB_MAX; i++) {
253 if (InputsRead & (1 << i)) {
254 inputs[i] = nr++;
255 } else {
256 inputs[i] = -1;
257 }
258 }
259
260 /* Fixed, apply to vir0 only */
261 memcpy(vir_inputs, inputs, VERT_ATTRIB_MAX * sizeof(int));
262 inputs = vir_inputs;
263 if (InputsRead & VERT_ATTRIB_POS)
264 inputs[VERT_ATTRIB_POS] = 0;
265 if (InputsRead & (1 << VERT_ATTRIB_COLOR0))
266 inputs[VERT_ATTRIB_COLOR0] = 2;
267 if (InputsRead & (1 << VERT_ATTRIB_COLOR1))
268 inputs[VERT_ATTRIB_COLOR1] = 3;
269 for (i = VERT_ATTRIB_TEX0; i <= VERT_ATTRIB_TEX7; i++)
270 if (InputsRead & (1 << i))
271 inputs[i] = 6 + (i - VERT_ATTRIB_TEX0);
272
273 RENDERINPUTS_COPY(rmesa->render_inputs_bitset, render_inputs_bitset);
274 }
275
276 assert(InputsRead);
277 assert(OutputsWritten);
278
279 for (i = 0, nr = 0; i < VERT_ATTRIB_MAX; i++) {
280 if (InputsRead & (1 << i)) {
281 tab[nr++] = i;
282 }
283 }
284
285 assert(nr <= R300_MAX_AOS_ARRAYS);
286
287 for (i = 0; i < nr; i++) {
288 int ci;
289
290 swizzle[i][0] = SWIZZLE_ZERO;
291 swizzle[i][1] = SWIZZLE_ZERO;
292 swizzle[i][2] = SWIZZLE_ZERO;
293 swizzle[i][3] = SWIZZLE_ONE;
294
295 for (ci = 0; ci < vb->AttribPtr[tab[i]]->size; ci++) {
296 swizzle[i][ci] = ci;
297 }
298 rcommon_emit_vector(ctx, &rmesa->radeon.tcl.aos[i],
299 vb->AttribPtr[tab[i]]->data,
300 vb->AttribPtr[tab[i]]->size,
301 vb->AttribPtr[tab[i]]->stride, count);
302 }
303
304 /* Setup INPUT_ROUTE. */
305 if (rmesa->radeon.radeonScreen->kernel_mm) {
306 R300_STATECHANGE(rmesa, vir[0]);
307 rmesa->hw.vir[0].cmd[0] &= 0xC000FFFF;
308 rmesa->hw.vir[1].cmd[0] &= 0xC000FFFF;
309 rmesa->hw.vir[0].cmd[0] |=
310 (r300VAPInputRoute0(&rmesa->hw.vir[0].cmd[R300_VIR_CNTL_0],
311 vb->AttribPtr, inputs, tab, nr) & 0x3FFF) << 16;
312 R300_STATECHANGE(rmesa, vir[1]);
313 rmesa->hw.vir[1].cmd[0] |=
314 (r300VAPInputRoute1(&rmesa->hw.vir[1].cmd[R300_VIR_CNTL_0], swizzle,
315 nr) & 0x3FFF) << 16;
316 } else {
317 R300_STATECHANGE(rmesa, vir[0]);
318 ((drm_r300_cmd_header_t *) rmesa->hw.vir[0].cmd)->packet0.count =
319 r300VAPInputRoute0(&rmesa->hw.vir[0].cmd[R300_VIR_CNTL_0],
320 vb->AttribPtr, inputs, tab, nr);
321 R300_STATECHANGE(rmesa, vir[1]);
322 ((drm_r300_cmd_header_t *) rmesa->hw.vir[1].cmd)->packet0.count =
323 r300VAPInputRoute1(&rmesa->hw.vir[1].cmd[R300_VIR_CNTL_0], swizzle,
324 nr);
325 }
326
327 /* Setup INPUT_CNTL. */
328 R300_STATECHANGE(rmesa, vic);
329 rmesa->hw.vic.cmd[R300_VIC_CNTL_0] = r300VAPInputCntl0(ctx, InputsRead);
330 rmesa->hw.vic.cmd[R300_VIC_CNTL_1] = r300VAPInputCntl1(ctx, InputsRead);
331
332 /* Setup OUTPUT_VTX_FMT. */
333 R300_STATECHANGE(rmesa, vof);
334 rmesa->hw.vof.cmd[R300_VOF_CNTL_0] =
335 r300VAPOutputCntl0(ctx, OutputsWritten);
336 rmesa->hw.vof.cmd[R300_VOF_CNTL_1] =
337 r300VAPOutputCntl1(ctx, OutputsWritten);
338
339 rmesa->radeon.tcl.aos_count = nr;
340 }
341
342 void r300EmitCacheFlush(r300ContextPtr rmesa)
343 {
344 BATCH_LOCALS(&rmesa->radeon);
345
346 BEGIN_BATCH_NO_AUTOSTATE(4);
347 OUT_BATCH_REGVAL(R300_RB3D_DSTCACHE_CTLSTAT,
348 R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
349 R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
350 OUT_BATCH_REGVAL(R300_ZB_ZCACHE_CTLSTAT,
351 R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
352 R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
353 END_BATCH();
354 COMMIT_BATCH();
355 }