src/mesa/drivers/dri/r300/r300_emit.c

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /**
  31  * \file
  32  *
  33  * \author Keith Whitwell <keith@tungstengraphics.com>
  34  */
  35
  36 #include "main/glheader.h"
  37 #include "main/mtypes.h"
  38 #include "main/colormac.h"
  39 #include "main/imports.h"
  40 #include "main/macros.h"
  41 #include "main/image.h"
  42
  43 #include "swrast_setup/swrast_setup.h"
  44 #include "math/m_translate.h"
  45 #include "tnl/tnl.h"
  46 #include "tnl/t_context.h"
  47
  48 #include "r300_context.h"
  49 #include "r300_state.h"
  50 #include "r300_emit.h"
  51 #include "r300_ioctl.h"
  52
  53
  54 #if SWIZZLE_X != R300_INPUT_ROUTE_SELECT_X || \
  55     SWIZZLE_Y != R300_INPUT_ROUTE_SELECT_Y || \
  56     SWIZZLE_Z != R300_INPUT_ROUTE_SELECT_Z || \
  57     SWIZZLE_W != R300_INPUT_ROUTE_SELECT_W || \
  58     SWIZZLE_ZERO != R300_INPUT_ROUTE_SELECT_ZERO || \
  59     SWIZZLE_ONE != R300_INPUT_ROUTE_SELECT_ONE
  60 #error Cannot change these!
  61 #endif
  62
  63 #define DEBUG_ALL DEBUG_VERTS
  64
  65 #define DW_SIZE(x) ((inputs[tab[(x)]] << R300_DST_VEC_LOC_SHIFT) |      \
  66                     (attribptr[tab[(x)]]->size - 1) << R300_DATA_TYPE_0_SHIFT)
  67
  68 GLuint r300VAPInputRoute0(uint32_t * dst, GLvector4f ** attribptr,
  69                                  int *inputs, GLint * tab, GLuint nr)
  70 {
  71         GLuint i, dw;
  72
  73         /* type, inputs, stop bit, size */
  74         for (i = 0; i < nr; i += 2) {
  75                 /* make sure input is valid, would lockup the gpu */
  76                 assert(inputs[tab[i]] != -1);
  77                 dw = (R300_SIGNED | DW_SIZE(i));
  78                 if (i + 1 == nr) {
  79                         dw |= R300_LAST_VEC << R300_DATA_TYPE_0_SHIFT;
  80                 } else {
  81                         assert(inputs[tab[i + 1]] != -1);
  82                         dw |= (R300_SIGNED |
  83                                DW_SIZE(i + 1)) << R300_DATA_TYPE_1_SHIFT;
  84                         if (i + 2 == nr) {
  85                                 dw |= R300_LAST_VEC << R300_DATA_TYPE_1_SHIFT;
  86                         }
  87                 }
  88                 dst[i >> 1] = dw;
  89         }
  90
  91         return (nr + 1) >> 1;
  92 }
  93
  94 static GLuint r300VAPInputRoute1Swizzle(int swizzle[4])
  95 {
  96         return (swizzle[0] << R300_SWIZZLE_SELECT_X_SHIFT) |
  97             (swizzle[1] << R300_SWIZZLE_SELECT_Y_SHIFT) |
  98             (swizzle[2] << R300_SWIZZLE_SELECT_Z_SHIFT) |
  99             (swizzle[3] << R300_SWIZZLE_SELECT_W_SHIFT);
 100 }
 101
 102 GLuint r300VAPInputRoute1(uint32_t * dst, int swizzle[][4], GLuint nr)
 103 {
 104         GLuint i, dw;
 105
 106         for (i = 0; i < nr; i += 2) {
 107                 dw = (r300VAPInputRoute1Swizzle(swizzle[i]) |
 108                       ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y |
 109                         R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE0_SHIFT;
 110                 if (i + 1 < nr) {
 111                         dw |= (r300VAPInputRoute1Swizzle(swizzle[i + 1]) |
 112                                ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y |
 113                                  R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE1_SHIFT;
 114                 }
 115                 dst[i >> 1] = dw;
 116         }
 117
 118         return (nr + 1) >> 1;
 119 }
 120
 121 GLuint r300VAPInputCntl0(GLcontext * ctx, GLuint InputsRead)
 122 {
 123         /* No idea what this value means. I have seen other values written to
 124          * this register... */
 125         return 0x5555;
 126 }
 127
 128 GLuint r300VAPInputCntl1(GLcontext * ctx, GLuint InputsRead)
 129 {
 130         r300ContextPtr rmesa = R300_CONTEXT(ctx);
 131         GLuint i, vic_1 = 0;
 132
 133         if (InputsRead & (1 << VERT_ATTRIB_POS))
 134                 vic_1 |= R300_INPUT_CNTL_POS;
 135
 136         if (InputsRead & (1 << VERT_ATTRIB_NORMAL))
 137                 vic_1 |= R300_INPUT_CNTL_NORMAL;
 138
 139         if (InputsRead & (1 << VERT_ATTRIB_COLOR0))
 140                 vic_1 |= R300_INPUT_CNTL_COLOR;
 141
 142         rmesa->state.texture.tc_count = 0;
 143         for (i = 0; i < ctx->Const.MaxTextureUnits; i++)
 144                 if (InputsRead & (1 << (VERT_ATTRIB_TEX0 + i))) {
 145                         rmesa->state.texture.tc_count++;
 146                         vic_1 |= R300_INPUT_CNTL_TC0 << i;
 147                 }
 148
 149         return vic_1;
 150 }
 151
 152 GLuint r300VAPOutputCntl0(GLcontext * ctx, GLuint OutputsWritten)
 153 {
 154         GLuint ret = 0;
 155
 156         if (OutputsWritten & (1 << VERT_RESULT_HPOS))
 157                 ret |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT;
 158
 159         if (OutputsWritten & (1 << VERT_RESULT_COL0))
 160                 ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT;
 161
 162         if (OutputsWritten & (1 << VERT_RESULT_COL1))
 163                 ret |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT;
 164
 165         if (OutputsWritten & (1 << VERT_RESULT_BFC0)
 166             || OutputsWritten & (1 << VERT_RESULT_BFC1))
 167                 ret |=
 168                     R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT |
 169                     R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT |
 170                     R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT;
 171
 172         if (OutputsWritten & (1 << VERT_RESULT_PSIZ))
 173                 ret |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT;
 174
 175         return ret;
 176 }
 177
 178 GLuint r300VAPOutputCntl1(GLcontext * ctx, GLuint OutputsWritten)
 179 {
 180         GLuint i, ret = 0;
 181
 182         for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
 183                 if (OutputsWritten & (1 << (VERT_RESULT_TEX0 + i))) {
 184                         ret |= (4 << (3 * i));
 185                 }
 186         }
 187
 188         return ret;
 189 }
 190
 191 /* Emit vertex data to GART memory
 192  * Route inputs to the vertex processor
 193  * This function should never return R300_FALLBACK_TCL when using software tcl.
 194  */
 195 int r300EmitArrays(GLcontext * ctx)
 196 {
 197         r300ContextPtr rmesa = R300_CONTEXT(ctx);
 198         TNLcontext *tnl = TNL_CONTEXT(ctx);
 199         struct vertex_buffer *vb = &tnl->vb;
 200         GLuint nr;
 201         GLuint count = vb->Count;
 202         GLuint i;
 203         GLuint InputsRead = 0, OutputsWritten = 0;
 204         int *inputs = NULL;
 205         int vir_inputs[VERT_ATTRIB_MAX];
 206         GLint tab[VERT_ATTRIB_MAX];
 207         int swizzle[VERT_ATTRIB_MAX][4];
 208         struct r300_vertex_program *prog =
 209             (struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx);
 210
 211         if (hw_tcl_on) {
 212                 inputs = prog->inputs;
 213                 InputsRead = prog->key.InputsRead;
 214                 OutputsWritten = prog->key.OutputsWritten;
 215         } else {
 216                 inputs = rmesa->state.sw_tcl_inputs;
 217
 218                 DECLARE_RENDERINPUTS(render_inputs_bitset);
 219                 RENDERINPUTS_COPY(render_inputs_bitset, tnl->render_inputs_bitset);
 220
 221                 vb->AttribPtr[VERT_ATTRIB_POS] = vb->ClipPtr;
 222
 223                 assert(RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_POS));
 224                 assert(RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_NORMAL) == 0);
 225
 226                 if (RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_POS)) {
 227                         InputsRead |= 1 << VERT_ATTRIB_POS;
 228                         OutputsWritten |= 1 << VERT_RESULT_HPOS;
 229                 }
 230
 231                 if (RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_COLOR0)) {
 232                         InputsRead |= 1 << VERT_ATTRIB_COLOR0;
 233                         OutputsWritten |= 1 << VERT_RESULT_COL0;
 234                 }
 235
 236                 if (RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_COLOR1)) {
 237                         InputsRead |= 1 << VERT_ATTRIB_COLOR1;
 238                         OutputsWritten |= 1 << VERT_RESULT_COL1;
 239                 }
 240
 241                 for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
 242                         if (RENDERINPUTS_TEST(render_inputs_bitset, _TNL_ATTRIB_TEX(i))) {
 243                                 InputsRead |= 1 << (VERT_ATTRIB_TEX0 + i);
 244                                 OutputsWritten |= 1 << (VERT_RESULT_TEX0 + i);
 245                         }
 246                 }
 247
 248                 for (i = 0, nr = 0; i < VERT_ATTRIB_MAX; i++) {
 249                         if (InputsRead & (1 << i)) {
 250                                 inputs[i] = nr++;
 251                         } else {
 252                                 inputs[i] = -1;
 253                         }
 254                 }
 255
 256                 /* Fixed, apply to vir0 only */
 257                 memcpy(vir_inputs, inputs, VERT_ATTRIB_MAX * sizeof(int));
 258                 inputs = vir_inputs;
 259                 if (InputsRead & VERT_ATTRIB_POS)
 260                         inputs[VERT_ATTRIB_POS] = 0;
 261                 if (InputsRead & (1 << VERT_ATTRIB_COLOR0))
 262                         inputs[VERT_ATTRIB_COLOR0] = 2;
 263                 if (InputsRead & (1 << VERT_ATTRIB_COLOR1))
 264                         inputs[VERT_ATTRIB_COLOR1] = 3;
 265                 for (i = VERT_ATTRIB_TEX0; i <= VERT_ATTRIB_TEX7; i++)
 266                         if (InputsRead & (1 << i))
 267                                 inputs[i] = 6 + (i - VERT_ATTRIB_TEX0);
 268
 269                 RENDERINPUTS_COPY(rmesa->state.render_inputs_bitset, render_inputs_bitset);
 270         }
 271
 272         assert(InputsRead);
 273         assert(OutputsWritten);
 274
 275         for (i = 0, nr = 0; i < VERT_ATTRIB_MAX; i++) {
 276                 if (InputsRead & (1 << i)) {
 277                         tab[nr++] = i;
 278                 }
 279         }
 280
 281         if (nr > R300_MAX_AOS_ARRAYS) {
 282                 return R300_FALLBACK_TCL;
 283         }
 284
 285         for (i = 0; i < nr; i++) {
 286                 int ci;
 287
 288                 swizzle[i][0] = SWIZZLE_ZERO;
 289                 swizzle[i][1] = SWIZZLE_ZERO;
 290                 swizzle[i][2] = SWIZZLE_ZERO;
 291                 swizzle[i][3] = SWIZZLE_ONE;
 292
 293                 for (ci = 0; ci < vb->AttribPtr[tab[i]]->size; ci++) {
 294                         swizzle[i][ci] = ci;
 295                 }
 296                 rcommon_emit_vector(ctx, &rmesa->state.aos[i],
 297                                     vb->AttribPtr[tab[i]]->data,
 298                                     vb->AttribPtr[tab[i]]->size,
 299                                     vb->AttribPtr[tab[i]]->stride, count);
 300         }
 301
 302         /* Setup INPUT_ROUTE. */
 303         if (rmesa->radeon.radeonScreen->kernel_mm) {
 304                 R300_STATECHANGE(rmesa, vir[0]);
 305                 rmesa->hw.vir[0].cmd[0] &= 0xC000FFFF;
 306                 rmesa->hw.vir[1].cmd[0] &= 0xC000FFFF;
 307                 rmesa->hw.vir[0].cmd[0] |=
 308                         (r300VAPInputRoute0(&rmesa->hw.vir[0].cmd[R300_VIR_CNTL_0],
 309                                             vb->AttribPtr, inputs, tab, nr) & 0x3FFF) << 16;
 310                 R300_STATECHANGE(rmesa, vir[1]);
 311                 rmesa->hw.vir[1].cmd[0] |=
 312                         (r300VAPInputRoute1(&rmesa->hw.vir[1].cmd[R300_VIR_CNTL_0], swizzle,
 313                                             nr) & 0x3FFF) << 16;
 314         } else {
 315                 R300_STATECHANGE(rmesa, vir[0]);
 316                 ((drm_r300_cmd_header_t *) rmesa->hw.vir[0].cmd)->packet0.count =
 317                         r300VAPInputRoute0(&rmesa->hw.vir[0].cmd[R300_VIR_CNTL_0],
 318                                            vb->AttribPtr, inputs, tab, nr);
 319                 R300_STATECHANGE(rmesa, vir[1]);
 320                 ((drm_r300_cmd_header_t *) rmesa->hw.vir[1].cmd)->packet0.count =
 321                         r300VAPInputRoute1(&rmesa->hw.vir[1].cmd[R300_VIR_CNTL_0], swizzle,
 322                                            nr);
 323         }
 324
 325         /* Setup INPUT_CNTL. */
 326         R300_STATECHANGE(rmesa, vic);
 327         rmesa->hw.vic.cmd[R300_VIC_CNTL_0] = r300VAPInputCntl0(ctx, InputsRead);
 328         rmesa->hw.vic.cmd[R300_VIC_CNTL_1] = r300VAPInputCntl1(ctx, InputsRead);
 329
 330         /* Setup OUTPUT_VTX_FMT. */
 331         R300_STATECHANGE(rmesa, vof);
 332         rmesa->hw.vof.cmd[R300_VOF_CNTL_0] =
 333             r300VAPOutputCntl0(ctx, OutputsWritten);
 334         rmesa->hw.vof.cmd[R300_VOF_CNTL_1] =
 335             r300VAPOutputCntl1(ctx, OutputsWritten);
 336
 337         rmesa->state.aos_count = nr;
 338
 339         return R300_FALLBACK_NONE;
 340 }
 341
 342 void r300ReleaseArrays(GLcontext * ctx)
 343 {
 344         r300ContextPtr rmesa = R300_CONTEXT(ctx);
 345         int i;
 346
 347         if (rmesa->state.elt_dma_bo) {
 348                 radeon_bo_unref(rmesa->state.elt_dma_bo);
 349                 rmesa->state.elt_dma_bo = NULL;
 350         }
 351         for (i = 0; i < rmesa->state.aos_count; i++) {
 352                 if (rmesa->state.aos[i].bo) {
 353                         radeon_bo_unref(rmesa->state.aos[i].bo);
 354                         rmesa->state.aos[i].bo = NULL;
 355                 }
 356         }
 357 }
 358
 359 void r300EmitCacheFlush(r300ContextPtr rmesa)
 360 {
 361         BATCH_LOCALS(&rmesa->radeon);
 362
 363         BEGIN_BATCH_NO_AUTOSTATE(4);
 364         OUT_BATCH_REGVAL(R300_RB3D_DSTCACHE_CTLSTAT,
 365                 R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
 366                 R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
 367         OUT_BATCH_REGVAL(R300_ZB_ZCACHE_CTLSTAT,
 368                 R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
 369                 R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
 370         END_BATCH();
 371         COMMIT_BATCH();
 372 }