1 #ifndef __R300_FIXED_PIPELINES_H__
2 #define __R300_FIXED_PIPELINES_H__
4 /******** Flat color pipeline **********/
5 static struct r300_vertex_shader_state FLAT_COLOR_VERTEX_SHADER
={
10 EASY_VSF_OP(MUL
, 0, ALL
, TMP
),
13 EASY_VSF_SOURCE(0, W
, W
, W
, W
, NONE
, NONE
),
15 EASY_VSF_OP(MUL
, 1, ALL
, RESULT
),
20 EASY_VSF_OP(MAD
, 0, ALL
, TMP
),
25 EASY_VSF_OP(MAD
, 0, ALL
, TMP
),
30 EASY_VSF_OP(MAD
, 0, ALL
, RESULT
),
95 static struct r300_pixel_shader_state FLAT_COLOR_PIXEL_SHADER
={
102 /* My understanding is that we need at least 1 instructions for pixel shader,
103 in particular because alu_end==0 means there is one instruction */
115 first_node_has_tex
: 0,
116 temp_register_count
: 0,
128 /******** Single texture pipeline ***********/
129 static struct r300_vertex_shader_state SINGLE_TEXTURE_VERTEX_SHADER
={
134 EASY_VSF_OP(MUL
, 0, ALL
, TMP
),
137 EASY_VSF_SOURCE(0, W
, W
, W
, W
, NONE
, NONE
),
139 EASY_VSF_OP(MUL
, 2, ALL
, RESULT
),
144 EASY_VSF_OP(MAD
, 0, ALL
, TMP
),
149 EASY_VSF_OP(MUL
, 1, ALL
, RESULT
),
154 EASY_VSF_OP(MAD
, 0, ALL
, TMP
),
159 EASY_VSF_OP(MAD
, 0, ALL
, RESULT
),
230 static struct r300_pixel_shader_state SINGLE_TEXTURE_PIXEL_SHADER
={
240 /* What are 0's ORed with flags ? They are register numbers that
241 just happen to be 0 */
243 EASY_PFS_INSTR0(MAD
, SRC0C_XYZ
, SRC1C_XYZ
, ZERO
),
244 EASY_PFS_INSTR1(0, 0, 1, 0 | PFS_FLAG_CONST
, NONE
, ALL
),
247 /* no alpha in textures */
248 EASY_PFS_INSTR2(MAD
, SRC0A
, ONE
, ZERO
),
249 EASY_PFS_INSTR3(0, 1, 0 | PFS_FLAG_CONST
, 0 | PFS_FLAG_CONST
, OUTPUT
)
252 /* alpha in textures */
253 EASY_PFS_INSTR2(MAD
, SRC0A
, SRC1A
, ZERO
),
254 EASY_PFS_INSTR3(0, 0, 1, 0 | PFS_FLAG_CONST
, OUTPUT
)
266 first_node_has_tex
: 1,
267 temp_register_count
: 1,
277 { 0.0, 0.0, 0.0, 0.0},
278 { 0.0, 0.0, 0.0, 0.0},
279 { 0.0, 0.0, 0.0, 0.0},
280 { 0.0, 0.0, 0.0, 0.0},
281 { 0.0, 0.0, 0.0, 0.0},
282 { 0.0, 0.0, 0.0, 0.0},
283 { 0.0, 0.0, 0.0, 0.0},
284 { 0.0, 0.0, 0.0, 0.0}