src/mesa/drivers/dri/r300/r300_fragprog.c

   1 /*
   2  * Copyright (C) 2005 Ben Skeggs.
   3  *
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sublicense, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial
  16  * portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  */
  27
  28 /**
  29  * \file
  30  *
  31  * Fragment program compiler. Perform transformations on the intermediate
  32  * \ref radeon_program representation (which is essentially the Mesa
  33  * program representation plus the notion of clauses) until the program
  34  * is in a form where we can translate it more or less directly into
  35  * machine-readable form.
  36  *
  37  * \author Ben Skeggs <darktama@iinet.net.au>
  38  * \author Jerome Glisse <j.glisse@gmail.com>
  39  */
  40
  41 #include "glheader.h"
  42 #include "macros.h"
  43 #include "enums.h"
  44 #include "shader/prog_instruction.h"
  45 #include "shader/prog_parameter.h"
  46 #include "shader/prog_print.h"
  47
  48 #include "r300_context.h"
  49 #include "r300_fragprog.h"
  50 #include "r300_state.h"
  51
  52 #include "radeon_program_alu.h"
  53
  54
  55 static void reset_srcreg(struct prog_src_register* reg)
  56 {
  57         _mesa_bzero(reg, sizeof(*reg));
  58         reg->Swizzle = SWIZZLE_NOOP;
  59 }
  60
  61 /**
  62  * Transform TEX, TXP, TXB, and KIL instructions in the following way:
  63  *  - premultiply texture coordinates for RECT
  64  *  - extract operand swizzles
  65  *  - introduce a temporary register when write masks are needed
  66  *
  67  * \todo If/when r5xx uses the radeon_program architecture, this can probably
  68  * be reused.
  69  */
  70 static GLboolean transform_TEX(
  71         struct radeon_transform_context *t,
  72         struct prog_instruction* orig_inst, void* data)
  73 {
  74         struct r300_fragment_program_compiler *compiler =
  75                 (struct r300_fragment_program_compiler*)data;
  76         struct prog_instruction inst = *orig_inst;
  77         struct prog_instruction* tgt;
  78         GLboolean destredirect = GL_FALSE;
  79
  80         if (inst.Opcode != OPCODE_TEX &&
  81             inst.Opcode != OPCODE_TXB &&
  82             inst.Opcode != OPCODE_TXP &&
  83             inst.Opcode != OPCODE_KIL)
  84                 return GL_FALSE;
  85
  86         if (inst.Opcode != OPCODE_KIL &&
  87             t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
  88                 GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
  89
  90                 if (comparefunc == GL_NEVER || comparefunc == GL_ALWAYS) {
  91                         tgt = radeonAppendInstructions(t->Program, 1);
  92
  93                         tgt->Opcode = OPCODE_MOV;
  94                         tgt->DstReg = inst.DstReg;
  95                         tgt->SrcReg[0].File = PROGRAM_BUILTIN;
  96                         tgt->SrcReg[0].Swizzle = comparefunc == GL_ALWAYS ? SWIZZLE_1111 : SWIZZLE_0000;
  97                         return GL_TRUE;
  98                 }
  99
 100                 inst.DstReg.File = PROGRAM_TEMPORARY;
 101                 inst.DstReg.Index = radeonFindFreeTemporary(t);
 102                 inst.DstReg.WriteMask = WRITEMASK_XYZW;
 103         }
 104
 105
 106         /* Hardware uses [0..1]x[0..1] range for rectangle textures
 107          * instead of [0..Width]x[0..Height].
 108          * Add a scaling instruction.
 109          */
 110         if (inst.Opcode != OPCODE_KIL && inst.TexSrcTarget == TEXTURE_RECT_INDEX) {
 111                 gl_state_index tokens[STATE_LENGTH] = {
 112                         STATE_INTERNAL, STATE_R300_TEXRECT_FACTOR, 0, 0,
 113                         0
 114                 };
 115
 116                 int tempreg = radeonFindFreeTemporary(t);
 117                 int factor_index;
 118
 119                 tokens[2] = inst.TexSrcUnit;
 120                 factor_index =
 121                         _mesa_add_state_reference(
 122                                 compiler->fp->mesa_program.Base.Parameters, tokens);
 123
 124                 tgt = radeonAppendInstructions(t->Program, 1);
 125
 126                 tgt->Opcode = OPCODE_MUL;
 127                 tgt->DstReg.File = PROGRAM_TEMPORARY;
 128                 tgt->DstReg.Index = tempreg;
 129                 tgt->SrcReg[0] = inst.SrcReg[0];
 130                 tgt->SrcReg[1].File = PROGRAM_STATE_VAR;
 131                 tgt->SrcReg[1].Index = factor_index;
 132
 133                 reset_srcreg(&inst.SrcReg[0]);
 134                 inst.SrcReg[0].File = PROGRAM_TEMPORARY;
 135                 inst.SrcReg[0].Index = tempreg;
 136         }
 137
 138         /* Texture operations do not support swizzles etc. in hardware,
 139          * so emit an additional arithmetic operation if necessary.
 140          */
 141         if (inst.SrcReg[0].Swizzle != SWIZZLE_NOOP ||
 142             inst.SrcReg[0].Abs || inst.SrcReg[0].NegateBase || inst.SrcReg[0].NegateAbs) {
 143                 int tempreg = radeonFindFreeTemporary(t);
 144
 145                 tgt = radeonAppendInstructions(t->Program, 1);
 146
 147                 tgt->Opcode = OPCODE_MOV;
 148                 tgt->DstReg.File = PROGRAM_TEMPORARY;
 149                 tgt->DstReg.Index = tempreg;
 150                 tgt->SrcReg[0] = inst.SrcReg[0];
 151
 152                 reset_srcreg(&inst.SrcReg[0]);
 153                 inst.SrcReg[0].File = PROGRAM_TEMPORARY;
 154                 inst.SrcReg[0].Index = tempreg;
 155         }
 156
 157         if (inst.Opcode != OPCODE_KIL) {
 158                 if (inst.DstReg.File != PROGRAM_TEMPORARY ||
 159                     inst.DstReg.WriteMask != WRITEMASK_XYZW) {
 160                         int tempreg = radeonFindFreeTemporary(t);
 161
 162                         inst.DstReg.File = PROGRAM_TEMPORARY;
 163                         inst.DstReg.Index = tempreg;
 164                         inst.DstReg.WriteMask = WRITEMASK_XYZW;
 165                         destredirect = GL_TRUE;
 166                 }
 167         }
 168
 169         tgt = radeonAppendInstructions(t->Program, 1);
 170         _mesa_copy_instructions(tgt, &inst, 1);
 171
 172         if (inst.Opcode != OPCODE_KIL &&
 173             t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
 174                 GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
 175                 GLuint depthmode = compiler->fp->state.unit[inst.TexSrcUnit].depth_texture_mode;
 176                 int rcptemp = radeonFindFreeTemporary(t);
 177
 178                 tgt = radeonAppendInstructions(t->Program, 3);
 179
 180                 tgt[0].Opcode = OPCODE_RCP;
 181                 tgt[0].DstReg.File = PROGRAM_TEMPORARY;
 182                 tgt[0].DstReg.Index = rcptemp;
 183                 tgt[0].DstReg.WriteMask = WRITEMASK_W;
 184                 tgt[0].SrcReg[0] = inst.SrcReg[0];
 185                 tgt[0].SrcReg[0].Swizzle = SWIZZLE_WWWW;
 186
 187                 tgt[1].Opcode = OPCODE_MAD;
 188                 tgt[1].DstReg = inst.DstReg;
 189                 tgt[1].DstReg.WriteMask = orig_inst->DstReg.WriteMask;
 190                 tgt[1].SrcReg[0] = inst.SrcReg[0];
 191                 tgt[1].SrcReg[0].Swizzle = SWIZZLE_ZZZZ;
 192                 tgt[1].SrcReg[1].File = PROGRAM_TEMPORARY;
 193                 tgt[1].SrcReg[1].Index = rcptemp;
 194                 tgt[1].SrcReg[1].Swizzle = SWIZZLE_WWWW;
 195                 tgt[1].SrcReg[2].File = PROGRAM_TEMPORARY;
 196                 tgt[1].SrcReg[2].Index = inst.DstReg.Index;
 197                 if (depthmode == 0) /* GL_LUMINANCE */
 198                         tgt[1].SrcReg[2].Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z);
 199                 else if (depthmode == 2) /* GL_ALPHA */
 200                         tgt[1].SrcReg[2].Swizzle = SWIZZLE_WWWW;
 201
 202                 /* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
 203                  *   r  < tex  <=>      -tex+r < 0
 204                  *   r >= tex  <=> not (-tex+r < 0 */
 205                 if (comparefunc == GL_LESS || comparefunc == GL_GEQUAL)
 206                         tgt[1].SrcReg[2].NegateBase = tgt[0].SrcReg[2].NegateBase ^ NEGATE_XYZW;
 207                 else
 208                         tgt[1].SrcReg[0].NegateBase = tgt[0].SrcReg[0].NegateBase ^ NEGATE_XYZW;
 209
 210                 tgt[2].Opcode = OPCODE_CMP;
 211                 tgt[2].DstReg = orig_inst->DstReg;
 212                 tgt[2].SrcReg[0].File = PROGRAM_TEMPORARY;
 213                 tgt[2].SrcReg[0].Index = tgt[1].DstReg.Index;
 214                 tgt[2].SrcReg[1].File = PROGRAM_BUILTIN;
 215                 tgt[2].SrcReg[2].File = PROGRAM_BUILTIN;
 216
 217                 if (comparefunc == GL_LESS || comparefunc == GL_GREATER) {
 218                         tgt[2].SrcReg[1].Swizzle = SWIZZLE_1111;
 219                         tgt[2].SrcReg[2].Swizzle = SWIZZLE_0000;
 220                 } else {
 221                         tgt[2].SrcReg[1].Swizzle = SWIZZLE_0000;
 222                         tgt[2].SrcReg[2].Swizzle = SWIZZLE_1111;
 223                 }
 224         } else if (destredirect) {
 225                 tgt = radeonAppendInstructions(t->Program, 1);
 226
 227                 tgt->Opcode = OPCODE_MOV;
 228                 tgt->DstReg = orig_inst->DstReg;
 229                 tgt->SrcReg[0].File = PROGRAM_TEMPORARY;
 230                 tgt->SrcReg[0].Index = inst.DstReg.Index;
 231         }
 232
 233         return GL_TRUE;
 234 }
 235
 236
 237 static void update_params(r300ContextPtr r300, struct r300_fragment_program *fp)
 238 {
 239         struct gl_fragment_program *mp = &fp->mesa_program;
 240
 241         /* Ask Mesa nicely to fill in ParameterValues for us */
 242         if (mp->Base.Parameters)
 243                 _mesa_load_state_parameters(r300->radeon.glCtx, mp->Base.Parameters);
 244 }
 245
 246
 247 /**
 248  * Transform the program to support fragment.position.
 249  *
 250  * Introduce a small fragment at the start of the program that will be
 251  * the only code that directly reads the FRAG_ATTRIB_WPOS input.
 252  * All other code pieces that reference that input will be rewritten
 253  * to read from a newly allocated temporary.
 254  *
 255  * \todo if/when r5xx supports the radeon_program architecture, this is a
 256  * likely candidate for code sharing.
 257  */
 258 static void insert_WPOS_trailer(struct r300_fragment_program_compiler *compiler)
 259 {
 260         GLuint InputsRead = compiler->fp->mesa_program.Base.InputsRead;
 261
 262         if (!(InputsRead & FRAG_BIT_WPOS))
 263                 return;
 264
 265         static gl_state_index tokens[STATE_LENGTH] = {
 266                 STATE_INTERNAL, STATE_R300_WINDOW_DIMENSION, 0, 0, 0
 267         };
 268         struct prog_instruction *fpi;
 269         GLuint window_index;
 270         int i = 0;
 271         GLuint tempregi = _mesa_find_free_register(compiler->program, PROGRAM_TEMPORARY);
 272
 273         _mesa_insert_instructions(compiler->program, 0, 3);
 274         fpi = compiler->program->Instructions;
 275
 276         /* perspective divide */
 277         fpi[i].Opcode = OPCODE_RCP;
 278
 279         fpi[i].DstReg.File = PROGRAM_TEMPORARY;
 280         fpi[i].DstReg.Index = tempregi;
 281         fpi[i].DstReg.WriteMask = WRITEMASK_W;
 282         fpi[i].DstReg.CondMask = COND_TR;
 283
 284         fpi[i].SrcReg[0].File = PROGRAM_INPUT;
 285         fpi[i].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
 286         fpi[i].SrcReg[0].Swizzle = SWIZZLE_WWWW;
 287         i++;
 288
 289         fpi[i].Opcode = OPCODE_MUL;
 290
 291         fpi[i].DstReg.File = PROGRAM_TEMPORARY;
 292         fpi[i].DstReg.Index = tempregi;
 293         fpi[i].DstReg.WriteMask = WRITEMASK_XYZ;
 294         fpi[i].DstReg.CondMask = COND_TR;
 295
 296         fpi[i].SrcReg[0].File = PROGRAM_INPUT;
 297         fpi[i].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
 298         fpi[i].SrcReg[0].Swizzle = SWIZZLE_XYZW;
 299
 300         fpi[i].SrcReg[1].File = PROGRAM_TEMPORARY;
 301         fpi[i].SrcReg[1].Index = tempregi;
 302         fpi[i].SrcReg[1].Swizzle = SWIZZLE_WWWW;
 303         i++;
 304
 305         /* viewport transformation */
 306         window_index = _mesa_add_state_reference(compiler->fp->mesa_program.Base.Parameters, tokens);
 307
 308         fpi[i].Opcode = OPCODE_MAD;
 309
 310         fpi[i].DstReg.File = PROGRAM_TEMPORARY;
 311         fpi[i].DstReg.Index = tempregi;
 312         fpi[i].DstReg.WriteMask = WRITEMASK_XYZ;
 313         fpi[i].DstReg.CondMask = COND_TR;
 314
 315         fpi[i].SrcReg[0].File = PROGRAM_TEMPORARY;
 316         fpi[i].SrcReg[0].Index = tempregi;
 317         fpi[i].SrcReg[0].Swizzle =
 318             MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
 319
 320         fpi[i].SrcReg[1].File = PROGRAM_STATE_VAR;
 321         fpi[i].SrcReg[1].Index = window_index;
 322         fpi[i].SrcReg[1].Swizzle =
 323             MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
 324
 325         fpi[i].SrcReg[2].File = PROGRAM_STATE_VAR;
 326         fpi[i].SrcReg[2].Index = window_index;
 327         fpi[i].SrcReg[2].Swizzle =
 328             MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
 329         i++;
 330
 331         for (; i < compiler->program->NumInstructions; ++i) {
 332                 int reg;
 333                 for (reg = 0; reg < 3; reg++) {
 334                         if (fpi[i].SrcReg[reg].File == PROGRAM_INPUT &&
 335                             fpi[i].SrcReg[reg].Index == FRAG_ATTRIB_WPOS) {
 336                                 fpi[i].SrcReg[reg].File = PROGRAM_TEMPORARY;
 337                                 fpi[i].SrcReg[reg].Index = tempregi;
 338                         }
 339                 }
 340         }
 341 }
 342
 343
 344 static GLuint build_dtm(GLuint depthmode)
 345 {
 346         switch(depthmode) {
 347         default:
 348         case GL_LUMINANCE: return 0;
 349         case GL_INTENSITY: return 1;
 350         case GL_ALPHA: return 2;
 351         }
 352 }
 353
 354 static GLuint build_func(GLuint comparefunc)
 355 {
 356         return comparefunc - GL_NEVER;
 357 }
 358
 359
 360 /**
 361  * Collect all external state that is relevant for compiling the given
 362  * fragment program.
 363  */
 364 static void build_state(
 365         r300ContextPtr r300,
 366         struct r300_fragment_program *fp,
 367         struct r300_fragment_program_external_state *state)
 368 {
 369         int unit;
 370
 371         _mesa_bzero(state, sizeof(*state));
 372
 373         for(unit = 0; unit < 16; ++unit) {
 374                 if (fp->mesa_program.Base.ShadowSamplers & (1 << unit)) {
 375                         struct gl_texture_object* tex = r300->radeon.glCtx->Texture.Unit[unit]._Current;
 376
 377                         state->unit[unit].depth_texture_mode = build_dtm(tex->DepthMode);
 378                         state->unit[unit].texture_compare_func = build_func(tex->CompareFunc);
 379                 }
 380         }
 381 }
 382
 383
 384 void r300TranslateFragmentShader(r300ContextPtr r300,
 385                                  struct r300_fragment_program *fp)
 386 {
 387         struct r300_fragment_program_external_state state;
 388
 389         build_state(r300, fp, &state);
 390         if (_mesa_memcmp(&fp->state, &state, sizeof(state))) {
 391                 /* TODO: cache compiled programs */
 392                 fp->translated = GL_FALSE;
 393                 _mesa_memcpy(&fp->state, &state, sizeof(state));
 394         }
 395
 396         if (!fp->translated) {
 397                 struct r300_fragment_program_compiler compiler;
 398
 399                 compiler.r300 = r300;
 400                 compiler.fp = fp;
 401                 compiler.code = &fp->code;
 402                 compiler.program = _mesa_clone_program(r300->radeon.glCtx, &fp->mesa_program.Base);
 403
 404                 insert_WPOS_trailer(&compiler);
 405
 406                 struct radeon_program_transformation transformations[] = {
 407                         { &transform_TEX, &compiler },
 408                         { &radeonTransformALU, 0 }
 409                 };
 410                 radeonLocalTransform(
 411                         r300->radeon.glCtx,
 412                         compiler.program,
 413                         2, transformations);
 414
 415                 if (RADEON_DEBUG & DEBUG_PIXEL) {
 416                         _mesa_printf("Program after transformations:\n");
 417                         _mesa_print_program(compiler.program);
 418                 }
 419
 420                 if (!r300FragmentProgramEmit(&compiler))
 421                         fp->error = GL_TRUE;
 422
 423                 _mesa_reference_program(r300->radeon.glCtx, &compiler.program, NULL);
 424
 425                 if (!fp->error)
 426                         fp->translated = GL_TRUE;
 427                 if (fp->error || (RADEON_DEBUG & DEBUG_PIXEL))
 428                         r300FragmentProgramDump(fp, &fp->code);
 429                 r300UpdateStateParameters(r300->radeon.glCtx, _NEW_PROGRAM);
 430         }
 431
 432         update_params(r300, fp);
 433 }
 434
 435 /* just some random things... */
 436 void r300FragmentProgramDump(
 437         struct r300_fragment_program *fp,
 438         struct r300_fragment_program_code *code)
 439 {
 440         int n, i, j;
 441         static int pc = 0;
 442
 443         fprintf(stderr, "pc=%d*************************************\n", pc++);
 444
 445         fprintf(stderr, "Mesa program:\n");
 446         fprintf(stderr, "-------------\n");
 447         _mesa_print_program(&fp->mesa_program.Base);
 448         fflush(stdout);
 449
 450         fprintf(stderr, "Hardware program\n");
 451         fprintf(stderr, "----------------\n");
 452
 453         for (n = 0; n < (code->cur_node + 1); n++) {
 454                 fprintf(stderr, "NODE %d: alu_offset: %d, tex_offset: %d, "
 455                         "alu_end: %d, tex_end: %d\n", n,
 456                         code->node[n].alu_offset,
 457                         code->node[n].tex_offset,
 458                         code->node[n].alu_end, code->node[n].tex_end);
 459
 460                 if (code->tex.length) {
 461                         fprintf(stderr, "  TEX:\n");
 462                         for (i = code->node[n].tex_offset;
 463                              i <= code->node[n].tex_offset + code->node[n].tex_end;
 464                              ++i) {
 465                                 const char *instr;
 466
 467                                 switch ((code->tex.
 468                                          inst[i] >> R300_TEX_INST_SHIFT) &
 469                                         15) {
 470                                 case R300_TEX_OP_LD:
 471                                         instr = "TEX";
 472                                         break;
 473                                 case R300_TEX_OP_KIL:
 474                                         instr = "KIL";
 475                                         break;
 476                                 case R300_TEX_OP_TXP:
 477                                         instr = "TXP";
 478                                         break;
 479                                 case R300_TEX_OP_TXB:
 480                                         instr = "TXB";
 481                                         break;
 482                                 default:
 483                                         instr = "UNKNOWN";
 484                                 }
 485
 486                                 fprintf(stderr,
 487                                         "    %s t%i, %c%i, texture[%i]   (%08x)\n",
 488                                         instr,
 489                                         (code->tex.
 490                                          inst[i] >> R300_DST_ADDR_SHIFT) & 31,
 491                                         't',
 492                                         (code->tex.
 493                                          inst[i] >> R300_SRC_ADDR_SHIFT) & 31,
 494                                         (code->tex.
 495                                          inst[i] & R300_TEX_ID_MASK) >>
 496                                         R300_TEX_ID_SHIFT,
 497                                         code->tex.inst[i]);
 498                         }
 499                 }
 500
 501                 for (i = code->node[n].alu_offset;
 502                      i <= code->node[n].alu_offset + code->node[n].alu_end; ++i) {
 503                         char srcc[3][10], dstc[20];
 504                         char srca[3][10], dsta[20];
 505                         char argc[3][20];
 506                         char arga[3][20];
 507                         char flags[5], tmp[10];
 508
 509                         for (j = 0; j < 3; ++j) {
 510                                 int regc = code->alu.inst[i].inst1 >> (j * 6);
 511                                 int rega = code->alu.inst[i].inst3 >> (j * 6);
 512
 513                                 sprintf(srcc[j], "%c%i",
 514                                         (regc & 32) ? 'c' : 't', regc & 31);
 515                                 sprintf(srca[j], "%c%i",
 516                                         (rega & 32) ? 'c' : 't', rega & 31);
 517                         }
 518
 519                         dstc[0] = 0;
 520                         sprintf(flags, "%s%s%s",
 521                                 (code->alu.inst[i].
 522                                  inst1 & R300_ALU_DSTC_REG_X) ? "x" : "",
 523                                 (code->alu.inst[i].
 524                                  inst1 & R300_ALU_DSTC_REG_Y) ? "y" : "",
 525                                 (code->alu.inst[i].
 526                                  inst1 & R300_ALU_DSTC_REG_Z) ? "z" : "");
 527                         if (flags[0] != 0) {
 528                                 sprintf(dstc, "t%i.%s ",
 529                                         (code->alu.inst[i].
 530                                          inst1 >> R300_ALU_DSTC_SHIFT) & 31,
 531                                         flags);
 532                         }
 533                         sprintf(flags, "%s%s%s",
 534                                 (code->alu.inst[i].
 535                                  inst1 & R300_ALU_DSTC_OUTPUT_X) ? "x" : "",
 536                                 (code->alu.inst[i].
 537                                  inst1 & R300_ALU_DSTC_OUTPUT_Y) ? "y" : "",
 538                                 (code->alu.inst[i].
 539                                  inst1 & R300_ALU_DSTC_OUTPUT_Z) ? "z" : "");
 540                         if (flags[0] != 0) {
 541                                 sprintf(tmp, "o%i.%s",
 542                                         (code->alu.inst[i].
 543                                          inst1 >> R300_ALU_DSTC_SHIFT) & 31,
 544                                         flags);
 545                                 strcat(dstc, tmp);
 546                         }
 547
 548                         dsta[0] = 0;
 549                         if (code->alu.inst[i].inst3 & R300_ALU_DSTA_REG) {
 550                                 sprintf(dsta, "t%i.w ",
 551                                         (code->alu.inst[i].
 552                                          inst3 >> R300_ALU_DSTA_SHIFT) & 31);
 553                         }
 554                         if (code->alu.inst[i].inst3 & R300_ALU_DSTA_OUTPUT) {
 555                                 sprintf(tmp, "o%i.w ",
 556                                         (code->alu.inst[i].
 557                                          inst3 >> R300_ALU_DSTA_SHIFT) & 31);
 558                                 strcat(dsta, tmp);
 559                         }
 560                         if (code->alu.inst[i].inst3 & R300_ALU_DSTA_DEPTH) {
 561                                 strcat(dsta, "Z");
 562                         }
 563
 564                         fprintf(stderr,
 565                                 "%3i: xyz: %3s %3s %3s -> %-20s (%08x)\n"
 566                                 "       w: %3s %3s %3s -> %-20s (%08x)\n", i,
 567                                 srcc[0], srcc[1], srcc[2], dstc,
 568                                 code->alu.inst[i].inst1, srca[0], srca[1],
 569                                 srca[2], dsta, code->alu.inst[i].inst3);
 570
 571                         for (j = 0; j < 3; ++j) {
 572                                 int regc = code->alu.inst[i].inst0 >> (j * 7);
 573                                 int rega = code->alu.inst[i].inst2 >> (j * 7);
 574                                 int d;
 575                                 char buf[20];
 576
 577                                 d = regc & 31;
 578                                 if (d < 12) {
 579                                         switch (d % 4) {
 580                                         case R300_ALU_ARGC_SRC0C_XYZ:
 581                                                 sprintf(buf, "%s.xyz",
 582                                                         srcc[d / 4]);
 583                                                 break;
 584                                         case R300_ALU_ARGC_SRC0C_XXX:
 585                                                 sprintf(buf, "%s.xxx",
 586                                                         srcc[d / 4]);
 587                                                 break;
 588                                         case R300_ALU_ARGC_SRC0C_YYY:
 589                                                 sprintf(buf, "%s.yyy",
 590                                                         srcc[d / 4]);
 591                                                 break;
 592                                         case R300_ALU_ARGC_SRC0C_ZZZ:
 593                                                 sprintf(buf, "%s.zzz",
 594                                                         srcc[d / 4]);
 595                                                 break;
 596                                         }
 597                                 } else if (d < 15) {
 598                                         sprintf(buf, "%s.www", srca[d - 12]);
 599                                 } else if (d == 20) {
 600                                         sprintf(buf, "0.0");
 601                                 } else if (d == 21) {
 602                                         sprintf(buf, "1.0");
 603                                 } else if (d == 22) {
 604                                         sprintf(buf, "0.5");
 605                                 } else if (d >= 23 && d < 32) {
 606                                         d -= 23;
 607                                         switch (d / 3) {
 608                                         case 0:
 609                                                 sprintf(buf, "%s.yzx",
 610                                                         srcc[d % 3]);
 611                                                 break;
 612                                         case 1:
 613                                                 sprintf(buf, "%s.zxy",
 614                                                         srcc[d % 3]);
 615                                                 break;
 616                                         case 2:
 617                                                 sprintf(buf, "%s.Wzy",
 618                                                         srcc[d % 3]);
 619                                                 break;
 620                                         }
 621                                 } else {
 622                                         sprintf(buf, "%i", d);
 623                                 }
 624
 625                                 sprintf(argc[j], "%s%s%s%s",
 626                                         (regc & 32) ? "-" : "",
 627                                         (regc & 64) ? "|" : "",
 628                                         buf, (regc & 64) ? "|" : "");
 629
 630                                 d = rega & 31;
 631                                 if (d < 9) {
 632                                         sprintf(buf, "%s.%c", srcc[d / 3],
 633                                                 'x' + (char)(d % 3));
 634                                 } else if (d < 12) {
 635                                         sprintf(buf, "%s.w", srca[d - 9]);
 636                                 } else if (d == 16) {
 637                                         sprintf(buf, "0.0");
 638                                 } else if (d == 17) {
 639                                         sprintf(buf, "1.0");
 640                                 } else if (d == 18) {
 641                                         sprintf(buf, "0.5");
 642                                 } else {
 643                                         sprintf(buf, "%i", d);
 644                                 }
 645
 646                                 sprintf(arga[j], "%s%s%s%s",
 647                                         (rega & 32) ? "-" : "",
 648                                         (rega & 64) ? "|" : "",
 649                                         buf, (rega & 64) ? "|" : "");
 650                         }
 651
 652                         fprintf(stderr, "     xyz: %8s %8s %8s    op: %08x\n"
 653                                 "       w: %8s %8s %8s    op: %08x\n",
 654                                 argc[0], argc[1], argc[2],
 655                                 code->alu.inst[i].inst0, arga[0], arga[1],
 656                                 arga[2], code->alu.inst[i].inst2);
 657                 }
 658         }
 659 }