src/mesa/drivers/dri/r300/r300_fragprog.c

   1 /*
   2  * Copyright (C) 2005 Ben Skeggs.
   3  *
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sublicense, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial
  16  * portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  */
  27
  28 /**
  29  * \file
  30  *
  31  * Fragment program compiler. Perform transformations on the intermediate
  32  * representation until the program is in a form where we can translate
  33  * it more or less directly into machine-readable form.
  34  *
  35  * \author Ben Skeggs <darktama@iinet.net.au>
  36  * \author Jerome Glisse <j.glisse@gmail.com>
  37  */
  38
  39 #include "glheader.h"
  40 #include "macros.h"
  41 #include "enums.h"
  42 #include "shader/prog_instruction.h"
  43 #include "shader/prog_parameter.h"
  44 #include "shader/prog_print.h"
  45
  46 #include "r300_context.h"
  47 #include "r300_fragprog.h"
  48 #include "r300_fragprog_swizzle.h"
  49 #include "r300_state.h"
  50
  51 #include "radeon_nqssadce.h"
  52 #include "radeon_program_alu.h"
  53
  54
  55 static void reset_srcreg(struct prog_src_register* reg)
  56 {
  57         _mesa_bzero(reg, sizeof(*reg));
  58         reg->Swizzle = SWIZZLE_NOOP;
  59 }
  60
  61 /**
  62  * Transform TEX, TXP, TXB, and KIL instructions in the following way:
  63  *  - premultiply texture coordinates for RECT
  64  *  - extract operand swizzles
  65  *  - introduce a temporary register when write masks are needed
  66  *
  67  * \todo If/when r5xx uses the radeon_program architecture, this can probably
  68  * be reused.
  69  */
  70 static GLboolean transform_TEX(
  71         struct radeon_transform_context *t,
  72         struct prog_instruction* orig_inst, void* data)
  73 {
  74         struct r300_fragment_program_compiler *compiler =
  75                 (struct r300_fragment_program_compiler*)data;
  76         struct prog_instruction inst = *orig_inst;
  77         struct prog_instruction* tgt;
  78         GLboolean destredirect = GL_FALSE;
  79
  80         if (inst.Opcode != OPCODE_TEX &&
  81             inst.Opcode != OPCODE_TXB &&
  82             inst.Opcode != OPCODE_TXP &&
  83             inst.Opcode != OPCODE_KIL)
  84                 return GL_FALSE;
  85
  86         if (inst.Opcode != OPCODE_KIL &&
  87             t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
  88                 GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
  89
  90                 if (comparefunc == GL_NEVER || comparefunc == GL_ALWAYS) {
  91                         tgt = radeonAppendInstructions(t->Program, 1);
  92
  93                         tgt->Opcode = OPCODE_MOV;
  94                         tgt->DstReg = inst.DstReg;
  95                         tgt->SrcReg[0].File = PROGRAM_BUILTIN;
  96                         tgt->SrcReg[0].Swizzle = comparefunc == GL_ALWAYS ? SWIZZLE_1111 : SWIZZLE_0000;
  97                         return GL_TRUE;
  98                 }
  99
 100                 inst.DstReg.File = PROGRAM_TEMPORARY;
 101                 inst.DstReg.Index = radeonFindFreeTemporary(t);
 102                 inst.DstReg.WriteMask = WRITEMASK_XYZW;
 103         }
 104
 105
 106         /* Hardware uses [0..1]x[0..1] range for rectangle textures
 107          * instead of [0..Width]x[0..Height].
 108          * Add a scaling instruction.
 109          */
 110         if (inst.Opcode != OPCODE_KIL && inst.TexSrcTarget == TEXTURE_RECT_INDEX) {
 111                 gl_state_index tokens[STATE_LENGTH] = {
 112                         STATE_INTERNAL, STATE_R300_TEXRECT_FACTOR, 0, 0,
 113                         0
 114                 };
 115
 116                 int tempreg = radeonFindFreeTemporary(t);
 117                 int factor_index;
 118
 119                 tokens[2] = inst.TexSrcUnit;
 120                 factor_index = _mesa_add_state_reference(t->Program->Parameters, tokens);
 121
 122                 tgt = radeonAppendInstructions(t->Program, 1);
 123
 124                 tgt->Opcode = OPCODE_MUL;
 125                 tgt->DstReg.File = PROGRAM_TEMPORARY;
 126                 tgt->DstReg.Index = tempreg;
 127                 tgt->SrcReg[0] = inst.SrcReg[0];
 128                 tgt->SrcReg[1].File = PROGRAM_STATE_VAR;
 129                 tgt->SrcReg[1].Index = factor_index;
 130
 131                 reset_srcreg(&inst.SrcReg[0]);
 132                 inst.SrcReg[0].File = PROGRAM_TEMPORARY;
 133                 inst.SrcReg[0].Index = tempreg;
 134         }
 135
 136         if (inst.Opcode != OPCODE_KIL) {
 137                 if (inst.DstReg.File != PROGRAM_TEMPORARY ||
 138                     inst.DstReg.WriteMask != WRITEMASK_XYZW) {
 139                         int tempreg = radeonFindFreeTemporary(t);
 140
 141                         inst.DstReg.File = PROGRAM_TEMPORARY;
 142                         inst.DstReg.Index = tempreg;
 143                         inst.DstReg.WriteMask = WRITEMASK_XYZW;
 144                         destredirect = GL_TRUE;
 145                 }
 146         }
 147
 148         tgt = radeonAppendInstructions(t->Program, 1);
 149         _mesa_copy_instructions(tgt, &inst, 1);
 150
 151         if (inst.Opcode != OPCODE_KIL &&
 152             t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
 153                 GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
 154                 GLuint depthmode = compiler->fp->state.unit[inst.TexSrcUnit].depth_texture_mode;
 155                 int rcptemp = radeonFindFreeTemporary(t);
 156
 157                 tgt = radeonAppendInstructions(t->Program, 3);
 158
 159                 tgt[0].Opcode = OPCODE_RCP;
 160                 tgt[0].DstReg.File = PROGRAM_TEMPORARY;
 161                 tgt[0].DstReg.Index = rcptemp;
 162                 tgt[0].DstReg.WriteMask = WRITEMASK_W;
 163                 tgt[0].SrcReg[0] = inst.SrcReg[0];
 164                 tgt[0].SrcReg[0].Swizzle = SWIZZLE_WWWW;
 165
 166                 tgt[1].Opcode = OPCODE_MAD;
 167                 tgt[1].DstReg = inst.DstReg;
 168                 tgt[1].DstReg.WriteMask = orig_inst->DstReg.WriteMask;
 169                 tgt[1].SrcReg[0] = inst.SrcReg[0];
 170                 tgt[1].SrcReg[0].Swizzle = SWIZZLE_ZZZZ;
 171                 tgt[1].SrcReg[1].File = PROGRAM_TEMPORARY;
 172                 tgt[1].SrcReg[1].Index = rcptemp;
 173                 tgt[1].SrcReg[1].Swizzle = SWIZZLE_WWWW;
 174                 tgt[1].SrcReg[2].File = PROGRAM_TEMPORARY;
 175                 tgt[1].SrcReg[2].Index = inst.DstReg.Index;
 176                 if (depthmode == 0) /* GL_LUMINANCE */
 177                         tgt[1].SrcReg[2].Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z);
 178                 else if (depthmode == 2) /* GL_ALPHA */
 179                         tgt[1].SrcReg[2].Swizzle = SWIZZLE_WWWW;
 180
 181                 /* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
 182                  *   r  < tex  <=>      -tex+r < 0
 183                  *   r >= tex  <=> not (-tex+r < 0 */
 184                 if (comparefunc == GL_LESS || comparefunc == GL_GEQUAL)
 185                         tgt[1].SrcReg[2].NegateBase = tgt[0].SrcReg[2].NegateBase ^ NEGATE_XYZW;
 186                 else
 187                         tgt[1].SrcReg[0].NegateBase = tgt[0].SrcReg[0].NegateBase ^ NEGATE_XYZW;
 188
 189                 tgt[2].Opcode = OPCODE_CMP;
 190                 tgt[2].DstReg = orig_inst->DstReg;
 191                 tgt[2].SrcReg[0].File = PROGRAM_TEMPORARY;
 192                 tgt[2].SrcReg[0].Index = tgt[1].DstReg.Index;
 193                 tgt[2].SrcReg[1].File = PROGRAM_BUILTIN;
 194                 tgt[2].SrcReg[2].File = PROGRAM_BUILTIN;
 195
 196                 if (comparefunc == GL_LESS || comparefunc == GL_GREATER) {
 197                         tgt[2].SrcReg[1].Swizzle = SWIZZLE_1111;
 198                         tgt[2].SrcReg[2].Swizzle = SWIZZLE_0000;
 199                 } else {
 200                         tgt[2].SrcReg[1].Swizzle = SWIZZLE_0000;
 201                         tgt[2].SrcReg[2].Swizzle = SWIZZLE_1111;
 202                 }
 203         } else if (destredirect) {
 204                 tgt = radeonAppendInstructions(t->Program, 1);
 205
 206                 tgt->Opcode = OPCODE_MOV;
 207                 tgt->DstReg = orig_inst->DstReg;
 208                 tgt->SrcReg[0].File = PROGRAM_TEMPORARY;
 209                 tgt->SrcReg[0].Index = inst.DstReg.Index;
 210         }
 211
 212         return GL_TRUE;
 213 }
 214
 215
 216 static void update_params(r300ContextPtr r300, struct r300_fragment_program *fp)
 217 {
 218         struct gl_fragment_program *mp = &fp->mesa_program;
 219
 220         /* Ask Mesa nicely to fill in ParameterValues for us */
 221         if (mp->Base.Parameters)
 222                 _mesa_load_state_parameters(r300->radeon.glCtx, mp->Base.Parameters);
 223 }
 224
 225
 226 /**
 227  * Transform the program to support fragment.position.
 228  *
 229  * Introduce a small fragment at the start of the program that will be
 230  * the only code that directly reads the FRAG_ATTRIB_WPOS input.
 231  * All other code pieces that reference that input will be rewritten
 232  * to read from a newly allocated temporary.
 233  *
 234  * \todo if/when r5xx supports the radeon_program architecture, this is a
 235  * likely candidate for code sharing.
 236  */
 237 static void insert_WPOS_trailer(struct r300_fragment_program_compiler *compiler)
 238 {
 239         GLuint InputsRead = compiler->fp->mesa_program.Base.InputsRead;
 240
 241         if (!(InputsRead & FRAG_BIT_WPOS))
 242                 return;
 243
 244         static gl_state_index tokens[STATE_LENGTH] = {
 245                 STATE_INTERNAL, STATE_R300_WINDOW_DIMENSION, 0, 0, 0
 246         };
 247         struct prog_instruction *fpi;
 248         GLuint window_index;
 249         int i = 0;
 250         GLuint tempregi = _mesa_find_free_register(compiler->program, PROGRAM_TEMPORARY);
 251
 252         _mesa_insert_instructions(compiler->program, 0, 3);
 253         fpi = compiler->program->Instructions;
 254
 255         /* perspective divide */
 256         fpi[i].Opcode = OPCODE_RCP;
 257
 258         fpi[i].DstReg.File = PROGRAM_TEMPORARY;
 259         fpi[i].DstReg.Index = tempregi;
 260         fpi[i].DstReg.WriteMask = WRITEMASK_W;
 261         fpi[i].DstReg.CondMask = COND_TR;
 262
 263         fpi[i].SrcReg[0].File = PROGRAM_INPUT;
 264         fpi[i].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
 265         fpi[i].SrcReg[0].Swizzle = SWIZZLE_WWWW;
 266         i++;
 267
 268         fpi[i].Opcode = OPCODE_MUL;
 269
 270         fpi[i].DstReg.File = PROGRAM_TEMPORARY;
 271         fpi[i].DstReg.Index = tempregi;
 272         fpi[i].DstReg.WriteMask = WRITEMASK_XYZ;
 273         fpi[i].DstReg.CondMask = COND_TR;
 274
 275         fpi[i].SrcReg[0].File = PROGRAM_INPUT;
 276         fpi[i].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
 277         fpi[i].SrcReg[0].Swizzle = SWIZZLE_XYZW;
 278
 279         fpi[i].SrcReg[1].File = PROGRAM_TEMPORARY;
 280         fpi[i].SrcReg[1].Index = tempregi;
 281         fpi[i].SrcReg[1].Swizzle = SWIZZLE_WWWW;
 282         i++;
 283
 284         /* viewport transformation */
 285         window_index = _mesa_add_state_reference(compiler->program->Parameters, tokens);
 286
 287         fpi[i].Opcode = OPCODE_MAD;
 288
 289         fpi[i].DstReg.File = PROGRAM_TEMPORARY;
 290         fpi[i].DstReg.Index = tempregi;
 291         fpi[i].DstReg.WriteMask = WRITEMASK_XYZ;
 292         fpi[i].DstReg.CondMask = COND_TR;
 293
 294         fpi[i].SrcReg[0].File = PROGRAM_TEMPORARY;
 295         fpi[i].SrcReg[0].Index = tempregi;
 296         fpi[i].SrcReg[0].Swizzle =
 297             MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
 298
 299         fpi[i].SrcReg[1].File = PROGRAM_STATE_VAR;
 300         fpi[i].SrcReg[1].Index = window_index;
 301         fpi[i].SrcReg[1].Swizzle =
 302             MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
 303
 304         fpi[i].SrcReg[2].File = PROGRAM_STATE_VAR;
 305         fpi[i].SrcReg[2].Index = window_index;
 306         fpi[i].SrcReg[2].Swizzle =
 307             MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
 308         i++;
 309
 310         for (; i < compiler->program->NumInstructions; ++i) {
 311                 int reg;
 312                 for (reg = 0; reg < 3; reg++) {
 313                         if (fpi[i].SrcReg[reg].File == PROGRAM_INPUT &&
 314                             fpi[i].SrcReg[reg].Index == FRAG_ATTRIB_WPOS) {
 315                                 fpi[i].SrcReg[reg].File = PROGRAM_TEMPORARY;
 316                                 fpi[i].SrcReg[reg].Index = tempregi;
 317                         }
 318                 }
 319         }
 320 }
 321
 322
 323 static void nqssadce_init(struct nqssadce_state* s)
 324 {
 325         s->Outputs[FRAG_RESULT_COLR].Sourced = WRITEMASK_XYZW;
 326         s->Outputs[FRAG_RESULT_DEPR].Sourced = WRITEMASK_W;
 327 }
 328
 329
 330 static GLuint build_dtm(GLuint depthmode)
 331 {
 332         switch(depthmode) {
 333         default:
 334         case GL_LUMINANCE: return 0;
 335         case GL_INTENSITY: return 1;
 336         case GL_ALPHA: return 2;
 337         }
 338 }
 339
 340 static GLuint build_func(GLuint comparefunc)
 341 {
 342         return comparefunc - GL_NEVER;
 343 }
 344
 345
 346 /**
 347  * Collect all external state that is relevant for compiling the given
 348  * fragment program.
 349  */
 350 static void build_state(
 351         r300ContextPtr r300,
 352         struct r300_fragment_program *fp,
 353         struct r300_fragment_program_external_state *state)
 354 {
 355         int unit;
 356
 357         _mesa_bzero(state, sizeof(*state));
 358
 359         for(unit = 0; unit < 16; ++unit) {
 360                 if (fp->mesa_program.Base.ShadowSamplers & (1 << unit)) {
 361                         struct gl_texture_object* tex = r300->radeon.glCtx->Texture.Unit[unit]._Current;
 362
 363                         state->unit[unit].depth_texture_mode = build_dtm(tex->DepthMode);
 364                         state->unit[unit].texture_compare_func = build_func(tex->CompareFunc);
 365                 }
 366         }
 367 }
 368
 369
 370 void r300TranslateFragmentShader(r300ContextPtr r300,
 371                                  struct r300_fragment_program *fp)
 372 {
 373         struct r300_fragment_program_external_state state;
 374
 375         build_state(r300, fp, &state);
 376         if (_mesa_memcmp(&fp->state, &state, sizeof(state))) {
 377                 /* TODO: cache compiled programs */
 378                 fp->translated = GL_FALSE;
 379                 _mesa_memcpy(&fp->state, &state, sizeof(state));
 380         }
 381
 382         if (!fp->translated) {
 383                 struct r300_fragment_program_compiler compiler;
 384
 385                 compiler.r300 = r300;
 386                 compiler.fp = fp;
 387                 compiler.code = &fp->code;
 388                 compiler.program = _mesa_clone_program(r300->radeon.glCtx, &fp->mesa_program.Base);
 389
 390                 if (RADEON_DEBUG & DEBUG_PIXEL) {
 391                         _mesa_printf("Fragment Program: Initial program:\n");
 392                         _mesa_print_program(compiler.program);
 393                 }
 394
 395                 insert_WPOS_trailer(&compiler);
 396
 397                 struct radeon_program_transformation transformations[] = {
 398                         { &transform_TEX, &compiler },
 399                         { &radeonTransformALU, 0 },
 400                         { &radeonTransformTrigSimple, 0 }
 401                 };
 402                 radeonLocalTransform(
 403                         r300->radeon.glCtx,
 404                         compiler.program,
 405                         3, transformations);
 406
 407                 if (RADEON_DEBUG & DEBUG_PIXEL) {
 408                         _mesa_printf("Fragment Program: After native rewrite:\n");
 409                         _mesa_print_program(compiler.program);
 410                 }
 411
 412                 struct radeon_nqssadce_descr nqssadce = {
 413                         .Init = &nqssadce_init,
 414                         .IsNativeSwizzle = &r300FPIsNativeSwizzle,
 415                         .BuildSwizzle = &r300FPBuildSwizzle,
 416                         .RewriteDepthOut = GL_TRUE
 417                 };
 418                 radeonNqssaDce(r300->radeon.glCtx, compiler.program, &nqssadce);
 419
 420                 if (RADEON_DEBUG & DEBUG_PIXEL) {
 421                         _mesa_printf("Compiler: after NqSSA-DCE:\n");
 422                         _mesa_print_program(compiler.program);
 423                 }
 424
 425                 if (!r300FragmentProgramEmit(&compiler))
 426                         fp->error = GL_TRUE;
 427
 428                 /* Subtle: Rescue any parameters that have been added during transformations */
 429                 _mesa_free_parameter_list(fp->mesa_program.Base.Parameters);
 430                 fp->mesa_program.Base.Parameters = compiler.program->Parameters;
 431                 compiler.program->Parameters = 0;
 432
 433                 _mesa_reference_program(r300->radeon.glCtx, &compiler.program, NULL);
 434
 435                 if (!fp->error)
 436                         fp->translated = GL_TRUE;
 437                 if (fp->error || (RADEON_DEBUG & DEBUG_PIXEL))
 438                         r300FragmentProgramDump(fp, &fp->code);
 439                 r300UpdateStateParameters(r300->radeon.glCtx, _NEW_PROGRAM);
 440         }
 441
 442         update_params(r300, fp);
 443 }
 444
 445 /* just some random things... */
 446 void r300FragmentProgramDump(
 447         struct r300_fragment_program *fp,
 448         struct r300_fragment_program_code *code)
 449 {
 450         int n, i, j;
 451         static int pc = 0;
 452
 453         fprintf(stderr, "pc=%d*************************************\n", pc++);
 454
 455         fprintf(stderr, "Hardware program\n");
 456         fprintf(stderr, "----------------\n");
 457
 458         for (n = 0; n < (code->cur_node + 1); n++) {
 459                 fprintf(stderr, "NODE %d: alu_offset: %d, tex_offset: %d, "
 460                         "alu_end: %d, tex_end: %d, flags: %08x\n", n,
 461                         code->node[n].alu_offset,
 462                         code->node[n].tex_offset,
 463                         code->node[n].alu_end, code->node[n].tex_end,
 464                         code->node[n].flags);
 465
 466                 if (n > 0 || code->first_node_has_tex) {
 467                         fprintf(stderr, "  TEX:\n");
 468                         for (i = code->node[n].tex_offset;
 469                              i <= code->node[n].tex_offset + code->node[n].tex_end;
 470                              ++i) {
 471                                 const char *instr;
 472
 473                                 switch ((code->tex.
 474                                          inst[i] >> R300_TEX_INST_SHIFT) &
 475                                         15) {
 476                                 case R300_TEX_OP_LD:
 477                                         instr = "TEX";
 478                                         break;
 479                                 case R300_TEX_OP_KIL:
 480                                         instr = "KIL";
 481                                         break;
 482                                 case R300_TEX_OP_TXP:
 483                                         instr = "TXP";
 484                                         break;
 485                                 case R300_TEX_OP_TXB:
 486                                         instr = "TXB";
 487                                         break;
 488                                 default:
 489                                         instr = "UNKNOWN";
 490                                 }
 491
 492                                 fprintf(stderr,
 493                                         "    %s t%i, %c%i, texture[%i]   (%08x)\n",
 494                                         instr,
 495                                         (code->tex.
 496                                          inst[i] >> R300_DST_ADDR_SHIFT) & 31,
 497                                         't',
 498                                         (code->tex.
 499                                          inst[i] >> R300_SRC_ADDR_SHIFT) & 31,
 500                                         (code->tex.
 501                                          inst[i] & R300_TEX_ID_MASK) >>
 502                                         R300_TEX_ID_SHIFT,
 503                                         code->tex.inst[i]);
 504                         }
 505                 }
 506
 507                 for (i = code->node[n].alu_offset;
 508                      i <= code->node[n].alu_offset + code->node[n].alu_end; ++i) {
 509                         char srcc[3][10], dstc[20];
 510                         char srca[3][10], dsta[20];
 511                         char argc[3][20];
 512                         char arga[3][20];
 513                         char flags[5], tmp[10];
 514
 515                         for (j = 0; j < 3; ++j) {
 516                                 int regc = code->alu.inst[i].inst1 >> (j * 6);
 517                                 int rega = code->alu.inst[i].inst3 >> (j * 6);
 518
 519                                 sprintf(srcc[j], "%c%i",
 520                                         (regc & 32) ? 'c' : 't', regc & 31);
 521                                 sprintf(srca[j], "%c%i",
 522                                         (rega & 32) ? 'c' : 't', rega & 31);
 523                         }
 524
 525                         dstc[0] = 0;
 526                         sprintf(flags, "%s%s%s",
 527                                 (code->alu.inst[i].
 528                                  inst1 & R300_ALU_DSTC_REG_X) ? "x" : "",
 529                                 (code->alu.inst[i].
 530                                  inst1 & R300_ALU_DSTC_REG_Y) ? "y" : "",
 531                                 (code->alu.inst[i].
 532                                  inst1 & R300_ALU_DSTC_REG_Z) ? "z" : "");
 533                         if (flags[0] != 0) {
 534                                 sprintf(dstc, "t%i.%s ",
 535                                         (code->alu.inst[i].
 536                                          inst1 >> R300_ALU_DSTC_SHIFT) & 31,
 537                                         flags);
 538                         }
 539                         sprintf(flags, "%s%s%s",
 540                                 (code->alu.inst[i].
 541                                  inst1 & R300_ALU_DSTC_OUTPUT_X) ? "x" : "",
 542                                 (code->alu.inst[i].
 543                                  inst1 & R300_ALU_DSTC_OUTPUT_Y) ? "y" : "",
 544                                 (code->alu.inst[i].
 545                                  inst1 & R300_ALU_DSTC_OUTPUT_Z) ? "z" : "");
 546                         if (flags[0] != 0) {
 547                                 sprintf(tmp, "o%i.%s",
 548                                         (code->alu.inst[i].
 549                                          inst1 >> R300_ALU_DSTC_SHIFT) & 31,
 550                                         flags);
 551                                 strcat(dstc, tmp);
 552                         }
 553
 554                         dsta[0] = 0;
 555                         if (code->alu.inst[i].inst3 & R300_ALU_DSTA_REG) {
 556                                 sprintf(dsta, "t%i.w ",
 557                                         (code->alu.inst[i].
 558                                          inst3 >> R300_ALU_DSTA_SHIFT) & 31);
 559                         }
 560                         if (code->alu.inst[i].inst3 & R300_ALU_DSTA_OUTPUT) {
 561                                 sprintf(tmp, "o%i.w ",
 562                                         (code->alu.inst[i].
 563                                          inst3 >> R300_ALU_DSTA_SHIFT) & 31);
 564                                 strcat(dsta, tmp);
 565                         }
 566                         if (code->alu.inst[i].inst3 & R300_ALU_DSTA_DEPTH) {
 567                                 strcat(dsta, "Z");
 568                         }
 569
 570                         fprintf(stderr,
 571                                 "%3i: xyz: %3s %3s %3s -> %-20s (%08x)\n"
 572                                 "       w: %3s %3s %3s -> %-20s (%08x)\n", i,
 573                                 srcc[0], srcc[1], srcc[2], dstc,
 574                                 code->alu.inst[i].inst1, srca[0], srca[1],
 575                                 srca[2], dsta, code->alu.inst[i].inst3);
 576
 577                         for (j = 0; j < 3; ++j) {
 578                                 int regc = code->alu.inst[i].inst0 >> (j * 7);
 579                                 int rega = code->alu.inst[i].inst2 >> (j * 7);
 580                                 int d;
 581                                 char buf[20];
 582
 583                                 d = regc & 31;
 584                                 if (d < 12) {
 585                                         switch (d % 4) {
 586                                         case R300_ALU_ARGC_SRC0C_XYZ:
 587                                                 sprintf(buf, "%s.xyz",
 588                                                         srcc[d / 4]);
 589                                                 break;
 590                                         case R300_ALU_ARGC_SRC0C_XXX:
 591                                                 sprintf(buf, "%s.xxx",
 592                                                         srcc[d / 4]);
 593                                                 break;
 594                                         case R300_ALU_ARGC_SRC0C_YYY:
 595                                                 sprintf(buf, "%s.yyy",
 596                                                         srcc[d / 4]);
 597                                                 break;
 598                                         case R300_ALU_ARGC_SRC0C_ZZZ:
 599                                                 sprintf(buf, "%s.zzz",
 600                                                         srcc[d / 4]);
 601                                                 break;
 602                                         }
 603                                 } else if (d < 15) {
 604                                         sprintf(buf, "%s.www", srca[d - 12]);
 605                                 } else if (d == 20) {
 606                                         sprintf(buf, "0.0");
 607                                 } else if (d == 21) {
 608                                         sprintf(buf, "1.0");
 609                                 } else if (d == 22) {
 610                                         sprintf(buf, "0.5");
 611                                 } else if (d >= 23 && d < 32) {
 612                                         d -= 23;
 613                                         switch (d / 3) {
 614                                         case 0:
 615                                                 sprintf(buf, "%s.yzx",
 616                                                         srcc[d % 3]);
 617                                                 break;
 618                                         case 1:
 619                                                 sprintf(buf, "%s.zxy",
 620                                                         srcc[d % 3]);
 621                                                 break;
 622                                         case 2:
 623                                                 sprintf(buf, "%s.Wzy",
 624                                                         srcc[d % 3]);
 625                                                 break;
 626                                         }
 627                                 } else {
 628                                         sprintf(buf, "%i", d);
 629                                 }
 630
 631                                 sprintf(argc[j], "%s%s%s%s",
 632                                         (regc & 32) ? "-" : "",
 633                                         (regc & 64) ? "|" : "",
 634                                         buf, (regc & 64) ? "|" : "");
 635
 636                                 d = rega & 31;
 637                                 if (d < 9) {
 638                                         sprintf(buf, "%s.%c", srcc[d / 3],
 639                                                 'x' + (char)(d % 3));
 640                                 } else if (d < 12) {
 641                                         sprintf(buf, "%s.w", srca[d - 9]);
 642                                 } else if (d == 16) {
 643                                         sprintf(buf, "0.0");
 644                                 } else if (d == 17) {
 645                                         sprintf(buf, "1.0");
 646                                 } else if (d == 18) {
 647                                         sprintf(buf, "0.5");
 648                                 } else {
 649                                         sprintf(buf, "%i", d);
 650                                 }
 651
 652                                 sprintf(arga[j], "%s%s%s%s",
 653                                         (rega & 32) ? "-" : "",
 654                                         (rega & 64) ? "|" : "",
 655                                         buf, (rega & 64) ? "|" : "");
 656                         }
 657
 658                         fprintf(stderr, "     xyz: %8s %8s %8s    op: %08x\n"
 659                                 "       w: %8s %8s %8s    op: %08x\n",
 660                                 argc[0], argc[1], argc[2],
 661                                 code->alu.inst[i].inst0, arga[0], arga[1],
 662                                 arga[2], code->alu.inst[i].inst2);
 663                 }
 664         }
 665 }