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Merge branch 'mesa_7_5_branch'
[mesa.git] / src / mesa / drivers / dri / r300 / r300_state.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002.
3 Copyright (C) 2004 Nicolai Haehnle.
4 All Rights Reserved.
5
6 The Weather Channel (TM) funded Tungsten Graphics to develop the
7 initial release of the Radeon 8500 driver under the XFree86 license.
8 This notice must be preserved.
9
10 Permission is hereby granted, free of charge, to any person obtaining
11 a copy of this software and associated documentation files (the
12 "Software"), to deal in the Software without restriction, including
13 without limitation the rights to use, copy, modify, merge, publish,
14 distribute, sublicense, and/or sell copies of the Software, and to
15 permit persons to whom the Software is furnished to do so, subject to
16 the following conditions:
17
18 The above copyright notice and this permission notice (including the
19 next paragraph) shall be included in all copies or substantial
20 portions of the Software.
21
22 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
25 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
26 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
27 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
28 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29
30 **************************************************************************/
31
32 /**
33 * \file
34 *
35 * \author Nicolai Haehnle <prefect_@gmx.net>
36 */
37
38 #include "main/glheader.h"
39 #include "main/state.h"
40 #include "main/imports.h"
41 #include "main/enums.h"
42 #include "main/macros.h"
43 #include "main/context.h"
44 #include "main/dd.h"
45 #include "main/simple_list.h"
46 #include "main/api_arrayelt.h"
47 #include "main/texformat.h"
48
49 #include "swrast/swrast.h"
50 #include "swrast_setup/swrast_setup.h"
51 #include "shader/prog_parameter.h"
52 #include "shader/prog_statevars.h"
53 #include "vbo/vbo.h"
54 #include "tnl/tnl.h"
55
56 #include "radeon_ioctl.h"
57 #include "radeon_state.h"
58 #include "r300_context.h"
59 #include "r300_ioctl.h"
60 #include "r300_state.h"
61 #include "r300_reg.h"
62 #include "r300_emit.h"
63 #include "r300_fragprog.h"
64 #include "r300_tex.h"
65
66 #include "drirenderbuffer.h"
67
68 extern int future_hw_tcl_on;
69 extern void _tnl_UpdateFixedFunctionProgram(GLcontext * ctx);
70
71 static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4])
72 {
73 r300ContextPtr rmesa = R300_CONTEXT(ctx);
74
75 R300_STATECHANGE(rmesa, blend_color);
76
77 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
78 GLuint r = IROUND(cf[0]*1023.0f);
79 GLuint g = IROUND(cf[1]*1023.0f);
80 GLuint b = IROUND(cf[2]*1023.0f);
81 GLuint a = IROUND(cf[3]*1023.0f);
82
83 rmesa->hw.blend_color.cmd[1] = r | (a << 16);
84 rmesa->hw.blend_color.cmd[2] = b | (g << 16);
85 } else {
86 GLubyte color[4];
87 CLAMPED_FLOAT_TO_UBYTE(color[0], cf[0]);
88 CLAMPED_FLOAT_TO_UBYTE(color[1], cf[1]);
89 CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]);
90 CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]);
91
92 rmesa->hw.blend_color.cmd[1] = PACK_COLOR_8888(color[3], color[0],
93 color[1], color[2]);
94 }
95 }
96
97 /**
98 * Calculate the hardware blend factor setting. This same function is used
99 * for source and destination of both alpha and RGB.
100 *
101 * \returns
102 * The hardware register value for the specified blend factor. This value
103 * will need to be shifted into the correct position for either source or
104 * destination factor.
105 *
106 * \todo
107 * Since the two cases where source and destination are handled differently
108 * are essentially error cases, they should never happen. Determine if these
109 * cases can be removed.
110 */
111 static int blend_factor(GLenum factor, GLboolean is_src)
112 {
113 switch (factor) {
114 case GL_ZERO:
115 return R300_BLEND_GL_ZERO;
116 break;
117 case GL_ONE:
118 return R300_BLEND_GL_ONE;
119 break;
120 case GL_DST_COLOR:
121 return R300_BLEND_GL_DST_COLOR;
122 break;
123 case GL_ONE_MINUS_DST_COLOR:
124 return R300_BLEND_GL_ONE_MINUS_DST_COLOR;
125 break;
126 case GL_SRC_COLOR:
127 return R300_BLEND_GL_SRC_COLOR;
128 break;
129 case GL_ONE_MINUS_SRC_COLOR:
130 return R300_BLEND_GL_ONE_MINUS_SRC_COLOR;
131 break;
132 case GL_SRC_ALPHA:
133 return R300_BLEND_GL_SRC_ALPHA;
134 break;
135 case GL_ONE_MINUS_SRC_ALPHA:
136 return R300_BLEND_GL_ONE_MINUS_SRC_ALPHA;
137 break;
138 case GL_DST_ALPHA:
139 return R300_BLEND_GL_DST_ALPHA;
140 break;
141 case GL_ONE_MINUS_DST_ALPHA:
142 return R300_BLEND_GL_ONE_MINUS_DST_ALPHA;
143 break;
144 case GL_SRC_ALPHA_SATURATE:
145 return (is_src) ? R300_BLEND_GL_SRC_ALPHA_SATURATE :
146 R300_BLEND_GL_ZERO;
147 break;
148 case GL_CONSTANT_COLOR:
149 return R300_BLEND_GL_CONST_COLOR;
150 break;
151 case GL_ONE_MINUS_CONSTANT_COLOR:
152 return R300_BLEND_GL_ONE_MINUS_CONST_COLOR;
153 break;
154 case GL_CONSTANT_ALPHA:
155 return R300_BLEND_GL_CONST_ALPHA;
156 break;
157 case GL_ONE_MINUS_CONSTANT_ALPHA:
158 return R300_BLEND_GL_ONE_MINUS_CONST_ALPHA;
159 break;
160 default:
161 fprintf(stderr, "unknown blend factor %x\n", factor);
162 return (is_src) ? R300_BLEND_GL_ONE : R300_BLEND_GL_ZERO;
163 break;
164 }
165 }
166
167 /**
168 * Sets both the blend equation and the blend function.
169 * This is done in a single
170 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
171 * change the interpretation of the blend function.
172 * Also, make sure that blend function and blend equation are set to their
173 * default value if color blending is not enabled, since at least blend
174 * equations GL_MIN and GL_FUNC_REVERSE_SUBTRACT will cause wrong results
175 * otherwise for unknown reasons.
176 */
177
178 /* helper function */
179 static void r300SetBlendCntl(r300ContextPtr r300, int func, int eqn,
180 int cbits, int funcA, int eqnA)
181 {
182 GLuint new_ablend, new_cblend;
183
184 #if 0
185 fprintf(stderr,
186 "eqnA=%08x funcA=%08x eqn=%08x func=%08x cbits=%08x\n",
187 eqnA, funcA, eqn, func, cbits);
188 #endif
189 new_ablend = eqnA | funcA;
190 new_cblend = eqn | func;
191
192 /* Some blend factor combinations don't seem to work when the
193 * BLEND_NO_SEPARATE bit is set.
194 *
195 * Especially problematic candidates are the ONE_MINUS_* flags,
196 * but I can't see a real pattern.
197 */
198 #if 0
199 if (new_ablend == new_cblend) {
200 new_cblend |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
201 }
202 #endif
203 new_cblend |= cbits;
204
205 if ((new_ablend != r300->hw.bld.cmd[R300_BLD_ABLEND]) ||
206 (new_cblend != r300->hw.bld.cmd[R300_BLD_CBLEND])) {
207 R300_STATECHANGE(r300, bld);
208 r300->hw.bld.cmd[R300_BLD_ABLEND] = new_ablend;
209 r300->hw.bld.cmd[R300_BLD_CBLEND] = new_cblend;
210 }
211 }
212
213 static void r300SetBlendState(GLcontext * ctx)
214 {
215 r300ContextPtr r300 = R300_CONTEXT(ctx);
216 int func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
217 (R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
218 int eqn = R300_COMB_FCN_ADD_CLAMP;
219 int funcA = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
220 (R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
221 int eqnA = R300_COMB_FCN_ADD_CLAMP;
222
223 if (RGBA_LOGICOP_ENABLED(ctx) || !ctx->Color.BlendEnabled) {
224 r300SetBlendCntl(r300, func, eqn, 0, func, eqn);
225 return;
226 }
227
228 func =
229 (blend_factor(ctx->Color.BlendSrcRGB, GL_TRUE) <<
230 R300_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstRGB,
231 GL_FALSE) <<
232 R300_DST_BLEND_SHIFT);
233
234 switch (ctx->Color.BlendEquationRGB) {
235 case GL_FUNC_ADD:
236 eqn = R300_COMB_FCN_ADD_CLAMP;
237 break;
238
239 case GL_FUNC_SUBTRACT:
240 eqn = R300_COMB_FCN_SUB_CLAMP;
241 break;
242
243 case GL_FUNC_REVERSE_SUBTRACT:
244 eqn = R300_COMB_FCN_RSUB_CLAMP;
245 break;
246
247 case GL_MIN:
248 eqn = R300_COMB_FCN_MIN;
249 func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
250 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
251 break;
252
253 case GL_MAX:
254 eqn = R300_COMB_FCN_MAX;
255 func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
256 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
257 break;
258
259 default:
260 fprintf(stderr,
261 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
262 __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB);
263 return;
264 }
265
266 funcA =
267 (blend_factor(ctx->Color.BlendSrcA, GL_TRUE) <<
268 R300_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstA,
269 GL_FALSE) <<
270 R300_DST_BLEND_SHIFT);
271
272 switch (ctx->Color.BlendEquationA) {
273 case GL_FUNC_ADD:
274 eqnA = R300_COMB_FCN_ADD_CLAMP;
275 break;
276
277 case GL_FUNC_SUBTRACT:
278 eqnA = R300_COMB_FCN_SUB_CLAMP;
279 break;
280
281 case GL_FUNC_REVERSE_SUBTRACT:
282 eqnA = R300_COMB_FCN_RSUB_CLAMP;
283 break;
284
285 case GL_MIN:
286 eqnA = R300_COMB_FCN_MIN;
287 funcA = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
288 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
289 break;
290
291 case GL_MAX:
292 eqnA = R300_COMB_FCN_MAX;
293 funcA = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
294 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
295 break;
296
297 default:
298 fprintf(stderr,
299 "[%s:%u] Invalid A blend equation (0x%04x).\n",
300 __FUNCTION__, __LINE__, ctx->Color.BlendEquationA);
301 return;
302 }
303
304 r300SetBlendCntl(r300,
305 func, eqn,
306 (R300_SEPARATE_ALPHA_ENABLE |
307 R300_READ_ENABLE |
308 R300_ALPHA_BLEND_ENABLE), funcA, eqnA);
309 }
310
311 static void r300BlendEquationSeparate(GLcontext * ctx,
312 GLenum modeRGB, GLenum modeA)
313 {
314 r300SetBlendState(ctx);
315 }
316
317 static void r300BlendFuncSeparate(GLcontext * ctx,
318 GLenum sfactorRGB, GLenum dfactorRGB,
319 GLenum sfactorA, GLenum dfactorA)
320 {
321 r300SetBlendState(ctx);
322 }
323
324 /**
325 * Translate LogicOp enums into hardware representation.
326 * Both use a very logical bit-wise layout, but unfortunately the order
327 * of bits is reversed.
328 */
329 static GLuint translate_logicop(GLenum logicop)
330 {
331 GLuint bits = logicop - GL_CLEAR;
332 bits = ((bits & 1) << 3) | ((bits & 2) << 1) | ((bits & 4) >> 1) | ((bits & 8) >> 3);
333 return bits << R300_RB3D_ROPCNTL_ROP_SHIFT;
334 }
335
336 /**
337 * Used internally to update the r300->hw hardware state to match the
338 * current OpenGL state.
339 */
340 static void r300SetLogicOpState(GLcontext *ctx)
341 {
342 r300ContextPtr r300 = R300_CONTEXT(ctx);
343 R300_STATECHANGE(r300, rop);
344 if (RGBA_LOGICOP_ENABLED(ctx)) {
345 r300->hw.rop.cmd[1] = R300_RB3D_ROPCNTL_ROP_ENABLE |
346 translate_logicop(ctx->Color.LogicOp);
347 } else {
348 r300->hw.rop.cmd[1] = 0;
349 }
350 }
351
352 /**
353 * Called by Mesa when an application program changes the LogicOp state
354 * via glLogicOp.
355 */
356 static void r300LogicOpcode(GLcontext *ctx, GLenum logicop)
357 {
358 if (RGBA_LOGICOP_ENABLED(ctx))
359 r300SetLogicOpState(ctx);
360 }
361
362 static void r300ClipPlane( GLcontext *ctx, GLenum plane, const GLfloat *eq )
363 {
364 r300ContextPtr rmesa = R300_CONTEXT(ctx);
365 GLint p;
366 GLint *ip;
367
368 /* no VAP UCP on non-TCL chipsets */
369 if (!(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
370 return;
371
372 p = (GLint) plane - (GLint) GL_CLIP_PLANE0;
373 ip = (GLint *)ctx->Transform._ClipUserPlane[p];
374
375 R300_STATECHANGE( rmesa, vpucp[p] );
376 rmesa->hw.vpucp[p].cmd[R300_VPUCP_X] = ip[0];
377 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Y] = ip[1];
378 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Z] = ip[2];
379 rmesa->hw.vpucp[p].cmd[R300_VPUCP_W] = ip[3];
380 }
381
382 static void r300SetClipPlaneState(GLcontext * ctx, GLenum cap, GLboolean state)
383 {
384 r300ContextPtr r300 = R300_CONTEXT(ctx);
385 GLuint p;
386
387 /* no VAP UCP on non-TCL chipsets */
388 if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
389 return;
390
391 p = cap - GL_CLIP_PLANE0;
392 R300_STATECHANGE(r300, vap_clip_cntl);
393 if (state) {
394 r300->hw.vap_clip_cntl.cmd[1] |= (R300_VAP_UCP_ENABLE_0 << p);
395 r300ClipPlane(ctx, cap, NULL);
396 } else {
397 r300->hw.vap_clip_cntl.cmd[1] &= ~(R300_VAP_UCP_ENABLE_0 << p);
398 }
399 }
400
401 /**
402 * Update our tracked culling state based on Mesa's state.
403 */
404 static void r300UpdateCulling(GLcontext * ctx)
405 {
406 r300ContextPtr r300 = R300_CONTEXT(ctx);
407 uint32_t val = 0;
408
409 if (ctx->Polygon.CullFlag) {
410 switch (ctx->Polygon.CullFaceMode) {
411 case GL_FRONT:
412 val = R300_CULL_FRONT;
413 break;
414 case GL_BACK:
415 val = R300_CULL_BACK;
416 break;
417 case GL_FRONT_AND_BACK:
418 val = R300_CULL_FRONT | R300_CULL_BACK;
419 break;
420 default:
421 break;
422 }
423 }
424
425 switch (ctx->Polygon.FrontFace) {
426 case GL_CW:
427 val |= R300_FRONT_FACE_CW;
428 break;
429 case GL_CCW:
430 val |= R300_FRONT_FACE_CCW;
431 break;
432 default:
433 break;
434 }
435
436 R300_STATECHANGE(r300, cul);
437 r300->hw.cul.cmd[R300_CUL_CULL] = val;
438 }
439
440 static void r300SetPolygonOffsetState(GLcontext * ctx, GLboolean state)
441 {
442 r300ContextPtr r300 = R300_CONTEXT(ctx);
443
444 R300_STATECHANGE(r300, occlusion_cntl);
445 if (state) {
446 r300->hw.occlusion_cntl.cmd[1] |= (3 << 0);
447 } else {
448 r300->hw.occlusion_cntl.cmd[1] &= ~(3 << 0);
449 }
450 }
451
452 static GLboolean current_fragment_program_writes_depth(GLcontext* ctx)
453 {
454 r300ContextPtr r300 = R300_CONTEXT(ctx);
455
456 if (r300->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV515) {
457 struct r300_fragment_program *fp = (struct r300_fragment_program *)
458 (char *)ctx->FragmentProgram._Current;
459 return (fp && fp->WritesDepth);
460 } else {
461 struct r500_fragment_program* fp =
462 (struct r500_fragment_program*)(char*)
463 ctx->FragmentProgram._Current;
464 return (fp && fp->writes_depth);
465 }
466 }
467
468 static void r300SetEarlyZState(GLcontext * ctx)
469 {
470 r300ContextPtr r300 = R300_CONTEXT(ctx);
471 GLuint topZ = R300_ZTOP_ENABLE;
472
473 if (ctx->Color.AlphaEnabled && ctx->Color.AlphaFunc != GL_ALWAYS)
474 topZ = R300_ZTOP_DISABLE;
475 else if (current_fragment_program_writes_depth(ctx))
476 topZ = R300_ZTOP_DISABLE;
477 else if (ctx->FragmentProgram._Current && ctx->FragmentProgram._Current->UsesKill)
478 topZ = R300_ZTOP_DISABLE;
479
480 if (topZ != r300->hw.zstencil_format.cmd[2]) {
481 /* Note: This completely reemits the stencil format.
482 * I have not tested whether this is strictly necessary,
483 * or if emitting a write to ZB_ZTOP is enough.
484 */
485 R300_STATECHANGE(r300, zstencil_format);
486 r300->hw.zstencil_format.cmd[2] = topZ;
487 }
488 }
489
490 static void r300SetAlphaState(GLcontext * ctx)
491 {
492 r300ContextPtr r300 = R300_CONTEXT(ctx);
493 GLubyte refByte;
494 uint32_t pp_misc = 0x0;
495 GLboolean really_enabled = ctx->Color.AlphaEnabled;
496
497 CLAMPED_FLOAT_TO_UBYTE(refByte, ctx->Color.AlphaRef);
498
499 switch (ctx->Color.AlphaFunc) {
500 case GL_NEVER:
501 pp_misc |= R300_FG_ALPHA_FUNC_NEVER;
502 break;
503 case GL_LESS:
504 pp_misc |= R300_FG_ALPHA_FUNC_LESS;
505 break;
506 case GL_EQUAL:
507 pp_misc |= R300_FG_ALPHA_FUNC_EQUAL;
508 break;
509 case GL_LEQUAL:
510 pp_misc |= R300_FG_ALPHA_FUNC_LE;
511 break;
512 case GL_GREATER:
513 pp_misc |= R300_FG_ALPHA_FUNC_GREATER;
514 break;
515 case GL_NOTEQUAL:
516 pp_misc |= R300_FG_ALPHA_FUNC_NOTEQUAL;
517 break;
518 case GL_GEQUAL:
519 pp_misc |= R300_FG_ALPHA_FUNC_GE;
520 break;
521 case GL_ALWAYS:
522 /*pp_misc |= FG_ALPHA_FUNC_ALWAYS; */
523 really_enabled = GL_FALSE;
524 break;
525 }
526
527 if (really_enabled) {
528 pp_misc |= R300_FG_ALPHA_FUNC_ENABLE;
529 pp_misc |= R500_FG_ALPHA_FUNC_8BIT;
530 pp_misc |= (refByte & R300_FG_ALPHA_FUNC_VAL_MASK);
531 } else {
532 pp_misc = 0x0;
533 }
534
535 R300_STATECHANGE(r300, at);
536 r300->hw.at.cmd[R300_AT_ALPHA_TEST] = pp_misc;
537 r300->hw.at.cmd[R300_AT_UNKNOWN] = 0;
538
539 r300SetEarlyZState(ctx);
540 }
541
542 static void r300AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
543 {
544 (void)func;
545 (void)ref;
546 r300SetAlphaState(ctx);
547 }
548
549 static int translate_func(int func)
550 {
551 switch (func) {
552 case GL_NEVER:
553 return R300_ZS_NEVER;
554 case GL_LESS:
555 return R300_ZS_LESS;
556 case GL_EQUAL:
557 return R300_ZS_EQUAL;
558 case GL_LEQUAL:
559 return R300_ZS_LEQUAL;
560 case GL_GREATER:
561 return R300_ZS_GREATER;
562 case GL_NOTEQUAL:
563 return R300_ZS_NOTEQUAL;
564 case GL_GEQUAL:
565 return R300_ZS_GEQUAL;
566 case GL_ALWAYS:
567 return R300_ZS_ALWAYS;
568 }
569 return 0;
570 }
571
572 static void r300SetDepthState(GLcontext * ctx)
573 {
574 r300ContextPtr r300 = R300_CONTEXT(ctx);
575
576 R300_STATECHANGE(r300, zs);
577 r300->hw.zs.cmd[R300_ZS_CNTL_0] &= R300_STENCIL_ENABLE|R300_STENCIL_FRONT_BACK;
578 r300->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(R300_ZS_MASK << R300_Z_FUNC_SHIFT);
579
580 if (ctx->Depth.Test) {
581 r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_Z_ENABLE;
582 if (ctx->Depth.Mask)
583 r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_Z_WRITE_ENABLE;
584 r300->hw.zs.cmd[R300_ZS_CNTL_1] |=
585 translate_func(ctx->Depth.Func) << R300_Z_FUNC_SHIFT;
586 }
587
588 r300SetEarlyZState(ctx);
589 }
590
591 static void r300SetStencilState(GLcontext * ctx, GLboolean state)
592 {
593 r300ContextPtr r300 = R300_CONTEXT(ctx);
594
595 if (r300->state.stencil.hw_stencil) {
596 R300_STATECHANGE(r300, zs);
597 if (state) {
598 r300->hw.zs.cmd[R300_ZS_CNTL_0] |=
599 R300_STENCIL_ENABLE;
600 } else {
601 r300->hw.zs.cmd[R300_ZS_CNTL_0] &=
602 ~R300_STENCIL_ENABLE;
603 }
604 } else {
605 #if R200_MERGED
606 FALLBACK(&r300->radeon, RADEON_FALLBACK_STENCIL, state);
607 #endif
608 }
609 }
610
611 static void r300UpdatePolygonMode(GLcontext * ctx)
612 {
613 r300ContextPtr r300 = R300_CONTEXT(ctx);
614 uint32_t hw_mode = R300_GA_POLY_MODE_DISABLE;
615
616 /* Only do something if a polygon mode is wanted, default is GL_FILL */
617 if (ctx->Polygon.FrontMode != GL_FILL ||
618 ctx->Polygon.BackMode != GL_FILL) {
619 GLenum f, b;
620
621 /* Handle GL_CW (clock wise and GL_CCW (counter clock wise)
622 * correctly by selecting the correct front and back face
623 */
624 if (ctx->Polygon.FrontFace == GL_CCW) {
625 f = ctx->Polygon.FrontMode;
626 b = ctx->Polygon.BackMode;
627 } else {
628 f = ctx->Polygon.BackMode;
629 b = ctx->Polygon.FrontMode;
630 }
631
632 /* Enable polygon mode */
633 hw_mode |= R300_GA_POLY_MODE_DUAL;
634
635 switch (f) {
636 case GL_LINE:
637 hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_LINE;
638 break;
639 case GL_POINT:
640 hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_POINT;
641 break;
642 case GL_FILL:
643 hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_TRI;
644 break;
645 }
646
647 switch (b) {
648 case GL_LINE:
649 hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_LINE;
650 break;
651 case GL_POINT:
652 hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_POINT;
653 break;
654 case GL_FILL:
655 hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_TRI;
656 break;
657 }
658 }
659
660 if (r300->hw.polygon_mode.cmd[1] != hw_mode) {
661 R300_STATECHANGE(r300, polygon_mode);
662 r300->hw.polygon_mode.cmd[1] = hw_mode;
663 }
664
665 r300->hw.polygon_mode.cmd[2] = 0x00000001;
666 r300->hw.polygon_mode.cmd[3] = 0x00000000;
667 }
668
669 /**
670 * Change the culling mode.
671 *
672 * \note Mesa already filters redundant calls to this function.
673 */
674 static void r300CullFace(GLcontext * ctx, GLenum mode)
675 {
676 (void)mode;
677
678 r300UpdateCulling(ctx);
679 }
680
681 /**
682 * Change the polygon orientation.
683 *
684 * \note Mesa already filters redundant calls to this function.
685 */
686 static void r300FrontFace(GLcontext * ctx, GLenum mode)
687 {
688 (void)mode;
689
690 r300UpdateCulling(ctx);
691 r300UpdatePolygonMode(ctx);
692 }
693
694 /**
695 * Change the depth testing function.
696 *
697 * \note Mesa already filters redundant calls to this function.
698 */
699 static void r300DepthFunc(GLcontext * ctx, GLenum func)
700 {
701 (void)func;
702 r300SetDepthState(ctx);
703 }
704
705 /**
706 * Enable/Disable depth writing.
707 *
708 * \note Mesa already filters redundant calls to this function.
709 */
710 static void r300DepthMask(GLcontext * ctx, GLboolean mask)
711 {
712 (void)mask;
713 r300SetDepthState(ctx);
714 }
715
716 /**
717 * Handle glColorMask()
718 */
719 static void r300ColorMask(GLcontext * ctx,
720 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
721 {
722 r300ContextPtr r300 = R300_CONTEXT(ctx);
723 int mask = (r ? RB3D_COLOR_CHANNEL_MASK_RED_MASK0 : 0) |
724 (g ? RB3D_COLOR_CHANNEL_MASK_GREEN_MASK0 : 0) |
725 (b ? RB3D_COLOR_CHANNEL_MASK_BLUE_MASK0 : 0) |
726 (a ? RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK0 : 0);
727
728 if (mask != r300->hw.cmk.cmd[R300_CMK_COLORMASK]) {
729 R300_STATECHANGE(r300, cmk);
730 r300->hw.cmk.cmd[R300_CMK_COLORMASK] = mask;
731 }
732 }
733
734 /* =============================================================
735 * Point state
736 */
737 static void r300PointSize(GLcontext * ctx, GLfloat size)
738 {
739 r300ContextPtr r300 = R300_CONTEXT(ctx);
740 /* same size limits for AA, non-AA points */
741 size = CLAMP(size, ctx->Const.MinPointSize, ctx->Const.MaxPointSize);
742
743 R300_STATECHANGE(r300, ps);
744 r300->hw.ps.cmd[R300_PS_POINTSIZE] =
745 ((int)(size * 6) << R300_POINTSIZE_X_SHIFT) |
746 ((int)(size * 6) << R300_POINTSIZE_Y_SHIFT);
747 }
748
749 static void r300PointParameter(GLcontext * ctx, GLenum pname, const GLfloat * param)
750 {
751 r300ContextPtr r300 = R300_CONTEXT(ctx);
752
753 switch (pname) {
754 case GL_POINT_SIZE_MIN:
755 R300_STATECHANGE(r300, ga_point_minmax);
756 r300->hw.ga_point_minmax.cmd[1] &= ~R300_GA_POINT_MINMAX_MIN_MASK;
757 r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MinSize * 6.0);
758 break;
759 case GL_POINT_SIZE_MAX:
760 R300_STATECHANGE(r300, ga_point_minmax);
761 r300->hw.ga_point_minmax.cmd[1] &= ~R300_GA_POINT_MINMAX_MAX_MASK;
762 r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MaxSize * 6.0)
763 << R300_GA_POINT_MINMAX_MAX_SHIFT;
764 break;
765 case GL_POINT_DISTANCE_ATTENUATION:
766 break;
767 case GL_POINT_FADE_THRESHOLD_SIZE:
768 break;
769 default:
770 break;
771 }
772 }
773
774 /* =============================================================
775 * Line state
776 */
777 static void r300LineWidth(GLcontext * ctx, GLfloat widthf)
778 {
779 r300ContextPtr r300 = R300_CONTEXT(ctx);
780
781 widthf = CLAMP(widthf,
782 ctx->Const.MinPointSize,
783 ctx->Const.MaxPointSize);
784 R300_STATECHANGE(r300, lcntl);
785 r300->hw.lcntl.cmd[1] =
786 R300_LINE_CNT_HO | R300_LINE_CNT_VE | (int)(widthf * 6.0);
787 }
788
789 static void r300PolygonMode(GLcontext * ctx, GLenum face, GLenum mode)
790 {
791 (void)face;
792 (void)mode;
793
794 r300UpdatePolygonMode(ctx);
795 }
796
797 /* =============================================================
798 * Stencil
799 */
800
801 static int translate_stencil_op(int op)
802 {
803 switch (op) {
804 case GL_KEEP:
805 return R300_ZS_KEEP;
806 case GL_ZERO:
807 return R300_ZS_ZERO;
808 case GL_REPLACE:
809 return R300_ZS_REPLACE;
810 case GL_INCR:
811 return R300_ZS_INCR;
812 case GL_DECR:
813 return R300_ZS_DECR;
814 case GL_INCR_WRAP_EXT:
815 return R300_ZS_INCR_WRAP;
816 case GL_DECR_WRAP_EXT:
817 return R300_ZS_DECR_WRAP;
818 case GL_INVERT:
819 return R300_ZS_INVERT;
820 default:
821 WARN_ONCE("Do not know how to translate stencil op");
822 return R300_ZS_KEEP;
823 }
824 return 0;
825 }
826
827 static void r300ShadeModel(GLcontext * ctx, GLenum mode)
828 {
829 r300ContextPtr rmesa = R300_CONTEXT(ctx);
830
831 R300_STATECHANGE(rmesa, shade);
832 rmesa->hw.shade.cmd[1] = 0x00000002;
833 switch (mode) {
834 case GL_FLAT:
835 rmesa->hw.shade.cmd[2] = R300_RE_SHADE_MODEL_FLAT;
836 break;
837 case GL_SMOOTH:
838 rmesa->hw.shade.cmd[2] = R300_RE_SHADE_MODEL_SMOOTH;
839 break;
840 default:
841 return;
842 }
843 rmesa->hw.shade.cmd[3] = 0x00000000;
844 rmesa->hw.shade.cmd[4] = 0x00000000;
845 }
846
847 static void r300StencilFuncSeparate(GLcontext * ctx, GLenum face,
848 GLenum func, GLint ref, GLuint mask)
849 {
850 r300ContextPtr rmesa = R300_CONTEXT(ctx);
851 GLuint refmask =
852 ((ctx->Stencil.Ref[0] & 0xff) << R300_STENCILREF_SHIFT)
853 | ((ctx->Stencil.ValueMask[0] & 0xff) << R300_STENCILMASK_SHIFT);
854 const unsigned back = ctx->Stencil._BackFace;
855 GLuint flag;
856
857 R300_STATECHANGE(rmesa, zs);
858 rmesa->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_STENCIL_FRONT_BACK;
859 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= ~((R300_ZS_MASK <<
860 R300_S_FRONT_FUNC_SHIFT)
861 | (R300_ZS_MASK <<
862 R300_S_BACK_FUNC_SHIFT));
863
864 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &=
865 ~((R300_STENCILREF_MASK << R300_STENCILREF_SHIFT) |
866 (R300_STENCILREF_MASK << R300_STENCILMASK_SHIFT));
867
868 flag = translate_func(ctx->Stencil.Function[0]);
869 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
870 (flag << R300_S_FRONT_FUNC_SHIFT);
871
872 flag = translate_func(ctx->Stencil.Function[back]);
873
874 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
875 (flag << R300_S_BACK_FUNC_SHIFT);
876 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= refmask;
877 }
878
879 static void r300StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
880 {
881 r300ContextPtr rmesa = R300_CONTEXT(ctx);
882
883 R300_STATECHANGE(rmesa, zs);
884 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &=
885 ~(R300_STENCILREF_MASK <<
886 R300_STENCILWRITEMASK_SHIFT);
887 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |=
888 (ctx->Stencil.
889 WriteMask[0] & R300_STENCILREF_MASK) <<
890 R300_STENCILWRITEMASK_SHIFT;
891 }
892
893 static void r300StencilOpSeparate(GLcontext * ctx, GLenum face,
894 GLenum fail, GLenum zfail, GLenum zpass)
895 {
896 r300ContextPtr rmesa = R300_CONTEXT(ctx);
897 const unsigned back = ctx->Stencil._BackFace;
898
899 R300_STATECHANGE(rmesa, zs);
900 /* It is easier to mask what's left.. */
901 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &=
902 (R300_ZS_MASK << R300_Z_FUNC_SHIFT) |
903 (R300_ZS_MASK << R300_S_FRONT_FUNC_SHIFT) |
904 (R300_ZS_MASK << R300_S_BACK_FUNC_SHIFT);
905
906 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
907 (translate_stencil_op(ctx->Stencil.FailFunc[0]) <<
908 R300_S_FRONT_SFAIL_OP_SHIFT)
909 | (translate_stencil_op(ctx->Stencil.ZFailFunc[0]) <<
910 R300_S_FRONT_ZFAIL_OP_SHIFT)
911 | (translate_stencil_op(ctx->Stencil.ZPassFunc[0]) <<
912 R300_S_FRONT_ZPASS_OP_SHIFT);
913
914 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
915 (translate_stencil_op(ctx->Stencil.FailFunc[back]) <<
916 R300_S_BACK_SFAIL_OP_SHIFT)
917 | (translate_stencil_op(ctx->Stencil.ZFailFunc[back]) <<
918 R300_S_BACK_ZFAIL_OP_SHIFT)
919 | (translate_stencil_op(ctx->Stencil.ZPassFunc[back]) <<
920 R300_S_BACK_ZPASS_OP_SHIFT);
921 }
922
923 /* =============================================================
924 * Window position and viewport transformation
925 */
926
927 /*
928 * To correctly position primitives:
929 */
930 #define SUBPIXEL_X 0.125
931 #define SUBPIXEL_Y 0.125
932
933 static void r300UpdateWindow(GLcontext * ctx)
934 {
935 r300ContextPtr rmesa = R300_CONTEXT(ctx);
936 __DRIdrawablePrivate *dPriv = rmesa->radeon.dri.drawable;
937 GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0;
938 GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0;
939 const GLfloat *v = ctx->Viewport._WindowMap.m;
940
941 GLfloat sx = v[MAT_SX];
942 GLfloat tx = v[MAT_TX] + xoffset + SUBPIXEL_X;
943 GLfloat sy = -v[MAT_SY];
944 GLfloat ty = (-v[MAT_TY]) + yoffset + SUBPIXEL_Y;
945 GLfloat sz = v[MAT_SZ] * rmesa->state.depth.scale;
946 GLfloat tz = v[MAT_TZ] * rmesa->state.depth.scale;
947
948 R300_FIREVERTICES(rmesa);
949 R300_STATECHANGE(rmesa, vpt);
950
951 rmesa->hw.vpt.cmd[R300_VPT_XSCALE] = r300PackFloat32(sx);
952 rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx);
953 rmesa->hw.vpt.cmd[R300_VPT_YSCALE] = r300PackFloat32(sy);
954 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty);
955 rmesa->hw.vpt.cmd[R300_VPT_ZSCALE] = r300PackFloat32(sz);
956 rmesa->hw.vpt.cmd[R300_VPT_ZOFFSET] = r300PackFloat32(tz);
957 }
958
959 static void r300Viewport(GLcontext * ctx, GLint x, GLint y,
960 GLsizei width, GLsizei height)
961 {
962 /* Don't pipeline viewport changes, conflict with window offset
963 * setting below. Could apply deltas to rescue pipelined viewport
964 * values, or keep the originals hanging around.
965 */
966 r300UpdateWindow(ctx);
967 }
968
969 static void r300DepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval)
970 {
971 r300UpdateWindow(ctx);
972 }
973
974 void r300UpdateViewportOffset(GLcontext * ctx)
975 {
976 r300ContextPtr rmesa = R300_CONTEXT(ctx);
977 __DRIdrawablePrivate *dPriv = ((radeonContextPtr) rmesa)->dri.drawable;
978 GLfloat xoffset = (GLfloat) dPriv->x;
979 GLfloat yoffset = (GLfloat) dPriv->y + dPriv->h;
980 const GLfloat *v = ctx->Viewport._WindowMap.m;
981
982 GLfloat tx = v[MAT_TX] + xoffset + SUBPIXEL_X;
983 GLfloat ty = (-v[MAT_TY]) + yoffset + SUBPIXEL_Y;
984
985 if (rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] != r300PackFloat32(tx) ||
986 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] != r300PackFloat32(ty)) {
987 /* Note: this should also modify whatever data the context reset
988 * code uses...
989 */
990 R300_STATECHANGE(rmesa, vpt);
991 rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx);
992 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty);
993
994 }
995
996 radeonUpdateScissor(ctx);
997 }
998
999 /**
1000 * Tell the card where to render (offset, pitch).
1001 * Effected by glDrawBuffer, etc
1002 */
1003 void r300UpdateDrawBuffer(GLcontext * ctx)
1004 {
1005 r300ContextPtr rmesa = R300_CONTEXT(ctx);
1006 r300ContextPtr r300 = rmesa;
1007 struct gl_framebuffer *fb = ctx->DrawBuffer;
1008 driRenderbuffer *drb;
1009
1010 if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) {
1011 /* draw to front */
1012 drb =
1013 (driRenderbuffer *) fb->Attachment[BUFFER_FRONT_LEFT].
1014 Renderbuffer;
1015 } else if (fb->_ColorDrawBufferIndexes[0] == BUFFER_BACK_LEFT) {
1016 /* draw to back */
1017 drb =
1018 (driRenderbuffer *) fb->Attachment[BUFFER_BACK_LEFT].
1019 Renderbuffer;
1020 } else {
1021 /* drawing to multiple buffers, or none */
1022 return;
1023 }
1024
1025 assert(drb);
1026 assert(drb->flippedPitch);
1027
1028 R300_STATECHANGE(rmesa, cb);
1029
1030 r300->hw.cb.cmd[R300_CB_OFFSET] = drb->flippedOffset + //r300->radeon.state.color.drawOffset +
1031 r300->radeon.radeonScreen->fbLocation;
1032 r300->hw.cb.cmd[R300_CB_PITCH] = drb->flippedPitch; //r300->radeon.state.color.drawPitch;
1033
1034 if (r300->radeon.radeonScreen->cpp == 4)
1035 r300->hw.cb.cmd[R300_CB_PITCH] |= R300_COLOR_FORMAT_ARGB8888;
1036 else
1037 r300->hw.cb.cmd[R300_CB_PITCH] |= R300_COLOR_FORMAT_RGB565;
1038
1039 if (r300->radeon.sarea->tiling_enabled)
1040 r300->hw.cb.cmd[R300_CB_PITCH] |= R300_COLOR_TILE_ENABLE;
1041 #if 0
1042 R200_STATECHANGE(rmesa, ctx);
1043
1044 /* Note: we used the (possibly) page-flipped values */
1045 rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET]
1046 = ((drb->flippedOffset + rmesa->r200Screen->fbLocation)
1047 & R200_COLOROFFSET_MASK);
1048 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] = drb->flippedPitch;
1049
1050 if (rmesa->sarea->tiling_enabled) {
1051 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |=
1052 R200_COLOR_TILE_ENABLE;
1053 }
1054 #endif
1055 }
1056
1057 static void
1058 r300FetchStateParameter(GLcontext * ctx,
1059 const gl_state_index state[STATE_LENGTH],
1060 GLfloat * value)
1061 {
1062 r300ContextPtr r300 = R300_CONTEXT(ctx);
1063
1064 switch (state[0]) {
1065 case STATE_INTERNAL:
1066 switch (state[1]) {
1067 case STATE_R300_WINDOW_DIMENSION:
1068 value[0] = r300->radeon.dri.drawable->w * 0.5f; /* width*0.5 */
1069 value[1] = r300->radeon.dri.drawable->h * 0.5f; /* height*0.5 */
1070 value[2] = 0.5F; /* for moving range [-1 1] -> [0 1] */
1071 value[3] = 1.0F; /* not used */
1072 break;
1073
1074 case STATE_R300_TEXRECT_FACTOR:{
1075 struct gl_texture_object *t =
1076 ctx->Texture.Unit[state[2]].CurrentTex[TEXTURE_RECT_INDEX];
1077
1078 if (t && t->Image[0][t->BaseLevel]) {
1079 struct gl_texture_image *image =
1080 t->Image[0][t->BaseLevel];
1081 value[0] = 1.0 / image->Width2;
1082 value[1] = 1.0 / image->Height2;
1083 } else {
1084 value[0] = 1.0;
1085 value[1] = 1.0;
1086 }
1087 value[2] = 1.0;
1088 value[3] = 1.0;
1089 break;
1090 }
1091
1092 default:
1093 break;
1094 }
1095 break;
1096
1097 default:
1098 break;
1099 }
1100 }
1101
1102 /**
1103 * Update R300's own internal state parameters.
1104 * For now just STATE_R300_WINDOW_DIMENSION
1105 */
1106 void r300UpdateStateParameters(GLcontext * ctx, GLuint new_state)
1107 {
1108 struct r300_fragment_program *fp;
1109 struct gl_program_parameter_list *paramList;
1110 GLuint i;
1111
1112 if (!(new_state & (_NEW_BUFFERS | _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS)))
1113 return;
1114
1115 fp = (struct r300_fragment_program *)ctx->FragmentProgram._Current;
1116 if (!fp)
1117 return;
1118
1119 paramList = fp->mesa_program.Base.Parameters;
1120
1121 if (!paramList)
1122 return;
1123
1124 for (i = 0; i < paramList->NumParameters; i++) {
1125 if (paramList->Parameters[i].Type == PROGRAM_STATE_VAR) {
1126 r300FetchStateParameter(ctx,
1127 paramList->Parameters[i].
1128 StateIndexes,
1129 paramList->ParameterValues[i]);
1130 }
1131 }
1132 }
1133
1134 /* =============================================================
1135 * Polygon state
1136 */
1137 static void r300PolygonOffset(GLcontext * ctx, GLfloat factor, GLfloat units)
1138 {
1139 r300ContextPtr rmesa = R300_CONTEXT(ctx);
1140 GLfloat constant = units;
1141
1142 switch (ctx->Visual.depthBits) {
1143 case 16:
1144 constant *= 4.0;
1145 break;
1146 case 24:
1147 constant *= 2.0;
1148 break;
1149 }
1150
1151 factor *= 12.0;
1152
1153 /* fprintf(stderr, "%s f:%f u:%f\n", __FUNCTION__, factor, constant); */
1154
1155 R300_STATECHANGE(rmesa, zbs);
1156 rmesa->hw.zbs.cmd[R300_ZBS_T_FACTOR] = r300PackFloat32(factor);
1157 rmesa->hw.zbs.cmd[R300_ZBS_T_CONSTANT] = r300PackFloat32(constant);
1158 rmesa->hw.zbs.cmd[R300_ZBS_W_FACTOR] = r300PackFloat32(factor);
1159 rmesa->hw.zbs.cmd[R300_ZBS_W_CONSTANT] = r300PackFloat32(constant);
1160 }
1161
1162 /* Routing and texture-related */
1163
1164 /* r300 doesnt handle GL_CLAMP and GL_MIRROR_CLAMP_EXT correctly when filter is NEAREST.
1165 * Since texwrap produces same results for GL_CLAMP and GL_CLAMP_TO_EDGE we use them instead.
1166 * We need to recalculate wrap modes whenever filter mode is changed because someone might do:
1167 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST);
1168 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP);
1169 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
1170 * Since r300 completely ignores R300_TX_CLAMP when either min or mag is nearest it cant handle
1171 * combinations where only one of them is nearest.
1172 */
1173 static unsigned long gen_fixed_filter(unsigned long f)
1174 {
1175 unsigned long mag, min, needs_fixing = 0;
1176 //return f;
1177
1178 /* We ignore MIRROR bit so we dont have to do everything twice */
1179 if ((f & ((7 - 1) << R300_TX_WRAP_S_SHIFT)) ==
1180 (R300_TX_CLAMP << R300_TX_WRAP_S_SHIFT)) {
1181 needs_fixing |= 1;
1182 }
1183 if ((f & ((7 - 1) << R300_TX_WRAP_T_SHIFT)) ==
1184 (R300_TX_CLAMP << R300_TX_WRAP_T_SHIFT)) {
1185 needs_fixing |= 2;
1186 }
1187 if ((f & ((7 - 1) << R300_TX_WRAP_R_SHIFT)) ==
1188 (R300_TX_CLAMP << R300_TX_WRAP_R_SHIFT)) {
1189 needs_fixing |= 4;
1190 }
1191
1192 if (!needs_fixing)
1193 return f;
1194
1195 mag = f & R300_TX_MAG_FILTER_MASK;
1196 min = f & (R300_TX_MIN_FILTER_MASK|R300_TX_MIN_FILTER_MIP_MASK);
1197
1198 /* TODO: Check for anisto filters too */
1199 if ((mag != R300_TX_MAG_FILTER_NEAREST)
1200 && (min != R300_TX_MIN_FILTER_NEAREST))
1201 return f;
1202
1203 /* r300 cant handle these modes hence we force nearest to linear */
1204 if ((mag == R300_TX_MAG_FILTER_NEAREST)
1205 && (min != R300_TX_MIN_FILTER_NEAREST)) {
1206 f &= ~R300_TX_MAG_FILTER_NEAREST;
1207 f |= R300_TX_MAG_FILTER_LINEAR;
1208 return f;
1209 }
1210
1211 if ((min == R300_TX_MIN_FILTER_NEAREST)
1212 && (mag != R300_TX_MAG_FILTER_NEAREST)) {
1213 f &= ~R300_TX_MIN_FILTER_NEAREST;
1214 f |= R300_TX_MIN_FILTER_LINEAR;
1215 return f;
1216 }
1217
1218 /* Both are nearest */
1219 if (needs_fixing & 1) {
1220 f &= ~((7 - 1) << R300_TX_WRAP_S_SHIFT);
1221 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_S_SHIFT;
1222 }
1223 if (needs_fixing & 2) {
1224 f &= ~((7 - 1) << R300_TX_WRAP_T_SHIFT);
1225 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_T_SHIFT;
1226 }
1227 if (needs_fixing & 4) {
1228 f &= ~((7 - 1) << R300_TX_WRAP_R_SHIFT);
1229 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_R_SHIFT;
1230 }
1231 return f;
1232 }
1233
1234 static void r300SetupFragmentShaderTextures(GLcontext *ctx, int *tmu_mappings)
1235 {
1236 r300ContextPtr r300 = R300_CONTEXT(ctx);
1237 int i;
1238 struct r300_fragment_program *fp = (struct r300_fragment_program *)
1239 (char *)ctx->FragmentProgram._Current;
1240 struct r300_fragment_program_code *code = &fp->code;
1241
1242 R300_STATECHANGE(r300, fpt);
1243
1244 for (i = 0; i < code->tex.length; i++) {
1245 int unit;
1246 int opcode;
1247 unsigned long val;
1248
1249 unit = code->tex.inst[i] >> R300_TEX_ID_SHIFT;
1250 unit &= 15;
1251
1252 val = code->tex.inst[i];
1253 val &= ~R300_TEX_ID_MASK;
1254
1255 opcode =
1256 (val & R300_TEX_INST_MASK) >> R300_TEX_INST_SHIFT;
1257 if (opcode == R300_TEX_OP_KIL) {
1258 r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
1259 } else {
1260 if (tmu_mappings[unit] >= 0) {
1261 val |=
1262 tmu_mappings[unit] <<
1263 R300_TEX_ID_SHIFT;
1264 r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
1265 } else {
1266 // We get here when the corresponding texture image is incomplete
1267 // (e.g. incomplete mipmaps etc.)
1268 r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
1269 }
1270 }
1271 }
1272
1273 r300->hw.fpt.cmd[R300_FPT_CMD_0] =
1274 cmdpacket0(R300_US_TEX_INST_0, code->tex.length);
1275 }
1276
1277 static void r500SetupFragmentShaderTextures(GLcontext *ctx, int *tmu_mappings)
1278 {
1279 int i;
1280 struct r500_fragment_program *fp = (struct r500_fragment_program *)
1281 (char *)ctx->FragmentProgram._Current;
1282 struct r500_fragment_program_code *code = &fp->code;
1283
1284 /* find all the texture instructions and relocate the texture units */
1285 for (i = 0; i < code->inst_end + 1; i++) {
1286 if ((code->inst[i].inst0 & 0x3) == R500_INST_TYPE_TEX) {
1287 uint32_t val;
1288 int unit, opcode, new_unit;
1289
1290 val = code->inst[i].inst1;
1291
1292 unit = (val >> 16) & 0xf;
1293
1294 val &= ~(0xf << 16);
1295
1296 opcode = val & (0x7 << 22);
1297 if (opcode == R500_TEX_INST_TEXKILL) {
1298 new_unit = 0;
1299 } else {
1300 if (tmu_mappings[unit] >= 0) {
1301 new_unit = tmu_mappings[unit];
1302 } else {
1303 new_unit = 0;
1304 }
1305 }
1306 val |= R500_TEX_ID(new_unit);
1307 code->inst[i].inst1 = val;
1308 }
1309 }
1310 }
1311
1312 static GLuint translate_lod_bias(GLfloat bias)
1313 {
1314 GLint b = (int)(bias*32);
1315 if (b >= (1 << 9))
1316 b = (1 << 9)-1;
1317 else if (b < -(1 << 9))
1318 b = -(1 << 9);
1319 return (((GLuint)b) << R300_LOD_BIAS_SHIFT) & R300_LOD_BIAS_MASK;
1320 }
1321
1322 static void r300SetupTextures(GLcontext * ctx)
1323 {
1324 int i, mtu;
1325 struct r300_tex_obj *t;
1326 r300ContextPtr r300 = R300_CONTEXT(ctx);
1327 int hw_tmu = 0;
1328 int last_hw_tmu = -1; /* -1 translates into no setup costs for fields */
1329 int tmu_mappings[R300_MAX_TEXTURE_UNITS] = { -1, };
1330 struct r300_fragment_program *fp = (struct r300_fragment_program *)
1331 (char *)ctx->FragmentProgram._Current;
1332
1333 R300_STATECHANGE(r300, txe);
1334 R300_STATECHANGE(r300, tex.filter);
1335 R300_STATECHANGE(r300, tex.filter_1);
1336 R300_STATECHANGE(r300, tex.size);
1337 R300_STATECHANGE(r300, tex.format);
1338 R300_STATECHANGE(r300, tex.pitch);
1339 R300_STATECHANGE(r300, tex.offset);
1340 R300_STATECHANGE(r300, tex.chroma_key);
1341 R300_STATECHANGE(r300, tex.border_color);
1342
1343 r300->hw.txe.cmd[R300_TXE_ENABLE] = 0x0;
1344
1345 mtu = r300->radeon.glCtx->Const.MaxTextureUnits;
1346 if (RADEON_DEBUG & DEBUG_STATE)
1347 fprintf(stderr, "mtu=%d\n", mtu);
1348
1349 if (mtu > R300_MAX_TEXTURE_UNITS) {
1350 fprintf(stderr,
1351 "Aiiee ! mtu=%d is greater than R300_MAX_TEXTURE_UNITS=%d\n",
1352 mtu, R300_MAX_TEXTURE_UNITS);
1353 _mesa_exit(-1);
1354 }
1355
1356 /* We cannot let disabled tmu offsets pass DRM */
1357 for (i = 0; i < mtu; i++) {
1358 if (ctx->Texture.Unit[i]._ReallyEnabled) {
1359
1360 #if 0 /* Enables old behaviour */
1361 hw_tmu = i;
1362 #endif
1363 tmu_mappings[i] = hw_tmu;
1364
1365 t = (r300TexObjPtr) r300->state.texture.unit[i].texobj->DriverData;
1366 /* XXX questionable fix for bug 9170: */
1367 if (!t)
1368 continue;
1369
1370 if ((t->format & 0xffffff00) == 0xffffff00) {
1371 WARN_ONCE
1372 ("unknown texture format (entry %x) encountered. Help me !\n",
1373 t->format & 0xff);
1374 }
1375
1376 if (RADEON_DEBUG & DEBUG_STATE)
1377 fprintf(stderr,
1378 "Activating texture unit %d\n", i);
1379
1380 r300->hw.txe.cmd[R300_TXE_ENABLE] |= (1 << hw_tmu);
1381
1382 r300->hw.tex.filter.cmd[R300_TEX_VALUE_0 +
1383 hw_tmu] =
1384 gen_fixed_filter(t->filter) | (hw_tmu << 28);
1385 /* Note: There is a LOD bias per texture unit and a LOD bias
1386 * per texture object. We add them here to get the correct behaviour.
1387 * (The per-texture object LOD bias was introduced in OpenGL 1.4
1388 * and is not present in the EXT_texture_object extension).
1389 */
1390 r300->hw.tex.filter_1.cmd[R300_TEX_VALUE_0 + hw_tmu] =
1391 t->filter_1 |
1392 translate_lod_bias(ctx->Texture.Unit[i].LodBias + t->base.tObj->LodBias);
1393 r300->hw.tex.size.cmd[R300_TEX_VALUE_0 + hw_tmu] =
1394 t->size;
1395 r300->hw.tex.format.cmd[R300_TEX_VALUE_0 +
1396 hw_tmu] = t->format;
1397 r300->hw.tex.pitch.cmd[R300_TEX_VALUE_0 + hw_tmu] =
1398 t->pitch_reg;
1399 r300->hw.tex.offset.cmd[R300_TEX_VALUE_0 +
1400 hw_tmu] = t->offset;
1401
1402 if (t->offset & R300_TXO_MACRO_TILE) {
1403 WARN_ONCE("macro tiling enabled!\n");
1404 }
1405
1406 if (t->offset & R300_TXO_MICRO_TILE) {
1407 WARN_ONCE("micro tiling enabled!\n");
1408 }
1409
1410 r300->hw.tex.chroma_key.cmd[R300_TEX_VALUE_0 +
1411 hw_tmu] = 0x0;
1412 r300->hw.tex.border_color.cmd[R300_TEX_VALUE_0 +
1413 hw_tmu] =
1414 t->pp_border_color;
1415
1416 last_hw_tmu = hw_tmu;
1417
1418 hw_tmu++;
1419 }
1420 }
1421
1422 r300->hw.tex.filter.cmd[R300_TEX_CMD_0] =
1423 cmdpacket0(R300_TX_FILTER0_0, last_hw_tmu + 1);
1424 r300->hw.tex.filter_1.cmd[R300_TEX_CMD_0] =
1425 cmdpacket0(R300_TX_FILTER1_0, last_hw_tmu + 1);
1426 r300->hw.tex.size.cmd[R300_TEX_CMD_0] =
1427 cmdpacket0(R300_TX_SIZE_0, last_hw_tmu + 1);
1428 r300->hw.tex.format.cmd[R300_TEX_CMD_0] =
1429 cmdpacket0(R300_TX_FORMAT_0, last_hw_tmu + 1);
1430 r300->hw.tex.pitch.cmd[R300_TEX_CMD_0] =
1431 cmdpacket0(R300_TX_FORMAT2_0, last_hw_tmu + 1);
1432 r300->hw.tex.offset.cmd[R300_TEX_CMD_0] =
1433 cmdpacket0(R300_TX_OFFSET_0, last_hw_tmu + 1);
1434 r300->hw.tex.chroma_key.cmd[R300_TEX_CMD_0] =
1435 cmdpacket0(R300_TX_CHROMA_KEY_0, last_hw_tmu + 1);
1436 r300->hw.tex.border_color.cmd[R300_TEX_CMD_0] =
1437 cmdpacket0(R300_TX_BORDER_COLOR_0, last_hw_tmu + 1);
1438
1439 if (!fp) /* should only happenen once, just after context is created */
1440 return;
1441
1442 if (r300->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV515) {
1443 if (fp->mesa_program.UsesKill && last_hw_tmu < 0) {
1444 // The KILL operation requires the first texture unit
1445 // to be enabled.
1446 r300->hw.txe.cmd[R300_TXE_ENABLE] |= 1;
1447 r300->hw.tex.filter.cmd[R300_TEX_VALUE_0] = 0;
1448 r300->hw.tex.filter.cmd[R300_TEX_CMD_0] =
1449 cmdpacket0(R300_TX_FILTER0_0, 1);
1450 }
1451 r300SetupFragmentShaderTextures(ctx, tmu_mappings);
1452 } else
1453 r500SetupFragmentShaderTextures(ctx, tmu_mappings);
1454
1455 if (RADEON_DEBUG & DEBUG_STATE)
1456 fprintf(stderr, "TX_ENABLE: %08x last_hw_tmu=%d\n",
1457 r300->hw.txe.cmd[R300_TXE_ENABLE], last_hw_tmu);
1458 }
1459
1460 union r300_outputs_written {
1461 GLuint vp_outputs; /* hw_tcl_on */
1462 DECLARE_RENDERINPUTS(index_bitset); /* !hw_tcl_on */
1463 };
1464
1465 #define R300_OUTPUTS_WRITTEN_TEST(ow, vp_result, tnl_attrib) \
1466 ((hw_tcl_on) ? (ow).vp_outputs & (1 << (vp_result)) : \
1467 RENDERINPUTS_TEST( (ow.index_bitset), (tnl_attrib) ))
1468
1469 static void r300SetupRSUnit(GLcontext * ctx)
1470 {
1471 r300ContextPtr r300 = R300_CONTEXT(ctx);
1472 TNLcontext *tnl = TNL_CONTEXT(ctx);
1473 struct vertex_buffer *VB = &tnl->vb;
1474 union r300_outputs_written OutputsWritten;
1475 GLuint InputsRead;
1476 int fp_reg, high_rr;
1477 int col_ip, tex_ip;
1478 int rs_tex_count = 0;
1479 int i, count, col_fmt;
1480
1481 if (hw_tcl_on)
1482 OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten;
1483 else
1484 RENDERINPUTS_COPY(OutputsWritten.index_bitset, r300->state.render_inputs_bitset);
1485
1486 if (ctx->FragmentProgram._Current)
1487 InputsRead = ctx->FragmentProgram._Current->Base.InputsRead;
1488 else {
1489 fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
1490 return; /* This should only ever happen once.. */
1491 }
1492
1493 R300_STATECHANGE(r300, ri);
1494 R300_STATECHANGE(r300, rc);
1495 R300_STATECHANGE(r300, rr);
1496
1497 fp_reg = col_ip = tex_ip = col_fmt = 0;
1498
1499 r300->hw.rc.cmd[1] = 0;
1500 r300->hw.rc.cmd[2] = 0;
1501 for (i=0; i<R300_RR_CMDSIZE-1; ++i)
1502 r300->hw.rr.cmd[R300_RR_INST_0 + i] = 0;
1503
1504 for (i=0; i<R300_RI_CMDSIZE-1; ++i)
1505 r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0;
1506
1507
1508 if (InputsRead & FRAG_BIT_COL0) {
1509 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
1510 count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
1511 if (count == 4)
1512 col_fmt = R300_RS_COL_FMT_RGBA;
1513 else if (count == 3)
1514 col_fmt = R300_RS_COL_FMT_RGB1;
1515 else
1516 col_fmt = R300_RS_COL_FMT_0001;
1517
1518 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R300_RS_COL_PTR(col_ip) | R300_RS_COL_FMT(col_fmt);
1519 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R300_RS_INST_COL_ID(col_ip) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_reg);
1520 InputsRead &= ~FRAG_BIT_COL0;
1521 ++col_ip;
1522 ++fp_reg;
1523 } else {
1524 WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
1525 }
1526 }
1527
1528 if (InputsRead & FRAG_BIT_COL1) {
1529 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
1530 count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size;
1531 if (count == 4)
1532 col_fmt = R300_RS_COL_FMT_RGBA;
1533 else if (count == 3)
1534 col_fmt = R300_RS_COL_FMT_RGB1;
1535 else
1536 col_fmt = R300_RS_COL_FMT_0001;
1537
1538 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R300_RS_COL_PTR(col_ip) | R300_RS_COL_FMT(col_fmt);
1539 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R300_RS_INST_COL_ID(col_ip) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_reg);
1540 InputsRead &= ~FRAG_BIT_COL1;
1541 ++col_ip;
1542 ++fp_reg;
1543 } else {
1544 WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
1545 }
1546 }
1547
1548 for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
1549 if (! ( InputsRead & FRAG_BIT_TEX(i) ) )
1550 continue;
1551
1552 if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
1553 WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
1554 continue;
1555 }
1556
1557 int swiz;
1558
1559 /* with TCL we always seem to route 4 components */
1560 if (hw_tcl_on)
1561 count = 4;
1562 else
1563 count = VB->AttribPtr[_TNL_ATTRIB_TEX(i)]->size;
1564
1565 switch(count) {
1566 case 4: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3); break;
1567 case 3: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(R300_RS_SEL_K1); break;
1568 default:
1569 case 1:
1570 case 2: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(R300_RS_SEL_K0) | R300_RS_SEL_Q(R300_RS_SEL_K1); break;
1571 };
1572
1573 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= swiz | R300_RS_TEX_PTR(rs_tex_count);
1574 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
1575 InputsRead &= ~(FRAG_BIT_TEX0 << i);
1576 rs_tex_count += count;
1577 ++tex_ip;
1578 ++fp_reg;
1579 }
1580
1581 if (InputsRead & FRAG_BIT_FOGC) {
1582 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_FOGC, _TNL_ATTRIB_FOG)) {
1583 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count);
1584 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
1585 InputsRead &= ~FRAG_BIT_FOGC;
1586 rs_tex_count += 4;
1587 ++tex_ip;
1588 ++fp_reg;
1589 } else {
1590 WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n");
1591 }
1592 }
1593
1594 if (InputsRead & FRAG_BIT_WPOS) {
1595 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count);
1596 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
1597 InputsRead &= ~FRAG_BIT_WPOS;
1598 rs_tex_count += 4;
1599 ++tex_ip;
1600 ++fp_reg;
1601 }
1602 InputsRead &= ~FRAG_BIT_WPOS;
1603
1604 /* Setup default color if no color or tex was set */
1605 if (rs_tex_count == 0 && col_ip == 0) {
1606 r300->hw.rr.cmd[R300_RR_INST_0] = R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(0) | R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
1607 ++col_ip;
1608 }
1609
1610 high_rr = (col_ip > tex_ip) ? col_ip : tex_ip;
1611 r300->hw.rc.cmd[1] |= (rs_tex_count << R300_IT_COUNT_SHIFT) | (col_ip << R300_IC_COUNT_SHIFT) | R300_HIRES_EN;
1612 r300->hw.rc.cmd[2] |= high_rr - 1;
1613
1614 r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_INST_0, high_rr);
1615
1616 if (InputsRead)
1617 WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead);
1618 }
1619
1620 static void r500SetupRSUnit(GLcontext * ctx)
1621 {
1622 r300ContextPtr r300 = R300_CONTEXT(ctx);
1623 TNLcontext *tnl = TNL_CONTEXT(ctx);
1624 struct vertex_buffer *VB = &tnl->vb;
1625 union r300_outputs_written OutputsWritten;
1626 GLuint InputsRead;
1627 int fp_reg, high_rr;
1628 int col_ip, tex_ip;
1629 int rs_tex_count = 0;
1630 int i, count, col_fmt;
1631
1632 if (hw_tcl_on)
1633 OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten;
1634 else
1635 RENDERINPUTS_COPY(OutputsWritten.index_bitset, r300->state.render_inputs_bitset);
1636
1637 if (ctx->FragmentProgram._Current)
1638 InputsRead = ctx->FragmentProgram._Current->Base.InputsRead;
1639 else {
1640 fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
1641 return; /* This should only ever happen once.. */
1642 }
1643
1644 R300_STATECHANGE(r300, ri);
1645 R300_STATECHANGE(r300, rc);
1646 R300_STATECHANGE(r300, rr);
1647
1648 fp_reg = col_ip = tex_ip = col_fmt = 0;
1649
1650 r300->hw.rc.cmd[1] = 0;
1651 r300->hw.rc.cmd[2] = 0;
1652 for (i=0; i<R300_RR_CMDSIZE-1; ++i)
1653 r300->hw.rr.cmd[R300_RR_INST_0 + i] = 0;
1654
1655 for (i=0; i<R500_RI_CMDSIZE-1; ++i)
1656 r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0;
1657
1658
1659 if (InputsRead & FRAG_BIT_COL0) {
1660 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
1661 count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
1662 if (count == 4)
1663 col_fmt = R300_RS_COL_FMT_RGBA;
1664 else if (count == 3)
1665 col_fmt = R300_RS_COL_FMT_RGB1;
1666 else
1667 col_fmt = R300_RS_COL_FMT_0001;
1668
1669 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R500_RS_COL_PTR(col_ip) | R500_RS_COL_FMT(col_fmt);
1670 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R500_RS_INST_COL_ID(col_ip) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_reg);
1671 InputsRead &= ~FRAG_BIT_COL0;
1672 ++col_ip;
1673 ++fp_reg;
1674 } else {
1675 WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
1676 }
1677 }
1678
1679 if (InputsRead & FRAG_BIT_COL1) {
1680 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
1681 count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size;
1682 if (count == 4)
1683 col_fmt = R300_RS_COL_FMT_RGBA;
1684 else if (count == 3)
1685 col_fmt = R300_RS_COL_FMT_RGB1;
1686 else
1687 col_fmt = R300_RS_COL_FMT_0001;
1688
1689 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R500_RS_COL_PTR(col_ip) | R500_RS_COL_FMT(col_fmt);
1690 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R500_RS_INST_COL_ID(col_ip) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_reg);
1691 InputsRead &= ~FRAG_BIT_COL1;
1692 ++col_ip;
1693 ++fp_reg;
1694 } else {
1695 WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
1696 }
1697 }
1698
1699
1700 for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
1701 if (! ( InputsRead & FRAG_BIT_TEX(i) ) )
1702 continue;
1703
1704 if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
1705 WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
1706 continue;
1707 }
1708
1709 int swiz = 0;
1710
1711 /* with TCL we always seem to route 4 components */
1712 if (hw_tcl_on)
1713 count = 4;
1714 else
1715 count = VB->AttribPtr[_TNL_ATTRIB_TEX(i)]->size;
1716
1717 if (count == 4) {
1718 swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
1719 swiz |= (rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT;
1720 swiz |= (rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT;
1721 swiz |= (rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT;
1722 } else if (count == 3) {
1723 swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
1724 swiz |= (rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT;
1725 swiz |= (rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT;
1726 swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
1727 } else if (count == 2) {
1728 swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
1729 swiz |= (rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT;
1730 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT;
1731 swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
1732 } else if (count == 1) {
1733 swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
1734 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT;
1735 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT;
1736 swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
1737 } else {
1738 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT;
1739 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT;
1740 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT;
1741 swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
1742 }
1743
1744 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= swiz;
1745 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
1746 InputsRead &= ~(FRAG_BIT_TEX0 << i);
1747 rs_tex_count += count;
1748 ++tex_ip;
1749 ++fp_reg;
1750 }
1751
1752 if (InputsRead & FRAG_BIT_FOGC) {
1753 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_FOGC, _TNL_ATTRIB_FOG)) {
1754 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) |
1755 ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) |
1756 ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) |
1757 ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT);
1758
1759 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
1760 InputsRead &= ~FRAG_BIT_FOGC;
1761 rs_tex_count += 4;
1762 ++tex_ip;
1763 ++fp_reg;
1764 } else {
1765 WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n");
1766 }
1767 }
1768
1769 if (InputsRead & FRAG_BIT_WPOS) {
1770 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) |
1771 ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) |
1772 ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) |
1773 ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT);
1774
1775 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
1776 InputsRead &= ~FRAG_BIT_WPOS;
1777 rs_tex_count += 4;
1778 ++tex_ip;
1779 ++fp_reg;
1780 }
1781
1782 /* Setup default color if no color or tex was set */
1783 if (rs_tex_count == 0 && col_ip == 0) {
1784 r300->hw.rr.cmd[R300_RR_INST_0] |= R500_RS_INST_COL_ID(0) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(0) | R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
1785 ++col_ip;
1786 }
1787
1788 high_rr = (col_ip > tex_ip) ? col_ip : tex_ip;
1789 r300->hw.rc.cmd[1] |= (rs_tex_count << R300_IT_COUNT_SHIFT) | (col_ip << R300_IC_COUNT_SHIFT) | R300_HIRES_EN;
1790 r300->hw.rc.cmd[2] |= 0xC0 | (high_rr - 1);
1791
1792 r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R500_RS_INST_0, high_rr);
1793
1794 if (InputsRead)
1795 WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead);
1796 }
1797
1798
1799
1800
1801 #define bump_vpu_count(ptr, new_count) do{\
1802 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
1803 int _nc=(new_count)/4; \
1804 assert(_nc < 256); \
1805 if(_nc>_p->vpu.count)_p->vpu.count=_nc;\
1806 }while(0)
1807
1808 static INLINE void r300SetupVertexProgramFragment(r300ContextPtr r300, int dest, struct r300_vertex_shader_fragment *vsf)
1809 {
1810 int i;
1811
1812 if (vsf->length == 0)
1813 return;
1814
1815 if (vsf->length & 0x3) {
1816 fprintf(stderr, "VERTEX_SHADER_FRAGMENT must have length divisible by 4\n");
1817 _mesa_exit(-1);
1818 }
1819
1820 switch ((dest >> 8) & 0xf) {
1821 case 0:
1822 R300_STATECHANGE(r300, vpi);
1823 for (i = 0; i < vsf->length; i++)
1824 r300->hw.vpi.cmd[R300_VPI_INSTR_0 + i + 4 * (dest & 0xff)] = (vsf->body.d[i]);
1825 bump_vpu_count(r300->hw.vpi.cmd, vsf->length + 4 * (dest & 0xff));
1826 break;
1827
1828 case 2:
1829 R300_STATECHANGE(r300, vpp);
1830 for (i = 0; i < vsf->length; i++)
1831 r300->hw.vpp.cmd[R300_VPP_PARAM_0 + i + 4 * (dest & 0xff)] = (vsf->body.d[i]);
1832 bump_vpu_count(r300->hw.vpp.cmd, vsf->length + 4 * (dest & 0xff));
1833 break;
1834 case 4:
1835 R300_STATECHANGE(r300, vps);
1836 for (i = 0; i < vsf->length; i++)
1837 r300->hw.vps.cmd[1 + i + 4 * (dest & 0xff)] = (vsf->body.d[i]);
1838 bump_vpu_count(r300->hw.vps.cmd, vsf->length + 4 * (dest & 0xff));
1839 break;
1840 default:
1841 fprintf(stderr, "%s:%s don't know how to handle dest %04x\n", __FILE__, __FUNCTION__, dest);
1842 _mesa_exit(-1);
1843 }
1844 }
1845
1846 #define MIN3(a, b, c) ((a) < (b) ? MIN2(a, c) : MIN2(b, c))
1847
1848
1849 static void r300VapCntl(r300ContextPtr rmesa, GLuint input_count,
1850 GLuint output_count, GLuint temp_count)
1851 {
1852 int vtx_mem_size;
1853 int pvs_num_slots;
1854 int pvs_num_cntrls;
1855
1856 /* Flush PVS engine before changing PVS_NUM_SLOTS, PVS_NUM_CNTRLS.
1857 * See r500 docs 6.5.2 - done in emit */
1858
1859 /* avoid division by zero */
1860 if (input_count == 0) input_count = 1;
1861 if (output_count == 0) output_count = 1;
1862 if (temp_count == 0) temp_count = 1;
1863
1864 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
1865 vtx_mem_size = 128;
1866 else
1867 vtx_mem_size = 72;
1868
1869 pvs_num_slots = MIN3(10, vtx_mem_size/input_count, vtx_mem_size/output_count);
1870 pvs_num_cntrls = MIN2(6, vtx_mem_size/temp_count);
1871
1872 R300_STATECHANGE(rmesa, vap_cntl);
1873 if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
1874 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] =
1875 (pvs_num_slots << R300_PVS_NUM_SLOTS_SHIFT) |
1876 (pvs_num_cntrls << R300_PVS_NUM_CNTLRS_SHIFT) |
1877 (12 << R300_VF_MAX_VTX_NUM_SHIFT);
1878 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
1879 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= R500_TCL_STATE_OPTIMIZATION;
1880 } else
1881 /* not sure about non-tcl */
1882 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] = ((10 << R300_PVS_NUM_SLOTS_SHIFT) |
1883 (5 << R300_PVS_NUM_CNTLRS_SHIFT) |
1884 (5 << R300_VF_MAX_VTX_NUM_SHIFT));
1885
1886 if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV515)
1887 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (2 << R300_PVS_NUM_FPUS_SHIFT);
1888 else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV530) ||
1889 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV560) ||
1890 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV570))
1891 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (5 << R300_PVS_NUM_FPUS_SHIFT);
1892 else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV410) ||
1893 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R420))
1894 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (6 << R300_PVS_NUM_FPUS_SHIFT);
1895 else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R520) ||
1896 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R580))
1897 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (8 << R300_PVS_NUM_FPUS_SHIFT);
1898 else
1899 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (4 << R300_PVS_NUM_FPUS_SHIFT);
1900
1901 }
1902
1903 static void r300SetupDefaultVertexProgram(r300ContextPtr rmesa)
1904 {
1905 struct r300_vertex_shader_state *prog = &(rmesa->state.vertex_shader);
1906 GLuint o_reg = 0;
1907 GLuint i_reg = 0;
1908 int i;
1909 int inst_count = 0;
1910 int param_count = 0;
1911 int program_end = 0;
1912
1913 for (i = VERT_ATTRIB_POS; i < VERT_ATTRIB_MAX; i++) {
1914 if (rmesa->state.sw_tcl_inputs[i] != -1) {
1915 prog->program.body.i[program_end + 0] = PVS_OP_DST_OPERAND(VE_MULTIPLY, GL_FALSE, GL_FALSE, o_reg++, VSF_FLAG_ALL, PVS_DST_REG_OUT);
1916 prog->program.body.i[program_end + 1] = PVS_SRC_OPERAND(rmesa->state.sw_tcl_inputs[i], PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y, PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W, PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
1917 prog->program.body.i[program_end + 2] = PVS_SRC_OPERAND(rmesa->state.sw_tcl_inputs[i], PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
1918 prog->program.body.i[program_end + 3] = PVS_SRC_OPERAND(rmesa->state.sw_tcl_inputs[i], PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
1919 program_end += 4;
1920 i_reg++;
1921 }
1922 }
1923
1924 prog->program.length = program_end;
1925
1926 r300SetupVertexProgramFragment(rmesa, R300_PVS_CODE_START,
1927 &(prog->program));
1928 inst_count = (prog->program.length / 4) - 1;
1929
1930 r300VapCntl(rmesa, i_reg, o_reg, 0);
1931
1932 R300_STATECHANGE(rmesa, pvs);
1933 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1] =
1934 (0 << R300_PVS_FIRST_INST_SHIFT) |
1935 (inst_count << R300_PVS_XYZW_VALID_INST_SHIFT) |
1936 (inst_count << R300_PVS_LAST_INST_SHIFT);
1937 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] =
1938 (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) |
1939 (param_count << R300_PVS_MAX_CONST_ADDR_SHIFT);
1940 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3] =
1941 (inst_count << R300_PVS_LAST_VTX_SRC_INST_SHIFT);
1942 }
1943
1944 static int bit_count (int x)
1945 {
1946 x = ((x & 0xaaaaaaaaU) >> 1) + (x & 0x55555555U);
1947 x = ((x & 0xccccccccU) >> 2) + (x & 0x33333333U);
1948 x = (x >> 16) + (x & 0xffff);
1949 x = ((x & 0xf0f0) >> 4) + (x & 0x0f0f);
1950 return (x >> 8) + (x & 0x00ff);
1951 }
1952
1953 static void r300SetupRealVertexProgram(r300ContextPtr rmesa)
1954 {
1955 GLcontext *ctx = rmesa->radeon.glCtx;
1956 struct r300_vertex_program *prog = (struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx);
1957 int inst_count = 0;
1958 int param_count = 0;
1959
1960 /* FIXME: r300SetupVertexProgramFragment */
1961 R300_STATECHANGE(rmesa, vpp);
1962 param_count =
1963 r300VertexProgUpdateParams(ctx,
1964 (struct r300_vertex_program_cont *)
1965 ctx->VertexProgram._Current,
1966 (float *)&rmesa->hw.vpp.
1967 cmd[R300_VPP_PARAM_0]);
1968 bump_vpu_count(rmesa->hw.vpp.cmd, param_count);
1969 param_count /= 4;
1970
1971 r300SetupVertexProgramFragment(rmesa, R300_PVS_CODE_START, &(prog->program));
1972 inst_count = (prog->program.length / 4) - 1;
1973
1974 r300VapCntl(rmesa, bit_count(prog->key.InputsRead),
1975 bit_count(prog->key.OutputsWritten), prog->num_temporaries);
1976
1977 R300_STATECHANGE(rmesa, pvs);
1978 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1] =
1979 (0 << R300_PVS_FIRST_INST_SHIFT) |
1980 (inst_count << R300_PVS_XYZW_VALID_INST_SHIFT) |
1981 (inst_count << R300_PVS_LAST_INST_SHIFT);
1982 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] =
1983 (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) |
1984 (param_count << R300_PVS_MAX_CONST_ADDR_SHIFT);
1985 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3] =
1986 (inst_count << R300_PVS_LAST_VTX_SRC_INST_SHIFT);
1987 }
1988
1989 static void r300SetupVertexProgram(r300ContextPtr rmesa)
1990 {
1991 GLcontext *ctx = rmesa->radeon.glCtx;
1992
1993 /* Reset state, in case we don't use something */
1994 ((drm_r300_cmd_header_t *) rmesa->hw.vpp.cmd)->vpu.count = 0;
1995 ((drm_r300_cmd_header_t *) rmesa->hw.vpi.cmd)->vpu.count = 0;
1996 ((drm_r300_cmd_header_t *) rmesa->hw.vps.cmd)->vpu.count = 0;
1997
1998 /* Not sure why this doesnt work...
1999 0x400 area might have something to do with pixel shaders as it appears right after pfs programming.
2000 0x406 is set to { 0.0, 0.0, 1.0, 0.0 } most of the time but should change with smooth points and in other rare cases. */
2001 //setup_vertex_shader_fragment(rmesa, 0x406, &unk4);
2002 if (hw_tcl_on && ((struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx))->translated) {
2003 r300SetupRealVertexProgram(rmesa);
2004 } else {
2005 /* FIXME: This needs to be replaced by vertex shader generation code. */
2006 r300SetupDefaultVertexProgram(rmesa);
2007 }
2008
2009 }
2010
2011 /**
2012 * Enable/Disable states.
2013 *
2014 * \note Mesa already filters redundant calls to this function.
2015 */
2016 static void r300Enable(GLcontext * ctx, GLenum cap, GLboolean state)
2017 {
2018 if (RADEON_DEBUG & DEBUG_STATE)
2019 fprintf(stderr, "%s( %s = %s )\n", __FUNCTION__,
2020 _mesa_lookup_enum_by_nr(cap),
2021 state ? "GL_TRUE" : "GL_FALSE");
2022
2023 switch (cap) {
2024 case GL_TEXTURE_1D:
2025 case GL_TEXTURE_2D:
2026 case GL_TEXTURE_3D:
2027 /* empty */
2028 break;
2029 case GL_FOG:
2030 /* empty */
2031 break;
2032 case GL_ALPHA_TEST:
2033 r300SetAlphaState(ctx);
2034 break;
2035 case GL_COLOR_LOGIC_OP:
2036 r300SetLogicOpState(ctx);
2037 /* fall-through, because logic op overrides blending */
2038 case GL_BLEND:
2039 r300SetBlendState(ctx);
2040 break;
2041 case GL_CLIP_PLANE0:
2042 case GL_CLIP_PLANE1:
2043 case GL_CLIP_PLANE2:
2044 case GL_CLIP_PLANE3:
2045 case GL_CLIP_PLANE4:
2046 case GL_CLIP_PLANE5:
2047 r300SetClipPlaneState(ctx, cap, state);
2048 break;
2049 case GL_DEPTH_TEST:
2050 r300SetDepthState(ctx);
2051 break;
2052 case GL_STENCIL_TEST:
2053 r300SetStencilState(ctx, state);
2054 break;
2055 case GL_CULL_FACE:
2056 r300UpdateCulling(ctx);
2057 break;
2058 case GL_POLYGON_OFFSET_POINT:
2059 case GL_POLYGON_OFFSET_LINE:
2060 case GL_POLYGON_OFFSET_FILL:
2061 r300SetPolygonOffsetState(ctx, state);
2062 break;
2063 default:
2064 radeonEnable(ctx, cap, state);
2065 break;
2066 }
2067 }
2068
2069 /**
2070 * Completely recalculates hardware state based on the Mesa state.
2071 */
2072 static void r300ResetHwState(r300ContextPtr r300)
2073 {
2074 GLcontext *ctx = r300->radeon.glCtx;
2075 int has_tcl = 1;
2076
2077 if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
2078 has_tcl = 0;
2079
2080 if (RADEON_DEBUG & DEBUG_STATE)
2081 fprintf(stderr, "%s\n", __FUNCTION__);
2082
2083 r300UpdateWindow(ctx);
2084
2085 r300ColorMask(ctx,
2086 ctx->Color.ColorMask[RCOMP],
2087 ctx->Color.ColorMask[GCOMP],
2088 ctx->Color.ColorMask[BCOMP], ctx->Color.ColorMask[ACOMP]);
2089
2090 r300Enable(ctx, GL_DEPTH_TEST, ctx->Depth.Test);
2091 r300DepthMask(ctx, ctx->Depth.Mask);
2092 r300DepthFunc(ctx, ctx->Depth.Func);
2093
2094 /* stencil */
2095 r300Enable(ctx, GL_STENCIL_TEST, ctx->Stencil._Enabled);
2096 r300StencilMaskSeparate(ctx, 0, ctx->Stencil.WriteMask[0]);
2097 r300StencilFuncSeparate(ctx, 0, ctx->Stencil.Function[0],
2098 ctx->Stencil.Ref[0], ctx->Stencil.ValueMask[0]);
2099 r300StencilOpSeparate(ctx, 0, ctx->Stencil.FailFunc[0],
2100 ctx->Stencil.ZFailFunc[0],
2101 ctx->Stencil.ZPassFunc[0]);
2102
2103 r300UpdateCulling(ctx);
2104
2105 r300UpdateTextureState(ctx);
2106
2107 r300SetBlendState(ctx);
2108 r300SetLogicOpState(ctx);
2109
2110 r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef);
2111 r300Enable(ctx, GL_ALPHA_TEST, ctx->Color.AlphaEnabled);
2112
2113 r300->hw.vte.cmd[1] = R300_VPORT_X_SCALE_ENA
2114 | R300_VPORT_X_OFFSET_ENA
2115 | R300_VPORT_Y_SCALE_ENA
2116 | R300_VPORT_Y_OFFSET_ENA
2117 | R300_VPORT_Z_SCALE_ENA
2118 | R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT;
2119 r300->hw.vte.cmd[2] = 0x00000008;
2120
2121 r300->hw.vap_vf_max_vtx_indx.cmd[1] = 0x00FFFFFF;
2122 r300->hw.vap_vf_max_vtx_indx.cmd[2] = 0x00000000;
2123
2124 #ifdef MESA_LITTLE_ENDIAN
2125 r300->hw.vap_cntl_status.cmd[1] = R300_VC_NO_SWAP;
2126 #else
2127 r300->hw.vap_cntl_status.cmd[1] = R300_VC_32BIT_SWAP;
2128 #endif
2129
2130 /* disable VAP/TCL on non-TCL capable chips */
2131 if (!has_tcl)
2132 r300->hw.vap_cntl_status.cmd[1] |= R300_VAP_TCL_BYPASS;
2133
2134 r300->hw.vap_psc_sgn_norm_cntl.cmd[1] = 0xAAAAAAAA;
2135
2136 /* XXX: Other families? */
2137 if (has_tcl) {
2138 r300->hw.vap_clip_cntl.cmd[1] = R300_PS_UCP_MODE_DIST_COP;
2139
2140 r300->hw.vap_clip.cmd[1] = r300PackFloat32(1.0); /* X */
2141 r300->hw.vap_clip.cmd[2] = r300PackFloat32(1.0); /* X */
2142 r300->hw.vap_clip.cmd[3] = r300PackFloat32(1.0); /* Y */
2143 r300->hw.vap_clip.cmd[4] = r300PackFloat32(1.0); /* Y */
2144
2145 switch (r300->radeon.radeonScreen->chip_family) {
2146 case CHIP_FAMILY_R300:
2147 r300->hw.vap_pvs_vtx_timeout_reg.cmd[1] = R300_2288_R300;
2148 break;
2149 default:
2150 r300->hw.vap_pvs_vtx_timeout_reg.cmd[1] = R300_2288_RV350;
2151 break;
2152 }
2153 }
2154
2155 r300->hw.gb_enable.cmd[1] = R300_GB_POINT_STUFF_ENABLE
2156 | R300_GB_LINE_STUFF_ENABLE
2157 | R300_GB_TRIANGLE_STUFF_ENABLE;
2158
2159 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_0] = 0x66666666;
2160 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_1] = 0x06666666;
2161
2162 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] =
2163 R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16 /*| R300_GB_SUBPIXEL_1_16*/;
2164 switch (r300->radeon.radeonScreen->num_gb_pipes) {
2165 case 1:
2166 default:
2167 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2168 R300_GB_TILE_PIPE_COUNT_RV300;
2169 break;
2170 case 2:
2171 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2172 R300_GB_TILE_PIPE_COUNT_R300;
2173 break;
2174 case 3:
2175 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2176 R300_GB_TILE_PIPE_COUNT_R420_3P;
2177 break;
2178 case 4:
2179 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2180 R300_GB_TILE_PIPE_COUNT_R420;
2181 break;
2182 }
2183
2184 /* XXX: Enable anti-aliasing? */
2185 r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = GB_AA_CONFIG_AA_DISABLE;
2186 r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = 0;
2187
2188 r300->hw.ga_point_s0.cmd[1] = r300PackFloat32(0.0);
2189 r300->hw.ga_point_s0.cmd[2] = r300PackFloat32(0.0);
2190 r300->hw.ga_point_s0.cmd[3] = r300PackFloat32(1.0);
2191 r300->hw.ga_point_s0.cmd[4] = r300PackFloat32(1.0);
2192
2193 r300->hw.ga_triangle_stipple.cmd[1] = 0x00050005;
2194
2195 r300PointSize(ctx, 1.0);
2196
2197 r300->hw.ga_point_minmax.cmd[1] = 0x18000006;
2198 r300->hw.ga_point_minmax.cmd[2] = 0x00020006;
2199 r300->hw.ga_point_minmax.cmd[3] = r300PackFloat32(1.0 / 192.0);
2200
2201 r300LineWidth(ctx, 1.0);
2202
2203 r300->hw.ga_line_stipple.cmd[1] = 0;
2204 r300->hw.ga_line_stipple.cmd[2] = r300PackFloat32(0.0);
2205 r300->hw.ga_line_stipple.cmd[3] = r300PackFloat32(1.0);
2206
2207 r300ShadeModel(ctx, ctx->Light.ShadeModel);
2208
2209 r300PolygonMode(ctx, GL_FRONT, ctx->Polygon.FrontMode);
2210 r300PolygonMode(ctx, GL_BACK, ctx->Polygon.BackMode);
2211 r300->hw.zbias_cntl.cmd[1] = 0x00000000;
2212
2213 r300PolygonOffset(ctx, ctx->Polygon.OffsetFactor,
2214 ctx->Polygon.OffsetUnits);
2215 r300Enable(ctx, GL_POLYGON_OFFSET_POINT, ctx->Polygon.OffsetPoint);
2216 r300Enable(ctx, GL_POLYGON_OFFSET_LINE, ctx->Polygon.OffsetLine);
2217 r300Enable(ctx, GL_POLYGON_OFFSET_FILL, ctx->Polygon.OffsetFill);
2218
2219 r300->hw.su_depth_scale.cmd[1] = 0x4B7FFFFF;
2220 r300->hw.su_depth_scale.cmd[2] = 0x00000000;
2221
2222 r300->hw.sc_hyperz.cmd[1] = 0x0000001C;
2223 r300->hw.sc_hyperz.cmd[2] = 0x2DA49525;
2224
2225 r300->hw.sc_screendoor.cmd[1] = 0x00FFFFFF;
2226
2227 r300->hw.us_out_fmt.cmd[1] = R500_OUT_FMT_C4_8 |
2228 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2229 r300->hw.us_out_fmt.cmd[2] = R500_OUT_FMT_UNUSED |
2230 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2231 r300->hw.us_out_fmt.cmd[3] = R500_OUT_FMT_UNUSED |
2232 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2233 r300->hw.us_out_fmt.cmd[4] = R500_OUT_FMT_UNUSED |
2234 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2235 r300->hw.us_out_fmt.cmd[5] = R300_W_FMT_W0 | R300_W_SRC_US;
2236
2237 /* disable fog unit */
2238 r300->hw.fogs.cmd[R300_FOGS_STATE] = 0;
2239 r300->hw.fg_depth_src.cmd[1] = R300_FG_DEPTH_SRC_SCAN;
2240
2241 r300->hw.rb3d_cctl.cmd[1] = 0;
2242
2243 r300BlendColor(ctx, ctx->Color.BlendColor);
2244
2245 /* Again, r300ClearBuffer uses this */
2246 r300->hw.cb.cmd[R300_CB_OFFSET] =
2247 r300->radeon.state.color.drawOffset +
2248 r300->radeon.radeonScreen->fbLocation;
2249 r300->hw.cb.cmd[R300_CB_PITCH] = r300->radeon.state.color.drawPitch;
2250
2251 if (r300->radeon.radeonScreen->cpp == 4)
2252 r300->hw.cb.cmd[R300_CB_PITCH] |= R300_COLOR_FORMAT_ARGB8888;
2253 else
2254 r300->hw.cb.cmd[R300_CB_PITCH] |= R300_COLOR_FORMAT_RGB565;
2255
2256 if (r300->radeon.sarea->tiling_enabled)
2257 r300->hw.cb.cmd[R300_CB_PITCH] |= R300_COLOR_TILE_ENABLE;
2258
2259 r300->hw.rb3d_dither_ctl.cmd[1] = 0;
2260 r300->hw.rb3d_dither_ctl.cmd[2] = 0;
2261 r300->hw.rb3d_dither_ctl.cmd[3] = 0;
2262 r300->hw.rb3d_dither_ctl.cmd[4] = 0;
2263 r300->hw.rb3d_dither_ctl.cmd[5] = 0;
2264 r300->hw.rb3d_dither_ctl.cmd[6] = 0;
2265 r300->hw.rb3d_dither_ctl.cmd[7] = 0;
2266 r300->hw.rb3d_dither_ctl.cmd[8] = 0;
2267 r300->hw.rb3d_dither_ctl.cmd[9] = 0;
2268
2269 r300->hw.rb3d_aaresolve_ctl.cmd[1] = 0;
2270
2271 r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[1] = 0x00000000;
2272 r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[2] = 0xffffffff;
2273
2274 r300->hw.zb.cmd[R300_ZB_OFFSET] =
2275 r300->radeon.radeonScreen->depthOffset +
2276 r300->radeon.radeonScreen->fbLocation;
2277 r300->hw.zb.cmd[R300_ZB_PITCH] = r300->radeon.radeonScreen->depthPitch;
2278
2279 if (r300->radeon.sarea->tiling_enabled) {
2280 /* XXX: Turn off when clearing buffers ? */
2281 r300->hw.zb.cmd[R300_ZB_PITCH] |= R300_DEPTHMACROTILE_ENABLE;
2282
2283 if (ctx->Visual.depthBits == 24)
2284 r300->hw.zb.cmd[R300_ZB_PITCH] |=
2285 R300_DEPTHMICROTILE_TILED;
2286 }
2287
2288 r300->hw.zb_depthclearvalue.cmd[1] = 0;
2289
2290 switch (ctx->Visual.depthBits) {
2291 case 16:
2292 r300->hw.zstencil_format.cmd[1] = R300_DEPTHFORMAT_16BIT_INT_Z;
2293 break;
2294 case 24:
2295 r300->hw.zstencil_format.cmd[1] = R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL;
2296 break;
2297 default:
2298 fprintf(stderr, "Error: Unsupported depth %d... exiting\n", ctx->Visual.depthBits);
2299 _mesa_exit(-1);
2300 }
2301
2302 r300->hw.zstencil_format.cmd[2] = R300_ZTOP_DISABLE;
2303 r300->hw.zstencil_format.cmd[3] = 0x00000003;
2304 r300->hw.zstencil_format.cmd[4] = 0x00000000;
2305 r300SetEarlyZState(ctx);
2306
2307 r300->hw.unk4F30.cmd[1] = 0;
2308 r300->hw.unk4F30.cmd[2] = 0;
2309
2310 r300->hw.zb_hiz_offset.cmd[1] = 0;
2311
2312 r300->hw.zb_hiz_pitch.cmd[1] = 0;
2313
2314 r300VapCntl(r300, 0, 0, 0);
2315 if (has_tcl) {
2316 r300->hw.vps.cmd[R300_VPS_ZERO_0] = 0;
2317 r300->hw.vps.cmd[R300_VPS_ZERO_1] = 0;
2318 r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
2319 r300->hw.vps.cmd[R300_VPS_ZERO_3] = 0;
2320 }
2321
2322 r300->hw.all_dirty = GL_TRUE;
2323 }
2324
2325 void r300UpdateShaders(r300ContextPtr rmesa)
2326 {
2327 GLcontext *ctx;
2328 struct r300_vertex_program *vp;
2329 int i;
2330
2331 ctx = rmesa->radeon.glCtx;
2332
2333 if (rmesa->NewGLState && hw_tcl_on) {
2334 rmesa->NewGLState = 0;
2335
2336 for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) {
2337 rmesa->temp_attrib[i] =
2338 TNL_CONTEXT(ctx)->vb.AttribPtr[i];
2339 TNL_CONTEXT(ctx)->vb.AttribPtr[i] =
2340 &rmesa->dummy_attrib[i];
2341 }
2342
2343 _tnl_UpdateFixedFunctionProgram(ctx);
2344
2345 for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) {
2346 TNL_CONTEXT(ctx)->vb.AttribPtr[i] =
2347 rmesa->temp_attrib[i];
2348 }
2349
2350 r300SelectVertexShader(rmesa);
2351 vp = (struct r300_vertex_program *)
2352 CURRENT_VERTEX_SHADER(ctx);
2353 /*if (vp->translated == GL_FALSE)
2354 r300TranslateVertexShader(vp); */
2355 if (vp->translated == GL_FALSE) {
2356 fprintf(stderr, "Failing back to sw-tcl\n");
2357 hw_tcl_on = future_hw_tcl_on = 0;
2358 r300ResetHwState(rmesa);
2359
2360 r300UpdateStateParameters(ctx, _NEW_PROGRAM |
2361 _NEW_PROGRAM_CONSTANTS);
2362 return;
2363 }
2364 }
2365 r300UpdateStateParameters(ctx, _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS);
2366 }
2367
2368 static const GLfloat *get_fragmentprogram_constant(GLcontext *ctx,
2369 struct gl_program *program, struct prog_src_register srcreg)
2370 {
2371 static const GLfloat dummy[4] = { 0, 0, 0, 0 };
2372
2373 switch(srcreg.File) {
2374 case PROGRAM_LOCAL_PARAM:
2375 return program->LocalParams[srcreg.Index];
2376 case PROGRAM_ENV_PARAM:
2377 return ctx->FragmentProgram.Parameters[srcreg.Index];
2378 case PROGRAM_STATE_VAR:
2379 case PROGRAM_NAMED_PARAM:
2380 case PROGRAM_CONSTANT:
2381 return program->Parameters->ParameterValues[srcreg.Index];
2382 default:
2383 _mesa_problem(ctx, "get_fragmentprogram_constant: Unknown\n");
2384 return dummy;
2385 }
2386 }
2387
2388
2389 static void r300SetupPixelShader(r300ContextPtr rmesa)
2390 {
2391 GLcontext *ctx = rmesa->radeon.glCtx;
2392 struct r300_fragment_program *fp = (struct r300_fragment_program *)
2393 (char *)ctx->FragmentProgram._Current;
2394 struct r300_fragment_program_code *code;
2395 int i, k;
2396
2397 if (!fp) /* should only happenen once, just after context is created */
2398 return;
2399
2400 r300TranslateFragmentShader(rmesa, fp);
2401 if (!fp->translated) {
2402 fprintf(stderr, "%s: No valid fragment shader, exiting\n",
2403 __FUNCTION__);
2404 return;
2405 }
2406 code = &fp->code;
2407
2408 r300SetupTextures(ctx);
2409
2410 R300_STATECHANGE(rmesa, fpi[0]);
2411 R300_STATECHANGE(rmesa, fpi[1]);
2412 R300_STATECHANGE(rmesa, fpi[2]);
2413 R300_STATECHANGE(rmesa, fpi[3]);
2414 rmesa->hw.fpi[0].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_RGB_INST_0, code->alu.length);
2415 rmesa->hw.fpi[1].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_RGB_ADDR_0, code->alu.length);
2416 rmesa->hw.fpi[2].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_ALPHA_INST_0, code->alu.length);
2417 rmesa->hw.fpi[3].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_ALPHA_ADDR_0, code->alu.length);
2418 for (i = 0; i < code->alu.length; i++) {
2419 rmesa->hw.fpi[0].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst0;
2420 rmesa->hw.fpi[1].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst1;
2421 rmesa->hw.fpi[2].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst2;
2422 rmesa->hw.fpi[3].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst3;
2423 }
2424
2425 R300_STATECHANGE(rmesa, fp);
2426 rmesa->hw.fp.cmd[R300_FP_CNTL0] = code->cur_node | (code->first_node_has_tex << 3);
2427 rmesa->hw.fp.cmd[R300_FP_CNTL1] = code->max_temp_idx;
2428 rmesa->hw.fp.cmd[R300_FP_CNTL2] =
2429 (0 << R300_PFS_CNTL_ALU_OFFSET_SHIFT) |
2430 ((code->alu.length-1) << R300_PFS_CNTL_ALU_END_SHIFT) |
2431 (0 << R300_PFS_CNTL_TEX_OFFSET_SHIFT) |
2432 ((code->tex.length ? code->tex.length-1 : 0) << R300_PFS_CNTL_TEX_END_SHIFT);
2433 /* I just want to say, the way these nodes are stored.. weird.. */
2434 for (i = 0, k = (4 - (code->cur_node + 1)); i < 4; i++, k++) {
2435 if (i < (code->cur_node + 1)) {
2436 rmesa->hw.fp.cmd[R300_FP_NODE0 + k] =
2437 (code->node[i].alu_offset << R300_ALU_START_SHIFT) |
2438 (code->node[i].alu_end << R300_ALU_SIZE_SHIFT) |
2439 (code->node[i].tex_offset << R300_TEX_START_SHIFT) |
2440 (code->node[i].tex_end << R300_TEX_SIZE_SHIFT) |
2441 code->node[i].flags;
2442 } else {
2443 rmesa->hw.fp.cmd[R300_FP_NODE0 + (3 - i)] = 0;
2444 }
2445 }
2446
2447 R300_STATECHANGE(rmesa, fpp);
2448 rmesa->hw.fpp.cmd[R300_FPP_CMD_0] = cmdpacket0(R300_PFS_PARAM_0_X, code->const_nr * 4);
2449 for (i = 0; i < code->const_nr; i++) {
2450 const GLfloat *constant = get_fragmentprogram_constant(ctx,
2451 &fp->mesa_program.Base, code->constant[i]);
2452 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat24(constant[0]);
2453 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat24(constant[1]);
2454 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat24(constant[2]);
2455 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat24(constant[3]);
2456 }
2457 }
2458
2459 #define bump_r500fp_count(ptr, new_count) do{\
2460 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
2461 int _nc=(new_count)/6; \
2462 assert(_nc < 256); \
2463 if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
2464 } while(0)
2465
2466 #define bump_r500fp_const_count(ptr, new_count) do{\
2467 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
2468 int _nc=(new_count)/4; \
2469 assert(_nc < 256); \
2470 if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
2471 } while(0)
2472
2473 static void r500SetupPixelShader(r300ContextPtr rmesa)
2474 {
2475 GLcontext *ctx = rmesa->radeon.glCtx;
2476 struct r500_fragment_program *fp = (struct r500_fragment_program *)
2477 (char *)ctx->FragmentProgram._Current;
2478 int i;
2479 struct r500_fragment_program_code *code;
2480
2481 if (!fp) /* should only happenen once, just after context is created */
2482 return;
2483
2484 ((drm_r300_cmd_header_t *) rmesa->hw.r500fp.cmd)->r500fp.count = 0;
2485 ((drm_r300_cmd_header_t *) rmesa->hw.r500fp_const.cmd)->r500fp.count = 0;
2486
2487 r500TranslateFragmentShader(rmesa, fp);
2488 if (!fp->translated) {
2489 fprintf(stderr, "%s: No valid fragment shader, exiting\n",
2490 __FUNCTION__);
2491 return;
2492 }
2493 code = &fp->code;
2494
2495 r300SetupTextures(ctx);
2496
2497 R300_STATECHANGE(rmesa, fp);
2498 rmesa->hw.fp.cmd[R500_FP_PIXSIZE] = code->max_temp_idx;
2499
2500 rmesa->hw.fp.cmd[R500_FP_CODE_ADDR] =
2501 R500_US_CODE_START_ADDR(code->inst_offset) |
2502 R500_US_CODE_END_ADDR(code->inst_end);
2503 rmesa->hw.fp.cmd[R500_FP_CODE_RANGE] =
2504 R500_US_CODE_RANGE_ADDR(code->inst_offset) |
2505 R500_US_CODE_RANGE_SIZE(code->inst_end);
2506 rmesa->hw.fp.cmd[R500_FP_CODE_OFFSET] =
2507 R500_US_CODE_OFFSET_ADDR(0); /* FIXME when we add flow control */
2508
2509 R300_STATECHANGE(rmesa, r500fp);
2510 /* Emit our shader... */
2511 for (i = 0; i < code->inst_end+1; i++) {
2512 rmesa->hw.r500fp.cmd[i*6+1] = code->inst[i].inst0;
2513 rmesa->hw.r500fp.cmd[i*6+2] = code->inst[i].inst1;
2514 rmesa->hw.r500fp.cmd[i*6+3] = code->inst[i].inst2;
2515 rmesa->hw.r500fp.cmd[i*6+4] = code->inst[i].inst3;
2516 rmesa->hw.r500fp.cmd[i*6+5] = code->inst[i].inst4;
2517 rmesa->hw.r500fp.cmd[i*6+6] = code->inst[i].inst5;
2518 }
2519
2520 bump_r500fp_count(rmesa->hw.r500fp.cmd, (code->inst_end + 1) * 6);
2521
2522 R300_STATECHANGE(rmesa, r500fp_const);
2523 for (i = 0; i < code->const_nr; i++) {
2524 const GLfloat *constant = get_fragmentprogram_constant(ctx,
2525 &fp->mesa_program.Base, code->constant[i]);
2526 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat32(constant[0]);
2527 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat32(constant[1]);
2528 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat32(constant[2]);
2529 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat32(constant[3]);
2530 }
2531 bump_r500fp_const_count(rmesa->hw.r500fp_const.cmd, code->const_nr * 4);
2532
2533 }
2534
2535 void r300UpdateShaderStates(r300ContextPtr rmesa)
2536 {
2537 GLcontext *ctx;
2538 ctx = rmesa->radeon.glCtx;
2539
2540 r300UpdateTextureState(ctx);
2541 r300SetEarlyZState(ctx);
2542
2543 /* w_fmt value is set to get best performance
2544 * see p.130 R5xx 3D acceleration guide v1.3 */
2545 GLuint w_fmt, fgdepthsrc;
2546 if (current_fragment_program_writes_depth(ctx)) {
2547 fgdepthsrc = R300_FG_DEPTH_SRC_SHADER;
2548 w_fmt = R300_W_FMT_W24 | R300_W_SRC_US;
2549 } else {
2550 fgdepthsrc = R300_FG_DEPTH_SRC_SCAN;
2551 w_fmt = R300_W_FMT_W0 | R300_W_SRC_US;
2552 }
2553
2554 if (w_fmt != rmesa->hw.us_out_fmt.cmd[5]) {
2555 R300_STATECHANGE(rmesa, us_out_fmt);
2556 rmesa->hw.us_out_fmt.cmd[5] = w_fmt;
2557 }
2558
2559 if (fgdepthsrc != rmesa->hw.fg_depth_src.cmd[1]) {
2560 R300_STATECHANGE(rmesa, fg_depth_src);
2561 rmesa->hw.fg_depth_src.cmd[1] = fgdepthsrc;
2562 }
2563
2564 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
2565 r500SetupPixelShader(rmesa);
2566 else
2567 r300SetupPixelShader(rmesa);
2568
2569 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
2570 r500SetupRSUnit(ctx);
2571 else
2572 r300SetupRSUnit(ctx);
2573
2574 if ((rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
2575 r300SetupVertexProgram(rmesa);
2576
2577 }
2578
2579 /**
2580 * Called by Mesa after an internal state update.
2581 */
2582 static void r300InvalidateState(GLcontext * ctx, GLuint new_state)
2583 {
2584 r300ContextPtr r300 = R300_CONTEXT(ctx);
2585
2586 _swrast_InvalidateState(ctx, new_state);
2587 _swsetup_InvalidateState(ctx, new_state);
2588 _vbo_InvalidateState(ctx, new_state);
2589 _tnl_InvalidateState(ctx, new_state);
2590 _ae_invalidate_state(ctx, new_state);
2591
2592 if (new_state & _NEW_BUFFERS) {
2593 r300UpdateDrawBuffer(ctx);
2594 }
2595
2596 r300UpdateStateParameters(ctx, new_state);
2597
2598 r300->NewGLState |= new_state;
2599 }
2600
2601 /**
2602 * Calculate initial hardware state and register state functions.
2603 * Assumes that the command buffer and state atoms have been
2604 * initialized already.
2605 */
2606 void r300InitState(r300ContextPtr r300)
2607 {
2608 GLcontext *ctx = r300->radeon.glCtx;
2609 GLuint depth_fmt;
2610
2611 radeonInitState(&r300->radeon);
2612
2613 switch (ctx->Visual.depthBits) {
2614 case 16:
2615 r300->state.depth.scale = 1.0 / (GLfloat) 0xffff;
2616 depth_fmt = R300_DEPTHFORMAT_16BIT_INT_Z;
2617 break;
2618 case 24:
2619 r300->state.depth.scale = 1.0 / (GLfloat) 0xffffff;
2620 depth_fmt = R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL;
2621 break;
2622 default:
2623 fprintf(stderr, "Error: Unsupported depth %d... exiting\n",
2624 ctx->Visual.depthBits);
2625 _mesa_exit(-1);
2626 }
2627
2628 /* Only have hw stencil when depth buffer is 24 bits deep */
2629 r300->state.stencil.hw_stencil = (ctx->Visual.stencilBits > 0 &&
2630 ctx->Visual.depthBits == 24);
2631
2632 memset(&(r300->state.texture), 0, sizeof(r300->state.texture));
2633
2634 r300ResetHwState(r300);
2635 }
2636
2637 static void r300RenderMode(GLcontext * ctx, GLenum mode)
2638 {
2639 r300ContextPtr rmesa = R300_CONTEXT(ctx);
2640 (void)rmesa;
2641 (void)mode;
2642 }
2643
2644 void r300UpdateClipPlanes( GLcontext *ctx )
2645 {
2646 r300ContextPtr rmesa = R300_CONTEXT(ctx);
2647 GLuint p;
2648
2649 for (p = 0; p < ctx->Const.MaxClipPlanes; p++) {
2650 if (ctx->Transform.ClipPlanesEnabled & (1 << p)) {
2651 GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
2652
2653 R300_STATECHANGE( rmesa, vpucp[p] );
2654 rmesa->hw.vpucp[p].cmd[R300_VPUCP_X] = ip[0];
2655 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Y] = ip[1];
2656 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Z] = ip[2];
2657 rmesa->hw.vpucp[p].cmd[R300_VPUCP_W] = ip[3];
2658 }
2659 }
2660 }
2661
2662 /**
2663 * Initialize driver's state callback functions
2664 */
2665 void r300InitStateFuncs(struct dd_function_table *functions)
2666 {
2667 radeonInitStateFuncs(functions);
2668
2669 functions->UpdateState = r300InvalidateState;
2670 functions->AlphaFunc = r300AlphaFunc;
2671 functions->BlendColor = r300BlendColor;
2672 functions->BlendEquationSeparate = r300BlendEquationSeparate;
2673 functions->BlendFuncSeparate = r300BlendFuncSeparate;
2674 functions->Enable = r300Enable;
2675 functions->ColorMask = r300ColorMask;
2676 functions->DepthFunc = r300DepthFunc;
2677 functions->DepthMask = r300DepthMask;
2678 functions->CullFace = r300CullFace;
2679 functions->FrontFace = r300FrontFace;
2680 functions->ShadeModel = r300ShadeModel;
2681 functions->LogicOpcode = r300LogicOpcode;
2682
2683 /* ARB_point_parameters */
2684 functions->PointParameterfv = r300PointParameter;
2685
2686 /* Stencil related */
2687 functions->StencilFuncSeparate = r300StencilFuncSeparate;
2688 functions->StencilMaskSeparate = r300StencilMaskSeparate;
2689 functions->StencilOpSeparate = r300StencilOpSeparate;
2690
2691 /* Viewport related */
2692 functions->Viewport = r300Viewport;
2693 functions->DepthRange = r300DepthRange;
2694 functions->PointSize = r300PointSize;
2695 functions->LineWidth = r300LineWidth;
2696
2697 functions->PolygonOffset = r300PolygonOffset;
2698 functions->PolygonMode = r300PolygonMode;
2699
2700 functions->RenderMode = r300RenderMode;
2701
2702 functions->ClipPlane = r300ClipPlane;
2703 }