2 Copyright (C) The Weather Channel, Inc. 2002.
3 Copyright (C) 2004 Nicolai Haehnle.
6 The Weather Channel (TM) funded Tungsten Graphics to develop the
7 initial release of the Radeon 8500 driver under the XFree86 license.
8 This notice must be preserved.
10 Permission is hereby granted, free of charge, to any person obtaining
11 a copy of this software and associated documentation files (the
12 "Software"), to deal in the Software without restriction, including
13 without limitation the rights to use, copy, modify, merge, publish,
14 distribute, sublicense, and/or sell copies of the Software, and to
15 permit persons to whom the Software is furnished to do so, subject to
16 the following conditions:
18 The above copyright notice and this permission notice (including the
19 next paragraph) shall be included in all copies or substantial
20 portions of the Software.
22 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
25 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
26 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
27 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
28 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 **************************************************************************/
34 * Nicolai Haehnle <prefect_@gmx.net>
44 #include "simple_list.h"
46 #include "api_arrayelt.h"
47 #include "swrast/swrast.h"
48 #include "swrast_setup/swrast_setup.h"
49 #include "array_cache/acache.h"
52 #include "radeon_ioctl.h"
53 #include "radeon_state.h"
54 #include "r300_context.h"
55 #include "r300_ioctl.h"
56 #include "r300_state.h"
58 #include "r300_program.h"
59 #include "r300_emit.h"
60 #include "r300_fixed_pipelines.h"
62 static void r300AlphaFunc(GLcontext
* ctx
, GLenum func
, GLfloat ref
)
64 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
65 int pp_misc
= rmesa
->hw
.at
.cmd
[R300_AT_ALPHA_TEST
];
68 CLAMPED_FLOAT_TO_UBYTE(refByte
, ref
);
70 R300_STATECHANGE(rmesa
, at
);
72 pp_misc
&= ~(R300_ALPHA_TEST_OP_MASK
| R300_REF_ALPHA_MASK
);
73 pp_misc
|= (refByte
& R300_REF_ALPHA_MASK
);
77 pp_misc
|= R300_ALPHA_TEST_FAIL
;
80 pp_misc
|= R300_ALPHA_TEST_LESS
;
83 pp_misc
|= R300_ALPHA_TEST_EQUAL
;
86 pp_misc
|= R300_ALPHA_TEST_LEQUAL
;
89 pp_misc
|= R300_ALPHA_TEST_GREATER
;
92 pp_misc
|= R300_ALPHA_TEST_NEQUAL
;
95 pp_misc
|= R300_ALPHA_TEST_GEQUAL
;
98 pp_misc
|= R300_ALPHA_TEST_PASS
;
102 rmesa
->hw
.at
.cmd
[R300_AT_ALPHA_TEST
] = pp_misc
;
105 static void r300BlendColor(GLcontext
* ctx
, const GLfloat cf
[4])
108 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
109 fprintf(stderr
, "%s:%s is not implemented yet. Fixme !\n", __FILE__
, __FUNCTION__
);
111 R200_STATECHANGE(rmesa
, ctx
);
112 CLAMPED_FLOAT_TO_UBYTE(color
[0], cf
[0]);
113 CLAMPED_FLOAT_TO_UBYTE(color
[1], cf
[1]);
114 CLAMPED_FLOAT_TO_UBYTE(color
[2], cf
[2]);
115 CLAMPED_FLOAT_TO_UBYTE(color
[3], cf
[3]);
116 if (rmesa
->radeon
.radeonScreen
->drmSupportsBlendColor
)
117 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_BLENDCOLOR
] =
118 radeonPackColor(4, color
[0], color
[1], color
[2], color
[3]);
123 * Calculate the hardware blend factor setting. This same function is used
124 * for source and destination of both alpha and RGB.
127 * The hardware register value for the specified blend factor. This value
128 * will need to be shifted into the correct position for either source or
129 * destination factor.
132 * Since the two cases where source and destination are handled differently
133 * are essentially error cases, they should never happen. Determine if these
134 * cases can be removed.
136 static int blend_factor(GLenum factor
, GLboolean is_src
)
142 func
= R200_BLEND_GL_ZERO
;
145 func
= R200_BLEND_GL_ONE
;
148 func
= R200_BLEND_GL_DST_COLOR
;
150 case GL_ONE_MINUS_DST_COLOR
:
151 func
= R200_BLEND_GL_ONE_MINUS_DST_COLOR
;
154 func
= R200_BLEND_GL_SRC_COLOR
;
156 case GL_ONE_MINUS_SRC_COLOR
:
157 func
= R200_BLEND_GL_ONE_MINUS_SRC_COLOR
;
160 func
= R200_BLEND_GL_SRC_ALPHA
;
162 case GL_ONE_MINUS_SRC_ALPHA
:
163 func
= R200_BLEND_GL_ONE_MINUS_SRC_ALPHA
;
166 func
= R200_BLEND_GL_DST_ALPHA
;
168 case GL_ONE_MINUS_DST_ALPHA
:
169 func
= R200_BLEND_GL_ONE_MINUS_DST_ALPHA
;
171 case GL_SRC_ALPHA_SATURATE
:
173 (is_src
) ? R200_BLEND_GL_SRC_ALPHA_SATURATE
:
176 case GL_CONSTANT_COLOR
:
177 func
= R200_BLEND_GL_CONST_COLOR
;
179 case GL_ONE_MINUS_CONSTANT_COLOR
:
180 func
= R200_BLEND_GL_ONE_MINUS_CONST_COLOR
;
182 case GL_CONSTANT_ALPHA
:
183 func
= R200_BLEND_GL_CONST_ALPHA
;
185 case GL_ONE_MINUS_CONSTANT_ALPHA
:
186 func
= R200_BLEND_GL_ONE_MINUS_CONST_ALPHA
;
189 func
= (is_src
) ? R200_BLEND_GL_ONE
: R200_BLEND_GL_ZERO
;
195 * Sets both the blend equation and the blend function.
196 * This is done in a single
197 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
198 * change the interpretation of the blend function.
199 * Also, make sure that blend function and blend equation are set to their default
200 * value if color blending is not enabled, since at least blend equations GL_MIN
201 * and GL_FUNC_REVERSE_SUBTRACT will cause wrong results otherwise for
204 static void r300_set_blend_state(GLcontext
* ctx
)
206 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
208 GLuint cntl
= rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] &
209 ~(R300_ROP_ENABLE
| R300_ALPHA_BLEND_ENABLE
|
210 R300_SEPARATE_ALPHA_ENABLE
);
213 int func
= (R200_BLEND_GL_ONE
<< R200_SRC_BLEND_SHIFT
) |
214 (R200_BLEND_GL_ZERO
<< R200_DST_BLEND_SHIFT
);
215 int eqn
= R200_COMB_FCN_ADD_CLAMP
;
216 int funcA
= (R200_BLEND_GL_ONE
<< R200_SRC_BLEND_SHIFT
) |
217 (R200_BLEND_GL_ZERO
<< R200_DST_BLEND_SHIFT
);
218 int eqnA
= R200_COMB_FCN_ADD_CLAMP
;
220 R300_STATECHANGE(rmesa
, bld
);
222 if (rmesa
->radeon
.radeonScreen
->drmSupportsBlendColor
) {
223 if (ctx
->Color
._LogicOpEnabled
) {
225 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] =
226 cntl
| R300_ROP_ENABLE
;
228 rmesa
->hw
.bld
.cmd
[R300_BLD_ABLEND
] = eqn
| func
;
229 rmesa
->hw
.bld
.cmd
[R300_BLD_CBLEND
] = eqn
| func
;
231 } else if (ctx
->Color
.BlendEnabled
) {
233 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] =
234 cntl
| R300_ALPHA_BLEND_ENABLE
|
235 R300_SEPARATE_ALPHA_ENABLE
;
239 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] = cntl
;
241 rmesa
->hw
.bld
.cmd
[R300_BLD_ABLEND
] = eqn
| func
;
242 rmesa
->hw
.bld
.cmd
[R300_BLD_CBLEND
] = eqn
| func
;
246 if (ctx
->Color
._LogicOpEnabled
) {
248 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] =
249 cntl
| R300_ROP_ENABLE
;
250 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_BLENDCNTL
] = eqn
| func
;
253 } else if (ctx
->Color
.BlendEnabled
) {
255 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] =
256 cntl
| R300_ALPHA_BLEND_ENABLE
;
260 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_CNTL
] = cntl
;
261 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_BLENDCNTL
] = eqn
| func
;
268 (blend_factor(ctx
->Color
.BlendSrcRGB
, GL_TRUE
) <<
269 R200_SRC_BLEND_SHIFT
) | (blend_factor(ctx
->Color
.BlendDstRGB
,
271 R200_DST_BLEND_SHIFT
);
273 switch (ctx
->Color
.BlendEquationRGB
) {
275 eqn
= R300_COMB_FCN_ADD_CLAMP
;
278 case GL_FUNC_SUBTRACT
:
279 eqn
= R300_COMB_FCN_SUB_CLAMP
;
282 case GL_FUNC_REVERSE_SUBTRACT
:
283 eqn
= R200_COMB_FCN_RSUB_CLAMP
;
287 eqn
= R200_COMB_FCN_MIN
;
288 func
= (R200_BLEND_GL_ONE
<< R200_SRC_BLEND_SHIFT
) |
289 (R200_BLEND_GL_ONE
<< R200_DST_BLEND_SHIFT
);
293 eqn
= R200_COMB_FCN_MAX
;
294 func
= (R200_BLEND_GL_ONE
<< R200_SRC_BLEND_SHIFT
) |
295 (R200_BLEND_GL_ONE
<< R200_DST_BLEND_SHIFT
);
300 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
301 __func__
, __LINE__
, ctx
->Color
.BlendEquationRGB
);
305 if (!rmesa
->radeon
.radeonScreen
->drmSupportsBlendColor
) {
307 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_BLENDCNTL
] = eqn
| func
;
313 (blend_factor(ctx
->Color
.BlendSrcA
, GL_TRUE
) <<
314 R200_SRC_BLEND_SHIFT
) | (blend_factor(ctx
->Color
.BlendDstA
,
316 R200_DST_BLEND_SHIFT
);
318 switch (ctx
->Color
.BlendEquationA
) {
320 eqnA
= R300_COMB_FCN_ADD_CLAMP
;
323 case GL_FUNC_SUBTRACT
:
324 eqnA
= R300_COMB_FCN_SUB_CLAMP
;
327 case GL_FUNC_REVERSE_SUBTRACT
:
328 eqnA
= R200_COMB_FCN_RSUB_CLAMP
;
332 eqnA
= R200_COMB_FCN_MIN
;
333 funcA
= (R200_BLEND_GL_ONE
<< R200_SRC_BLEND_SHIFT
) |
334 (R200_BLEND_GL_ONE
<< R200_DST_BLEND_SHIFT
);
338 eqnA
= R200_COMB_FCN_MAX
;
339 funcA
= (R200_BLEND_GL_ONE
<< R200_SRC_BLEND_SHIFT
) |
340 (R200_BLEND_GL_ONE
<< R200_DST_BLEND_SHIFT
);
344 fprintf(stderr
, "[%s:%u] Invalid A blend equation (0x%04x).\n",
345 __func__
, __LINE__
, ctx
->Color
.BlendEquationA
);
349 rmesa
->hw
.bld
.cmd
[R300_BLD_ABLEND
] = eqnA
| funcA
;
350 rmesa
->hw
.bld
.cmd
[R300_BLD_CBLEND
] = eqn
| func
;
351 if(rmesa
->hw
.bld
.cmd
[R300_BLD_ABLEND
] == rmesa
->hw
.bld
.cmd
[R300_BLD_CBLEND
]){
352 rmesa
->hw
.bld
.cmd
[R300_BLD_CBLEND
] |= R300_BLEND_UNKNOWN
| R300_BLEND_ENABLE
| R300_BLEND_NO_SEPARATE
;
354 rmesa
->hw
.bld
.cmd
[R300_BLD_CBLEND
] |= R300_BLEND_UNKNOWN
| R300_BLEND_ENABLE
;
359 static void r300BlendEquationSeparate(GLcontext
* ctx
,
360 GLenum modeRGB
, GLenum modeA
)
362 r300_set_blend_state(ctx
);
365 static void r300BlendFuncSeparate(GLcontext
* ctx
,
366 GLenum sfactorRGB
, GLenum dfactorRGB
,
367 GLenum sfactorA
, GLenum dfactorA
)
369 r300_set_blend_state(ctx
);
373 * Update our tracked culling state based on Mesa's state.
375 static void r300UpdateCulling(GLcontext
* ctx
)
377 r300ContextPtr r300
= R300_CONTEXT(ctx
);
380 R300_STATECHANGE(r300
, cul
);
381 if (ctx
->Polygon
.CullFlag
) {
382 if (ctx
->Polygon
.CullFaceMode
== GL_FRONT_AND_BACK
)
383 val
= R300_CULL_FRONT
|R300_CULL_BACK
;
384 else if (ctx
->Polygon
.CullFaceMode
== GL_FRONT
)
385 val
= R300_CULL_FRONT
;
387 val
= R300_CULL_BACK
;
389 if (ctx
->Polygon
.FrontFace
== GL_CW
)
390 val
|= R300_FRONT_FACE_CW
;
392 val
|= R300_FRONT_FACE_CCW
;
395 r300
->hw
.cul
.cmd
[R300_CUL_CULL
] = val
;
400 * Handle glEnable()/glDisable().
402 * \note Mesa already filters redundant calls to glEnable/glDisable.
404 static void r300Enable(GLcontext
* ctx
, GLenum cap
, GLboolean state
)
406 r300ContextPtr r300
= R300_CONTEXT(ctx
);
409 if (RADEON_DEBUG
& DEBUG_STATE
)
410 fprintf(stderr
, "%s( %s = %s )\n", __FUNCTION__
,
411 _mesa_lookup_enum_by_nr(cap
),
412 state
? "GL_TRUE" : "GL_FALSE");
416 R300_STATECHANGE(r300
, zc
);
420 newval
= R300_RB3D_Z_TEST_AND_WRITE
;
422 newval
= R300_RB3D_Z_TEST
;
426 r300
->hw
.zc
.cmd
[R300_ZC_CNTL_0
] = newval
;
430 r300UpdateCulling(ctx
);
434 radeonEnable(ctx
, cap
, state
);
441 * Change the culling mode.
443 * \note Mesa already filters redundant calls to this function.
445 static void r300CullFace(GLcontext
* ctx
, GLenum mode
)
449 r300UpdateCulling(ctx
);
454 * Change the polygon orientation.
456 * \note Mesa already filters redundant calls to this function.
458 static void r300FrontFace(GLcontext
* ctx
, GLenum mode
)
462 r300UpdateCulling(ctx
);
467 * Change the depth testing function.
469 * \note Mesa already filters redundant calls to this function.
471 static void r300DepthFunc(GLcontext
* ctx
, GLenum func
)
473 r300ContextPtr r300
= R300_CONTEXT(ctx
);
475 R300_STATECHANGE(r300
, zc
);
479 r300
->hw
.zc
.cmd
[R300_ZC_CNTL_1
] = R300_Z_TEST_NEVER
;
482 r300
->hw
.zc
.cmd
[R300_ZC_CNTL_1
] = R300_Z_TEST_LESS
;
485 r300
->hw
.zc
.cmd
[R300_ZC_CNTL_1
] = R300_Z_TEST_EQUAL
;
488 r300
->hw
.zc
.cmd
[R300_ZC_CNTL_1
] = R300_Z_TEST_LEQUAL
;
491 r300
->hw
.zc
.cmd
[R300_ZC_CNTL_1
] = R300_Z_TEST_GREATER
;
494 r300
->hw
.zc
.cmd
[R300_ZC_CNTL_1
] = R300_Z_TEST_NEQUAL
;
497 r300
->hw
.zc
.cmd
[R300_ZC_CNTL_1
] = R300_Z_TEST_GEQUAL
;
500 r300
->hw
.zc
.cmd
[R300_ZC_CNTL_1
] = R300_Z_TEST_ALWAYS
;
507 * Enable/Disable depth writing.
509 * \note Mesa already filters redundant calls to this function.
511 static void r300DepthMask(GLcontext
* ctx
, GLboolean mask
)
513 r300ContextPtr r300
= R300_CONTEXT(ctx
);
515 if (!ctx
->Depth
.Test
)
518 R300_STATECHANGE(r300
, zc
);
519 r300
->hw
.zc
.cmd
[R300_ZC_CNTL_0
] = mask
520 ? R300_RB3D_Z_TEST_AND_WRITE
: R300_RB3D_Z_TEST
;
525 * Handle glColorMask()
527 static void r300ColorMask(GLcontext
* ctx
,
528 GLboolean r
, GLboolean g
, GLboolean b
, GLboolean a
)
530 r300ContextPtr r300
= R300_CONTEXT(ctx
);
531 int mask
= (b
<< 0) | (g
<< 1) | (r
<< 2) | (a
<< 3);
533 if (mask
!= r300
->hw
.cmk
.cmd
[R300_CMK_COLORMASK
]) {
534 R300_STATECHANGE(r300
, cmk
);
535 r300
->hw
.cmk
.cmd
[R300_CMK_COLORMASK
] = mask
;
539 /* =============================================================
542 static void r300PointSize(GLcontext
* ctx
, GLfloat size
)
544 r300ContextPtr r300
= R300_CONTEXT(ctx
);
546 /* This might need fixing later */
547 R300_STATECHANGE(r300
, vps
);
548 r300
->hw
.vps
.cmd
[R300_VPS_POINTSIZE
] = r300PackFloat32(1.0);
551 /* =============================================================
552 * Window position and viewport transformation
556 * To correctly position primitives:
558 #define SUBPIXEL_X 0.125
559 #define SUBPIXEL_Y 0.125
561 void r300UpdateWindow(GLcontext
* ctx
)
563 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
564 __DRIdrawablePrivate
*dPriv
= rmesa
->radeon
.dri
.drawable
;
565 GLfloat xoffset
= dPriv
? (GLfloat
) dPriv
->x
: 0;
566 GLfloat yoffset
= dPriv
? (GLfloat
) dPriv
->y
+ dPriv
->h
: 0;
567 const GLfloat
*v
= ctx
->Viewport
._WindowMap
.m
;
569 GLfloat sx
= v
[MAT_SX
];
570 GLfloat tx
= v
[MAT_TX
] + xoffset
+ SUBPIXEL_X
;
571 GLfloat sy
= -v
[MAT_SY
];
572 GLfloat ty
= (-v
[MAT_TY
]) + yoffset
+ SUBPIXEL_Y
;
573 GLfloat sz
= v
[MAT_SZ
] * rmesa
->state
.depth
.scale
;
574 GLfloat tz
= v
[MAT_TZ
] * rmesa
->state
.depth
.scale
;
576 R300_FIREVERTICES(rmesa
);
577 R300_STATECHANGE(rmesa
, vpt
);
579 rmesa
->hw
.vpt
.cmd
[R300_VPT_XSCALE
] = r300PackFloat32(sx
);
580 rmesa
->hw
.vpt
.cmd
[R300_VPT_XOFFSET
] = r300PackFloat32(tx
);
581 rmesa
->hw
.vpt
.cmd
[R300_VPT_YSCALE
] = r300PackFloat32(sy
);
582 rmesa
->hw
.vpt
.cmd
[R300_VPT_YOFFSET
] = r300PackFloat32(ty
);
583 rmesa
->hw
.vpt
.cmd
[R300_VPT_ZSCALE
] = r300PackFloat32(sz
);
584 rmesa
->hw
.vpt
.cmd
[R300_VPT_ZOFFSET
] = r300PackFloat32(tz
);
587 static void r300Viewport(GLcontext
* ctx
, GLint x
, GLint y
,
588 GLsizei width
, GLsizei height
)
590 /* Don't pipeline viewport changes, conflict with window offset
591 * setting below. Could apply deltas to rescue pipelined viewport
592 * values, or keep the originals hanging around.
594 R200_FIREVERTICES(R200_CONTEXT(ctx
));
595 r300UpdateWindow(ctx
);
598 static void r300DepthRange(GLcontext
* ctx
, GLclampd nearval
, GLclampd farval
)
600 r300UpdateWindow(ctx
);
603 /* Routing and texture-related */
605 void r300_setup_routing(GLcontext
*ctx
, GLboolean immediate
)
607 int i
, count
=0,reg
=0;
609 TNLcontext
*tnl
= TNL_CONTEXT(ctx
);
610 struct vertex_buffer
*VB
= &tnl
->vb
;
611 r300ContextPtr r300
= R300_CONTEXT(ctx
);
614 /* Stage 1 - input to VAP */
616 /* Assign register number automatically, retaining it in rmesa->state.reg */
618 /* Note: immediate vertex data includes all coordinates.
619 To save bandwidth use either VBUF or state-based vertex generation */
621 #define CONFIGURE_AOS(v, o, r, f) \
624 r300->state.aos[count].element_size=4; \
625 r300->state.aos[count].stride=4; \
626 r300->state.aos[count].ncomponents=4; \
628 r300->state.aos[count].element_size=v->size; \
629 r300->state.aos[count].stride=v->size; \
630 r300->state.aos[count].ncomponents=v->size; \
632 r300->state.aos[count].offset=o; \
633 r300->state.aos[count].reg=reg; \
634 r300->state.aos[count].format=(f); \
635 r300->state.vap_reg.r=reg; \
640 /* All offsets are 0 - for use by immediate mode.
641 Should change later to handle vertex buffers */
642 CONFIGURE_AOS(VB
->ObjPtr
, 0, i_coords
, AOS_FORMAT_FLOAT
);
643 CONFIGURE_AOS(VB
->ColorPtr
[0], 0, i_color
[0], AOS_FORMAT_FLOAT_COLOR
);
644 for(i
=0;i
< ctx
->Const
.MaxTextureUnits
;i
++)
645 if(ctx
->Texture
.Unit
[i
].Enabled
)
646 CONFIGURE_AOS(VB
->TexCoordPtr
[i
], 0, i_tex
[i
], AOS_FORMAT_FLOAT
);
648 r300
->state
.aos_count
=count
;
650 if (RADEON_DEBUG
& DEBUG_STATE
)
651 fprintf(stderr
, "aos_count=%d\n", count
);
653 if(count
>R300_MAX_AOS_ARRAYS
){
654 fprintf(stderr
, "Aieee ! AOS array count exceeded !\n");
660 /* setup INPUT_ROUTE */
661 R300_STATECHANGE(r300
, vir
[0]);
662 for(i
=0;i
+1<count
;i
+=2){
663 dw
=(r300
->state
.aos
[i
].ncomponents
-1)
664 | ((r300
->state
.aos
[i
].reg
)<<8)
665 | (r300
->state
.aos
[i
].format
<<14)
666 | (((r300
->state
.aos
[i
+1].ncomponents
-1)
667 | ((r300
->state
.aos
[i
+1].reg
)<<8)
668 | (r300
->state
.aos
[i
+1].format
<<14))<<16);
673 r300
->hw
.vir
[0].cmd
[R300_VIR_CNTL_0
+(i
>>1)]=dw
;
676 dw
=(r300
->state
.aos
[count
-1].ncomponents
-1)
677 | (r300
->state
.aos
[count
-1].format
<<14)
678 | ((r300
->state
.aos
[count
-1].reg
)<<8)
680 r300
->hw
.vir
[0].cmd
[R300_VIR_CNTL_0
+(count
>>1)]=dw
;
681 //fprintf(stderr, "vir0 dw=%08x\n", dw);
683 /* Set the rest of INPUT_ROUTE_0 to 0 */
684 //for(i=((count+1)>>1); i<8; i++)r300->hw.vir[0].cmd[R300_VIR_CNTL_0+i]=(0x0);
685 ((drm_r300_cmd_header_t
*)r300
->hw
.vir
[0].cmd
)->unchecked_state
.count
= (count
+1)>>1;
688 /* Mesa assumes that all missing components are from (0, 0, 0, 1) */
689 #define ALL_COMPONENTS ((R300_INPUT_ROUTE_SELECT_X<<R300_INPUT_ROUTE_X_SHIFT) \
690 | (R300_INPUT_ROUTE_SELECT_Y<<R300_INPUT_ROUTE_Y_SHIFT) \
691 | (R300_INPUT_ROUTE_SELECT_Z<<R300_INPUT_ROUTE_Z_SHIFT) \
692 | (R300_INPUT_ROUTE_SELECT_W<<R300_INPUT_ROUTE_W_SHIFT))
694 #define ALL_DEFAULT ((R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_X_SHIFT) \
695 | (R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_Y_SHIFT) \
696 | (R300_INPUT_ROUTE_SELECT_ZERO<<R300_INPUT_ROUTE_Z_SHIFT) \
697 | (R300_INPUT_ROUTE_SELECT_ONE<<R300_INPUT_ROUTE_W_SHIFT))
699 R300_STATECHANGE(r300
, vir
[1]);
701 for(i
=0;i
+1<count
;i
+=2){
703 mask
=(1<<(r300
->state
.aos
[i
].ncomponents
*3))-1;
704 dw
=(ALL_COMPONENTS
& mask
)
705 | (ALL_DEFAULT
& ~mask
)
706 | R300_INPUT_ROUTE_ENABLE
;
709 mask
=(1<<(r300
->state
.aos
[i
+1].ncomponents
*3))-1;
711 (ALL_COMPONENTS
& mask
)
712 | (ALL_DEFAULT
& ~mask
)
713 | R300_INPUT_ROUTE_ENABLE
716 r300
->hw
.vir
[1].cmd
[R300_VIR_CNTL_0
+(i
>>1)]=dw
;
719 mask
=(1<<(r300
->state
.aos
[count
-1].ncomponents
*3))-1;
720 dw
=(ALL_COMPONENTS
& mask
)
721 | (ALL_DEFAULT
& ~mask
)
722 | R300_INPUT_ROUTE_ENABLE
;
723 r300
->hw
.vir
[1].cmd
[R300_VIR_CNTL_0
+(count
>>1)]=dw
;
724 //fprintf(stderr, "vir1 dw=%08x\n", dw);
726 /* Set the rest of INPUT_ROUTE_1 to 0 */
727 //for(i=((count+1)>>1); i<8; i++)r300->hw.vir[1].cmd[R300_VIR_CNTL_0+i]=0x0;
728 ((drm_r300_cmd_header_t
*)r300
->hw
.vir
[1].cmd
)->unchecked_state
.count
= (count
+1)>>1;
730 /* Set up input_cntl */
732 R300_STATECHANGE(r300
, vic
);
733 r300
->hw
.vic
.cmd
[R300_VIC_CNTL_0
]=0x5555; /* Hard coded value, no idea what it means */
735 r300
->hw
.vic
.cmd
[R300_VIC_CNTL_1
]=R300_INPUT_CNTL_POS
736 | R300_INPUT_CNTL_COLOR
;
738 for(i
=0;i
< ctx
->Const
.MaxTextureUnits
;i
++)
739 if(ctx
->Texture
.Unit
[i
].Enabled
)
740 r300
->hw
.vic
.cmd
[R300_VIC_CNTL_1
]|=(R300_INPUT_CNTL_TC0
<<i
);
742 /* Stage 3: VAP output */
743 R300_STATECHANGE(r300
, vof
);
744 r300
->hw
.vof
.cmd
[R300_VOF_CNTL_0
]=R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
745 | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT
;
747 r300
->hw
.vof
.cmd
[R300_VOF_CNTL_1
]=0;
748 for(i
=0;i
< ctx
->Const
.MaxTextureUnits
;i
++)
749 if(ctx
->Texture
.Unit
[i
].Enabled
)
750 r300
->hw
.vof
.cmd
[R300_VOF_CNTL_1
]|=(4<<(3*i
));
754 static r300TexObj default_tex_obj
={
755 filter
:R300_TX_MAG_FILTER_LINEAR
| R300_TX_MIN_FILTER_LINEAR
,
757 size
: (0xff << R300_TX_WIDTHMASK_SHIFT
)
758 | (0xff << R300_TX_HEIGHTMASK_SHIFT
)
759 | (0x8 << R300_TX_SIZE_SHIFT
),
766 /* there is probably a system to these value, but, for now,
767 we just try by hand */
769 static int inline translate_src(int src
)
778 case GL_PRIMARY_COLOR
:
795 /* I think 357 and 457 are prime numbers.. wiggle them if you get coincidences */
796 #define FORMAT_HASH(opRGB, srcRGB, modeRGB, opA, srcA, modeA, format, intFormat) ( \
798 ((opRGB)<<30) | ((opA)<<28) | \
799 ((srcRGB)<< 25) | ((srcA)<<22) | \
803 ^ (((format)) *457) \
804 ^ ((intFormat) * 7) \
807 static GLuint
translate_texture_format(GLcontext
*ctx
, GLint tex_unit
, GLuint format
, GLint IntFormat
)
809 const struct gl_texture_unit
*texUnit
= &ctx
->Texture
.Unit
[tex_unit
];
810 int i
=0; /* number of alpha args .. */
812 /* Size field in format specific first */
814 texUnit
->_CurrentCombine
->OperandRGB
[i
] -GL_SRC_COLOR
,
815 translate_src(texUnit
->_CurrentCombine
->SourceRGB
[i
]),
816 texUnit
->_CurrentCombine
->ModeRGB
,
817 texUnit
->_CurrentCombine
->OperandA
[i
] -GL_SRC_ALPHA
,
818 translate_src(texUnit
->_CurrentCombine
->SourceA
[i
]),
819 texUnit
->_CurrentCombine
->ModeA
,
823 case FORMAT_HASH(0, 1, 0x2100, 0, 1, 0x2100, 0x00088047, 0x1908):
827 return 0x7a0c; /* kfiresaver.kss */
828 case FORMAT_HASH(0, 1, 0x2100, 0, 1, 0x2100, 0x00088047, 0x8058):
832 return 0x8a0c; /* Quake3demo -small font on the bottom */
833 case FORMAT_HASH(0, 1, 0x2100, 0, 1, 0x2100, 0x00077047, 4):
838 case FORMAT_HASH(0, 1, 0x2100, 0, 1, 0x2100, 0x00055047, 4):
844 case FORMAT_HASH(0, 1, 0x2100, 0, 4, 0x1e01, 0x00088047, 3):
850 case FORMAT_HASH(0, 1, 0x2100, 0, 4, 0x1e01, 0x00077047, 0x00000003):
851 /* Tested with NeHe lesson 08 */
853 //case FORMAT_HASH(0, 1, 0x2100, 0, 4, 0x1e01, 0x00055047, 0):
854 /* Can't remember what I tested this with..
855 try putting return 0 of you see broken textures which
856 are not being complained about */
858 case FORMAT_HASH(0, 1, 0x2100, 0, 4, 0x1e01, 0x00099047, 0x8051):
859 //case FORMAT_HASH(0, 1, 0x2100, 0, 4, 0x1e01, 0x00089047, 0x8058):
860 case FORMAT_HASH(0, 1, 0x2100, 0, 4, 0x1e01, 0x00077047, 0x8051):
865 case FORMAT_HASH(0, 1, 0x2100, 0, 1, 0x2100, 0x00055045, 0x00008056):
866 case FORMAT_HASH(0, 1, 0x2100, 0, 1, 0x2100, 0x00088045, 0x00008056):
868 case FORMAT_HASH(0, 1, 0x2100, 0, 4, 0x1e01, 0x00099004, 0x00008050):
874 /* Just key on internal format - useful for quick tryouts*/
890 //fprintf(stderr, "%08x\n", format);
903 static int warn_once
=1;
905 fprintf(stderr
, "%s:%s Do not know how to translate texture format - help me !\n",
906 __FILE__
, __FUNCTION__
);
913 void r300_setup_textures(GLcontext
*ctx
)
916 struct r300_tex_obj
*t
;
917 r300ContextPtr r300
= R300_CONTEXT(ctx
);
918 int max_texture_unit
=-1; /* -1 translates into no setup costs for fields */
919 struct gl_texture_unit
*texUnit
;
921 R300_STATECHANGE(r300
, txe
);
922 R300_STATECHANGE(r300
, tex
.filter
);
923 R300_STATECHANGE(r300
, tex
.unknown1
);
924 R300_STATECHANGE(r300
, tex
.size
);
925 R300_STATECHANGE(r300
, tex
.format
);
926 R300_STATECHANGE(r300
, tex
.offset
);
927 R300_STATECHANGE(r300
, tex
.unknown4
);
928 R300_STATECHANGE(r300
, tex
.unknown5
);
930 r300
->state
.texture
.tc_count
=0;
932 r300
->hw
.txe
.cmd
[R300_TXE_ENABLE
]=0x0;
934 mtu
= r300
->radeon
.glCtx
->Const
.MaxTextureUnits
;
935 if (RADEON_DEBUG
& DEBUG_STATE
)
936 fprintf(stderr
, "mtu=%d\n", mtu
);
938 if(mtu
>R300_MAX_TEXTURE_UNITS
){
939 fprintf(stderr
, "Aiiee ! mtu=%d is greater than R300_MAX_TEXTURE_UNITS=%d\n",
940 mtu
, R300_MAX_TEXTURE_UNITS
);
944 if(ctx
->Texture
.Unit
[i
].Enabled
){
945 t
=r300
->state
.texture
.unit
[i
].texobj
;
946 r300
->state
.texture
.tc_count
++;
948 fprintf(stderr
, "Texture unit %d enabled, but corresponding texobj is NULL, using default object.\n", i
);
952 if (RADEON_DEBUG
& DEBUG_STATE
)
953 fprintf(stderr
, "Activating texture unit %d\n", i
);
955 r300
->hw
.txe
.cmd
[R300_TXE_ENABLE
]|=(1<<i
);
957 r300
->hw
.tex
.filter
.cmd
[R300_TEX_VALUE_0
+i
]=t
->filter
;
958 r300
->hw
.tex
.unknown1
.cmd
[R300_TEX_VALUE_0
+i
]=t
->pitch
;
959 r300
->hw
.tex
.size
.cmd
[R300_TEX_VALUE_0
+i
]=t
->size
;
960 r300
->hw
.tex
.format
.cmd
[R300_TEX_VALUE_0
+i
]=t
->format
;
961 r300
->hw
.tex
.offset
.cmd
[R300_TEX_VALUE_0
+i
]=r300
->radeon
.radeonScreen
->fbLocation
+t
->offset
;
962 r300
->hw
.tex
.unknown4
.cmd
[R300_TEX_VALUE_0
+i
]=0x0;
963 r300
->hw
.tex
.unknown5
.cmd
[R300_TEX_VALUE_0
+i
]=0x0;
967 /* We don't know how to set this yet */
968 //value from r300_lib.c for RGB24
969 //r300->hw.tex.format.cmd[R300_TEX_VALUE_0+i]=0x88a0c;
970 r300
->hw
.tex
.format
.cmd
[R300_TEX_VALUE_0
+i
]=translate_texture_format(ctx
, i
, t
->format
,
971 r300
->state
.texture
.unit
[i
].texobj
!=NULL
?t
->base
.tObj
->Image
[0][0]->IntFormat
:3);
972 /* Use the code below to quickly find matching texture
973 formats. Requires an app that displays the same texture
976 if(r300
->hw
.tex
.format
.cmd
[R300_TEX_VALUE_0
+i
]==0){
983 texUnit
= &ctx
->Texture
.Unit
[i
];
984 fprintf(stderr
, "Want to set FORMAT_HASH(%d, %d, 0x%04x, %d, %d, 0x%04x, 0x%08x, 0x%08x)\n",
985 texUnit
->_CurrentCombine
->OperandRGB
[0] -GL_SRC_COLOR
,
986 translate_src(texUnit
->_CurrentCombine
->SourceRGB
[0]),
987 texUnit
->_CurrentCombine
->ModeRGB
,
988 texUnit
->_CurrentCombine
->OperandA
[0] -GL_SRC_ALPHA
,
989 translate_src(texUnit
->_CurrentCombine
->SourceA
[0]),
990 texUnit
->_CurrentCombine
->ModeA
,
992 t
->base
.tObj
->Image
[0][0]->IntFormat
994 fprintf(stderr
, "Also known: format_x=%08x border_color=%08x cubic_faces=%08x\n", t
->format_x
, t
->pp_border_color
, t
->pp_cubic_faces
);
995 fprintf(stderr
, "\t_ReallyEnabled=%08x EnvMode=%08x IntFormat=%08x\n", texUnit
->_ReallyEnabled
, texUnit
->EnvMode
, t
->base
.tObj
->Image
[0][0]->IntFormat
);
1001 fprintf(stderr
, "Now trying format %08x\n",
1002 0x00a0c | (fmt
<<12));
1003 fprintf(stderr
, "size=%08x\n", t
->size
);
1005 r300
->hw
.tex
.format
.cmd
[R300_TEX_VALUE_0
+i
]=0x00a0c | (fmt
<<12);
1006 //r300->hw.tex.format.cmd[R300_TEX_VALUE_0+i]=0x51a00 | (fmt);
1007 //r300->hw.tex.format.cmd[R300_TEX_VALUE_0+i]=0x53a0c | (fmt<<24);
1014 ((drm_r300_cmd_header_t
*)r300
->hw
.tex
.filter
.cmd
)->unchecked_state
.count
= max_texture_unit
+1;
1015 ((drm_r300_cmd_header_t
*)r300
->hw
.tex
.unknown1
.cmd
)->unchecked_state
.count
= max_texture_unit
+1;
1016 ((drm_r300_cmd_header_t
*)r300
->hw
.tex
.size
.cmd
)->unchecked_state
.count
= max_texture_unit
+1;
1017 ((drm_r300_cmd_header_t
*)r300
->hw
.tex
.format
.cmd
)->unchecked_state
.count
= max_texture_unit
+1;
1018 ((drm_r300_cmd_header_t
*)r300
->hw
.tex
.offset
.cmd
)->unchecked_state
.count
= max_texture_unit
+1;
1019 ((drm_r300_cmd_header_t
*)r300
->hw
.tex
.unknown4
.cmd
)->unchecked_state
.count
= max_texture_unit
+1;
1020 ((drm_r300_cmd_header_t
*)r300
->hw
.tex
.unknown5
.cmd
)->unchecked_state
.count
= max_texture_unit
+1;
1022 if (RADEON_DEBUG
& DEBUG_STATE
)
1023 fprintf(stderr
, "TX_ENABLE: %08x max_texture_unit=%d\n", r300
->hw
.txe
.cmd
[R300_TXE_ENABLE
], max_texture_unit
);
1026 void r300_setup_rs_unit(GLcontext
*ctx
)
1028 r300ContextPtr r300
= R300_CONTEXT(ctx
);
1031 /* This needs to be rewritten - it is a hack at best */
1033 R300_STATECHANGE(r300
, ri
);
1034 R300_STATECHANGE(r300
, rc
);
1035 R300_STATECHANGE(r300
, rr
);
1037 for(i
= 1; i
<= 8; ++i
)
1038 r300
->hw
.ri
.cmd
[i
] = 0x00d10000;
1039 r300
->hw
.ri
.cmd
[R300_RI_INTERP_1
] |= R300_RS_INTERP_1_UNKNOWN
;
1040 r300
->hw
.ri
.cmd
[R300_RI_INTERP_2
] |= R300_RS_INTERP_2_UNKNOWN
;
1041 r300
->hw
.ri
.cmd
[R300_RI_INTERP_3
] |= R300_RS_INTERP_3_UNKNOWN
;
1043 for(i
= 1; i
<= 8; ++i
)
1044 r300
->hw
.rr
.cmd
[i
] = 0;
1045 /* textures enabled ? */
1046 if(r300
->state
.texture
.tc_count
>0){
1048 /* This code only really works with one set of texture coordinates */
1050 /* The second constant is needed to get glxgears display anything .. */
1051 r300
->hw
.rc
.cmd
[1] = R300_RS_CNTL_0_UNKNOWN_7
1052 | R300_RS_CNTL_0_UNKNOWN_18
1053 | (r300
->state
.texture
.tc_count
<<R300_RS_CNTL_TC_CNT_SHIFT
);
1054 r300
->hw
.rc
.cmd
[2] = 0xc0;
1057 ((drm_r300_cmd_header_t
*)r300
->hw
.rr
.cmd
)->unchecked_state
.count
= 1;
1058 r300
->hw
.rr
.cmd
[R300_RR_ROUTE_0
] = 0x24008;
1062 /* The second constant is needed to get glxgears display anything .. */
1063 r300
->hw
.rc
.cmd
[1] = R300_RS_CNTL_0_UNKNOWN_7
| R300_RS_CNTL_0_UNKNOWN_18
;
1064 r300
->hw
.rc
.cmd
[2] = 0;
1066 ((drm_r300_cmd_header_t
*)r300
->hw
.rr
.cmd
)->unchecked_state
.count
= 1;
1067 r300
->hw
.rr
.cmd
[R300_RR_ROUTE_0
] = 0x4000;
1072 #define vpucount(ptr) (((drm_r300_cmd_header_t*)(ptr))->vpu.count)
1074 #define bump_vpu_count(ptr, new_count) do{\
1075 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
1076 int _nc=(new_count)/4; \
1077 if(_nc>_p->vpu.count)_p->vpu.count=_nc;\
1080 void static inline setup_vertex_shader_fragment(r300ContextPtr r300
, int dest
, struct r300_vertex_shader_fragment
*vsf
)
1084 if(vsf
->length
==0)return;
1086 if(vsf
->length
& 0x3){
1087 fprintf(stderr
,"VERTEX_SHADER_FRAGMENT must have length divisible by 4\n");
1091 switch((dest
>>8) & 0xf){
1093 R300_STATECHANGE(r300
, vpi
);
1094 for(i
=0;i
<vsf
->length
;i
++)
1095 r300
->hw
.vpi
.cmd
[R300_VPI_INSTR_0
+i
+4*(dest
& 0xff)]=(vsf
->body
.d
[i
]);
1096 bump_vpu_count(r300
->hw
.vpi
.cmd
, vsf
->length
+4*(dest
& 0xff));
1100 R300_STATECHANGE(r300
, vpp
);
1101 for(i
=0;i
<vsf
->length
;i
++)
1102 r300
->hw
.vpp
.cmd
[R300_VPP_PARAM_0
+i
+4*(dest
& 0xff)]=(vsf
->body
.d
[i
]);
1103 bump_vpu_count(r300
->hw
.vpp
.cmd
, vsf
->length
+4*(dest
& 0xff));
1106 R300_STATECHANGE(r300
, vps
);
1107 for(i
=0;i
<vsf
->length
;i
++)
1108 r300
->hw
.vps
.cmd
[1+i
+4*(dest
& 0xff)]=(vsf
->body
.d
[i
]);
1109 bump_vpu_count(r300
->hw
.vps
.cmd
, vsf
->length
+4*(dest
& 0xff));
1112 fprintf(stderr
, "%s:%s don't know how to handle dest %04x\n", __FILE__
, __FUNCTION__
, dest
);
1118 void r300SetupVertexShader(r300ContextPtr rmesa
)
1120 GLcontext
* ctx
= rmesa
->radeon
.glCtx
;
1122 /* Reset state, in case we don't use something */
1123 ((drm_r300_cmd_header_t
*)rmesa
->hw
.vpp
.cmd
)->vpu
.count
= 0;
1124 ((drm_r300_cmd_header_t
*)rmesa
->hw
.vpi
.cmd
)->vpu
.count
= 0;
1125 ((drm_r300_cmd_header_t
*)rmesa
->hw
.vps
.cmd
)->vpu
.count
= 0;
1128 /* This needs to be replaced by vertex shader generation code */
1131 /* textures enabled ? */
1132 if(rmesa
->state
.texture
.tc_count
>0){
1133 rmesa
->state
.vertex_shader
=SINGLE_TEXTURE_VERTEX_SHADER
;
1135 rmesa
->state
.vertex_shader
=FLAT_COLOR_VERTEX_SHADER
;
1139 rmesa
->state
.vertex_shader
.matrix
[0].length
=16;
1140 memcpy(rmesa
->state
.vertex_shader
.matrix
[0].body
.f
, ctx
->_ModelProjectMatrix
.m
, 16*4);
1142 setup_vertex_shader_fragment(rmesa
, VSF_DEST_PROGRAM
, &(rmesa
->state
.vertex_shader
.program
));
1144 setup_vertex_shader_fragment(rmesa
, VSF_DEST_MATRIX0
, &(rmesa
->state
.vertex_shader
.matrix
[0]));
1146 setup_vertex_shader_fragment(rmesa
, VSF_DEST_MATRIX1
, &(rmesa
->state
.vertex_shader
.matrix
[0]));
1147 setup_vertex_shader_fragment(rmesa
, VSF_DEST_MATRIX2
, &(rmesa
->state
.vertex_shader
.matrix
[0]));
1149 setup_vertex_shader_fragment(rmesa
, VSF_DEST_VECTOR0
, &(rmesa
->state
.vertex_shader
.vector
[0]));
1150 setup_vertex_shader_fragment(rmesa
, VSF_DEST_VECTOR1
, &(rmesa
->state
.vertex_shader
.vector
[1]));
1154 setup_vertex_shader_fragment(rmesa
, VSF_DEST_UNKNOWN1
, &(rmesa
->state
.vertex_shader
.unknown1
));
1155 setup_vertex_shader_fragment(rmesa
, VSF_DEST_UNKNOWN2
, &(rmesa
->state
.vertex_shader
.unknown2
));
1158 R300_STATECHANGE(rmesa
, pvs
);
1159 rmesa
->hw
.pvs
.cmd
[R300_PVS_CNTL_1
]=(rmesa
->state
.vertex_shader
.program_start
<< R300_PVS_CNTL_1_PROGRAM_START_SHIFT
)
1160 | (rmesa
->state
.vertex_shader
.unknown_ptr1
<< R300_PVS_CNTL_1_UNKNOWN_SHIFT
)
1161 | (rmesa
->state
.vertex_shader
.program_end
<< R300_PVS_CNTL_1_PROGRAM_END_SHIFT
);
1162 rmesa
->hw
.pvs
.cmd
[R300_PVS_CNTL_2
]=(rmesa
->state
.vertex_shader
.param_offset
<< R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT
)
1163 | (rmesa
->state
.vertex_shader
.param_count
<< R300_PVS_CNTL_2_PARAM_COUNT_SHIFT
);
1164 rmesa
->hw
.pvs
.cmd
[R300_PVS_CNTL_3
]=(rmesa
->state
.vertex_shader
.unknown_ptr2
<< R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT
)
1165 | (rmesa
->state
.vertex_shader
.unknown_ptr3
<< 0);
1167 /* This is done for vertex shader fragments, but also needs to be done for vap_pvs,
1168 so I leave it as a reminder */
1170 reg_start(R300_VAP_PVS_WAITIDLE
,0);
1175 void r300SetupPixelShader(r300ContextPtr rmesa
)
1179 /* This needs to be replaced by pixel shader generation code */
1181 /* textures enabled ? */
1182 if(rmesa
->state
.texture
.tc_count
>0){
1183 rmesa
->state
.pixel_shader
=SINGLE_TEXTURE_PIXEL_SHADER
;
1185 rmesa
->state
.pixel_shader
=FLAT_COLOR_PIXEL_SHADER
;
1188 R300_STATECHANGE(rmesa
, fpt
);
1189 for(i
=0;i
<rmesa
->state
.pixel_shader
.program
.tex
.length
;i
++)
1190 rmesa
->hw
.fpt
.cmd
[R300_FPT_INSTR_0
+i
]=rmesa
->state
.pixel_shader
.program
.tex
.inst
[i
];
1191 rmesa
->hw
.fpt
.cmd
[R300_FPT_CMD_0
]=cmducs(R300_PFS_TEXI_0
, rmesa
->state
.pixel_shader
.program
.tex
.length
);
1193 #define OUTPUT_FIELD(st, reg, field) \
1194 R300_STATECHANGE(rmesa, st); \
1195 for(i=0;i<rmesa->state.pixel_shader.program.alu.length;i++) \
1196 rmesa->hw.st.cmd[R300_FPI_INSTR_0+i]=rmesa->state.pixel_shader.program.alu.inst[i].field;\
1197 rmesa->hw.st.cmd[R300_FPI_CMD_0]=cmducs(reg, rmesa->state.pixel_shader.program.alu.length);
1199 OUTPUT_FIELD(fpi
[0], R300_PFS_INSTR0_0
, inst0
);
1200 OUTPUT_FIELD(fpi
[1], R300_PFS_INSTR1_0
, inst1
);
1201 OUTPUT_FIELD(fpi
[2], R300_PFS_INSTR2_0
, inst2
);
1202 OUTPUT_FIELD(fpi
[3], R300_PFS_INSTR3_0
, inst3
);
1205 R300_STATECHANGE(rmesa
, fp
);
1207 rmesa
->hw
.fp
.cmd
[R300_FP_NODE0
+i
]=
1208 (rmesa
->state
.pixel_shader
.program
.node
[i
].alu_offset
<< R300_PFS_NODE_ALU_OFFSET_SHIFT
)
1209 | (rmesa
->state
.pixel_shader
.program
.node
[i
].alu_end
<< R300_PFS_NODE_ALU_END_SHIFT
)
1210 | (rmesa
->state
.pixel_shader
.program
.node
[i
].tex_offset
<< R300_PFS_NODE_TEX_OFFSET_SHIFT
)
1211 | (rmesa
->state
.pixel_shader
.program
.node
[i
].tex_end
<< R300_PFS_NODE_TEX_END_SHIFT
)
1212 | ( (i
==3) ? R300_PFS_NODE_LAST_NODE
: 0);
1216 rmesa
->hw
.fp
.cmd
[R300_FP_CNTL0
]=
1217 (rmesa
->state
.pixel_shader
.program
.active_nodes
-1)
1218 | (rmesa
->state
.pixel_shader
.program
.first_node_has_tex
<<3);
1220 rmesa
->hw
.fp
.cmd
[R300_FP_CNTL1
]=rmesa
->state
.pixel_shader
.program
.temp_register_count
;
1222 rmesa
->hw
.fp
.cmd
[R300_FP_CNTL2
]=
1223 (rmesa
->state
.pixel_shader
.program
.alu_offset
<< R300_PFS_CNTL_ALU_OFFSET_SHIFT
)
1224 | (rmesa
->state
.pixel_shader
.program
.alu_end
<< R300_PFS_CNTL_ALU_END_SHIFT
)
1225 | (rmesa
->state
.pixel_shader
.program
.tex_offset
<< R300_PFS_CNTL_TEX_OFFSET_SHIFT
)
1226 | (rmesa
->state
.pixel_shader
.program
.tex_end
<< R300_PFS_CNTL_TEX_END_SHIFT
);
1228 R300_STATECHANGE(rmesa
, fpp
);
1229 for(i
=0;i
<rmesa
->state
.pixel_shader
.param_length
;i
++){
1230 rmesa
->hw
.fpp
.cmd
[R300_FPP_PARAM_0
+4*i
+0]=r300PackFloat32(rmesa
->state
.pixel_shader
.param
[i
].x
);
1231 rmesa
->hw
.fpp
.cmd
[R300_FPP_PARAM_0
+4*i
+1]=r300PackFloat32(rmesa
->state
.pixel_shader
.param
[i
].y
);
1232 rmesa
->hw
.fpp
.cmd
[R300_FPP_PARAM_0
+4*i
+2]=r300PackFloat32(rmesa
->state
.pixel_shader
.param
[i
].z
);
1233 rmesa
->hw
.fpp
.cmd
[R300_FPP_PARAM_0
+4*i
+3]=r300PackFloat32(rmesa
->state
.pixel_shader
.param
[i
].w
);
1235 rmesa
->hw
.fpp
.cmd
[R300_FPP_CMD_0
]=cmducs(R300_PFS_PARAM_0_X
, rmesa
->state
.pixel_shader
.param_length
);
1240 * Called by Mesa after an internal state update.
1242 static void r300InvalidateState(GLcontext
* ctx
, GLuint new_state
)
1244 r300ContextPtr r300
= R300_CONTEXT(ctx
);
1246 _swrast_InvalidateState(ctx
, new_state
);
1247 _swsetup_InvalidateState(ctx
, new_state
);
1248 _ac_InvalidateState(ctx
, new_state
);
1249 _tnl_InvalidateState(ctx
, new_state
);
1250 _ae_invalidate_state(ctx
, new_state
);
1252 /* Go inefficiency! */
1253 r300ResetHwState(r300
);
1258 * Completely recalculates hardware state based on the Mesa state.
1260 void r300ResetHwState(r300ContextPtr r300
)
1262 GLcontext
* ctx
= r300
->radeon
.glCtx
;
1265 if (RADEON_DEBUG
& DEBUG_STATE
)
1266 fprintf(stderr
, "%s\n", __FUNCTION__
);
1268 r300UpdateWindow(ctx
);
1271 ctx
->Color
.ColorMask
[RCOMP
],
1272 ctx
->Color
.ColorMask
[GCOMP
],
1273 ctx
->Color
.ColorMask
[BCOMP
],
1274 ctx
->Color
.ColorMask
[ACOMP
]);
1276 r300Enable(ctx
, GL_DEPTH_TEST
, ctx
->Depth
.Test
);
1277 r300DepthMask(ctx
, ctx
->Depth
.Mask
);
1278 r300DepthFunc(ctx
, ctx
->Depth
.Func
);
1280 r300UpdateCulling(ctx
);
1282 r300_setup_routing(ctx
, GL_TRUE
);
1284 r300UpdateTextureState(ctx
);
1285 r300_setup_textures(ctx
);
1286 r300_setup_rs_unit(ctx
);
1288 r300SetupVertexShader(r300
);
1289 r300SetupPixelShader(r300
);
1291 r300_set_blend_state(ctx
);
1292 r300AlphaFunc(ctx
, ctx
->Color
.AlphaFunc
, ctx
->Color
.AlphaRef
);
1295 r300
->hw
.unk2080
.cmd
[1] = 0x0030045A;
1297 r300
->hw
.ovf
.cmd
[R300_OVF_FMT_0
] = 0x00000003;
1298 r300
->hw
.ovf
.cmd
[R300_OVF_FMT_1
] = 0x00000000;
1300 r300
->hw
.vte
.cmd
[1] = R300_VPORT_X_SCALE_ENA
1301 | R300_VPORT_X_OFFSET_ENA
1302 | R300_VPORT_Y_SCALE_ENA
1303 | R300_VPORT_Y_OFFSET_ENA
1304 | R300_VPORT_Z_SCALE_ENA
1305 | R300_VPORT_Z_OFFSET_ENA
1307 r300
->hw
.vte
.cmd
[2] = 0x00000008;
1309 r300
->hw
.unk2134
.cmd
[1] = 0x00FFFFFF;
1310 r300
->hw
.unk2134
.cmd
[2] = 0x00000000;
1312 r300
->hw
.unk2140
.cmd
[1] = 0x00000000;
1314 #if 0 /* Done in setup routing */
1315 ((drm_r300_cmd_header_t
*)r300
->hw
.vir
[0].cmd
)->unchecked_state
.count
= 1;
1316 r300
->hw
.vir
[0].cmd
[1] = 0x21030003;
1318 ((drm_r300_cmd_header_t
*)r300
->hw
.vir
[1].cmd
)->unchecked_state
.count
= 1;
1319 r300
->hw
.vir
[1].cmd
[1] = 0xF688F688;
1321 r300
->hw
.vic
.cmd
[R300_VIR_CNTL_0
] = 0x00000001;
1322 r300
->hw
.vic
.cmd
[R300_VIR_CNTL_1
] = 0x00000405;
1325 r300
->hw
.unk21DC
.cmd
[1] = 0xAAAAAAAA;
1327 r300
->hw
.unk221C
.cmd
[1] = R300_221C_NORMAL
;
1329 r300
->hw
.unk2220
.cmd
[1] = r300PackFloat32(1.0);
1330 r300
->hw
.unk2220
.cmd
[2] = r300PackFloat32(1.0);
1331 r300
->hw
.unk2220
.cmd
[3] = r300PackFloat32(1.0);
1332 r300
->hw
.unk2220
.cmd
[4] = r300PackFloat32(1.0);
1334 if (GET_CHIP(r300
->radeon
.radeonScreen
) == RADEON_CHIP_R300
)
1335 r300
->hw
.unk2288
.cmd
[1] = R300_2288_R300
;
1337 r300
->hw
.unk2288
.cmd
[1] = R300_2288_RV350
;
1340 r300
->hw
.vof
.cmd
[R300_VOF_CNTL_0
] = R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT
1341 | R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT
;
1342 r300
->hw
.vof
.cmd
[R300_VOF_CNTL_1
] = 0; /* no textures */
1345 r300
->hw
.pvs
.cmd
[R300_PVS_CNTL_1
] = 0;
1346 r300
->hw
.pvs
.cmd
[R300_PVS_CNTL_2
] = 0;
1347 r300
->hw
.pvs
.cmd
[R300_PVS_CNTL_3
] = 0;
1350 r300
->hw
.gb_enable
.cmd
[1] = R300_GB_POINT_STUFF_ENABLE
1351 | R300_GB_LINE_STUFF_ENABLE
1352 | R300_GB_TRIANGLE_STUFF_ENABLE
;
1354 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_MSPOS_0
] = 0x66666666;
1355 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_MSPOS_1
] = 0x06666666;
1356 if (GET_CHIP(r300
->radeon
.radeonScreen
) == RADEON_CHIP_R300
)
1357 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_TILE_CONFIG
] = R300_GB_TILE_ENABLE
1358 | R300_GB_TILE_PIPE_COUNT_R300
1359 | R300_GB_TILE_SIZE_16
;
1361 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_TILE_CONFIG
] = R300_GB_TILE_ENABLE
1362 | R300_GB_TILE_PIPE_COUNT_RV300
1363 | R300_GB_TILE_SIZE_16
;
1364 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_SELECT
] = 0x00000000;
1365 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_AA_CONFIG
] = 0x00000000; /* No antialiasing */
1367 //r300->hw.txe.cmd[R300_TXE_ENABLE] = 0;
1369 r300
->hw
.unk4200
.cmd
[1] = r300PackFloat32(0.0);
1370 r300
->hw
.unk4200
.cmd
[2] = r300PackFloat32(0.0);
1371 r300
->hw
.unk4200
.cmd
[3] = r300PackFloat32(1.0);
1372 r300
->hw
.unk4200
.cmd
[4] = r300PackFloat32(1.0);
1374 r300
->hw
.unk4214
.cmd
[1] = 0x00050005;
1376 r300
->hw
.ps
.cmd
[R300_PS_POINTSIZE
] = (6 << R300_POINTSIZE_X_SHIFT
) |
1377 (6 << R300_POINTSIZE_Y_SHIFT
);
1379 r300
->hw
.unk4230
.cmd
[1] = 0x01800000;
1380 r300
->hw
.unk4230
.cmd
[2] = 0x00020006;
1381 r300
->hw
.unk4230
.cmd
[3] = r300PackFloat32(1.0 / 192.0);
1383 r300
->hw
.unk4260
.cmd
[1] = 0;
1384 r300
->hw
.unk4260
.cmd
[2] = r300PackFloat32(0.0);
1385 r300
->hw
.unk4260
.cmd
[3] = r300PackFloat32(1.0);
1387 r300
->hw
.unk4274
.cmd
[1] = 0x00000002;
1388 r300
->hw
.unk4274
.cmd
[2] = 0x0003AAAA;
1389 r300
->hw
.unk4274
.cmd
[3] = 0x00000000;
1390 r300
->hw
.unk4274
.cmd
[4] = 0x00000000;
1392 r300
->hw
.unk4288
.cmd
[1] = 0x00000000;
1393 r300
->hw
.unk4288
.cmd
[2] = 0x00000001;
1394 r300
->hw
.unk4288
.cmd
[3] = 0x00000000;
1395 r300
->hw
.unk4288
.cmd
[4] = 0x00000000;
1396 r300
->hw
.unk4288
.cmd
[5] = 0x00000000;
1398 r300
->hw
.unk42A0
.cmd
[1] = 0x00000000;
1400 r300
->hw
.unk42B4
.cmd
[1] = 0x00000000;
1402 r300
->hw
.unk42C0
.cmd
[1] = 0x4B7FFFFF;
1403 r300
->hw
.unk42C0
.cmd
[2] = 0x00000000;
1406 r300
->hw
.unk43A4
.cmd
[1] = 0x0000001C;
1407 r300
->hw
.unk43A4
.cmd
[2] = 0x2DA49525;
1409 r300
->hw
.unk43E8
.cmd
[1] = 0x00FFFFFF;
1412 r300
->hw
.fp
.cmd
[R300_FP_CNTL0
] = 0;
1413 r300
->hw
.fp
.cmd
[R300_FP_CNTL1
] = 0;
1414 r300
->hw
.fp
.cmd
[R300_FP_CNTL2
] = 0;
1415 r300
->hw
.fp
.cmd
[R300_FP_NODE0
] = 0;
1416 r300
->hw
.fp
.cmd
[R300_FP_NODE1
] = 0;
1417 r300
->hw
.fp
.cmd
[R300_FP_NODE2
] = 0;
1418 r300
->hw
.fp
.cmd
[R300_FP_NODE3
] = 0;
1421 r300
->hw
.unk46A4
.cmd
[1] = 0x00001B01;
1422 r300
->hw
.unk46A4
.cmd
[2] = 0x00001B0F;
1423 r300
->hw
.unk46A4
.cmd
[3] = 0x00001B0F;
1424 r300
->hw
.unk46A4
.cmd
[4] = 0x00001B0F;
1425 r300
->hw
.unk46A4
.cmd
[5] = 0x00000001;
1428 for(i
= 1; i
<= 64; ++i
) {
1429 /* create NOP instructions */
1430 r300
->hw
.fpi
[0].cmd
[i
] = FP_INSTRC(MAD
, FP_ARGC(SRC0C_XYZ
), FP_ARGC(ONE
), FP_ARGC(ZERO
));
1431 r300
->hw
.fpi
[1].cmd
[i
] = FP_SELC(0,XYZ
,NO
,FP_TMP(0),0,0);
1432 r300
->hw
.fpi
[2].cmd
[i
] = FP_INSTRA(MAD
, FP_ARGA(SRC0A
), FP_ARGA(ONE
), FP_ARGA(ZERO
));
1433 r300
->hw
.fpi
[3].cmd
[i
] = FP_SELA(0,W
,NO
,FP_TMP(0),0,0);
1437 r300
->hw
.unk4BC0
.cmd
[1] = 0;
1439 r300
->hw
.unk4BC8
.cmd
[1] = 0;
1440 r300
->hw
.unk4BC8
.cmd
[2] = 0;
1441 r300
->hw
.unk4BC8
.cmd
[3] = 0;
1444 r300
->hw
.at
.cmd
[R300_AT_ALPHA_TEST
] = 0;
1447 r300
->hw
.unk4BD8
.cmd
[1] = 0;
1449 r300
->hw
.unk4E00
.cmd
[1] = 0;
1452 r300
->hw
.bld
.cmd
[R300_BLD_CBLEND
] = 0;
1453 r300
->hw
.bld
.cmd
[R300_BLD_ABLEND
] = 0;
1456 r300
->hw
.unk4E10
.cmd
[1] = 0;
1457 r300
->hw
.unk4E10
.cmd
[2] = 0;
1458 r300
->hw
.unk4E10
.cmd
[3] = 0;
1460 r300
->hw
.cb
.cmd
[R300_CB_OFFSET
] =
1461 r300
->radeon
.radeonScreen
->backOffset
+
1462 r300
->radeon
.radeonScreen
->fbLocation
;
1463 r300
->hw
.cb
.cmd
[R300_CB_PITCH
] = r300
->radeon
.radeonScreen
->backPitch
1464 | R300_COLOR_UNKNOWN_22_23
;
1466 r300
->hw
.unk4E50
.cmd
[1] = 0;
1467 r300
->hw
.unk4E50
.cmd
[2] = 0;
1468 r300
->hw
.unk4E50
.cmd
[3] = 0;
1469 r300
->hw
.unk4E50
.cmd
[4] = 0;
1470 r300
->hw
.unk4E50
.cmd
[5] = 0;
1471 r300
->hw
.unk4E50
.cmd
[6] = 0;
1472 r300
->hw
.unk4E50
.cmd
[7] = 0;
1473 r300
->hw
.unk4E50
.cmd
[8] = 0;
1474 r300
->hw
.unk4E50
.cmd
[9] = 0;
1476 r300
->hw
.unk4E88
.cmd
[1] = 0;
1478 r300
->hw
.unk4EA0
.cmd
[1] = 0x00000000;
1479 r300
->hw
.unk4EA0
.cmd
[2] = 0xffffffff;
1481 r300
->hw
.unk4F08
.cmd
[1] = 0x00FFFF00;
1483 r300
->hw
.unk4F10
.cmd
[1] = 0x00000002; // depthbuffer format?
1484 r300
->hw
.unk4F10
.cmd
[2] = 0x00000000;
1485 r300
->hw
.unk4F10
.cmd
[3] = 0x00000003;
1486 r300
->hw
.unk4F10
.cmd
[4] = 0x00000000;
1488 r300
->hw
.zb
.cmd
[R300_ZB_OFFSET
] =
1489 r300
->radeon
.radeonScreen
->depthOffset
+
1490 r300
->radeon
.radeonScreen
->fbLocation
;
1491 r300
->hw
.zb
.cmd
[R300_ZB_PITCH
] = r300
->radeon
.radeonScreen
->depthPitch
;
1493 r300
->hw
.unk4F28
.cmd
[1] = 0;
1495 r300
->hw
.unk4F30
.cmd
[1] = 0;
1496 r300
->hw
.unk4F30
.cmd
[2] = 0;
1498 r300
->hw
.unk4F44
.cmd
[1] = 0;
1500 r300
->hw
.unk4F54
.cmd
[1] = 0;
1503 ((drm_r300_cmd_header_t
*)r300
->hw
.vpi
.cmd
)->vpu
.count
= 0;
1504 for(i
= 1; i
< R300_VPI_CMDSIZE
; i
+= 4) {
1506 r300
->hw
.vpi
.cmd
[i
+0] = VP_OUT(ADD
,TMP
,0,XYZW
);
1507 r300
->hw
.vpi
.cmd
[i
+1] = VP_IN(TMP
,0);
1508 r300
->hw
.vpi
.cmd
[i
+2] = VP_ZERO();
1509 r300
->hw
.vpi
.cmd
[i
+3] = VP_ZERO();
1512 ((drm_r300_cmd_header_t
*)r300
->hw
.vpp
.cmd
)->vpu
.count
= 0;
1513 for(i
= 1; i
< R300_VPP_CMDSIZE
; ++i
)
1514 r300
->hw
.vpp
.cmd
[i
] = 0;
1517 r300
->hw
.vps
.cmd
[R300_VPS_ZERO_0
] = 0;
1518 r300
->hw
.vps
.cmd
[R300_VPS_ZERO_1
] = 0;
1519 r300
->hw
.vps
.cmd
[R300_VPS_POINTSIZE
] = r300PackFloat32(1.0);
1520 r300
->hw
.vps
.cmd
[R300_VPS_ZERO_3
] = 0;
1524 r300
->hw
.all_dirty
= GL_TRUE
;
1530 * Calculate initial hardware state and register state functions.
1531 * Assumes that the command buffer and state atoms have been
1532 * initialized already.
1534 void r300InitState(r300ContextPtr r300
)
1536 GLcontext
*ctx
= r300
->radeon
.glCtx
;
1539 radeonInitState(&r300
->radeon
);
1541 switch (ctx
->Visual
.depthBits
) {
1543 r300
->state
.depth
.scale
= 1.0 / (GLfloat
) 0xffff;
1544 depth_fmt
= R200_DEPTH_FORMAT_16BIT_INT_Z
;
1545 //r300->state.stencil.clear = 0x00000000;
1548 r300
->state
.depth
.scale
= 1.0 / (GLfloat
) 0xffffff;
1549 depth_fmt
= R200_DEPTH_FORMAT_24BIT_INT_Z
;
1550 //r300->state.stencil.clear = 0xff000000;
1553 fprintf(stderr
, "Error: Unsupported depth %d... exiting\n",
1554 ctx
->Visual
.depthBits
);
1558 memset(&(r300
->state
.texture
), 0, sizeof(r300
->state
.texture
));
1560 r300ResetHwState(r300
);
1566 * Initialize driver's state callback functions
1568 void r300InitStateFuncs(struct dd_function_table
* functions
)
1570 radeonInitStateFuncs(functions
);
1572 functions
->UpdateState
= r300InvalidateState
;
1573 //functions->AlphaFunc = r300AlphaFunc;
1574 functions
->BlendColor
= r300BlendColor
;
1575 functions
->BlendEquationSeparate
= r300BlendEquationSeparate
;
1576 functions
->BlendFuncSeparate
= r300BlendFuncSeparate
;
1577 functions
->Enable
= r300Enable
;
1578 functions
->ColorMask
= r300ColorMask
;
1579 functions
->DepthFunc
= r300DepthFunc
;
1580 functions
->DepthMask
= r300DepthMask
;
1581 functions
->CullFace
= r300CullFace
;
1582 functions
->FrontFace
= r300FrontFace
;
1584 /* Viewport related */
1585 functions
->Viewport
= r300Viewport
;
1586 functions
->DepthRange
= r300DepthRange
;
1587 functions
->PointSize
= r300PointSize
;