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r300: fix depth write regression (found by Nicolai Haehnle)
[mesa.git] / src / mesa / drivers / dri / r300 / r300_state.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002.
3 Copyright (C) 2004 Nicolai Haehnle.
4 All Rights Reserved.
5
6 The Weather Channel (TM) funded Tungsten Graphics to develop the
7 initial release of the Radeon 8500 driver under the XFree86 license.
8 This notice must be preserved.
9
10 Permission is hereby granted, free of charge, to any person obtaining
11 a copy of this software and associated documentation files (the
12 "Software"), to deal in the Software without restriction, including
13 without limitation the rights to use, copy, modify, merge, publish,
14 distribute, sublicense, and/or sell copies of the Software, and to
15 permit persons to whom the Software is furnished to do so, subject to
16 the following conditions:
17
18 The above copyright notice and this permission notice (including the
19 next paragraph) shall be included in all copies or substantial
20 portions of the Software.
21
22 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
25 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
26 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
27 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
28 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29
30 **************************************************************************/
31
32 /**
33 * \file
34 *
35 * \author Nicolai Haehnle <prefect_@gmx.net>
36 */
37
38 #include "main/glheader.h"
39 #include "main/state.h"
40 #include "main/imports.h"
41 #include "main/enums.h"
42 #include "main/macros.h"
43 #include "main/context.h"
44 #include "main/dd.h"
45 #include "main/simple_list.h"
46 #include "main/api_arrayelt.h"
47 #include "main/texformat.h"
48
49 #include "swrast/swrast.h"
50 #include "swrast_setup/swrast_setup.h"
51 #include "shader/prog_parameter.h"
52 #include "shader/prog_statevars.h"
53 #include "vbo/vbo.h"
54 #include "tnl/tnl.h"
55
56 #include "radeon_ioctl.h"
57 #include "radeon_state.h"
58 #include "r300_context.h"
59 #include "r300_ioctl.h"
60 #include "r300_state.h"
61 #include "r300_reg.h"
62 #include "r300_emit.h"
63 #include "r300_fragprog.h"
64 #include "r300_tex.h"
65
66 #include "drirenderbuffer.h"
67
68 extern int future_hw_tcl_on;
69 extern void _tnl_UpdateFixedFunctionProgram(GLcontext * ctx);
70
71 static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4])
72 {
73 r300ContextPtr rmesa = R300_CONTEXT(ctx);
74
75 R300_STATECHANGE(rmesa, blend_color);
76
77 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
78 GLuint r = IROUND(cf[0]*1023.0f);
79 GLuint g = IROUND(cf[1]*1023.0f);
80 GLuint b = IROUND(cf[2]*1023.0f);
81 GLuint a = IROUND(cf[3]*1023.0f);
82
83 rmesa->hw.blend_color.cmd[1] = r | (a << 16);
84 rmesa->hw.blend_color.cmd[2] = b | (g << 16);
85 } else {
86 GLubyte color[4];
87 CLAMPED_FLOAT_TO_UBYTE(color[0], cf[0]);
88 CLAMPED_FLOAT_TO_UBYTE(color[1], cf[1]);
89 CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]);
90 CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]);
91
92 rmesa->hw.blend_color.cmd[1] = PACK_COLOR_8888(color[3], color[0],
93 color[1], color[2]);
94 }
95 }
96
97 /**
98 * Calculate the hardware blend factor setting. This same function is used
99 * for source and destination of both alpha and RGB.
100 *
101 * \returns
102 * The hardware register value for the specified blend factor. This value
103 * will need to be shifted into the correct position for either source or
104 * destination factor.
105 *
106 * \todo
107 * Since the two cases where source and destination are handled differently
108 * are essentially error cases, they should never happen. Determine if these
109 * cases can be removed.
110 */
111 static int blend_factor(GLenum factor, GLboolean is_src)
112 {
113 switch (factor) {
114 case GL_ZERO:
115 return R300_BLEND_GL_ZERO;
116 break;
117 case GL_ONE:
118 return R300_BLEND_GL_ONE;
119 break;
120 case GL_DST_COLOR:
121 return R300_BLEND_GL_DST_COLOR;
122 break;
123 case GL_ONE_MINUS_DST_COLOR:
124 return R300_BLEND_GL_ONE_MINUS_DST_COLOR;
125 break;
126 case GL_SRC_COLOR:
127 return R300_BLEND_GL_SRC_COLOR;
128 break;
129 case GL_ONE_MINUS_SRC_COLOR:
130 return R300_BLEND_GL_ONE_MINUS_SRC_COLOR;
131 break;
132 case GL_SRC_ALPHA:
133 return R300_BLEND_GL_SRC_ALPHA;
134 break;
135 case GL_ONE_MINUS_SRC_ALPHA:
136 return R300_BLEND_GL_ONE_MINUS_SRC_ALPHA;
137 break;
138 case GL_DST_ALPHA:
139 return R300_BLEND_GL_DST_ALPHA;
140 break;
141 case GL_ONE_MINUS_DST_ALPHA:
142 return R300_BLEND_GL_ONE_MINUS_DST_ALPHA;
143 break;
144 case GL_SRC_ALPHA_SATURATE:
145 return (is_src) ? R300_BLEND_GL_SRC_ALPHA_SATURATE :
146 R300_BLEND_GL_ZERO;
147 break;
148 case GL_CONSTANT_COLOR:
149 return R300_BLEND_GL_CONST_COLOR;
150 break;
151 case GL_ONE_MINUS_CONSTANT_COLOR:
152 return R300_BLEND_GL_ONE_MINUS_CONST_COLOR;
153 break;
154 case GL_CONSTANT_ALPHA:
155 return R300_BLEND_GL_CONST_ALPHA;
156 break;
157 case GL_ONE_MINUS_CONSTANT_ALPHA:
158 return R300_BLEND_GL_ONE_MINUS_CONST_ALPHA;
159 break;
160 default:
161 fprintf(stderr, "unknown blend factor %x\n", factor);
162 return (is_src) ? R300_BLEND_GL_ONE : R300_BLEND_GL_ZERO;
163 break;
164 }
165 }
166
167 /**
168 * Sets both the blend equation and the blend function.
169 * This is done in a single
170 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
171 * change the interpretation of the blend function.
172 * Also, make sure that blend function and blend equation are set to their
173 * default value if color blending is not enabled, since at least blend
174 * equations GL_MIN and GL_FUNC_REVERSE_SUBTRACT will cause wrong results
175 * otherwise for unknown reasons.
176 */
177
178 /* helper function */
179 static void r300SetBlendCntl(r300ContextPtr r300, int func, int eqn,
180 int cbits, int funcA, int eqnA)
181 {
182 GLuint new_ablend, new_cblend;
183
184 #if 0
185 fprintf(stderr,
186 "eqnA=%08x funcA=%08x eqn=%08x func=%08x cbits=%08x\n",
187 eqnA, funcA, eqn, func, cbits);
188 #endif
189 new_ablend = eqnA | funcA;
190 new_cblend = eqn | func;
191
192 /* Some blend factor combinations don't seem to work when the
193 * BLEND_NO_SEPARATE bit is set.
194 *
195 * Especially problematic candidates are the ONE_MINUS_* flags,
196 * but I can't see a real pattern.
197 */
198 #if 0
199 if (new_ablend == new_cblend) {
200 new_cblend |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
201 }
202 #endif
203 new_cblend |= cbits;
204
205 if ((new_ablend != r300->hw.bld.cmd[R300_BLD_ABLEND]) ||
206 (new_cblend != r300->hw.bld.cmd[R300_BLD_CBLEND])) {
207 R300_STATECHANGE(r300, bld);
208 r300->hw.bld.cmd[R300_BLD_ABLEND] = new_ablend;
209 r300->hw.bld.cmd[R300_BLD_CBLEND] = new_cblend;
210 }
211 }
212
213 static void r300SetBlendState(GLcontext * ctx)
214 {
215 r300ContextPtr r300 = R300_CONTEXT(ctx);
216 int func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
217 (R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
218 int eqn = R300_COMB_FCN_ADD_CLAMP;
219 int funcA = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
220 (R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
221 int eqnA = R300_COMB_FCN_ADD_CLAMP;
222
223 if (RGBA_LOGICOP_ENABLED(ctx) || !ctx->Color.BlendEnabled) {
224 r300SetBlendCntl(r300, func, eqn, 0, func, eqn);
225 return;
226 }
227
228 func =
229 (blend_factor(ctx->Color.BlendSrcRGB, GL_TRUE) <<
230 R300_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstRGB,
231 GL_FALSE) <<
232 R300_DST_BLEND_SHIFT);
233
234 switch (ctx->Color.BlendEquationRGB) {
235 case GL_FUNC_ADD:
236 eqn = R300_COMB_FCN_ADD_CLAMP;
237 break;
238
239 case GL_FUNC_SUBTRACT:
240 eqn = R300_COMB_FCN_SUB_CLAMP;
241 break;
242
243 case GL_FUNC_REVERSE_SUBTRACT:
244 eqn = R300_COMB_FCN_RSUB_CLAMP;
245 break;
246
247 case GL_MIN:
248 eqn = R300_COMB_FCN_MIN;
249 func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
250 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
251 break;
252
253 case GL_MAX:
254 eqn = R300_COMB_FCN_MAX;
255 func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
256 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
257 break;
258
259 default:
260 fprintf(stderr,
261 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
262 __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB);
263 return;
264 }
265
266 funcA =
267 (blend_factor(ctx->Color.BlendSrcA, GL_TRUE) <<
268 R300_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstA,
269 GL_FALSE) <<
270 R300_DST_BLEND_SHIFT);
271
272 switch (ctx->Color.BlendEquationA) {
273 case GL_FUNC_ADD:
274 eqnA = R300_COMB_FCN_ADD_CLAMP;
275 break;
276
277 case GL_FUNC_SUBTRACT:
278 eqnA = R300_COMB_FCN_SUB_CLAMP;
279 break;
280
281 case GL_FUNC_REVERSE_SUBTRACT:
282 eqnA = R300_COMB_FCN_RSUB_CLAMP;
283 break;
284
285 case GL_MIN:
286 eqnA = R300_COMB_FCN_MIN;
287 funcA = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
288 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
289 break;
290
291 case GL_MAX:
292 eqnA = R300_COMB_FCN_MAX;
293 funcA = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
294 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
295 break;
296
297 default:
298 fprintf(stderr,
299 "[%s:%u] Invalid A blend equation (0x%04x).\n",
300 __FUNCTION__, __LINE__, ctx->Color.BlendEquationA);
301 return;
302 }
303
304 r300SetBlendCntl(r300,
305 func, eqn,
306 (R300_SEPARATE_ALPHA_ENABLE |
307 R300_READ_ENABLE |
308 R300_ALPHA_BLEND_ENABLE), funcA, eqnA);
309 }
310
311 static void r300BlendEquationSeparate(GLcontext * ctx,
312 GLenum modeRGB, GLenum modeA)
313 {
314 r300SetBlendState(ctx);
315 }
316
317 static void r300BlendFuncSeparate(GLcontext * ctx,
318 GLenum sfactorRGB, GLenum dfactorRGB,
319 GLenum sfactorA, GLenum dfactorA)
320 {
321 r300SetBlendState(ctx);
322 }
323
324 /**
325 * Translate LogicOp enums into hardware representation.
326 * Both use a very logical bit-wise layout, but unfortunately the order
327 * of bits is reversed.
328 */
329 static GLuint translate_logicop(GLenum logicop)
330 {
331 GLuint bits = logicop - GL_CLEAR;
332 bits = ((bits & 1) << 3) | ((bits & 2) << 1) | ((bits & 4) >> 1) | ((bits & 8) >> 3);
333 return bits << R300_RB3D_ROPCNTL_ROP_SHIFT;
334 }
335
336 /**
337 * Used internally to update the r300->hw hardware state to match the
338 * current OpenGL state.
339 */
340 static void r300SetLogicOpState(GLcontext *ctx)
341 {
342 r300ContextPtr r300 = R300_CONTEXT(ctx);
343 R300_STATECHANGE(r300, rop);
344 if (RGBA_LOGICOP_ENABLED(ctx)) {
345 r300->hw.rop.cmd[1] = R300_RB3D_ROPCNTL_ROP_ENABLE |
346 translate_logicop(ctx->Color.LogicOp);
347 } else {
348 r300->hw.rop.cmd[1] = 0;
349 }
350 }
351
352 /**
353 * Called by Mesa when an application program changes the LogicOp state
354 * via glLogicOp.
355 */
356 static void r300LogicOpcode(GLcontext *ctx, GLenum logicop)
357 {
358 if (RGBA_LOGICOP_ENABLED(ctx))
359 r300SetLogicOpState(ctx);
360 }
361
362 static void r300ClipPlane( GLcontext *ctx, GLenum plane, const GLfloat *eq )
363 {
364 r300ContextPtr rmesa = R300_CONTEXT(ctx);
365 GLint p;
366 GLint *ip;
367
368 /* no VAP UCP on non-TCL chipsets */
369 if (!(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
370 return;
371
372 p = (GLint) plane - (GLint) GL_CLIP_PLANE0;
373 ip = (GLint *)ctx->Transform._ClipUserPlane[p];
374
375 R300_STATECHANGE( rmesa, vpucp[p] );
376 rmesa->hw.vpucp[p].cmd[R300_VPUCP_X] = ip[0];
377 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Y] = ip[1];
378 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Z] = ip[2];
379 rmesa->hw.vpucp[p].cmd[R300_VPUCP_W] = ip[3];
380 }
381
382 static void r300SetClipPlaneState(GLcontext * ctx, GLenum cap, GLboolean state)
383 {
384 r300ContextPtr r300 = R300_CONTEXT(ctx);
385 GLuint p;
386
387 /* no VAP UCP on non-TCL chipsets */
388 if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
389 return;
390
391 p = cap - GL_CLIP_PLANE0;
392 R300_STATECHANGE(r300, vap_clip_cntl);
393 if (state) {
394 r300->hw.vap_clip_cntl.cmd[1] |= (R300_VAP_UCP_ENABLE_0 << p);
395 r300ClipPlane(ctx, cap, NULL);
396 } else {
397 r300->hw.vap_clip_cntl.cmd[1] &= ~(R300_VAP_UCP_ENABLE_0 << p);
398 }
399 }
400
401 /**
402 * Update our tracked culling state based on Mesa's state.
403 */
404 static void r300UpdateCulling(GLcontext * ctx)
405 {
406 r300ContextPtr r300 = R300_CONTEXT(ctx);
407 uint32_t val = 0;
408
409 if (ctx->Polygon.CullFlag) {
410 switch (ctx->Polygon.CullFaceMode) {
411 case GL_FRONT:
412 val = R300_CULL_FRONT;
413 break;
414 case GL_BACK:
415 val = R300_CULL_BACK;
416 break;
417 case GL_FRONT_AND_BACK:
418 val = R300_CULL_FRONT | R300_CULL_BACK;
419 break;
420 default:
421 break;
422 }
423 }
424
425 switch (ctx->Polygon.FrontFace) {
426 case GL_CW:
427 val |= R300_FRONT_FACE_CW;
428 break;
429 case GL_CCW:
430 val |= R300_FRONT_FACE_CCW;
431 break;
432 default:
433 break;
434 }
435
436 R300_STATECHANGE(r300, cul);
437 r300->hw.cul.cmd[R300_CUL_CULL] = val;
438 }
439
440 static void r300SetPolygonOffsetState(GLcontext * ctx, GLboolean state)
441 {
442 r300ContextPtr r300 = R300_CONTEXT(ctx);
443
444 R300_STATECHANGE(r300, occlusion_cntl);
445 if (state) {
446 r300->hw.occlusion_cntl.cmd[1] |= (3 << 0);
447 } else {
448 r300->hw.occlusion_cntl.cmd[1] &= ~(3 << 0);
449 }
450 }
451
452 static GLboolean current_fragment_program_writes_depth(GLcontext* ctx)
453 {
454 r300ContextPtr r300 = R300_CONTEXT(ctx);
455
456 if (r300->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV515) {
457 struct r300_fragment_program *fp = (struct r300_fragment_program *)
458 (char *)ctx->FragmentProgram._Current;
459 return (fp && fp->WritesDepth);
460 } else {
461 struct r500_fragment_program* fp =
462 (struct r500_fragment_program*)(char*)
463 ctx->FragmentProgram._Current;
464 return (fp && fp->writes_depth);
465 }
466 }
467
468 static void r300SetEarlyZState(GLcontext * ctx)
469 {
470 r300ContextPtr r300 = R300_CONTEXT(ctx);
471 GLuint topZ = R300_ZTOP_ENABLE;
472
473 if (ctx->Color.AlphaEnabled && ctx->Color.AlphaFunc != GL_ALWAYS)
474 topZ = R300_ZTOP_DISABLE;
475 if (current_fragment_program_writes_depth(ctx))
476 topZ = R300_ZTOP_DISABLE;
477
478 if (topZ != r300->hw.zstencil_format.cmd[2]) {
479 /* Note: This completely reemits the stencil format.
480 * I have not tested whether this is strictly necessary,
481 * or if emitting a write to ZB_ZTOP is enough.
482 */
483 R300_STATECHANGE(r300, zstencil_format);
484 r300->hw.zstencil_format.cmd[2] = topZ;
485 }
486 }
487
488 static void r300SetAlphaState(GLcontext * ctx)
489 {
490 r300ContextPtr r300 = R300_CONTEXT(ctx);
491 GLubyte refByte;
492 uint32_t pp_misc = 0x0;
493 GLboolean really_enabled = ctx->Color.AlphaEnabled;
494
495 CLAMPED_FLOAT_TO_UBYTE(refByte, ctx->Color.AlphaRef);
496
497 switch (ctx->Color.AlphaFunc) {
498 case GL_NEVER:
499 pp_misc |= R300_FG_ALPHA_FUNC_NEVER;
500 break;
501 case GL_LESS:
502 pp_misc |= R300_FG_ALPHA_FUNC_LESS;
503 break;
504 case GL_EQUAL:
505 pp_misc |= R300_FG_ALPHA_FUNC_EQUAL;
506 break;
507 case GL_LEQUAL:
508 pp_misc |= R300_FG_ALPHA_FUNC_LE;
509 break;
510 case GL_GREATER:
511 pp_misc |= R300_FG_ALPHA_FUNC_GREATER;
512 break;
513 case GL_NOTEQUAL:
514 pp_misc |= R300_FG_ALPHA_FUNC_NOTEQUAL;
515 break;
516 case GL_GEQUAL:
517 pp_misc |= R300_FG_ALPHA_FUNC_GE;
518 break;
519 case GL_ALWAYS:
520 /*pp_misc |= FG_ALPHA_FUNC_ALWAYS; */
521 really_enabled = GL_FALSE;
522 break;
523 }
524
525 if (really_enabled) {
526 pp_misc |= R300_FG_ALPHA_FUNC_ENABLE;
527 pp_misc |= R500_FG_ALPHA_FUNC_8BIT;
528 pp_misc |= (refByte & R300_FG_ALPHA_FUNC_VAL_MASK);
529 } else {
530 pp_misc = 0x0;
531 }
532
533 R300_STATECHANGE(r300, at);
534 r300->hw.at.cmd[R300_AT_ALPHA_TEST] = pp_misc;
535 r300->hw.at.cmd[R300_AT_UNKNOWN] = 0;
536
537 r300SetEarlyZState(ctx);
538 }
539
540 static void r300AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
541 {
542 (void)func;
543 (void)ref;
544 r300SetAlphaState(ctx);
545 }
546
547 static int translate_func(int func)
548 {
549 switch (func) {
550 case GL_NEVER:
551 return R300_ZS_NEVER;
552 case GL_LESS:
553 return R300_ZS_LESS;
554 case GL_EQUAL:
555 return R300_ZS_EQUAL;
556 case GL_LEQUAL:
557 return R300_ZS_LEQUAL;
558 case GL_GREATER:
559 return R300_ZS_GREATER;
560 case GL_NOTEQUAL:
561 return R300_ZS_NOTEQUAL;
562 case GL_GEQUAL:
563 return R300_ZS_GEQUAL;
564 case GL_ALWAYS:
565 return R300_ZS_ALWAYS;
566 }
567 return 0;
568 }
569
570 static void r300SetDepthState(GLcontext * ctx)
571 {
572 r300ContextPtr r300 = R300_CONTEXT(ctx);
573
574 R300_STATECHANGE(r300, zs);
575 r300->hw.zs.cmd[R300_ZS_CNTL_0] &= R300_STENCIL_ENABLE|R300_STENCIL_FRONT_BACK;
576 r300->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(R300_ZS_MASK << R300_Z_FUNC_SHIFT);
577
578 if (ctx->Depth.Test) {
579 r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_Z_ENABLE;
580 if (ctx->Depth.Mask)
581 r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_Z_WRITE_ENABLE;
582 r300->hw.zs.cmd[R300_ZS_CNTL_1] |=
583 translate_func(ctx->Depth.Func) << R300_Z_FUNC_SHIFT;
584 }
585
586 r300SetEarlyZState(ctx);
587 }
588
589 static void r300SetStencilState(GLcontext * ctx, GLboolean state)
590 {
591 r300ContextPtr r300 = R300_CONTEXT(ctx);
592
593 if (r300->state.stencil.hw_stencil) {
594 R300_STATECHANGE(r300, zs);
595 if (state) {
596 r300->hw.zs.cmd[R300_ZS_CNTL_0] |=
597 R300_STENCIL_ENABLE;
598 } else {
599 r300->hw.zs.cmd[R300_ZS_CNTL_0] &=
600 ~R300_STENCIL_ENABLE;
601 }
602 } else {
603 #if R200_MERGED
604 FALLBACK(&r300->radeon, RADEON_FALLBACK_STENCIL, state);
605 #endif
606 }
607 }
608
609 static void r300UpdatePolygonMode(GLcontext * ctx)
610 {
611 r300ContextPtr r300 = R300_CONTEXT(ctx);
612 uint32_t hw_mode = R300_GA_POLY_MODE_DISABLE;
613
614 /* Only do something if a polygon mode is wanted, default is GL_FILL */
615 if (ctx->Polygon.FrontMode != GL_FILL ||
616 ctx->Polygon.BackMode != GL_FILL) {
617 GLenum f, b;
618
619 /* Handle GL_CW (clock wise and GL_CCW (counter clock wise)
620 * correctly by selecting the correct front and back face
621 */
622 if (ctx->Polygon.FrontFace == GL_CCW) {
623 f = ctx->Polygon.FrontMode;
624 b = ctx->Polygon.BackMode;
625 } else {
626 f = ctx->Polygon.BackMode;
627 b = ctx->Polygon.FrontMode;
628 }
629
630 /* Enable polygon mode */
631 hw_mode |= R300_GA_POLY_MODE_DUAL;
632
633 switch (f) {
634 case GL_LINE:
635 hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_LINE;
636 break;
637 case GL_POINT:
638 hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_POINT;
639 break;
640 case GL_FILL:
641 hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_TRI;
642 break;
643 }
644
645 switch (b) {
646 case GL_LINE:
647 hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_LINE;
648 break;
649 case GL_POINT:
650 hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_POINT;
651 break;
652 case GL_FILL:
653 hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_TRI;
654 break;
655 }
656 }
657
658 if (r300->hw.polygon_mode.cmd[1] != hw_mode) {
659 R300_STATECHANGE(r300, polygon_mode);
660 r300->hw.polygon_mode.cmd[1] = hw_mode;
661 }
662
663 r300->hw.polygon_mode.cmd[2] = 0x00000001;
664 r300->hw.polygon_mode.cmd[3] = 0x00000000;
665 }
666
667 /**
668 * Change the culling mode.
669 *
670 * \note Mesa already filters redundant calls to this function.
671 */
672 static void r300CullFace(GLcontext * ctx, GLenum mode)
673 {
674 (void)mode;
675
676 r300UpdateCulling(ctx);
677 }
678
679 /**
680 * Change the polygon orientation.
681 *
682 * \note Mesa already filters redundant calls to this function.
683 */
684 static void r300FrontFace(GLcontext * ctx, GLenum mode)
685 {
686 (void)mode;
687
688 r300UpdateCulling(ctx);
689 r300UpdatePolygonMode(ctx);
690 }
691
692 /**
693 * Change the depth testing function.
694 *
695 * \note Mesa already filters redundant calls to this function.
696 */
697 static void r300DepthFunc(GLcontext * ctx, GLenum func)
698 {
699 (void)func;
700 r300SetDepthState(ctx);
701 }
702
703 /**
704 * Enable/Disable depth writing.
705 *
706 * \note Mesa already filters redundant calls to this function.
707 */
708 static void r300DepthMask(GLcontext * ctx, GLboolean mask)
709 {
710 (void)mask;
711 r300SetDepthState(ctx);
712 }
713
714 /**
715 * Handle glColorMask()
716 */
717 static void r300ColorMask(GLcontext * ctx,
718 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
719 {
720 r300ContextPtr r300 = R300_CONTEXT(ctx);
721 int mask = (r ? RB3D_COLOR_CHANNEL_MASK_RED_MASK0 : 0) |
722 (g ? RB3D_COLOR_CHANNEL_MASK_GREEN_MASK0 : 0) |
723 (b ? RB3D_COLOR_CHANNEL_MASK_BLUE_MASK0 : 0) |
724 (a ? RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK0 : 0);
725
726 if (mask != r300->hw.cmk.cmd[R300_CMK_COLORMASK]) {
727 R300_STATECHANGE(r300, cmk);
728 r300->hw.cmk.cmd[R300_CMK_COLORMASK] = mask;
729 }
730 }
731
732 /* =============================================================
733 * Point state
734 */
735 static void r300PointSize(GLcontext * ctx, GLfloat size)
736 {
737 r300ContextPtr r300 = R300_CONTEXT(ctx);
738 /* same size limits for AA, non-AA points */
739 size = CLAMP(size, ctx->Const.MinPointSize, ctx->Const.MaxPointSize);
740
741 R300_STATECHANGE(r300, ps);
742 r300->hw.ps.cmd[R300_PS_POINTSIZE] =
743 ((int)(size * 6) << R300_POINTSIZE_X_SHIFT) |
744 ((int)(size * 6) << R300_POINTSIZE_Y_SHIFT);
745 }
746
747 static void r300PointParameter(GLcontext * ctx, GLenum pname, const GLfloat * param)
748 {
749 r300ContextPtr r300 = R300_CONTEXT(ctx);
750
751 switch (pname) {
752 case GL_POINT_SIZE_MIN:
753 R300_STATECHANGE(r300, ga_point_minmax);
754 r300->hw.ga_point_minmax.cmd[1] &= ~R300_GA_POINT_MINMAX_MIN_MASK;
755 r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MinSize * 6.0);
756 break;
757 case GL_POINT_SIZE_MAX:
758 R300_STATECHANGE(r300, ga_point_minmax);
759 r300->hw.ga_point_minmax.cmd[1] &= ~R300_GA_POINT_MINMAX_MAX_MASK;
760 r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MaxSize * 6.0)
761 << R300_GA_POINT_MINMAX_MAX_SHIFT;
762 break;
763 case GL_POINT_DISTANCE_ATTENUATION:
764 break;
765 case GL_POINT_FADE_THRESHOLD_SIZE:
766 break;
767 default:
768 break;
769 }
770 }
771
772 /* =============================================================
773 * Line state
774 */
775 static void r300LineWidth(GLcontext * ctx, GLfloat widthf)
776 {
777 r300ContextPtr r300 = R300_CONTEXT(ctx);
778
779 widthf = CLAMP(widthf,
780 ctx->Const.MinPointSize,
781 ctx->Const.MaxPointSize);
782 R300_STATECHANGE(r300, lcntl);
783 r300->hw.lcntl.cmd[1] =
784 R300_LINE_CNT_HO | R300_LINE_CNT_VE | (int)(widthf * 6.0);
785 }
786
787 static void r300PolygonMode(GLcontext * ctx, GLenum face, GLenum mode)
788 {
789 (void)face;
790 (void)mode;
791
792 r300UpdatePolygonMode(ctx);
793 }
794
795 /* =============================================================
796 * Stencil
797 */
798
799 static int translate_stencil_op(int op)
800 {
801 switch (op) {
802 case GL_KEEP:
803 return R300_ZS_KEEP;
804 case GL_ZERO:
805 return R300_ZS_ZERO;
806 case GL_REPLACE:
807 return R300_ZS_REPLACE;
808 case GL_INCR:
809 return R300_ZS_INCR;
810 case GL_DECR:
811 return R300_ZS_DECR;
812 case GL_INCR_WRAP_EXT:
813 return R300_ZS_INCR_WRAP;
814 case GL_DECR_WRAP_EXT:
815 return R300_ZS_DECR_WRAP;
816 case GL_INVERT:
817 return R300_ZS_INVERT;
818 default:
819 WARN_ONCE("Do not know how to translate stencil op");
820 return R300_ZS_KEEP;
821 }
822 return 0;
823 }
824
825 static void r300ShadeModel(GLcontext * ctx, GLenum mode)
826 {
827 r300ContextPtr rmesa = R300_CONTEXT(ctx);
828
829 R300_STATECHANGE(rmesa, shade);
830 rmesa->hw.shade.cmd[1] = 0x00000002;
831 switch (mode) {
832 case GL_FLAT:
833 rmesa->hw.shade.cmd[2] = R300_RE_SHADE_MODEL_FLAT;
834 break;
835 case GL_SMOOTH:
836 rmesa->hw.shade.cmd[2] = R300_RE_SHADE_MODEL_SMOOTH;
837 break;
838 default:
839 return;
840 }
841 rmesa->hw.shade.cmd[3] = 0x00000000;
842 rmesa->hw.shade.cmd[4] = 0x00000000;
843 }
844
845 static void r300StencilFuncSeparate(GLcontext * ctx, GLenum face,
846 GLenum func, GLint ref, GLuint mask)
847 {
848 r300ContextPtr rmesa = R300_CONTEXT(ctx);
849 GLuint refmask =
850 ((ctx->Stencil.Ref[0] & 0xff) << R300_STENCILREF_SHIFT)
851 | ((ctx->Stencil.ValueMask[0] & 0xff) << R300_STENCILMASK_SHIFT);
852 const unsigned back = ctx->Stencil._BackFace;
853 GLuint flag;
854
855 R300_STATECHANGE(rmesa, zs);
856 rmesa->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_STENCIL_FRONT_BACK;
857 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= ~((R300_ZS_MASK <<
858 R300_S_FRONT_FUNC_SHIFT)
859 | (R300_ZS_MASK <<
860 R300_S_BACK_FUNC_SHIFT));
861
862 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &=
863 ~((R300_STENCILREF_MASK << R300_STENCILREF_SHIFT) |
864 (R300_STENCILREF_MASK << R300_STENCILMASK_SHIFT));
865
866 flag = translate_func(ctx->Stencil.Function[0]);
867 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
868 (flag << R300_S_FRONT_FUNC_SHIFT);
869
870 flag = translate_func(ctx->Stencil.Function[back]);
871
872 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
873 (flag << R300_S_BACK_FUNC_SHIFT);
874 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= refmask;
875 }
876
877 static void r300StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
878 {
879 r300ContextPtr rmesa = R300_CONTEXT(ctx);
880
881 R300_STATECHANGE(rmesa, zs);
882 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &=
883 ~(R300_STENCILREF_MASK <<
884 R300_STENCILWRITEMASK_SHIFT);
885 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |=
886 (ctx->Stencil.
887 WriteMask[0] & R300_STENCILREF_MASK) <<
888 R300_STENCILWRITEMASK_SHIFT;
889 }
890
891 static void r300StencilOpSeparate(GLcontext * ctx, GLenum face,
892 GLenum fail, GLenum zfail, GLenum zpass)
893 {
894 r300ContextPtr rmesa = R300_CONTEXT(ctx);
895 const unsigned back = ctx->Stencil._BackFace;
896
897 R300_STATECHANGE(rmesa, zs);
898 /* It is easier to mask what's left.. */
899 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &=
900 (R300_ZS_MASK << R300_Z_FUNC_SHIFT) |
901 (R300_ZS_MASK << R300_S_FRONT_FUNC_SHIFT) |
902 (R300_ZS_MASK << R300_S_BACK_FUNC_SHIFT);
903
904 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
905 (translate_stencil_op(ctx->Stencil.FailFunc[0]) <<
906 R300_S_FRONT_SFAIL_OP_SHIFT)
907 | (translate_stencil_op(ctx->Stencil.ZFailFunc[0]) <<
908 R300_S_FRONT_ZFAIL_OP_SHIFT)
909 | (translate_stencil_op(ctx->Stencil.ZPassFunc[0]) <<
910 R300_S_FRONT_ZPASS_OP_SHIFT);
911
912 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
913 (translate_stencil_op(ctx->Stencil.FailFunc[back]) <<
914 R300_S_BACK_SFAIL_OP_SHIFT)
915 | (translate_stencil_op(ctx->Stencil.ZFailFunc[back]) <<
916 R300_S_BACK_ZFAIL_OP_SHIFT)
917 | (translate_stencil_op(ctx->Stencil.ZPassFunc[back]) <<
918 R300_S_BACK_ZPASS_OP_SHIFT);
919 }
920
921 /* =============================================================
922 * Window position and viewport transformation
923 */
924
925 /*
926 * To correctly position primitives:
927 */
928 #define SUBPIXEL_X 0.125
929 #define SUBPIXEL_Y 0.125
930
931 static void r300UpdateWindow(GLcontext * ctx)
932 {
933 r300ContextPtr rmesa = R300_CONTEXT(ctx);
934 __DRIdrawablePrivate *dPriv = rmesa->radeon.dri.drawable;
935 GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0;
936 GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0;
937 const GLfloat *v = ctx->Viewport._WindowMap.m;
938
939 GLfloat sx = v[MAT_SX];
940 GLfloat tx = v[MAT_TX] + xoffset + SUBPIXEL_X;
941 GLfloat sy = -v[MAT_SY];
942 GLfloat ty = (-v[MAT_TY]) + yoffset + SUBPIXEL_Y;
943 GLfloat sz = v[MAT_SZ] * rmesa->state.depth.scale;
944 GLfloat tz = v[MAT_TZ] * rmesa->state.depth.scale;
945
946 R300_FIREVERTICES(rmesa);
947 R300_STATECHANGE(rmesa, vpt);
948
949 rmesa->hw.vpt.cmd[R300_VPT_XSCALE] = r300PackFloat32(sx);
950 rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx);
951 rmesa->hw.vpt.cmd[R300_VPT_YSCALE] = r300PackFloat32(sy);
952 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty);
953 rmesa->hw.vpt.cmd[R300_VPT_ZSCALE] = r300PackFloat32(sz);
954 rmesa->hw.vpt.cmd[R300_VPT_ZOFFSET] = r300PackFloat32(tz);
955 }
956
957 static void r300Viewport(GLcontext * ctx, GLint x, GLint y,
958 GLsizei width, GLsizei height)
959 {
960 /* Don't pipeline viewport changes, conflict with window offset
961 * setting below. Could apply deltas to rescue pipelined viewport
962 * values, or keep the originals hanging around.
963 */
964 r300UpdateWindow(ctx);
965 }
966
967 static void r300DepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval)
968 {
969 r300UpdateWindow(ctx);
970 }
971
972 void r300UpdateViewportOffset(GLcontext * ctx)
973 {
974 r300ContextPtr rmesa = R300_CONTEXT(ctx);
975 __DRIdrawablePrivate *dPriv = ((radeonContextPtr) rmesa)->dri.drawable;
976 GLfloat xoffset = (GLfloat) dPriv->x;
977 GLfloat yoffset = (GLfloat) dPriv->y + dPriv->h;
978 const GLfloat *v = ctx->Viewport._WindowMap.m;
979
980 GLfloat tx = v[MAT_TX] + xoffset + SUBPIXEL_X;
981 GLfloat ty = (-v[MAT_TY]) + yoffset + SUBPIXEL_Y;
982
983 if (rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] != r300PackFloat32(tx) ||
984 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] != r300PackFloat32(ty)) {
985 /* Note: this should also modify whatever data the context reset
986 * code uses...
987 */
988 R300_STATECHANGE(rmesa, vpt);
989 rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx);
990 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty);
991
992 }
993
994 radeonUpdateScissor(ctx);
995 }
996
997 /**
998 * Tell the card where to render (offset, pitch).
999 * Effected by glDrawBuffer, etc
1000 */
1001 void r300UpdateDrawBuffer(GLcontext * ctx)
1002 {
1003 r300ContextPtr rmesa = R300_CONTEXT(ctx);
1004 r300ContextPtr r300 = rmesa;
1005 struct gl_framebuffer *fb = ctx->DrawBuffer;
1006 driRenderbuffer *drb;
1007
1008 if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) {
1009 /* draw to front */
1010 drb =
1011 (driRenderbuffer *) fb->Attachment[BUFFER_FRONT_LEFT].
1012 Renderbuffer;
1013 } else if (fb->_ColorDrawBufferIndexes[0] == BUFFER_BACK_LEFT) {
1014 /* draw to back */
1015 drb =
1016 (driRenderbuffer *) fb->Attachment[BUFFER_BACK_LEFT].
1017 Renderbuffer;
1018 } else {
1019 /* drawing to multiple buffers, or none */
1020 return;
1021 }
1022
1023 assert(drb);
1024 assert(drb->flippedPitch);
1025
1026 R300_STATECHANGE(rmesa, cb);
1027
1028 r300->hw.cb.cmd[R300_CB_OFFSET] = drb->flippedOffset + //r300->radeon.state.color.drawOffset +
1029 r300->radeon.radeonScreen->fbLocation;
1030 r300->hw.cb.cmd[R300_CB_PITCH] = drb->flippedPitch; //r300->radeon.state.color.drawPitch;
1031
1032 if (r300->radeon.radeonScreen->cpp == 4)
1033 r300->hw.cb.cmd[R300_CB_PITCH] |= R300_COLOR_FORMAT_ARGB8888;
1034 else
1035 r300->hw.cb.cmd[R300_CB_PITCH] |= R300_COLOR_FORMAT_RGB565;
1036
1037 if (r300->radeon.sarea->tiling_enabled)
1038 r300->hw.cb.cmd[R300_CB_PITCH] |= R300_COLOR_TILE_ENABLE;
1039 #if 0
1040 R200_STATECHANGE(rmesa, ctx);
1041
1042 /* Note: we used the (possibly) page-flipped values */
1043 rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET]
1044 = ((drb->flippedOffset + rmesa->r200Screen->fbLocation)
1045 & R200_COLOROFFSET_MASK);
1046 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] = drb->flippedPitch;
1047
1048 if (rmesa->sarea->tiling_enabled) {
1049 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |=
1050 R200_COLOR_TILE_ENABLE;
1051 }
1052 #endif
1053 }
1054
1055 static void
1056 r300FetchStateParameter(GLcontext * ctx,
1057 const gl_state_index state[STATE_LENGTH],
1058 GLfloat * value)
1059 {
1060 r300ContextPtr r300 = R300_CONTEXT(ctx);
1061
1062 switch (state[0]) {
1063 case STATE_INTERNAL:
1064 switch (state[1]) {
1065 case STATE_R300_WINDOW_DIMENSION:
1066 value[0] = r300->radeon.dri.drawable->w * 0.5f; /* width*0.5 */
1067 value[1] = r300->radeon.dri.drawable->h * 0.5f; /* height*0.5 */
1068 value[2] = 0.5F; /* for moving range [-1 1] -> [0 1] */
1069 value[3] = 1.0F; /* not used */
1070 break;
1071
1072 case STATE_R300_TEXRECT_FACTOR:{
1073 struct gl_texture_object *t =
1074 ctx->Texture.Unit[state[2]].CurrentTex[TEXTURE_RECT_INDEX];
1075
1076 if (t && t->Image[0][t->BaseLevel]) {
1077 struct gl_texture_image *image =
1078 t->Image[0][t->BaseLevel];
1079 value[0] = 1.0 / image->Width2;
1080 value[1] = 1.0 / image->Height2;
1081 } else {
1082 value[0] = 1.0;
1083 value[1] = 1.0;
1084 }
1085 value[2] = 1.0;
1086 value[3] = 1.0;
1087 break;
1088 }
1089
1090 default:
1091 break;
1092 }
1093 break;
1094
1095 default:
1096 break;
1097 }
1098 }
1099
1100 /**
1101 * Update R300's own internal state parameters.
1102 * For now just STATE_R300_WINDOW_DIMENSION
1103 */
1104 void r300UpdateStateParameters(GLcontext * ctx, GLuint new_state)
1105 {
1106 struct r300_fragment_program *fp;
1107 struct gl_program_parameter_list *paramList;
1108 GLuint i;
1109
1110 if (!(new_state & (_NEW_BUFFERS | _NEW_PROGRAM)))
1111 return;
1112
1113 fp = (struct r300_fragment_program *)ctx->FragmentProgram._Current;
1114 if (!fp)
1115 return;
1116
1117 paramList = fp->mesa_program.Base.Parameters;
1118
1119 if (!paramList)
1120 return;
1121
1122 for (i = 0; i < paramList->NumParameters; i++) {
1123 if (paramList->Parameters[i].Type == PROGRAM_STATE_VAR) {
1124 r300FetchStateParameter(ctx,
1125 paramList->Parameters[i].
1126 StateIndexes,
1127 paramList->ParameterValues[i]);
1128 }
1129 }
1130 }
1131
1132 /* =============================================================
1133 * Polygon state
1134 */
1135 static void r300PolygonOffset(GLcontext * ctx, GLfloat factor, GLfloat units)
1136 {
1137 r300ContextPtr rmesa = R300_CONTEXT(ctx);
1138 GLfloat constant = units;
1139
1140 switch (ctx->Visual.depthBits) {
1141 case 16:
1142 constant *= 4.0;
1143 break;
1144 case 24:
1145 constant *= 2.0;
1146 break;
1147 }
1148
1149 factor *= 12.0;
1150
1151 /* fprintf(stderr, "%s f:%f u:%f\n", __FUNCTION__, factor, constant); */
1152
1153 R300_STATECHANGE(rmesa, zbs);
1154 rmesa->hw.zbs.cmd[R300_ZBS_T_FACTOR] = r300PackFloat32(factor);
1155 rmesa->hw.zbs.cmd[R300_ZBS_T_CONSTANT] = r300PackFloat32(constant);
1156 rmesa->hw.zbs.cmd[R300_ZBS_W_FACTOR] = r300PackFloat32(factor);
1157 rmesa->hw.zbs.cmd[R300_ZBS_W_CONSTANT] = r300PackFloat32(constant);
1158 }
1159
1160 /* Routing and texture-related */
1161
1162 /* r300 doesnt handle GL_CLAMP and GL_MIRROR_CLAMP_EXT correctly when filter is NEAREST.
1163 * Since texwrap produces same results for GL_CLAMP and GL_CLAMP_TO_EDGE we use them instead.
1164 * We need to recalculate wrap modes whenever filter mode is changed because someone might do:
1165 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST);
1166 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP);
1167 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
1168 * Since r300 completely ignores R300_TX_CLAMP when either min or mag is nearest it cant handle
1169 * combinations where only one of them is nearest.
1170 */
1171 static unsigned long gen_fixed_filter(unsigned long f)
1172 {
1173 unsigned long mag, min, needs_fixing = 0;
1174 //return f;
1175
1176 /* We ignore MIRROR bit so we dont have to do everything twice */
1177 if ((f & ((7 - 1) << R300_TX_WRAP_S_SHIFT)) ==
1178 (R300_TX_CLAMP << R300_TX_WRAP_S_SHIFT)) {
1179 needs_fixing |= 1;
1180 }
1181 if ((f & ((7 - 1) << R300_TX_WRAP_T_SHIFT)) ==
1182 (R300_TX_CLAMP << R300_TX_WRAP_T_SHIFT)) {
1183 needs_fixing |= 2;
1184 }
1185 if ((f & ((7 - 1) << R300_TX_WRAP_R_SHIFT)) ==
1186 (R300_TX_CLAMP << R300_TX_WRAP_R_SHIFT)) {
1187 needs_fixing |= 4;
1188 }
1189
1190 if (!needs_fixing)
1191 return f;
1192
1193 mag = f & R300_TX_MAG_FILTER_MASK;
1194 min = f & (R300_TX_MIN_FILTER_MASK|R300_TX_MIN_FILTER_MIP_MASK);
1195
1196 /* TODO: Check for anisto filters too */
1197 if ((mag != R300_TX_MAG_FILTER_NEAREST)
1198 && (min != R300_TX_MIN_FILTER_NEAREST))
1199 return f;
1200
1201 /* r300 cant handle these modes hence we force nearest to linear */
1202 if ((mag == R300_TX_MAG_FILTER_NEAREST)
1203 && (min != R300_TX_MIN_FILTER_NEAREST)) {
1204 f &= ~R300_TX_MAG_FILTER_NEAREST;
1205 f |= R300_TX_MAG_FILTER_LINEAR;
1206 return f;
1207 }
1208
1209 if ((min == R300_TX_MIN_FILTER_NEAREST)
1210 && (mag != R300_TX_MAG_FILTER_NEAREST)) {
1211 f &= ~R300_TX_MIN_FILTER_NEAREST;
1212 f |= R300_TX_MIN_FILTER_LINEAR;
1213 return f;
1214 }
1215
1216 /* Both are nearest */
1217 if (needs_fixing & 1) {
1218 f &= ~((7 - 1) << R300_TX_WRAP_S_SHIFT);
1219 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_S_SHIFT;
1220 }
1221 if (needs_fixing & 2) {
1222 f &= ~((7 - 1) << R300_TX_WRAP_T_SHIFT);
1223 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_T_SHIFT;
1224 }
1225 if (needs_fixing & 4) {
1226 f &= ~((7 - 1) << R300_TX_WRAP_R_SHIFT);
1227 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_R_SHIFT;
1228 }
1229 return f;
1230 }
1231
1232 static void r300SetupFragmentShaderTextures(GLcontext *ctx, int *tmu_mappings)
1233 {
1234 r300ContextPtr r300 = R300_CONTEXT(ctx);
1235 int i;
1236 struct r300_fragment_program *fp = (struct r300_fragment_program *)
1237 (char *)ctx->FragmentProgram._Current;
1238 struct r300_fragment_program_code *code = &fp->code;
1239
1240 R300_STATECHANGE(r300, fpt);
1241
1242 for (i = 0; i < code->tex.length; i++) {
1243 int unit;
1244 int opcode;
1245 unsigned long val;
1246
1247 unit = code->tex.inst[i] >> R300_TEX_ID_SHIFT;
1248 unit &= 15;
1249
1250 val = code->tex.inst[i];
1251 val &= ~R300_TEX_ID_MASK;
1252
1253 opcode =
1254 (val & R300_TEX_INST_MASK) >> R300_TEX_INST_SHIFT;
1255 if (opcode == R300_TEX_OP_KIL) {
1256 r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
1257 } else {
1258 if (tmu_mappings[unit] >= 0) {
1259 val |=
1260 tmu_mappings[unit] <<
1261 R300_TEX_ID_SHIFT;
1262 r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
1263 } else {
1264 // We get here when the corresponding texture image is incomplete
1265 // (e.g. incomplete mipmaps etc.)
1266 r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
1267 }
1268 }
1269 }
1270
1271 r300->hw.fpt.cmd[R300_FPT_CMD_0] =
1272 cmdpacket0(R300_US_TEX_INST_0, code->tex.length);
1273 }
1274
1275 static void r500SetupFragmentShaderTextures(GLcontext *ctx, int *tmu_mappings)
1276 {
1277 int i;
1278 struct r500_fragment_program *fp = (struct r500_fragment_program *)
1279 (char *)ctx->FragmentProgram._Current;
1280 struct r500_fragment_program_code *code = &fp->code;
1281
1282 /* find all the texture instructions and relocate the texture units */
1283 for (i = 0; i < code->inst_end + 1; i++) {
1284 if ((code->inst[i].inst0 & 0x3) == R500_INST_TYPE_TEX) {
1285 uint32_t val;
1286 int unit, opcode, new_unit;
1287
1288 val = code->inst[i].inst1;
1289
1290 unit = (val >> 16) & 0xf;
1291
1292 val &= ~(0xf << 16);
1293
1294 opcode = val & (0x7 << 22);
1295 if (opcode == R500_TEX_INST_TEXKILL) {
1296 new_unit = 0;
1297 } else {
1298 if (tmu_mappings[unit] >= 0) {
1299 new_unit = tmu_mappings[unit];
1300 } else {
1301 new_unit = 0;
1302 }
1303 }
1304 val |= R500_TEX_ID(new_unit);
1305 code->inst[i].inst1 = val;
1306 }
1307 }
1308 }
1309
1310 static GLuint translate_lod_bias(GLfloat bias)
1311 {
1312 GLint b = (int)(bias*32);
1313 if (b >= (1 << 9))
1314 b = (1 << 9)-1;
1315 else if (b < -(1 << 9))
1316 b = -(1 << 9);
1317 return (((GLuint)b) << R300_LOD_BIAS_SHIFT) & R300_LOD_BIAS_MASK;
1318 }
1319
1320 static void r300SetupTextures(GLcontext * ctx)
1321 {
1322 int i, mtu;
1323 struct r300_tex_obj *t;
1324 r300ContextPtr r300 = R300_CONTEXT(ctx);
1325 int hw_tmu = 0;
1326 int last_hw_tmu = -1; /* -1 translates into no setup costs for fields */
1327 int tmu_mappings[R300_MAX_TEXTURE_UNITS] = { -1, };
1328 struct r300_fragment_program *fp = (struct r300_fragment_program *)
1329 (char *)ctx->FragmentProgram._Current;
1330
1331 R300_STATECHANGE(r300, txe);
1332 R300_STATECHANGE(r300, tex.filter);
1333 R300_STATECHANGE(r300, tex.filter_1);
1334 R300_STATECHANGE(r300, tex.size);
1335 R300_STATECHANGE(r300, tex.format);
1336 R300_STATECHANGE(r300, tex.pitch);
1337 R300_STATECHANGE(r300, tex.offset);
1338 R300_STATECHANGE(r300, tex.chroma_key);
1339 R300_STATECHANGE(r300, tex.border_color);
1340
1341 r300->hw.txe.cmd[R300_TXE_ENABLE] = 0x0;
1342
1343 mtu = r300->radeon.glCtx->Const.MaxTextureUnits;
1344 if (RADEON_DEBUG & DEBUG_STATE)
1345 fprintf(stderr, "mtu=%d\n", mtu);
1346
1347 if (mtu > R300_MAX_TEXTURE_UNITS) {
1348 fprintf(stderr,
1349 "Aiiee ! mtu=%d is greater than R300_MAX_TEXTURE_UNITS=%d\n",
1350 mtu, R300_MAX_TEXTURE_UNITS);
1351 _mesa_exit(-1);
1352 }
1353
1354 /* We cannot let disabled tmu offsets pass DRM */
1355 for (i = 0; i < mtu; i++) {
1356 if (ctx->Texture.Unit[i]._ReallyEnabled) {
1357
1358 #if 0 /* Enables old behaviour */
1359 hw_tmu = i;
1360 #endif
1361 tmu_mappings[i] = hw_tmu;
1362
1363 t = r300->state.texture.unit[i].texobj;
1364 /* XXX questionable fix for bug 9170: */
1365 if (!t)
1366 continue;
1367
1368 if ((t->format & 0xffffff00) == 0xffffff00) {
1369 WARN_ONCE
1370 ("unknown texture format (entry %x) encountered. Help me !\n",
1371 t->format & 0xff);
1372 }
1373
1374 if (RADEON_DEBUG & DEBUG_STATE)
1375 fprintf(stderr,
1376 "Activating texture unit %d\n", i);
1377
1378 r300->hw.txe.cmd[R300_TXE_ENABLE] |= (1 << hw_tmu);
1379
1380 r300->hw.tex.filter.cmd[R300_TEX_VALUE_0 +
1381 hw_tmu] =
1382 gen_fixed_filter(t->filter) | (hw_tmu << 28);
1383 /* Note: There is a LOD bias per texture unit and a LOD bias
1384 * per texture object. We add them here to get the correct behaviour.
1385 * (The per-texture object LOD bias was introduced in OpenGL 1.4
1386 * and is not present in the EXT_texture_object extension).
1387 */
1388 r300->hw.tex.filter_1.cmd[R300_TEX_VALUE_0 + hw_tmu] =
1389 t->filter_1 |
1390 translate_lod_bias(ctx->Texture.Unit[i].LodBias + t->base.tObj->LodBias);
1391 r300->hw.tex.size.cmd[R300_TEX_VALUE_0 + hw_tmu] =
1392 t->size;
1393 r300->hw.tex.format.cmd[R300_TEX_VALUE_0 +
1394 hw_tmu] = t->format;
1395 r300->hw.tex.pitch.cmd[R300_TEX_VALUE_0 + hw_tmu] =
1396 t->pitch_reg;
1397 r300->hw.tex.offset.cmd[R300_TEX_VALUE_0 +
1398 hw_tmu] = t->offset;
1399
1400 if (t->offset & R300_TXO_MACRO_TILE) {
1401 WARN_ONCE("macro tiling enabled!\n");
1402 }
1403
1404 if (t->offset & R300_TXO_MICRO_TILE) {
1405 WARN_ONCE("micro tiling enabled!\n");
1406 }
1407
1408 r300->hw.tex.chroma_key.cmd[R300_TEX_VALUE_0 +
1409 hw_tmu] = 0x0;
1410 r300->hw.tex.border_color.cmd[R300_TEX_VALUE_0 +
1411 hw_tmu] =
1412 t->pp_border_color;
1413
1414 last_hw_tmu = hw_tmu;
1415
1416 hw_tmu++;
1417 }
1418 }
1419
1420 r300->hw.tex.filter.cmd[R300_TEX_CMD_0] =
1421 cmdpacket0(R300_TX_FILTER0_0, last_hw_tmu + 1);
1422 r300->hw.tex.filter_1.cmd[R300_TEX_CMD_0] =
1423 cmdpacket0(R300_TX_FILTER1_0, last_hw_tmu + 1);
1424 r300->hw.tex.size.cmd[R300_TEX_CMD_0] =
1425 cmdpacket0(R300_TX_SIZE_0, last_hw_tmu + 1);
1426 r300->hw.tex.format.cmd[R300_TEX_CMD_0] =
1427 cmdpacket0(R300_TX_FORMAT_0, last_hw_tmu + 1);
1428 r300->hw.tex.pitch.cmd[R300_TEX_CMD_0] =
1429 cmdpacket0(R300_TX_FORMAT2_0, last_hw_tmu + 1);
1430 r300->hw.tex.offset.cmd[R300_TEX_CMD_0] =
1431 cmdpacket0(R300_TX_OFFSET_0, last_hw_tmu + 1);
1432 r300->hw.tex.chroma_key.cmd[R300_TEX_CMD_0] =
1433 cmdpacket0(R300_TX_CHROMA_KEY_0, last_hw_tmu + 1);
1434 r300->hw.tex.border_color.cmd[R300_TEX_CMD_0] =
1435 cmdpacket0(R300_TX_BORDER_COLOR_0, last_hw_tmu + 1);
1436
1437 if (!fp) /* should only happenen once, just after context is created */
1438 return;
1439
1440 if (r300->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV515) {
1441 if (fp->mesa_program.UsesKill && last_hw_tmu < 0) {
1442 // The KILL operation requires the first texture unit
1443 // to be enabled.
1444 r300->hw.txe.cmd[R300_TXE_ENABLE] |= 1;
1445 r300->hw.tex.filter.cmd[R300_TEX_VALUE_0] = 0;
1446 r300->hw.tex.filter.cmd[R300_TEX_CMD_0] =
1447 cmdpacket0(R300_TX_FILTER0_0, 1);
1448 }
1449 r300SetupFragmentShaderTextures(ctx, tmu_mappings);
1450 } else
1451 r500SetupFragmentShaderTextures(ctx, tmu_mappings);
1452
1453 if (RADEON_DEBUG & DEBUG_STATE)
1454 fprintf(stderr, "TX_ENABLE: %08x last_hw_tmu=%d\n",
1455 r300->hw.txe.cmd[R300_TXE_ENABLE], last_hw_tmu);
1456 }
1457
1458 union r300_outputs_written {
1459 GLuint vp_outputs; /* hw_tcl_on */
1460 DECLARE_RENDERINPUTS(index_bitset); /* !hw_tcl_on */
1461 };
1462
1463 #define R300_OUTPUTS_WRITTEN_TEST(ow, vp_result, tnl_attrib) \
1464 ((hw_tcl_on) ? (ow).vp_outputs & (1 << (vp_result)) : \
1465 RENDERINPUTS_TEST( (ow.index_bitset), (tnl_attrib) ))
1466
1467 static void r300SetupRSUnit(GLcontext * ctx)
1468 {
1469 r300ContextPtr r300 = R300_CONTEXT(ctx);
1470 TNLcontext *tnl = TNL_CONTEXT(ctx);
1471 struct vertex_buffer *VB = &tnl->vb;
1472 union r300_outputs_written OutputsWritten;
1473 GLuint InputsRead;
1474 int fp_reg, high_rr;
1475 int col_ip, tex_ip;
1476 int rs_tex_count = 0;
1477 int i, count, col_fmt;
1478
1479 if (hw_tcl_on)
1480 OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten;
1481 else
1482 RENDERINPUTS_COPY(OutputsWritten.index_bitset, r300->state.render_inputs_bitset);
1483
1484 if (ctx->FragmentProgram._Current)
1485 InputsRead = ctx->FragmentProgram._Current->Base.InputsRead;
1486 else {
1487 fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
1488 return; /* This should only ever happen once.. */
1489 }
1490
1491 R300_STATECHANGE(r300, ri);
1492 R300_STATECHANGE(r300, rc);
1493 R300_STATECHANGE(r300, rr);
1494
1495 fp_reg = col_ip = tex_ip = col_fmt = 0;
1496
1497 r300->hw.rc.cmd[1] = 0;
1498 r300->hw.rc.cmd[2] = 0;
1499 for (i=0; i<R300_RR_CMDSIZE-1; ++i)
1500 r300->hw.rr.cmd[R300_RR_INST_0 + i] = 0;
1501
1502 for (i=0; i<R300_RI_CMDSIZE-1; ++i)
1503 r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0;
1504
1505
1506 if (InputsRead & FRAG_BIT_COL0) {
1507 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
1508 count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
1509 if (count == 4)
1510 col_fmt = R300_RS_COL_FMT_RGBA;
1511 else if (count == 3)
1512 col_fmt = R300_RS_COL_FMT_RGB1;
1513 else
1514 col_fmt = R300_RS_COL_FMT_0001;
1515
1516 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R300_RS_COL_PTR(col_ip) | R300_RS_COL_FMT(col_fmt);
1517 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R300_RS_INST_COL_ID(col_ip) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_reg);
1518 InputsRead &= ~FRAG_BIT_COL0;
1519 ++col_ip;
1520 ++fp_reg;
1521 } else {
1522 WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
1523 }
1524 }
1525
1526 if (InputsRead & FRAG_BIT_COL1) {
1527 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
1528 count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size;
1529 if (count == 4)
1530 col_fmt = R300_RS_COL_FMT_RGBA;
1531 else if (count == 3)
1532 col_fmt = R300_RS_COL_FMT_RGB1;
1533 else
1534 col_fmt = R300_RS_COL_FMT_0001;
1535
1536 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R300_RS_COL_PTR(col_ip) | R300_RS_COL_FMT(col_fmt);
1537 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R300_RS_INST_COL_ID(col_ip) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_reg);
1538 InputsRead &= ~FRAG_BIT_COL1;
1539 ++col_ip;
1540 ++fp_reg;
1541 } else {
1542 WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
1543 }
1544 }
1545
1546 for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
1547 if (! ( InputsRead & FRAG_BIT_TEX(i) ) )
1548 continue;
1549
1550 if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
1551 WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
1552 continue;
1553 }
1554
1555 int swiz;
1556
1557 /* with TCL we always seem to route 4 components */
1558 if (hw_tcl_on)
1559 count = 4;
1560 else
1561 count = VB->AttribPtr[_TNL_ATTRIB_TEX(i)]->size;
1562
1563 switch(count) {
1564 case 4: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3); break;
1565 case 3: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(R300_RS_SEL_K1); break;
1566 default:
1567 case 1:
1568 case 2: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(R300_RS_SEL_K0) | R300_RS_SEL_Q(R300_RS_SEL_K1); break;
1569 };
1570
1571 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= swiz | R300_RS_TEX_PTR(rs_tex_count);
1572 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
1573 InputsRead &= ~(FRAG_BIT_TEX0 << i);
1574 rs_tex_count += count;
1575 ++tex_ip;
1576 ++fp_reg;
1577 }
1578
1579 if (InputsRead & FRAG_BIT_FOGC) {
1580 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_FOGC, _TNL_ATTRIB_FOG)) {
1581 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count);
1582 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
1583 InputsRead &= ~FRAG_BIT_FOGC;
1584 rs_tex_count += 4;
1585 ++tex_ip;
1586 ++fp_reg;
1587 } else {
1588 WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n");
1589 }
1590 }
1591
1592 if (InputsRead & FRAG_BIT_WPOS) {
1593 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count);
1594 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
1595 InputsRead &= ~FRAG_BIT_WPOS;
1596 rs_tex_count += 4;
1597 ++tex_ip;
1598 ++fp_reg;
1599 }
1600 InputsRead &= ~FRAG_BIT_WPOS;
1601
1602 /* Setup default color if no color or tex was set */
1603 if (rs_tex_count == 0 && col_ip == 0) {
1604 r300->hw.rr.cmd[R300_RR_INST_0] = R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(0) | R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
1605 ++col_ip;
1606 }
1607
1608 high_rr = (col_ip > tex_ip) ? col_ip : tex_ip;
1609 r300->hw.rc.cmd[1] |= (rs_tex_count << R300_IT_COUNT_SHIFT) | (col_ip << R300_IC_COUNT_SHIFT) | R300_HIRES_EN;
1610 r300->hw.rc.cmd[2] |= high_rr - 1;
1611
1612 r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_INST_0, high_rr);
1613
1614 if (InputsRead)
1615 WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead);
1616 }
1617
1618 static void r500SetupRSUnit(GLcontext * ctx)
1619 {
1620 r300ContextPtr r300 = R300_CONTEXT(ctx);
1621 TNLcontext *tnl = TNL_CONTEXT(ctx);
1622 struct vertex_buffer *VB = &tnl->vb;
1623 union r300_outputs_written OutputsWritten;
1624 GLuint InputsRead;
1625 int fp_reg, high_rr;
1626 int col_ip, tex_ip;
1627 int rs_tex_count = 0;
1628 int i, count, col_fmt;
1629
1630 if (hw_tcl_on)
1631 OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten;
1632 else
1633 RENDERINPUTS_COPY(OutputsWritten.index_bitset, r300->state.render_inputs_bitset);
1634
1635 if (ctx->FragmentProgram._Current)
1636 InputsRead = ctx->FragmentProgram._Current->Base.InputsRead;
1637 else {
1638 fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
1639 return; /* This should only ever happen once.. */
1640 }
1641
1642 R300_STATECHANGE(r300, ri);
1643 R300_STATECHANGE(r300, rc);
1644 R300_STATECHANGE(r300, rr);
1645
1646 fp_reg = col_ip = tex_ip = col_fmt = 0;
1647
1648 r300->hw.rc.cmd[1] = 0;
1649 r300->hw.rc.cmd[2] = 0;
1650 for (i=0; i<R300_RR_CMDSIZE-1; ++i)
1651 r300->hw.rr.cmd[R300_RR_INST_0 + i] = 0;
1652
1653 for (i=0; i<R500_RI_CMDSIZE-1; ++i)
1654 r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0;
1655
1656
1657 if (InputsRead & FRAG_BIT_COL0) {
1658 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
1659 count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
1660 if (count == 4)
1661 col_fmt = R300_RS_COL_FMT_RGBA;
1662 else if (count == 3)
1663 col_fmt = R300_RS_COL_FMT_RGB1;
1664 else
1665 col_fmt = R300_RS_COL_FMT_0001;
1666
1667 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R500_RS_COL_PTR(col_ip) | R500_RS_COL_FMT(col_fmt);
1668 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R500_RS_INST_COL_ID(col_ip) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_reg);
1669 InputsRead &= ~FRAG_BIT_COL0;
1670 ++col_ip;
1671 ++fp_reg;
1672 } else {
1673 WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
1674 }
1675 }
1676
1677 if (InputsRead & FRAG_BIT_COL1) {
1678 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
1679 count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size;
1680 if (count == 4)
1681 col_fmt = R300_RS_COL_FMT_RGBA;
1682 else if (count == 3)
1683 col_fmt = R300_RS_COL_FMT_RGB1;
1684 else
1685 col_fmt = R300_RS_COL_FMT_0001;
1686
1687 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R500_RS_COL_PTR(col_ip) | R500_RS_COL_FMT(col_fmt);
1688 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R500_RS_INST_COL_ID(col_ip) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_reg);
1689 InputsRead &= ~FRAG_BIT_COL1;
1690 ++col_ip;
1691 ++fp_reg;
1692 } else {
1693 WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
1694 }
1695 }
1696
1697
1698 for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
1699 if (! ( InputsRead & FRAG_BIT_TEX(i) ) )
1700 continue;
1701
1702 if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
1703 WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
1704 continue;
1705 }
1706
1707 int swiz = 0;
1708
1709 /* with TCL we always seem to route 4 components */
1710 if (hw_tcl_on)
1711 count = 4;
1712 else
1713 count = VB->AttribPtr[_TNL_ATTRIB_TEX(i)]->size;
1714
1715 if (count == 4) {
1716 swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
1717 swiz |= (rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT;
1718 swiz |= (rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT;
1719 swiz |= (rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT;
1720 } else if (count == 3) {
1721 swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
1722 swiz |= (rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT;
1723 swiz |= (rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT;
1724 swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
1725 } else if (count == 2) {
1726 swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
1727 swiz |= (rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT;
1728 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT;
1729 swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
1730 } else if (count == 1) {
1731 swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
1732 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT;
1733 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT;
1734 swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
1735 } else {
1736 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT;
1737 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT;
1738 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT;
1739 swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
1740 }
1741
1742 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= swiz;
1743 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
1744 InputsRead &= ~(FRAG_BIT_TEX0 << i);
1745 rs_tex_count += count;
1746 ++tex_ip;
1747 ++fp_reg;
1748 }
1749
1750 if (InputsRead & FRAG_BIT_FOGC) {
1751 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_FOGC, _TNL_ATTRIB_FOG)) {
1752 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) |
1753 ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) |
1754 ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) |
1755 ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT);
1756
1757 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
1758 InputsRead &= ~FRAG_BIT_FOGC;
1759 rs_tex_count += 4;
1760 ++tex_ip;
1761 ++fp_reg;
1762 } else {
1763 WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n");
1764 }
1765 }
1766
1767 if (InputsRead & FRAG_BIT_WPOS) {
1768 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) |
1769 ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) |
1770 ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) |
1771 ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT);
1772
1773 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
1774 InputsRead &= ~FRAG_BIT_WPOS;
1775 rs_tex_count += 4;
1776 ++tex_ip;
1777 ++fp_reg;
1778 }
1779
1780 /* Setup default color if no color or tex was set */
1781 if (rs_tex_count == 0 && col_ip == 0) {
1782 r300->hw.rr.cmd[R300_RR_INST_0] |= R500_RS_INST_COL_ID(0) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(0) | R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
1783 ++col_ip;
1784 }
1785
1786 high_rr = (col_ip > tex_ip) ? col_ip : tex_ip;
1787 r300->hw.rc.cmd[1] |= (rs_tex_count << R300_IT_COUNT_SHIFT) | (col_ip << R300_IC_COUNT_SHIFT) | R300_HIRES_EN;
1788 r300->hw.rc.cmd[2] |= 0xC0 | (high_rr - 1);
1789
1790 r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R500_RS_INST_0, high_rr);
1791
1792 if (InputsRead)
1793 WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead);
1794 }
1795
1796
1797
1798
1799 #define bump_vpu_count(ptr, new_count) do{\
1800 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
1801 int _nc=(new_count)/4; \
1802 assert(_nc < 256); \
1803 if(_nc>_p->vpu.count)_p->vpu.count=_nc;\
1804 }while(0)
1805
1806 static INLINE void r300SetupVertexProgramFragment(r300ContextPtr r300, int dest, struct r300_vertex_shader_fragment *vsf)
1807 {
1808 int i;
1809
1810 if (vsf->length == 0)
1811 return;
1812
1813 if (vsf->length & 0x3) {
1814 fprintf(stderr, "VERTEX_SHADER_FRAGMENT must have length divisible by 4\n");
1815 _mesa_exit(-1);
1816 }
1817
1818 switch ((dest >> 8) & 0xf) {
1819 case 0:
1820 R300_STATECHANGE(r300, vpi);
1821 for (i = 0; i < vsf->length; i++)
1822 r300->hw.vpi.cmd[R300_VPI_INSTR_0 + i + 4 * (dest & 0xff)] = (vsf->body.d[i]);
1823 bump_vpu_count(r300->hw.vpi.cmd, vsf->length + 4 * (dest & 0xff));
1824 break;
1825
1826 case 2:
1827 R300_STATECHANGE(r300, vpp);
1828 for (i = 0; i < vsf->length; i++)
1829 r300->hw.vpp.cmd[R300_VPP_PARAM_0 + i + 4 * (dest & 0xff)] = (vsf->body.d[i]);
1830 bump_vpu_count(r300->hw.vpp.cmd, vsf->length + 4 * (dest & 0xff));
1831 break;
1832 case 4:
1833 R300_STATECHANGE(r300, vps);
1834 for (i = 0; i < vsf->length; i++)
1835 r300->hw.vps.cmd[1 + i + 4 * (dest & 0xff)] = (vsf->body.d[i]);
1836 bump_vpu_count(r300->hw.vps.cmd, vsf->length + 4 * (dest & 0xff));
1837 break;
1838 default:
1839 fprintf(stderr, "%s:%s don't know how to handle dest %04x\n", __FILE__, __FUNCTION__, dest);
1840 _mesa_exit(-1);
1841 }
1842 }
1843
1844 #define MIN3(a, b, c) ((a) < (b) ? MIN2(a, c) : MIN2(b, c))
1845
1846
1847 static void r300VapCntl(r300ContextPtr rmesa, GLuint input_count,
1848 GLuint output_count, GLuint temp_count)
1849 {
1850 int vtx_mem_size;
1851 int pvs_num_slots;
1852 int pvs_num_cntrls;
1853
1854 /* Flush PVS engine before changing PVS_NUM_SLOTS, PVS_NUM_CNTRLS.
1855 * See r500 docs 6.5.2 - done in emit */
1856
1857 /* avoid division by zero */
1858 if (input_count == 0) input_count = 1;
1859 if (output_count == 0) output_count = 1;
1860 if (temp_count == 0) temp_count = 1;
1861
1862 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
1863 vtx_mem_size = 128;
1864 else
1865 vtx_mem_size = 72;
1866
1867 pvs_num_slots = MIN3(10, vtx_mem_size/input_count, vtx_mem_size/output_count);
1868 pvs_num_cntrls = MIN2(6, vtx_mem_size/temp_count);
1869
1870 R300_STATECHANGE(rmesa, vap_cntl);
1871 if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
1872 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] =
1873 (pvs_num_slots << R300_PVS_NUM_SLOTS_SHIFT) |
1874 (pvs_num_cntrls << R300_PVS_NUM_CNTLRS_SHIFT) |
1875 (12 << R300_VF_MAX_VTX_NUM_SHIFT);
1876 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
1877 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= R500_TCL_STATE_OPTIMIZATION;
1878 } else
1879 /* not sure about non-tcl */
1880 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] = ((10 << R300_PVS_NUM_SLOTS_SHIFT) |
1881 (5 << R300_PVS_NUM_CNTLRS_SHIFT) |
1882 (5 << R300_VF_MAX_VTX_NUM_SHIFT));
1883
1884 if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV515)
1885 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (2 << R300_PVS_NUM_FPUS_SHIFT);
1886 else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV530) ||
1887 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV560) ||
1888 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV570))
1889 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (5 << R300_PVS_NUM_FPUS_SHIFT);
1890 else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV410) ||
1891 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R420))
1892 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (6 << R300_PVS_NUM_FPUS_SHIFT);
1893 else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R520) ||
1894 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R580))
1895 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (8 << R300_PVS_NUM_FPUS_SHIFT);
1896 else
1897 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (4 << R300_PVS_NUM_FPUS_SHIFT);
1898
1899 }
1900
1901 static void r300SetupDefaultVertexProgram(r300ContextPtr rmesa)
1902 {
1903 struct r300_vertex_shader_state *prog = &(rmesa->state.vertex_shader);
1904 GLuint o_reg = 0;
1905 GLuint i_reg = 0;
1906 int i;
1907 int inst_count = 0;
1908 int param_count = 0;
1909 int program_end = 0;
1910
1911 for (i = VERT_ATTRIB_POS; i < VERT_ATTRIB_MAX; i++) {
1912 if (rmesa->state.sw_tcl_inputs[i] != -1) {
1913 prog->program.body.i[program_end + 0] = PVS_OP_DST_OPERAND(VE_MULTIPLY, GL_FALSE, GL_FALSE, o_reg++, VSF_FLAG_ALL, PVS_DST_REG_OUT);
1914 prog->program.body.i[program_end + 1] = PVS_SRC_OPERAND(rmesa->state.sw_tcl_inputs[i], PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y, PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W, PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
1915 prog->program.body.i[program_end + 2] = PVS_SRC_OPERAND(rmesa->state.sw_tcl_inputs[i], PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
1916 prog->program.body.i[program_end + 3] = PVS_SRC_OPERAND(rmesa->state.sw_tcl_inputs[i], PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
1917 program_end += 4;
1918 i_reg++;
1919 }
1920 }
1921
1922 prog->program.length = program_end;
1923
1924 r300SetupVertexProgramFragment(rmesa, R300_PVS_CODE_START,
1925 &(prog->program));
1926 inst_count = (prog->program.length / 4) - 1;
1927
1928 r300VapCntl(rmesa, i_reg, o_reg, 0);
1929
1930 R300_STATECHANGE(rmesa, pvs);
1931 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1] =
1932 (0 << R300_PVS_FIRST_INST_SHIFT) |
1933 (inst_count << R300_PVS_XYZW_VALID_INST_SHIFT) |
1934 (inst_count << R300_PVS_LAST_INST_SHIFT);
1935 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] =
1936 (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) |
1937 (param_count << R300_PVS_MAX_CONST_ADDR_SHIFT);
1938 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3] =
1939 (inst_count << R300_PVS_LAST_VTX_SRC_INST_SHIFT);
1940 }
1941
1942 static int bit_count (int x)
1943 {
1944 x = ((x & 0xaaaaaaaaU) >> 1) + (x & 0x55555555U);
1945 x = ((x & 0xccccccccU) >> 2) + (x & 0x33333333U);
1946 x = (x >> 16) + (x & 0xffff);
1947 x = ((x & 0xf0f0) >> 4) + (x & 0x0f0f);
1948 return (x >> 8) + (x & 0x00ff);
1949 }
1950
1951 static void r300SetupRealVertexProgram(r300ContextPtr rmesa)
1952 {
1953 GLcontext *ctx = rmesa->radeon.glCtx;
1954 struct r300_vertex_program *prog = (struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx);
1955 int inst_count = 0;
1956 int param_count = 0;
1957
1958 /* FIXME: r300SetupVertexProgramFragment */
1959 R300_STATECHANGE(rmesa, vpp);
1960 param_count =
1961 r300VertexProgUpdateParams(ctx,
1962 (struct r300_vertex_program_cont *)
1963 ctx->VertexProgram._Current,
1964 (float *)&rmesa->hw.vpp.
1965 cmd[R300_VPP_PARAM_0]);
1966 bump_vpu_count(rmesa->hw.vpp.cmd, param_count);
1967 param_count /= 4;
1968
1969 r300SetupVertexProgramFragment(rmesa, R300_PVS_CODE_START, &(prog->program));
1970 inst_count = (prog->program.length / 4) - 1;
1971
1972 r300VapCntl(rmesa, bit_count(prog->key.InputsRead),
1973 bit_count(prog->key.OutputsWritten), prog->num_temporaries);
1974
1975 R300_STATECHANGE(rmesa, pvs);
1976 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1] =
1977 (0 << R300_PVS_FIRST_INST_SHIFT) |
1978 (inst_count << R300_PVS_XYZW_VALID_INST_SHIFT) |
1979 (inst_count << R300_PVS_LAST_INST_SHIFT);
1980 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] =
1981 (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) |
1982 (param_count << R300_PVS_MAX_CONST_ADDR_SHIFT);
1983 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3] =
1984 (inst_count << R300_PVS_LAST_VTX_SRC_INST_SHIFT);
1985 }
1986
1987 static void r300SetupVertexProgram(r300ContextPtr rmesa)
1988 {
1989 GLcontext *ctx = rmesa->radeon.glCtx;
1990
1991 /* Reset state, in case we don't use something */
1992 ((drm_r300_cmd_header_t *) rmesa->hw.vpp.cmd)->vpu.count = 0;
1993 ((drm_r300_cmd_header_t *) rmesa->hw.vpi.cmd)->vpu.count = 0;
1994 ((drm_r300_cmd_header_t *) rmesa->hw.vps.cmd)->vpu.count = 0;
1995
1996 /* Not sure why this doesnt work...
1997 0x400 area might have something to do with pixel shaders as it appears right after pfs programming.
1998 0x406 is set to { 0.0, 0.0, 1.0, 0.0 } most of the time but should change with smooth points and in other rare cases. */
1999 //setup_vertex_shader_fragment(rmesa, 0x406, &unk4);
2000 if (hw_tcl_on && ((struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx))->translated) {
2001 r300SetupRealVertexProgram(rmesa);
2002 } else {
2003 /* FIXME: This needs to be replaced by vertex shader generation code. */
2004 r300SetupDefaultVertexProgram(rmesa);
2005 }
2006
2007 }
2008
2009 /**
2010 * Enable/Disable states.
2011 *
2012 * \note Mesa already filters redundant calls to this function.
2013 */
2014 static void r300Enable(GLcontext * ctx, GLenum cap, GLboolean state)
2015 {
2016 if (RADEON_DEBUG & DEBUG_STATE)
2017 fprintf(stderr, "%s( %s = %s )\n", __FUNCTION__,
2018 _mesa_lookup_enum_by_nr(cap),
2019 state ? "GL_TRUE" : "GL_FALSE");
2020
2021 switch (cap) {
2022 case GL_TEXTURE_1D:
2023 case GL_TEXTURE_2D:
2024 case GL_TEXTURE_3D:
2025 /* empty */
2026 break;
2027 case GL_FOG:
2028 /* empty */
2029 break;
2030 case GL_ALPHA_TEST:
2031 r300SetAlphaState(ctx);
2032 break;
2033 case GL_COLOR_LOGIC_OP:
2034 r300SetLogicOpState(ctx);
2035 /* fall-through, because logic op overrides blending */
2036 case GL_BLEND:
2037 r300SetBlendState(ctx);
2038 break;
2039 case GL_CLIP_PLANE0:
2040 case GL_CLIP_PLANE1:
2041 case GL_CLIP_PLANE2:
2042 case GL_CLIP_PLANE3:
2043 case GL_CLIP_PLANE4:
2044 case GL_CLIP_PLANE5:
2045 r300SetClipPlaneState(ctx, cap, state);
2046 break;
2047 case GL_DEPTH_TEST:
2048 r300SetDepthState(ctx);
2049 break;
2050 case GL_STENCIL_TEST:
2051 r300SetStencilState(ctx, state);
2052 break;
2053 case GL_CULL_FACE:
2054 r300UpdateCulling(ctx);
2055 break;
2056 case GL_POLYGON_OFFSET_POINT:
2057 case GL_POLYGON_OFFSET_LINE:
2058 case GL_POLYGON_OFFSET_FILL:
2059 r300SetPolygonOffsetState(ctx, state);
2060 break;
2061 default:
2062 radeonEnable(ctx, cap, state);
2063 break;
2064 }
2065 }
2066
2067 /**
2068 * Completely recalculates hardware state based on the Mesa state.
2069 */
2070 static void r300ResetHwState(r300ContextPtr r300)
2071 {
2072 GLcontext *ctx = r300->radeon.glCtx;
2073 int has_tcl = 1;
2074
2075 if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
2076 has_tcl = 0;
2077
2078 if (RADEON_DEBUG & DEBUG_STATE)
2079 fprintf(stderr, "%s\n", __FUNCTION__);
2080
2081 r300UpdateWindow(ctx);
2082
2083 r300ColorMask(ctx,
2084 ctx->Color.ColorMask[RCOMP],
2085 ctx->Color.ColorMask[GCOMP],
2086 ctx->Color.ColorMask[BCOMP], ctx->Color.ColorMask[ACOMP]);
2087
2088 r300Enable(ctx, GL_DEPTH_TEST, ctx->Depth.Test);
2089 r300DepthMask(ctx, ctx->Depth.Mask);
2090 r300DepthFunc(ctx, ctx->Depth.Func);
2091
2092 /* stencil */
2093 r300Enable(ctx, GL_STENCIL_TEST, ctx->Stencil._Enabled);
2094 r300StencilMaskSeparate(ctx, 0, ctx->Stencil.WriteMask[0]);
2095 r300StencilFuncSeparate(ctx, 0, ctx->Stencil.Function[0],
2096 ctx->Stencil.Ref[0], ctx->Stencil.ValueMask[0]);
2097 r300StencilOpSeparate(ctx, 0, ctx->Stencil.FailFunc[0],
2098 ctx->Stencil.ZFailFunc[0],
2099 ctx->Stencil.ZPassFunc[0]);
2100
2101 r300UpdateCulling(ctx);
2102
2103 r300UpdateTextureState(ctx);
2104
2105 r300SetBlendState(ctx);
2106 r300SetLogicOpState(ctx);
2107
2108 r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef);
2109 r300Enable(ctx, GL_ALPHA_TEST, ctx->Color.AlphaEnabled);
2110
2111 r300->hw.vte.cmd[1] = R300_VPORT_X_SCALE_ENA
2112 | R300_VPORT_X_OFFSET_ENA
2113 | R300_VPORT_Y_SCALE_ENA
2114 | R300_VPORT_Y_OFFSET_ENA
2115 | R300_VPORT_Z_SCALE_ENA
2116 | R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT;
2117 r300->hw.vte.cmd[2] = 0x00000008;
2118
2119 r300->hw.vap_vf_max_vtx_indx.cmd[1] = 0x00FFFFFF;
2120 r300->hw.vap_vf_max_vtx_indx.cmd[2] = 0x00000000;
2121
2122 #ifdef MESA_LITTLE_ENDIAN
2123 r300->hw.vap_cntl_status.cmd[1] = R300_VC_NO_SWAP;
2124 #else
2125 r300->hw.vap_cntl_status.cmd[1] = R300_VC_32BIT_SWAP;
2126 #endif
2127
2128 /* disable VAP/TCL on non-TCL capable chips */
2129 if (!has_tcl)
2130 r300->hw.vap_cntl_status.cmd[1] |= R300_VAP_TCL_BYPASS;
2131
2132 r300->hw.vap_psc_sgn_norm_cntl.cmd[1] = 0xAAAAAAAA;
2133
2134 /* XXX: Other families? */
2135 if (has_tcl) {
2136 r300->hw.vap_clip_cntl.cmd[1] = R300_PS_UCP_MODE_DIST_COP;
2137
2138 r300->hw.vap_clip.cmd[1] = r300PackFloat32(1.0); /* X */
2139 r300->hw.vap_clip.cmd[2] = r300PackFloat32(1.0); /* X */
2140 r300->hw.vap_clip.cmd[3] = r300PackFloat32(1.0); /* Y */
2141 r300->hw.vap_clip.cmd[4] = r300PackFloat32(1.0); /* Y */
2142
2143 switch (r300->radeon.radeonScreen->chip_family) {
2144 case CHIP_FAMILY_R300:
2145 r300->hw.vap_pvs_vtx_timeout_reg.cmd[1] = R300_2288_R300;
2146 break;
2147 default:
2148 r300->hw.vap_pvs_vtx_timeout_reg.cmd[1] = R300_2288_RV350;
2149 break;
2150 }
2151 }
2152
2153 r300->hw.gb_enable.cmd[1] = R300_GB_POINT_STUFF_ENABLE
2154 | R300_GB_LINE_STUFF_ENABLE
2155 | R300_GB_TRIANGLE_STUFF_ENABLE;
2156
2157 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_0] = 0x66666666;
2158 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_1] = 0x06666666;
2159
2160 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] =
2161 R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16 /*| R300_GB_SUBPIXEL_1_16*/;
2162 switch (r300->radeon.radeonScreen->num_gb_pipes) {
2163 case 1:
2164 default:
2165 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2166 R300_GB_TILE_PIPE_COUNT_RV300;
2167 break;
2168 case 2:
2169 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2170 R300_GB_TILE_PIPE_COUNT_R300;
2171 break;
2172 case 3:
2173 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2174 R300_GB_TILE_PIPE_COUNT_R420_3P;
2175 break;
2176 case 4:
2177 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2178 R300_GB_TILE_PIPE_COUNT_R420;
2179 break;
2180 }
2181
2182 /* XXX: Enable anti-aliasing? */
2183 r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = GB_AA_CONFIG_AA_DISABLE;
2184 r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = 0;
2185
2186 r300->hw.ga_point_s0.cmd[1] = r300PackFloat32(0.0);
2187 r300->hw.ga_point_s0.cmd[2] = r300PackFloat32(0.0);
2188 r300->hw.ga_point_s0.cmd[3] = r300PackFloat32(1.0);
2189 r300->hw.ga_point_s0.cmd[4] = r300PackFloat32(1.0);
2190
2191 r300->hw.ga_triangle_stipple.cmd[1] = 0x00050005;
2192
2193 r300PointSize(ctx, 1.0);
2194
2195 r300->hw.ga_point_minmax.cmd[1] = 0x18000006;
2196 r300->hw.ga_point_minmax.cmd[2] = 0x00020006;
2197 r300->hw.ga_point_minmax.cmd[3] = r300PackFloat32(1.0 / 192.0);
2198
2199 r300LineWidth(ctx, 1.0);
2200
2201 r300->hw.ga_line_stipple.cmd[1] = 0;
2202 r300->hw.ga_line_stipple.cmd[2] = r300PackFloat32(0.0);
2203 r300->hw.ga_line_stipple.cmd[3] = r300PackFloat32(1.0);
2204
2205 r300ShadeModel(ctx, ctx->Light.ShadeModel);
2206
2207 r300PolygonMode(ctx, GL_FRONT, ctx->Polygon.FrontMode);
2208 r300PolygonMode(ctx, GL_BACK, ctx->Polygon.BackMode);
2209 r300->hw.zbias_cntl.cmd[1] = 0x00000000;
2210
2211 r300PolygonOffset(ctx, ctx->Polygon.OffsetFactor,
2212 ctx->Polygon.OffsetUnits);
2213 r300Enable(ctx, GL_POLYGON_OFFSET_POINT, ctx->Polygon.OffsetPoint);
2214 r300Enable(ctx, GL_POLYGON_OFFSET_LINE, ctx->Polygon.OffsetLine);
2215 r300Enable(ctx, GL_POLYGON_OFFSET_FILL, ctx->Polygon.OffsetFill);
2216
2217 r300->hw.su_depth_scale.cmd[1] = 0x4B7FFFFF;
2218 r300->hw.su_depth_scale.cmd[2] = 0x00000000;
2219
2220 r300->hw.sc_hyperz.cmd[1] = 0x0000001C;
2221 r300->hw.sc_hyperz.cmd[2] = 0x2DA49525;
2222
2223 r300->hw.sc_screendoor.cmd[1] = 0x00FFFFFF;
2224
2225 r300->hw.us_out_fmt.cmd[1] = R500_OUT_FMT_C4_8 |
2226 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2227 r300->hw.us_out_fmt.cmd[2] = R500_OUT_FMT_UNUSED |
2228 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2229 r300->hw.us_out_fmt.cmd[3] = R500_OUT_FMT_UNUSED |
2230 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2231 r300->hw.us_out_fmt.cmd[4] = R500_OUT_FMT_UNUSED |
2232 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2233 r300->hw.us_out_fmt.cmd[5] = R300_W_FMT_W0 | R300_W_SRC_US;
2234
2235 /* disable fog unit */
2236 r300->hw.fogs.cmd[R300_FOGS_STATE] = 0;
2237 r300->hw.fg_depth_src.cmd[1] = R300_FG_DEPTH_SRC_SCAN;
2238
2239 r300->hw.rb3d_cctl.cmd[1] = 0;
2240
2241 r300BlendColor(ctx, ctx->Color.BlendColor);
2242
2243 /* Again, r300ClearBuffer uses this */
2244 r300->hw.cb.cmd[R300_CB_OFFSET] =
2245 r300->radeon.state.color.drawOffset +
2246 r300->radeon.radeonScreen->fbLocation;
2247 r300->hw.cb.cmd[R300_CB_PITCH] = r300->radeon.state.color.drawPitch;
2248
2249 if (r300->radeon.radeonScreen->cpp == 4)
2250 r300->hw.cb.cmd[R300_CB_PITCH] |= R300_COLOR_FORMAT_ARGB8888;
2251 else
2252 r300->hw.cb.cmd[R300_CB_PITCH] |= R300_COLOR_FORMAT_RGB565;
2253
2254 if (r300->radeon.sarea->tiling_enabled)
2255 r300->hw.cb.cmd[R300_CB_PITCH] |= R300_COLOR_TILE_ENABLE;
2256
2257 r300->hw.rb3d_dither_ctl.cmd[1] = 0;
2258 r300->hw.rb3d_dither_ctl.cmd[2] = 0;
2259 r300->hw.rb3d_dither_ctl.cmd[3] = 0;
2260 r300->hw.rb3d_dither_ctl.cmd[4] = 0;
2261 r300->hw.rb3d_dither_ctl.cmd[5] = 0;
2262 r300->hw.rb3d_dither_ctl.cmd[6] = 0;
2263 r300->hw.rb3d_dither_ctl.cmd[7] = 0;
2264 r300->hw.rb3d_dither_ctl.cmd[8] = 0;
2265 r300->hw.rb3d_dither_ctl.cmd[9] = 0;
2266
2267 r300->hw.rb3d_aaresolve_ctl.cmd[1] = 0;
2268
2269 r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[1] = 0x00000000;
2270 r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[2] = 0xffffffff;
2271
2272 r300->hw.zb.cmd[R300_ZB_OFFSET] =
2273 r300->radeon.radeonScreen->depthOffset +
2274 r300->radeon.radeonScreen->fbLocation;
2275 r300->hw.zb.cmd[R300_ZB_PITCH] = r300->radeon.radeonScreen->depthPitch;
2276
2277 if (r300->radeon.sarea->tiling_enabled) {
2278 /* XXX: Turn off when clearing buffers ? */
2279 r300->hw.zb.cmd[R300_ZB_PITCH] |= R300_DEPTHMACROTILE_ENABLE;
2280
2281 if (ctx->Visual.depthBits == 24)
2282 r300->hw.zb.cmd[R300_ZB_PITCH] |=
2283 R300_DEPTHMICROTILE_TILED;
2284 }
2285
2286 r300->hw.zb_depthclearvalue.cmd[1] = 0;
2287
2288 switch (ctx->Visual.depthBits) {
2289 case 16:
2290 r300->hw.zstencil_format.cmd[1] = R300_DEPTHFORMAT_16BIT_INT_Z;
2291 break;
2292 case 24:
2293 r300->hw.zstencil_format.cmd[1] = R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL;
2294 break;
2295 default:
2296 fprintf(stderr, "Error: Unsupported depth %d... exiting\n", ctx->Visual.depthBits);
2297 _mesa_exit(-1);
2298 }
2299
2300 r300->hw.zstencil_format.cmd[2] = R300_ZTOP_DISABLE;
2301 r300->hw.zstencil_format.cmd[3] = 0x00000003;
2302 r300->hw.zstencil_format.cmd[4] = 0x00000000;
2303 r300SetEarlyZState(ctx);
2304
2305 r300->hw.unk4F30.cmd[1] = 0;
2306 r300->hw.unk4F30.cmd[2] = 0;
2307
2308 r300->hw.zb_hiz_offset.cmd[1] = 0;
2309
2310 r300->hw.zb_hiz_pitch.cmd[1] = 0;
2311
2312 r300VapCntl(r300, 0, 0, 0);
2313 if (has_tcl) {
2314 r300->hw.vps.cmd[R300_VPS_ZERO_0] = 0;
2315 r300->hw.vps.cmd[R300_VPS_ZERO_1] = 0;
2316 r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
2317 r300->hw.vps.cmd[R300_VPS_ZERO_3] = 0;
2318 }
2319
2320 r300->hw.all_dirty = GL_TRUE;
2321 }
2322
2323 void r300UpdateShaders(r300ContextPtr rmesa)
2324 {
2325 GLcontext *ctx;
2326 struct r300_vertex_program *vp;
2327 int i;
2328
2329 ctx = rmesa->radeon.glCtx;
2330
2331 if (rmesa->NewGLState && hw_tcl_on) {
2332 rmesa->NewGLState = 0;
2333
2334 for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) {
2335 rmesa->temp_attrib[i] =
2336 TNL_CONTEXT(ctx)->vb.AttribPtr[i];
2337 TNL_CONTEXT(ctx)->vb.AttribPtr[i] =
2338 &rmesa->dummy_attrib[i];
2339 }
2340
2341 _tnl_UpdateFixedFunctionProgram(ctx);
2342
2343 for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) {
2344 TNL_CONTEXT(ctx)->vb.AttribPtr[i] =
2345 rmesa->temp_attrib[i];
2346 }
2347
2348 r300SelectVertexShader(rmesa);
2349 vp = (struct r300_vertex_program *)
2350 CURRENT_VERTEX_SHADER(ctx);
2351 /*if (vp->translated == GL_FALSE)
2352 r300TranslateVertexShader(vp); */
2353 if (vp->translated == GL_FALSE) {
2354 fprintf(stderr, "Failing back to sw-tcl\n");
2355 hw_tcl_on = future_hw_tcl_on = 0;
2356 r300ResetHwState(rmesa);
2357
2358 r300UpdateStateParameters(ctx, _NEW_PROGRAM);
2359 return;
2360 }
2361 }
2362 r300UpdateStateParameters(ctx, _NEW_PROGRAM);
2363 }
2364
2365 static const GLfloat *get_fragmentprogram_constant(GLcontext *ctx,
2366 struct gl_program *program, struct prog_src_register srcreg)
2367 {
2368 static const GLfloat dummy[4] = { 0, 0, 0, 0 };
2369
2370 switch(srcreg.File) {
2371 case PROGRAM_LOCAL_PARAM:
2372 return program->LocalParams[srcreg.Index];
2373 case PROGRAM_ENV_PARAM:
2374 return ctx->FragmentProgram.Parameters[srcreg.Index];
2375 case PROGRAM_STATE_VAR:
2376 case PROGRAM_NAMED_PARAM:
2377 case PROGRAM_CONSTANT:
2378 return program->Parameters->ParameterValues[srcreg.Index];
2379 default:
2380 _mesa_problem(ctx, "get_fragmentprogram_constant: Unknown\n");
2381 return dummy;
2382 }
2383 }
2384
2385
2386 static void r300SetupPixelShader(r300ContextPtr rmesa)
2387 {
2388 GLcontext *ctx = rmesa->radeon.glCtx;
2389 struct r300_fragment_program *fp = (struct r300_fragment_program *)
2390 (char *)ctx->FragmentProgram._Current;
2391 struct r300_fragment_program_code *code;
2392 int i, k;
2393
2394 if (!fp) /* should only happenen once, just after context is created */
2395 return;
2396
2397 r300TranslateFragmentShader(rmesa, fp);
2398 if (!fp->translated) {
2399 fprintf(stderr, "%s: No valid fragment shader, exiting\n",
2400 __FUNCTION__);
2401 return;
2402 }
2403 code = &fp->code;
2404
2405 r300SetupTextures(ctx);
2406
2407 R300_STATECHANGE(rmesa, fpi[0]);
2408 R300_STATECHANGE(rmesa, fpi[1]);
2409 R300_STATECHANGE(rmesa, fpi[2]);
2410 R300_STATECHANGE(rmesa, fpi[3]);
2411 rmesa->hw.fpi[0].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_RGB_INST_0, code->alu.length);
2412 rmesa->hw.fpi[1].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_RGB_ADDR_0, code->alu.length);
2413 rmesa->hw.fpi[2].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_ALPHA_INST_0, code->alu.length);
2414 rmesa->hw.fpi[3].cmd[R300_FPI_CMD_0] = cmdpacket0(R300_US_ALU_ALPHA_ADDR_0, code->alu.length);
2415 for (i = 0; i < code->alu.length; i++) {
2416 rmesa->hw.fpi[0].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst0;
2417 rmesa->hw.fpi[1].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst1;
2418 rmesa->hw.fpi[2].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst2;
2419 rmesa->hw.fpi[3].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst3;
2420 }
2421
2422 R300_STATECHANGE(rmesa, fp);
2423 rmesa->hw.fp.cmd[R300_FP_CNTL0] = code->cur_node | (code->first_node_has_tex << 3);
2424 rmesa->hw.fp.cmd[R300_FP_CNTL1] = code->max_temp_idx;
2425 rmesa->hw.fp.cmd[R300_FP_CNTL2] =
2426 (0 << R300_PFS_CNTL_ALU_OFFSET_SHIFT) |
2427 ((code->alu.length-1) << R300_PFS_CNTL_ALU_END_SHIFT) |
2428 (0 << R300_PFS_CNTL_TEX_OFFSET_SHIFT) |
2429 ((code->tex.length ? code->tex.length-1 : 0) << R300_PFS_CNTL_TEX_END_SHIFT);
2430 /* I just want to say, the way these nodes are stored.. weird.. */
2431 for (i = 0, k = (4 - (code->cur_node + 1)); i < 4; i++, k++) {
2432 if (i < (code->cur_node + 1)) {
2433 rmesa->hw.fp.cmd[R300_FP_NODE0 + k] =
2434 (code->node[i].alu_offset << R300_ALU_START_SHIFT) |
2435 (code->node[i].alu_end << R300_ALU_SIZE_SHIFT) |
2436 (code->node[i].tex_offset << R300_TEX_START_SHIFT) |
2437 (code->node[i].tex_end << R300_TEX_SIZE_SHIFT) |
2438 code->node[i].flags;
2439 } else {
2440 rmesa->hw.fp.cmd[R300_FP_NODE0 + (3 - i)] = 0;
2441 }
2442 }
2443
2444 R300_STATECHANGE(rmesa, fpp);
2445 rmesa->hw.fpp.cmd[R300_FPP_CMD_0] = cmdpacket0(R300_PFS_PARAM_0_X, code->const_nr * 4);
2446 for (i = 0; i < code->const_nr; i++) {
2447 const GLfloat *constant = get_fragmentprogram_constant(ctx,
2448 &fp->mesa_program.Base, code->constant[i]);
2449 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat24(constant[0]);
2450 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat24(constant[1]);
2451 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat24(constant[2]);
2452 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat24(constant[3]);
2453 }
2454 }
2455
2456 #define bump_r500fp_count(ptr, new_count) do{\
2457 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
2458 int _nc=(new_count)/6; \
2459 assert(_nc < 256); \
2460 if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
2461 } while(0)
2462
2463 #define bump_r500fp_const_count(ptr, new_count) do{\
2464 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
2465 int _nc=(new_count)/4; \
2466 assert(_nc < 256); \
2467 if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
2468 } while(0)
2469
2470 static void r500SetupPixelShader(r300ContextPtr rmesa)
2471 {
2472 GLcontext *ctx = rmesa->radeon.glCtx;
2473 struct r500_fragment_program *fp = (struct r500_fragment_program *)
2474 (char *)ctx->FragmentProgram._Current;
2475 int i;
2476 struct r500_fragment_program_code *code;
2477
2478 if (!fp) /* should only happenen once, just after context is created */
2479 return;
2480
2481 ((drm_r300_cmd_header_t *) rmesa->hw.r500fp.cmd)->r500fp.count = 0;
2482 ((drm_r300_cmd_header_t *) rmesa->hw.r500fp_const.cmd)->r500fp.count = 0;
2483
2484 r500TranslateFragmentShader(rmesa, fp);
2485 if (!fp->translated) {
2486 fprintf(stderr, "%s: No valid fragment shader, exiting\n",
2487 __FUNCTION__);
2488 return;
2489 }
2490 code = &fp->code;
2491
2492 r300SetupTextures(ctx);
2493
2494 R300_STATECHANGE(rmesa, fp);
2495 rmesa->hw.fp.cmd[R500_FP_PIXSIZE] = code->max_temp_idx;
2496
2497 rmesa->hw.fp.cmd[R500_FP_CODE_ADDR] =
2498 R500_US_CODE_START_ADDR(code->inst_offset) |
2499 R500_US_CODE_END_ADDR(code->inst_end);
2500 rmesa->hw.fp.cmd[R500_FP_CODE_RANGE] =
2501 R500_US_CODE_RANGE_ADDR(code->inst_offset) |
2502 R500_US_CODE_RANGE_SIZE(code->inst_end);
2503 rmesa->hw.fp.cmd[R500_FP_CODE_OFFSET] =
2504 R500_US_CODE_OFFSET_ADDR(0); /* FIXME when we add flow control */
2505
2506 R300_STATECHANGE(rmesa, r500fp);
2507 /* Emit our shader... */
2508 for (i = 0; i < code->inst_end+1; i++) {
2509 rmesa->hw.r500fp.cmd[i*6+1] = code->inst[i].inst0;
2510 rmesa->hw.r500fp.cmd[i*6+2] = code->inst[i].inst1;
2511 rmesa->hw.r500fp.cmd[i*6+3] = code->inst[i].inst2;
2512 rmesa->hw.r500fp.cmd[i*6+4] = code->inst[i].inst3;
2513 rmesa->hw.r500fp.cmd[i*6+5] = code->inst[i].inst4;
2514 rmesa->hw.r500fp.cmd[i*6+6] = code->inst[i].inst5;
2515 }
2516
2517 bump_r500fp_count(rmesa->hw.r500fp.cmd, (code->inst_end + 1) * 6);
2518
2519 R300_STATECHANGE(rmesa, r500fp_const);
2520 for (i = 0; i < code->const_nr; i++) {
2521 const GLfloat *constant = get_fragmentprogram_constant(ctx,
2522 &fp->mesa_program.Base, code->constant[i]);
2523 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat32(constant[0]);
2524 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat32(constant[1]);
2525 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat32(constant[2]);
2526 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat32(constant[3]);
2527 }
2528 bump_r500fp_const_count(rmesa->hw.r500fp_const.cmd, code->const_nr * 4);
2529
2530 }
2531
2532 void r300UpdateShaderStates(r300ContextPtr rmesa)
2533 {
2534 GLcontext *ctx;
2535 ctx = rmesa->radeon.glCtx;
2536
2537 r300UpdateTextureState(ctx);
2538 r300SetEarlyZState(ctx);
2539
2540 /* w_fmt value is set to get best performance
2541 * see p.130 R5xx 3D acceleration guide v1.3 */
2542 GLuint w_fmt, fgdepthsrc;
2543 if (current_fragment_program_writes_depth(ctx)) {
2544 fgdepthsrc = R300_FG_DEPTH_SRC_SHADER;
2545 w_fmt = R300_W_FMT_W24 | R300_W_SRC_US;
2546 } else {
2547 fgdepthsrc = R300_FG_DEPTH_SRC_SCAN;
2548 w_fmt = R300_W_FMT_W0 | R300_W_SRC_US;
2549 }
2550
2551 if (w_fmt != rmesa->hw.us_out_fmt.cmd[5]) {
2552 R300_STATECHANGE(rmesa, us_out_fmt);
2553 rmesa->hw.us_out_fmt.cmd[5] = w_fmt;
2554 }
2555
2556 if (fgdepthsrc != rmesa->hw.fg_depth_src.cmd[1]) {
2557 R300_STATECHANGE(rmesa, fg_depth_src);
2558 rmesa->hw.fg_depth_src.cmd[1] = fgdepthsrc;
2559 }
2560
2561 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
2562 r500SetupPixelShader(rmesa);
2563 else
2564 r300SetupPixelShader(rmesa);
2565
2566 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
2567 r500SetupRSUnit(ctx);
2568 else
2569 r300SetupRSUnit(ctx);
2570
2571 if ((rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
2572 r300SetupVertexProgram(rmesa);
2573
2574 }
2575
2576 /**
2577 * Called by Mesa after an internal state update.
2578 */
2579 static void r300InvalidateState(GLcontext * ctx, GLuint new_state)
2580 {
2581 r300ContextPtr r300 = R300_CONTEXT(ctx);
2582
2583 _swrast_InvalidateState(ctx, new_state);
2584 _swsetup_InvalidateState(ctx, new_state);
2585 _vbo_InvalidateState(ctx, new_state);
2586 _tnl_InvalidateState(ctx, new_state);
2587 _ae_invalidate_state(ctx, new_state);
2588
2589 if (new_state & (_NEW_BUFFERS | _NEW_COLOR | _NEW_PIXEL)) {
2590 r300UpdateDrawBuffer(ctx);
2591 }
2592
2593 r300UpdateStateParameters(ctx, new_state);
2594
2595 r300->NewGLState |= new_state;
2596 }
2597
2598 /**
2599 * Calculate initial hardware state and register state functions.
2600 * Assumes that the command buffer and state atoms have been
2601 * initialized already.
2602 */
2603 void r300InitState(r300ContextPtr r300)
2604 {
2605 GLcontext *ctx = r300->radeon.glCtx;
2606 GLuint depth_fmt;
2607
2608 radeonInitState(&r300->radeon);
2609
2610 switch (ctx->Visual.depthBits) {
2611 case 16:
2612 r300->state.depth.scale = 1.0 / (GLfloat) 0xffff;
2613 depth_fmt = R300_DEPTHFORMAT_16BIT_INT_Z;
2614 break;
2615 case 24:
2616 r300->state.depth.scale = 1.0 / (GLfloat) 0xffffff;
2617 depth_fmt = R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL;
2618 break;
2619 default:
2620 fprintf(stderr, "Error: Unsupported depth %d... exiting\n",
2621 ctx->Visual.depthBits);
2622 _mesa_exit(-1);
2623 }
2624
2625 /* Only have hw stencil when depth buffer is 24 bits deep */
2626 r300->state.stencil.hw_stencil = (ctx->Visual.stencilBits > 0 &&
2627 ctx->Visual.depthBits == 24);
2628
2629 memset(&(r300->state.texture), 0, sizeof(r300->state.texture));
2630
2631 r300ResetHwState(r300);
2632 }
2633
2634 static void r300RenderMode(GLcontext * ctx, GLenum mode)
2635 {
2636 r300ContextPtr rmesa = R300_CONTEXT(ctx);
2637 (void)rmesa;
2638 (void)mode;
2639 }
2640
2641 void r300UpdateClipPlanes( GLcontext *ctx )
2642 {
2643 r300ContextPtr rmesa = R300_CONTEXT(ctx);
2644 GLuint p;
2645
2646 for (p = 0; p < ctx->Const.MaxClipPlanes; p++) {
2647 if (ctx->Transform.ClipPlanesEnabled & (1 << p)) {
2648 GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
2649
2650 R300_STATECHANGE( rmesa, vpucp[p] );
2651 rmesa->hw.vpucp[p].cmd[R300_VPUCP_X] = ip[0];
2652 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Y] = ip[1];
2653 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Z] = ip[2];
2654 rmesa->hw.vpucp[p].cmd[R300_VPUCP_W] = ip[3];
2655 }
2656 }
2657 }
2658
2659 /**
2660 * Initialize driver's state callback functions
2661 */
2662 void r300InitStateFuncs(struct dd_function_table *functions)
2663 {
2664 radeonInitStateFuncs(functions);
2665
2666 functions->UpdateState = r300InvalidateState;
2667 functions->AlphaFunc = r300AlphaFunc;
2668 functions->BlendColor = r300BlendColor;
2669 functions->BlendEquationSeparate = r300BlendEquationSeparate;
2670 functions->BlendFuncSeparate = r300BlendFuncSeparate;
2671 functions->Enable = r300Enable;
2672 functions->ColorMask = r300ColorMask;
2673 functions->DepthFunc = r300DepthFunc;
2674 functions->DepthMask = r300DepthMask;
2675 functions->CullFace = r300CullFace;
2676 functions->FrontFace = r300FrontFace;
2677 functions->ShadeModel = r300ShadeModel;
2678 functions->LogicOpcode = r300LogicOpcode;
2679
2680 /* ARB_point_parameters */
2681 functions->PointParameterfv = r300PointParameter;
2682
2683 /* Stencil related */
2684 functions->StencilFuncSeparate = r300StencilFuncSeparate;
2685 functions->StencilMaskSeparate = r300StencilMaskSeparate;
2686 functions->StencilOpSeparate = r300StencilOpSeparate;
2687
2688 /* Viewport related */
2689 functions->Viewport = r300Viewport;
2690 functions->DepthRange = r300DepthRange;
2691 functions->PointSize = r300PointSize;
2692 functions->LineWidth = r300LineWidth;
2693
2694 functions->PolygonOffset = r300PolygonOffset;
2695 functions->PolygonMode = r300PolygonMode;
2696
2697 functions->RenderMode = r300RenderMode;
2698
2699 functions->ClipPlane = r300ClipPlane;
2700 }