a04326fca97423c4fd189ca29ebcd9f400d32f23
[mesa.git] / src / mesa / drivers / dri / r300 / r300_state.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002.
3 Copyright (C) 2004 Nicolai Haehnle.
4 All Rights Reserved.
5
6 The Weather Channel (TM) funded Tungsten Graphics to develop the
7 initial release of the Radeon 8500 driver under the XFree86 license.
8 This notice must be preserved.
9
10 Permission is hereby granted, free of charge, to any person obtaining
11 a copy of this software and associated documentation files (the
12 "Software"), to deal in the Software without restriction, including
13 without limitation the rights to use, copy, modify, merge, publish,
14 distribute, sublicense, and/or sell copies of the Software, and to
15 permit persons to whom the Software is furnished to do so, subject to
16 the following conditions:
17
18 The above copyright notice and this permission notice (including the
19 next paragraph) shall be included in all copies or substantial
20 portions of the Software.
21
22 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
25 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
26 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
27 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
28 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29
30 **************************************************************************/
31
32 /**
33 * \file
34 *
35 * \author Nicolai Haehnle <prefect_@gmx.net>
36 */
37
38 #include "main/glheader.h"
39 #include "main/state.h"
40 #include "main/imports.h"
41 #include "main/enums.h"
42 #include "main/macros.h"
43 #include "main/context.h"
44 #include "main/dd.h"
45 #include "main/framebuffer.h"
46 #include "main/simple_list.h"
47 #include "main/api_arrayelt.h"
48 #include "main/texformat.h"
49
50 #include "swrast/swrast.h"
51 #include "swrast_setup/swrast_setup.h"
52 #include "shader/prog_parameter.h"
53 #include "shader/prog_statevars.h"
54 #include "vbo/vbo.h"
55 #include "tnl/tnl.h"
56 #include "tnl/t_vp_build.h"
57
58 #include "r300_context.h"
59 #include "r300_ioctl.h"
60 #include "r300_state.h"
61 #include "r300_reg.h"
62 #include "r300_emit.h"
63 #include "r300_tex.h"
64 #include "r300_fragprog_common.h"
65 #include "r300_fragprog.h"
66 #include "r500_fragprog.h"
67 #include "r300_render.h"
68 #include "r300_vertprog.h"
69
70 #include "drirenderbuffer.h"
71
72 static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4])
73 {
74 r300ContextPtr rmesa = R300_CONTEXT(ctx);
75
76 R300_STATECHANGE(rmesa, blend_color);
77
78 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
79 GLuint r = IROUND(cf[0]*1023.0f);
80 GLuint g = IROUND(cf[1]*1023.0f);
81 GLuint b = IROUND(cf[2]*1023.0f);
82 GLuint a = IROUND(cf[3]*1023.0f);
83
84 rmesa->hw.blend_color.cmd[1] = r | (a << 16);
85 rmesa->hw.blend_color.cmd[2] = b | (g << 16);
86 } else {
87 GLubyte color[4];
88 CLAMPED_FLOAT_TO_UBYTE(color[0], cf[0]);
89 CLAMPED_FLOAT_TO_UBYTE(color[1], cf[1]);
90 CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]);
91 CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]);
92
93 rmesa->hw.blend_color.cmd[1] = PACK_COLOR_8888(color[3], color[0],
94 color[1], color[2]);
95 }
96 }
97
98 /**
99 * Calculate the hardware blend factor setting. This same function is used
100 * for source and destination of both alpha and RGB.
101 *
102 * \returns
103 * The hardware register value for the specified blend factor. This value
104 * will need to be shifted into the correct position for either source or
105 * destination factor.
106 *
107 * \todo
108 * Since the two cases where source and destination are handled differently
109 * are essentially error cases, they should never happen. Determine if these
110 * cases can be removed.
111 */
112 static int blend_factor(GLenum factor, GLboolean is_src)
113 {
114 switch (factor) {
115 case GL_ZERO:
116 return R300_BLEND_GL_ZERO;
117 break;
118 case GL_ONE:
119 return R300_BLEND_GL_ONE;
120 break;
121 case GL_DST_COLOR:
122 return R300_BLEND_GL_DST_COLOR;
123 break;
124 case GL_ONE_MINUS_DST_COLOR:
125 return R300_BLEND_GL_ONE_MINUS_DST_COLOR;
126 break;
127 case GL_SRC_COLOR:
128 return R300_BLEND_GL_SRC_COLOR;
129 break;
130 case GL_ONE_MINUS_SRC_COLOR:
131 return R300_BLEND_GL_ONE_MINUS_SRC_COLOR;
132 break;
133 case GL_SRC_ALPHA:
134 return R300_BLEND_GL_SRC_ALPHA;
135 break;
136 case GL_ONE_MINUS_SRC_ALPHA:
137 return R300_BLEND_GL_ONE_MINUS_SRC_ALPHA;
138 break;
139 case GL_DST_ALPHA:
140 return R300_BLEND_GL_DST_ALPHA;
141 break;
142 case GL_ONE_MINUS_DST_ALPHA:
143 return R300_BLEND_GL_ONE_MINUS_DST_ALPHA;
144 break;
145 case GL_SRC_ALPHA_SATURATE:
146 return (is_src) ? R300_BLEND_GL_SRC_ALPHA_SATURATE :
147 R300_BLEND_GL_ZERO;
148 break;
149 case GL_CONSTANT_COLOR:
150 return R300_BLEND_GL_CONST_COLOR;
151 break;
152 case GL_ONE_MINUS_CONSTANT_COLOR:
153 return R300_BLEND_GL_ONE_MINUS_CONST_COLOR;
154 break;
155 case GL_CONSTANT_ALPHA:
156 return R300_BLEND_GL_CONST_ALPHA;
157 break;
158 case GL_ONE_MINUS_CONSTANT_ALPHA:
159 return R300_BLEND_GL_ONE_MINUS_CONST_ALPHA;
160 break;
161 default:
162 fprintf(stderr, "unknown blend factor %x\n", factor);
163 return (is_src) ? R300_BLEND_GL_ONE : R300_BLEND_GL_ZERO;
164 break;
165 }
166 }
167
168 /**
169 * Sets both the blend equation and the blend function.
170 * This is done in a single
171 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
172 * change the interpretation of the blend function.
173 * Also, make sure that blend function and blend equation are set to their
174 * default value if color blending is not enabled, since at least blend
175 * equations GL_MIN and GL_FUNC_REVERSE_SUBTRACT will cause wrong results
176 * otherwise for unknown reasons.
177 */
178
179 /* helper function */
180 static void r300SetBlendCntl(r300ContextPtr r300, int func, int eqn,
181 int cbits, int funcA, int eqnA)
182 {
183 GLuint new_ablend, new_cblend;
184
185 #if 0
186 fprintf(stderr,
187 "eqnA=%08x funcA=%08x eqn=%08x func=%08x cbits=%08x\n",
188 eqnA, funcA, eqn, func, cbits);
189 #endif
190 new_ablend = eqnA | funcA;
191 new_cblend = eqn | func;
192
193 /* Some blend factor combinations don't seem to work when the
194 * BLEND_NO_SEPARATE bit is set.
195 *
196 * Especially problematic candidates are the ONE_MINUS_* flags,
197 * but I can't see a real pattern.
198 */
199 #if 0
200 if (new_ablend == new_cblend) {
201 new_cblend |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
202 }
203 #endif
204 new_cblend |= cbits;
205
206 if ((new_ablend != r300->hw.bld.cmd[R300_BLD_ABLEND]) ||
207 (new_cblend != r300->hw.bld.cmd[R300_BLD_CBLEND])) {
208 R300_STATECHANGE(r300, bld);
209 r300->hw.bld.cmd[R300_BLD_ABLEND] = new_ablend;
210 r300->hw.bld.cmd[R300_BLD_CBLEND] = new_cblend;
211 }
212 }
213
214 static void r300SetBlendState(GLcontext * ctx)
215 {
216 r300ContextPtr r300 = R300_CONTEXT(ctx);
217 int func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
218 (R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
219 int eqn = R300_COMB_FCN_ADD_CLAMP;
220 int funcA = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
221 (R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
222 int eqnA = R300_COMB_FCN_ADD_CLAMP;
223
224 if (RGBA_LOGICOP_ENABLED(ctx) || !ctx->Color.BlendEnabled) {
225 r300SetBlendCntl(r300, func, eqn, 0, func, eqn);
226 return;
227 }
228
229 func =
230 (blend_factor(ctx->Color.BlendSrcRGB, GL_TRUE) <<
231 R300_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstRGB,
232 GL_FALSE) <<
233 R300_DST_BLEND_SHIFT);
234
235 switch (ctx->Color.BlendEquationRGB) {
236 case GL_FUNC_ADD:
237 eqn = R300_COMB_FCN_ADD_CLAMP;
238 break;
239
240 case GL_FUNC_SUBTRACT:
241 eqn = R300_COMB_FCN_SUB_CLAMP;
242 break;
243
244 case GL_FUNC_REVERSE_SUBTRACT:
245 eqn = R300_COMB_FCN_RSUB_CLAMP;
246 break;
247
248 case GL_MIN:
249 eqn = R300_COMB_FCN_MIN;
250 func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
251 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
252 break;
253
254 case GL_MAX:
255 eqn = R300_COMB_FCN_MAX;
256 func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
257 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
258 break;
259
260 default:
261 fprintf(stderr,
262 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
263 __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB);
264 return;
265 }
266
267 funcA =
268 (blend_factor(ctx->Color.BlendSrcA, GL_TRUE) <<
269 R300_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstA,
270 GL_FALSE) <<
271 R300_DST_BLEND_SHIFT);
272
273 switch (ctx->Color.BlendEquationA) {
274 case GL_FUNC_ADD:
275 eqnA = R300_COMB_FCN_ADD_CLAMP;
276 break;
277
278 case GL_FUNC_SUBTRACT:
279 eqnA = R300_COMB_FCN_SUB_CLAMP;
280 break;
281
282 case GL_FUNC_REVERSE_SUBTRACT:
283 eqnA = R300_COMB_FCN_RSUB_CLAMP;
284 break;
285
286 case GL_MIN:
287 eqnA = R300_COMB_FCN_MIN;
288 funcA = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
289 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
290 break;
291
292 case GL_MAX:
293 eqnA = R300_COMB_FCN_MAX;
294 funcA = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
295 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
296 break;
297
298 default:
299 fprintf(stderr,
300 "[%s:%u] Invalid A blend equation (0x%04x).\n",
301 __FUNCTION__, __LINE__, ctx->Color.BlendEquationA);
302 return;
303 }
304
305 r300SetBlendCntl(r300,
306 func, eqn,
307 (R300_SEPARATE_ALPHA_ENABLE |
308 R300_READ_ENABLE |
309 R300_ALPHA_BLEND_ENABLE), funcA, eqnA);
310 }
311
312 static void r300BlendEquationSeparate(GLcontext * ctx,
313 GLenum modeRGB, GLenum modeA)
314 {
315 r300SetBlendState(ctx);
316 }
317
318 static void r300BlendFuncSeparate(GLcontext * ctx,
319 GLenum sfactorRGB, GLenum dfactorRGB,
320 GLenum sfactorA, GLenum dfactorA)
321 {
322 r300SetBlendState(ctx);
323 }
324
325 /**
326 * Translate LogicOp enums into hardware representation.
327 * Both use a very logical bit-wise layout, but unfortunately the order
328 * of bits is reversed.
329 */
330 static GLuint translate_logicop(GLenum logicop)
331 {
332 GLuint bits = logicop - GL_CLEAR;
333 bits = ((bits & 1) << 3) | ((bits & 2) << 1) | ((bits & 4) >> 1) | ((bits & 8) >> 3);
334 return bits << R300_RB3D_ROPCNTL_ROP_SHIFT;
335 }
336
337 /**
338 * Used internally to update the r300->hw hardware state to match the
339 * current OpenGL state.
340 */
341 static void r300SetLogicOpState(GLcontext *ctx)
342 {
343 r300ContextPtr r300 = R300_CONTEXT(ctx);
344 R300_STATECHANGE(r300, rop);
345 if (RGBA_LOGICOP_ENABLED(ctx)) {
346 r300->hw.rop.cmd[1] = R300_RB3D_ROPCNTL_ROP_ENABLE |
347 translate_logicop(ctx->Color.LogicOp);
348 } else {
349 r300->hw.rop.cmd[1] = 0;
350 }
351 }
352
353 /**
354 * Called by Mesa when an application program changes the LogicOp state
355 * via glLogicOp.
356 */
357 static void r300LogicOpcode(GLcontext *ctx, GLenum logicop)
358 {
359 if (RGBA_LOGICOP_ENABLED(ctx))
360 r300SetLogicOpState(ctx);
361 }
362
363 static void r300ClipPlane( GLcontext *ctx, GLenum plane, const GLfloat *eq )
364 {
365 r300ContextPtr rmesa = R300_CONTEXT(ctx);
366 GLint p;
367 GLint *ip;
368
369 /* no VAP UCP on non-TCL chipsets */
370 if (!rmesa->options.hw_tcl_enabled)
371 return;
372
373 p = (GLint) plane - (GLint) GL_CLIP_PLANE0;
374 ip = (GLint *)ctx->Transform._ClipUserPlane[p];
375
376 R300_STATECHANGE( rmesa, vpucp[p] );
377 rmesa->hw.vpucp[p].cmd[R300_VPUCP_X] = ip[0];
378 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Y] = ip[1];
379 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Z] = ip[2];
380 rmesa->hw.vpucp[p].cmd[R300_VPUCP_W] = ip[3];
381 }
382
383 static void r300SetClipPlaneState(GLcontext * ctx, GLenum cap, GLboolean state)
384 {
385 r300ContextPtr r300 = R300_CONTEXT(ctx);
386 GLuint p;
387
388 /* no VAP UCP on non-TCL chipsets */
389 if (!r300->options.hw_tcl_enabled)
390 return;
391
392 p = cap - GL_CLIP_PLANE0;
393 R300_STATECHANGE(r300, vap_clip_cntl);
394 if (state) {
395 r300->hw.vap_clip_cntl.cmd[1] |= (R300_VAP_UCP_ENABLE_0 << p);
396 r300ClipPlane(ctx, cap, NULL);
397 } else {
398 r300->hw.vap_clip_cntl.cmd[1] &= ~(R300_VAP_UCP_ENABLE_0 << p);
399 }
400 }
401
402 /**
403 * Update our tracked culling state based on Mesa's state.
404 */
405 static void r300UpdateCulling(GLcontext * ctx)
406 {
407 r300ContextPtr r300 = R300_CONTEXT(ctx);
408 uint32_t val = 0;
409
410 if (ctx->Polygon.CullFlag) {
411 switch (ctx->Polygon.CullFaceMode) {
412 case GL_FRONT:
413 val = R300_CULL_FRONT;
414 break;
415 case GL_BACK:
416 val = R300_CULL_BACK;
417 break;
418 case GL_FRONT_AND_BACK:
419 val = R300_CULL_FRONT | R300_CULL_BACK;
420 break;
421 default:
422 break;
423 }
424 }
425
426 switch (ctx->Polygon.FrontFace) {
427 case GL_CW:
428 val |= R300_FRONT_FACE_CW;
429 break;
430 case GL_CCW:
431 val |= R300_FRONT_FACE_CCW;
432 break;
433 default:
434 break;
435 }
436
437 R300_STATECHANGE(r300, cul);
438 r300->hw.cul.cmd[R300_CUL_CULL] = val;
439 }
440
441 static void r300SetPolygonOffsetState(GLcontext * ctx, GLboolean state)
442 {
443 r300ContextPtr r300 = R300_CONTEXT(ctx);
444
445 R300_STATECHANGE(r300, occlusion_cntl);
446 if (state) {
447 r300->hw.occlusion_cntl.cmd[1] |= (3 << 0);
448 } else {
449 r300->hw.occlusion_cntl.cmd[1] &= ~(3 << 0);
450 }
451 }
452
453 static GLboolean current_fragment_program_writes_depth(GLcontext* ctx)
454 {
455 struct r300_fragment_program *fp = (struct r300_fragment_program *) ctx->FragmentProgram._Current;
456
457 return (fp && fp->writes_depth);
458 }
459
460 static void r300SetEarlyZState(GLcontext * ctx)
461 {
462 r300ContextPtr r300 = R300_CONTEXT(ctx);
463 GLuint topZ = R300_ZTOP_ENABLE;
464 GLuint w_fmt, fgdepthsrc;
465
466 if (ctx->Color.AlphaEnabled && ctx->Color.AlphaFunc != GL_ALWAYS)
467 topZ = R300_ZTOP_DISABLE;
468 else if (current_fragment_program_writes_depth(ctx))
469 topZ = R300_ZTOP_DISABLE;
470 else if (ctx->FragmentProgram._Current && ctx->FragmentProgram._Current->UsesKill)
471 topZ = R300_ZTOP_DISABLE;
472
473 if (topZ != r300->hw.zstencil_format.cmd[2]) {
474 /* Note: This completely reemits the stencil format.
475 * I have not tested whether this is strictly necessary,
476 * or if emitting a write to ZB_ZTOP is enough.
477 */
478 R300_STATECHANGE(r300, zstencil_format);
479 r300->hw.zstencil_format.cmd[2] = topZ;
480 }
481
482 /* w_fmt value is set to get best performance
483 * see p.130 R5xx 3D acceleration guide v1.3 */
484 if (current_fragment_program_writes_depth(ctx)) {
485 fgdepthsrc = R300_FG_DEPTH_SRC_SHADER;
486 w_fmt = R300_W_FMT_W24 | R300_W_SRC_US;
487 } else {
488 fgdepthsrc = R300_FG_DEPTH_SRC_SCAN;
489 w_fmt = R300_W_FMT_W0 | R300_W_SRC_US;
490 }
491
492 if (w_fmt != r300->hw.us_out_fmt.cmd[5]) {
493 R300_STATECHANGE(r300, us_out_fmt);
494 r300->hw.us_out_fmt.cmd[5] = w_fmt;
495 }
496
497 if (fgdepthsrc != r300->hw.fg_depth_src.cmd[1]) {
498 R300_STATECHANGE(r300, fg_depth_src);
499 r300->hw.fg_depth_src.cmd[1] = fgdepthsrc;
500 }
501 }
502
503 static void r300SetAlphaState(GLcontext * ctx)
504 {
505 r300ContextPtr r300 = R300_CONTEXT(ctx);
506 GLubyte refByte;
507 uint32_t pp_misc = 0x0;
508 GLboolean really_enabled = ctx->Color.AlphaEnabled;
509
510 CLAMPED_FLOAT_TO_UBYTE(refByte, ctx->Color.AlphaRef);
511
512 switch (ctx->Color.AlphaFunc) {
513 case GL_NEVER:
514 pp_misc |= R300_FG_ALPHA_FUNC_NEVER;
515 break;
516 case GL_LESS:
517 pp_misc |= R300_FG_ALPHA_FUNC_LESS;
518 break;
519 case GL_EQUAL:
520 pp_misc |= R300_FG_ALPHA_FUNC_EQUAL;
521 break;
522 case GL_LEQUAL:
523 pp_misc |= R300_FG_ALPHA_FUNC_LE;
524 break;
525 case GL_GREATER:
526 pp_misc |= R300_FG_ALPHA_FUNC_GREATER;
527 break;
528 case GL_NOTEQUAL:
529 pp_misc |= R300_FG_ALPHA_FUNC_NOTEQUAL;
530 break;
531 case GL_GEQUAL:
532 pp_misc |= R300_FG_ALPHA_FUNC_GE;
533 break;
534 case GL_ALWAYS:
535 /*pp_misc |= FG_ALPHA_FUNC_ALWAYS; */
536 really_enabled = GL_FALSE;
537 break;
538 }
539
540 if (really_enabled) {
541 pp_misc |= R300_FG_ALPHA_FUNC_ENABLE;
542 pp_misc |= R500_FG_ALPHA_FUNC_8BIT;
543 pp_misc |= (refByte & R300_FG_ALPHA_FUNC_VAL_MASK);
544 } else {
545 pp_misc = 0x0;
546 }
547
548 R300_STATECHANGE(r300, at);
549 r300->hw.at.cmd[R300_AT_ALPHA_TEST] = pp_misc;
550 r300->hw.at.cmd[R300_AT_UNKNOWN] = 0;
551 }
552
553 static void r300AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
554 {
555 (void)func;
556 (void)ref;
557 r300SetAlphaState(ctx);
558 }
559
560 static int translate_func(int func)
561 {
562 switch (func) {
563 case GL_NEVER:
564 return R300_ZS_NEVER;
565 case GL_LESS:
566 return R300_ZS_LESS;
567 case GL_EQUAL:
568 return R300_ZS_EQUAL;
569 case GL_LEQUAL:
570 return R300_ZS_LEQUAL;
571 case GL_GREATER:
572 return R300_ZS_GREATER;
573 case GL_NOTEQUAL:
574 return R300_ZS_NOTEQUAL;
575 case GL_GEQUAL:
576 return R300_ZS_GEQUAL;
577 case GL_ALWAYS:
578 return R300_ZS_ALWAYS;
579 }
580 return 0;
581 }
582
583 static void r300SetDepthState(GLcontext * ctx)
584 {
585 r300ContextPtr r300 = R300_CONTEXT(ctx);
586
587 R300_STATECHANGE(r300, zs);
588 r300->hw.zs.cmd[R300_ZS_CNTL_0] &= R300_STENCIL_ENABLE|R300_STENCIL_FRONT_BACK;
589 r300->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(R300_ZS_MASK << R300_Z_FUNC_SHIFT);
590
591 if (ctx->Depth.Test) {
592 r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_Z_ENABLE;
593 if (ctx->Depth.Mask)
594 r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_Z_WRITE_ENABLE;
595 r300->hw.zs.cmd[R300_ZS_CNTL_1] |=
596 translate_func(ctx->Depth.Func) << R300_Z_FUNC_SHIFT;
597 }
598 }
599
600 static void r300CatchStencilFallback(GLcontext *ctx)
601 {
602 const unsigned back = ctx->Stencil._BackFace;
603
604 if (ctx->Stencil._Enabled && (ctx->Stencil.Ref[0] != ctx->Stencil.Ref[back]
605 || ctx->Stencil.ValueMask[0] != ctx->Stencil.ValueMask[back]
606 || ctx->Stencil.WriteMask[0] != ctx->Stencil.WriteMask[back])) {
607 r300SwitchFallback(ctx, R300_FALLBACK_STENCIL_TWOSIDE, GL_TRUE);
608 } else {
609 r300SwitchFallback(ctx, R300_FALLBACK_STENCIL_TWOSIDE, GL_FALSE);
610 }
611 }
612
613 static void r300SetStencilState(GLcontext * ctx, GLboolean state)
614 {
615 r300ContextPtr r300 = R300_CONTEXT(ctx);
616 GLboolean hw_stencil = GL_FALSE;
617
618 r300CatchStencilFallback(ctx);
619
620 if (ctx->DrawBuffer) {
621 struct radeon_renderbuffer *rrbStencil
622 = radeon_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
623 hw_stencil = (rrbStencil && rrbStencil->bo);
624 }
625
626 if (hw_stencil) {
627 R300_STATECHANGE(r300, zs);
628 if (state) {
629 r300->hw.zs.cmd[R300_ZS_CNTL_0] |=
630 R300_STENCIL_ENABLE;
631 } else {
632 r300->hw.zs.cmd[R300_ZS_CNTL_0] &=
633 ~R300_STENCIL_ENABLE;
634 }
635 }
636 }
637
638 static void r300UpdatePolygonMode(GLcontext * ctx)
639 {
640 r300ContextPtr r300 = R300_CONTEXT(ctx);
641 uint32_t hw_mode = R300_GA_POLY_MODE_DISABLE;
642
643 /* Only do something if a polygon mode is wanted, default is GL_FILL */
644 if (ctx->Polygon.FrontMode != GL_FILL ||
645 ctx->Polygon.BackMode != GL_FILL) {
646 GLenum f, b;
647
648 /* Handle GL_CW (clock wise and GL_CCW (counter clock wise)
649 * correctly by selecting the correct front and back face
650 */
651 if (ctx->Polygon.FrontFace == GL_CCW) {
652 f = ctx->Polygon.FrontMode;
653 b = ctx->Polygon.BackMode;
654 } else {
655 f = ctx->Polygon.BackMode;
656 b = ctx->Polygon.FrontMode;
657 }
658
659 /* Enable polygon mode */
660 hw_mode |= R300_GA_POLY_MODE_DUAL;
661
662 switch (f) {
663 case GL_LINE:
664 hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_LINE;
665 break;
666 case GL_POINT:
667 hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_POINT;
668 break;
669 case GL_FILL:
670 hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_TRI;
671 break;
672 }
673
674 switch (b) {
675 case GL_LINE:
676 hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_LINE;
677 break;
678 case GL_POINT:
679 hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_POINT;
680 break;
681 case GL_FILL:
682 hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_TRI;
683 break;
684 }
685 }
686
687 if (r300->hw.polygon_mode.cmd[1] != hw_mode) {
688 R300_STATECHANGE(r300, polygon_mode);
689 r300->hw.polygon_mode.cmd[1] = hw_mode;
690 }
691
692 r300->hw.polygon_mode.cmd[2] = 0x00000001;
693 r300->hw.polygon_mode.cmd[3] = 0x00000000;
694 }
695
696 /**
697 * Change the culling mode.
698 *
699 * \note Mesa already filters redundant calls to this function.
700 */
701 static void r300CullFace(GLcontext * ctx, GLenum mode)
702 {
703 (void)mode;
704
705 r300UpdateCulling(ctx);
706 }
707
708 /**
709 * Change the polygon orientation.
710 *
711 * \note Mesa already filters redundant calls to this function.
712 */
713 static void r300FrontFace(GLcontext * ctx, GLenum mode)
714 {
715 (void)mode;
716
717 r300UpdateCulling(ctx);
718 r300UpdatePolygonMode(ctx);
719 }
720
721 /**
722 * Change the depth testing function.
723 *
724 * \note Mesa already filters redundant calls to this function.
725 */
726 static void r300DepthFunc(GLcontext * ctx, GLenum func)
727 {
728 (void)func;
729 r300SetDepthState(ctx);
730 }
731
732 /**
733 * Enable/Disable depth writing.
734 *
735 * \note Mesa already filters redundant calls to this function.
736 */
737 static void r300DepthMask(GLcontext * ctx, GLboolean mask)
738 {
739 (void)mask;
740 r300SetDepthState(ctx);
741 }
742
743 /**
744 * Handle glColorMask()
745 */
746 static void r300ColorMask(GLcontext * ctx,
747 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
748 {
749 r300ContextPtr r300 = R300_CONTEXT(ctx);
750 int mask = (r ? RB3D_COLOR_CHANNEL_MASK_RED_MASK0 : 0) |
751 (g ? RB3D_COLOR_CHANNEL_MASK_GREEN_MASK0 : 0) |
752 (b ? RB3D_COLOR_CHANNEL_MASK_BLUE_MASK0 : 0) |
753 (a ? RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK0 : 0);
754
755 if (mask != r300->hw.cmk.cmd[R300_CMK_COLORMASK]) {
756 R300_STATECHANGE(r300, cmk);
757 r300->hw.cmk.cmd[R300_CMK_COLORMASK] = mask;
758 }
759 }
760
761 /* =============================================================
762 * Point state
763 */
764 static void r300PointSize(GLcontext * ctx, GLfloat size)
765 {
766 r300ContextPtr r300 = R300_CONTEXT(ctx);
767
768 /* We need to clamp to user defined range here, because
769 * the HW clamping happens only for per vertex point size. */
770 size = CLAMP(size, ctx->Point.MinSize, ctx->Point.MaxSize);
771
772 /* same size limits for AA, non-AA points */
773 size = CLAMP(size, ctx->Const.MinPointSize, ctx->Const.MaxPointSize);
774
775 R300_STATECHANGE(r300, ps);
776 r300->hw.ps.cmd[R300_PS_POINTSIZE] =
777 ((int)(size * 6) << R300_POINTSIZE_X_SHIFT) |
778 ((int)(size * 6) << R300_POINTSIZE_Y_SHIFT);
779 }
780
781 static void r300PointParameter(GLcontext * ctx, GLenum pname, const GLfloat * param)
782 {
783 r300ContextPtr r300 = R300_CONTEXT(ctx);
784
785 switch (pname) {
786 case GL_POINT_SIZE_MIN:
787 R300_STATECHANGE(r300, ga_point_minmax);
788 r300->hw.ga_point_minmax.cmd[1] &= ~R300_GA_POINT_MINMAX_MIN_MASK;
789 r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MinSize * 6.0);
790 break;
791 case GL_POINT_SIZE_MAX:
792 R300_STATECHANGE(r300, ga_point_minmax);
793 r300->hw.ga_point_minmax.cmd[1] &= ~R300_GA_POINT_MINMAX_MAX_MASK;
794 r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MaxSize * 6.0)
795 << R300_GA_POINT_MINMAX_MAX_SHIFT;
796 break;
797 case GL_POINT_DISTANCE_ATTENUATION:
798 break;
799 case GL_POINT_FADE_THRESHOLD_SIZE:
800 break;
801 default:
802 break;
803 }
804 }
805
806 /* =============================================================
807 * Line state
808 */
809 static void r300LineWidth(GLcontext * ctx, GLfloat widthf)
810 {
811 r300ContextPtr r300 = R300_CONTEXT(ctx);
812
813 widthf = CLAMP(widthf,
814 ctx->Const.MinPointSize,
815 ctx->Const.MaxPointSize);
816 R300_STATECHANGE(r300, lcntl);
817 r300->hw.lcntl.cmd[1] =
818 R300_LINE_CNT_HO | R300_LINE_CNT_VE | (int)(widthf * 6.0);
819 }
820
821 static void r300PolygonMode(GLcontext * ctx, GLenum face, GLenum mode)
822 {
823 (void)face;
824 (void)mode;
825
826 r300UpdatePolygonMode(ctx);
827 }
828
829 /* =============================================================
830 * Stencil
831 */
832
833 static int translate_stencil_op(int op)
834 {
835 switch (op) {
836 case GL_KEEP:
837 return R300_ZS_KEEP;
838 case GL_ZERO:
839 return R300_ZS_ZERO;
840 case GL_REPLACE:
841 return R300_ZS_REPLACE;
842 case GL_INCR:
843 return R300_ZS_INCR;
844 case GL_DECR:
845 return R300_ZS_DECR;
846 case GL_INCR_WRAP_EXT:
847 return R300_ZS_INCR_WRAP;
848 case GL_DECR_WRAP_EXT:
849 return R300_ZS_DECR_WRAP;
850 case GL_INVERT:
851 return R300_ZS_INVERT;
852 default:
853 WARN_ONCE("Do not know how to translate stencil op");
854 return R300_ZS_KEEP;
855 }
856 return 0;
857 }
858
859 static void r300ShadeModel(GLcontext * ctx, GLenum mode)
860 {
861 r300ContextPtr rmesa = R300_CONTEXT(ctx);
862
863 R300_STATECHANGE(rmesa, shade);
864 rmesa->hw.shade.cmd[1] = 0x00000002;
865 R300_STATECHANGE(rmesa, shade2);
866 switch (mode) {
867 case GL_FLAT:
868 rmesa->hw.shade2.cmd[1] = R300_RE_SHADE_MODEL_FLAT;
869 break;
870 case GL_SMOOTH:
871 rmesa->hw.shade2.cmd[1] = R300_RE_SHADE_MODEL_SMOOTH;
872 break;
873 default:
874 return;
875 }
876 rmesa->hw.shade2.cmd[2] = 0x00000000;
877 rmesa->hw.shade2.cmd[3] = 0x00000000;
878 }
879
880 static void r300StencilFuncSeparate(GLcontext * ctx, GLenum face,
881 GLenum func, GLint ref, GLuint mask)
882 {
883 r300ContextPtr rmesa = R300_CONTEXT(ctx);
884 GLuint refmask;
885 GLuint flag;
886 const unsigned back = ctx->Stencil._BackFace;
887
888 r300CatchStencilFallback(ctx);
889
890 refmask = ((ctx->Stencil.Ref[0] & 0xff) << R300_STENCILREF_SHIFT)
891 | ((ctx->Stencil.ValueMask[0] & 0xff) << R300_STENCILMASK_SHIFT);
892
893 R300_STATECHANGE(rmesa, zs);
894 rmesa->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_STENCIL_FRONT_BACK;
895 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= ~((R300_ZS_MASK <<
896 R300_S_FRONT_FUNC_SHIFT)
897 | (R300_ZS_MASK <<
898 R300_S_BACK_FUNC_SHIFT));
899
900 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &=
901 ~((R300_STENCILREF_MASK << R300_STENCILREF_SHIFT) |
902 (R300_STENCILREF_MASK << R300_STENCILMASK_SHIFT));
903
904 flag = translate_func(ctx->Stencil.Function[0]);
905 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
906 (flag << R300_S_FRONT_FUNC_SHIFT);
907
908 flag = translate_func(ctx->Stencil.Function[back]);
909
910 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
911 (flag << R300_S_BACK_FUNC_SHIFT);
912 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= refmask;
913 }
914
915 static void r300StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
916 {
917 r300ContextPtr rmesa = R300_CONTEXT(ctx);
918
919 r300CatchStencilFallback(ctx);
920
921 R300_STATECHANGE(rmesa, zs);
922 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &=
923 ~(R300_STENCILREF_MASK <<
924 R300_STENCILWRITEMASK_SHIFT);
925 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |=
926 (ctx->Stencil.
927 WriteMask[0] & R300_STENCILREF_MASK) <<
928 R300_STENCILWRITEMASK_SHIFT;
929 }
930
931 static void r300StencilOpSeparate(GLcontext * ctx, GLenum face,
932 GLenum fail, GLenum zfail, GLenum zpass)
933 {
934 r300ContextPtr rmesa = R300_CONTEXT(ctx);
935 const unsigned back = ctx->Stencil._BackFace;
936
937 r300CatchStencilFallback(ctx);
938
939 R300_STATECHANGE(rmesa, zs);
940 /* It is easier to mask what's left.. */
941 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &=
942 (R300_ZS_MASK << R300_Z_FUNC_SHIFT) |
943 (R300_ZS_MASK << R300_S_FRONT_FUNC_SHIFT) |
944 (R300_ZS_MASK << R300_S_BACK_FUNC_SHIFT);
945
946 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
947 (translate_stencil_op(ctx->Stencil.FailFunc[0]) <<
948 R300_S_FRONT_SFAIL_OP_SHIFT)
949 | (translate_stencil_op(ctx->Stencil.ZFailFunc[0]) <<
950 R300_S_FRONT_ZFAIL_OP_SHIFT)
951 | (translate_stencil_op(ctx->Stencil.ZPassFunc[0]) <<
952 R300_S_FRONT_ZPASS_OP_SHIFT);
953
954 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
955 (translate_stencil_op(ctx->Stencil.FailFunc[back]) <<
956 R300_S_BACK_SFAIL_OP_SHIFT)
957 | (translate_stencil_op(ctx->Stencil.ZFailFunc[back]) <<
958 R300_S_BACK_ZFAIL_OP_SHIFT)
959 | (translate_stencil_op(ctx->Stencil.ZPassFunc[back]) <<
960 R300_S_BACK_ZPASS_OP_SHIFT);
961 }
962
963 /* =============================================================
964 * Window position and viewport transformation
965 */
966
967 static void r300UpdateWindow(GLcontext * ctx)
968 {
969 r300ContextPtr rmesa = R300_CONTEXT(ctx);
970 __DRIdrawablePrivate *dPriv = radeon_get_drawable(&rmesa->radeon);
971 GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0;
972 GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0;
973 const GLfloat *v = ctx->Viewport._WindowMap.m;
974 const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
975 const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0);
976 GLfloat y_scale, y_bias;
977
978 if (render_to_fbo) {
979 y_scale = 1.0;
980 y_bias = 0;
981 } else {
982 y_scale = -1.0;
983 y_bias = yoffset;
984 }
985
986 GLfloat sx = v[MAT_SX];
987 GLfloat tx = v[MAT_TX] + xoffset;
988 GLfloat sy = v[MAT_SY] * y_scale;
989 GLfloat ty = (v[MAT_TY] * y_scale) + y_bias;
990 GLfloat sz = v[MAT_SZ] * depthScale;
991 GLfloat tz = v[MAT_TZ] * depthScale;
992
993 R300_STATECHANGE(rmesa, vpt);
994
995 rmesa->hw.vpt.cmd[R300_VPT_XSCALE] = r300PackFloat32(sx);
996 rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx);
997 rmesa->hw.vpt.cmd[R300_VPT_YSCALE] = r300PackFloat32(sy);
998 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty);
999 rmesa->hw.vpt.cmd[R300_VPT_ZSCALE] = r300PackFloat32(sz);
1000 rmesa->hw.vpt.cmd[R300_VPT_ZOFFSET] = r300PackFloat32(tz);
1001 }
1002
1003 static void r300Viewport(GLcontext * ctx, GLint x, GLint y,
1004 GLsizei width, GLsizei height)
1005 {
1006 /* Don't pipeline viewport changes, conflict with window offset
1007 * setting below. Could apply deltas to rescue pipelined viewport
1008 * values, or keep the originals hanging around.
1009 */
1010 r300UpdateWindow(ctx);
1011
1012 radeon_viewport(ctx, x, y, width, height);
1013 }
1014
1015 static void r300DepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval)
1016 {
1017 r300UpdateWindow(ctx);
1018 }
1019
1020 void r300UpdateViewportOffset(GLcontext * ctx)
1021 {
1022 r300ContextPtr rmesa = R300_CONTEXT(ctx);
1023 __DRIdrawablePrivate *dPriv = radeon_get_drawable(&rmesa->radeon);
1024 GLfloat xoffset = (GLfloat) dPriv->x;
1025 GLfloat yoffset = (GLfloat) dPriv->y + dPriv->h;
1026 const GLfloat *v = ctx->Viewport._WindowMap.m;
1027
1028 GLfloat tx = v[MAT_TX] + xoffset;
1029 GLfloat ty = (-v[MAT_TY]) + yoffset;
1030
1031 if (rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] != r300PackFloat32(tx) ||
1032 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] != r300PackFloat32(ty)) {
1033 /* Note: this should also modify whatever data the context reset
1034 * code uses...
1035 */
1036 R300_STATECHANGE(rmesa, vpt);
1037 rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx);
1038 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty);
1039
1040 }
1041
1042 radeonUpdateScissor(ctx);
1043 }
1044
1045 static void
1046 r300FetchStateParameter(GLcontext * ctx,
1047 const gl_state_index state[STATE_LENGTH],
1048 GLfloat * value)
1049 {
1050 r300ContextPtr r300 = R300_CONTEXT(ctx);
1051
1052 switch (state[0]) {
1053 case STATE_INTERNAL:
1054 switch (state[1]) {
1055 case STATE_R300_WINDOW_DIMENSION: {
1056 __DRIdrawablePrivate * drawable = radeon_get_drawable(&r300->radeon);
1057 value[0] = drawable->w * 0.5f; /* width*0.5 */
1058 value[1] = drawable->h * 0.5f; /* height*0.5 */
1059 value[2] = 0.5F; /* for moving range [-1 1] -> [0 1] */
1060 value[3] = 1.0F; /* not used */
1061 break;
1062 }
1063
1064 case STATE_R300_TEXRECT_FACTOR:{
1065 struct gl_texture_object *t =
1066 ctx->Texture.Unit[state[2]].CurrentTex[TEXTURE_RECT_INDEX];
1067
1068 if (t && t->Image[0][t->BaseLevel]) {
1069 struct gl_texture_image *image =
1070 t->Image[0][t->BaseLevel];
1071 value[0] = 1.0 / image->Width2;
1072 value[1] = 1.0 / image->Height2;
1073 } else {
1074 value[0] = 1.0;
1075 value[1] = 1.0;
1076 }
1077 value[2] = 1.0;
1078 value[3] = 1.0;
1079 break;
1080 }
1081
1082 default:
1083 break;
1084 }
1085 break;
1086
1087 default:
1088 break;
1089 }
1090 }
1091
1092 /**
1093 * Update R300's own internal state parameters.
1094 * For now just STATE_R300_WINDOW_DIMENSION
1095 */
1096 void r300UpdateStateParameters(GLcontext * ctx, GLuint new_state)
1097 {
1098 struct r300_fragment_program *fp;
1099 struct gl_program_parameter_list *paramList;
1100 GLuint i;
1101
1102 if (!(new_state & (_NEW_BUFFERS | _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS)))
1103 return;
1104
1105 fp = (struct r300_fragment_program *)ctx->FragmentProgram._Current;
1106 if (!fp)
1107 return;
1108
1109 paramList = fp->Base.Base.Parameters;
1110
1111 if (!paramList)
1112 return;
1113
1114 for (i = 0; i < paramList->NumParameters; i++) {
1115 if (paramList->Parameters[i].Type == PROGRAM_STATE_VAR) {
1116 r300FetchStateParameter(ctx,
1117 paramList->Parameters[i].
1118 StateIndexes,
1119 paramList->ParameterValues[i]);
1120 }
1121 }
1122 }
1123
1124 /* =============================================================
1125 * Polygon state
1126 */
1127 static void r300PolygonOffset(GLcontext * ctx, GLfloat factor, GLfloat units)
1128 {
1129 r300ContextPtr rmesa = R300_CONTEXT(ctx);
1130 GLfloat constant = units;
1131
1132 switch (ctx->Visual.depthBits) {
1133 case 16:
1134 constant *= 4.0;
1135 break;
1136 case 24:
1137 constant *= 2.0;
1138 break;
1139 }
1140
1141 factor *= 12.0;
1142
1143 /* fprintf(stderr, "%s f:%f u:%f\n", __FUNCTION__, factor, constant); */
1144
1145 R300_STATECHANGE(rmesa, zbs);
1146 rmesa->hw.zbs.cmd[R300_ZBS_T_FACTOR] = r300PackFloat32(factor);
1147 rmesa->hw.zbs.cmd[R300_ZBS_T_CONSTANT] = r300PackFloat32(constant);
1148 rmesa->hw.zbs.cmd[R300_ZBS_W_FACTOR] = r300PackFloat32(factor);
1149 rmesa->hw.zbs.cmd[R300_ZBS_W_CONSTANT] = r300PackFloat32(constant);
1150 }
1151
1152 /* Routing and texture-related */
1153
1154 /* r300 doesnt handle GL_CLAMP and GL_MIRROR_CLAMP_EXT correctly when filter is NEAREST.
1155 * Since texwrap produces same results for GL_CLAMP and GL_CLAMP_TO_EDGE we use them instead.
1156 * We need to recalculate wrap modes whenever filter mode is changed because someone might do:
1157 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST);
1158 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP);
1159 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
1160 * Since r300 completely ignores R300_TX_CLAMP when either min or mag is nearest it cant handle
1161 * combinations where only one of them is nearest.
1162 */
1163 static unsigned long gen_fixed_filter(unsigned long f)
1164 {
1165 unsigned long mag, min, needs_fixing = 0;
1166 //return f;
1167
1168 /* We ignore MIRROR bit so we dont have to do everything twice */
1169 if ((f & ((7 - 1) << R300_TX_WRAP_S_SHIFT)) ==
1170 (R300_TX_CLAMP << R300_TX_WRAP_S_SHIFT)) {
1171 needs_fixing |= 1;
1172 }
1173 if ((f & ((7 - 1) << R300_TX_WRAP_T_SHIFT)) ==
1174 (R300_TX_CLAMP << R300_TX_WRAP_T_SHIFT)) {
1175 needs_fixing |= 2;
1176 }
1177 if ((f & ((7 - 1) << R300_TX_WRAP_R_SHIFT)) ==
1178 (R300_TX_CLAMP << R300_TX_WRAP_R_SHIFT)) {
1179 needs_fixing |= 4;
1180 }
1181
1182 if (!needs_fixing)
1183 return f;
1184
1185 mag = f & R300_TX_MAG_FILTER_MASK;
1186 min = f & (R300_TX_MIN_FILTER_MASK|R300_TX_MIN_FILTER_MIP_MASK);
1187
1188 /* TODO: Check for anisto filters too */
1189 if ((mag != R300_TX_MAG_FILTER_NEAREST)
1190 && (min != R300_TX_MIN_FILTER_NEAREST))
1191 return f;
1192
1193 /* r300 cant handle these modes hence we force nearest to linear */
1194 if ((mag == R300_TX_MAG_FILTER_NEAREST)
1195 && (min != R300_TX_MIN_FILTER_NEAREST)) {
1196 f &= ~R300_TX_MAG_FILTER_NEAREST;
1197 f |= R300_TX_MAG_FILTER_LINEAR;
1198 return f;
1199 }
1200
1201 if ((min == R300_TX_MIN_FILTER_NEAREST)
1202 && (mag != R300_TX_MAG_FILTER_NEAREST)) {
1203 f &= ~R300_TX_MIN_FILTER_NEAREST;
1204 f |= R300_TX_MIN_FILTER_LINEAR;
1205 return f;
1206 }
1207
1208 /* Both are nearest */
1209 if (needs_fixing & 1) {
1210 f &= ~((7 - 1) << R300_TX_WRAP_S_SHIFT);
1211 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_S_SHIFT;
1212 }
1213 if (needs_fixing & 2) {
1214 f &= ~((7 - 1) << R300_TX_WRAP_T_SHIFT);
1215 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_T_SHIFT;
1216 }
1217 if (needs_fixing & 4) {
1218 f &= ~((7 - 1) << R300_TX_WRAP_R_SHIFT);
1219 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_R_SHIFT;
1220 }
1221 return f;
1222 }
1223
1224 static void r300SetupFragmentShaderTextures(GLcontext *ctx, int *tmu_mappings)
1225 {
1226 r300ContextPtr r300 = R300_CONTEXT(ctx);
1227 int i;
1228 struct r300_fragment_program *fp = (struct r300_fragment_program *) ctx->FragmentProgram._Current;
1229 struct r300_fragment_program_code *code = &fp->code.r300;
1230
1231 R300_STATECHANGE(r300, fpt);
1232
1233 for (i = 0; i < code->tex.length; i++) {
1234 int unit;
1235 int opcode;
1236 unsigned long val;
1237
1238 unit = code->tex.inst[i] >> R300_TEX_ID_SHIFT;
1239 unit &= 15;
1240
1241 val = code->tex.inst[i];
1242 val &= ~R300_TEX_ID_MASK;
1243
1244 opcode =
1245 (val & R300_TEX_INST_MASK) >> R300_TEX_INST_SHIFT;
1246 if (opcode == R300_TEX_OP_KIL) {
1247 r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
1248 } else {
1249 if (tmu_mappings[unit] >= 0) {
1250 val |=
1251 tmu_mappings[unit] <<
1252 R300_TEX_ID_SHIFT;
1253 r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
1254 } else {
1255 // We get here when the corresponding texture image is incomplete
1256 // (e.g. incomplete mipmaps etc.)
1257 r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
1258 }
1259 }
1260 }
1261
1262 r300->hw.fpt.cmd[R300_FPT_CMD_0] =
1263 cmdpacket0(r300->radeon.radeonScreen,
1264 R300_US_TEX_INST_0, code->tex.length);
1265 }
1266
1267 static void r500SetupFragmentShaderTextures(GLcontext *ctx, int *tmu_mappings)
1268 {
1269 int i;
1270 struct r300_fragment_program *fp = (struct r300_fragment_program *) ctx->FragmentProgram._Current;
1271 struct r500_fragment_program_code *code = &fp->code.r500;
1272
1273 /* find all the texture instructions and relocate the texture units */
1274 for (i = 0; i < code->inst_end + 1; i++) {
1275 if ((code->inst[i].inst0 & 0x3) == R500_INST_TYPE_TEX) {
1276 uint32_t val;
1277 int unit, opcode, new_unit;
1278
1279 val = code->inst[i].inst1;
1280
1281 unit = (val >> 16) & 0xf;
1282
1283 val &= ~(0xf << 16);
1284
1285 opcode = val & (0x7 << 22);
1286 if (opcode == R500_TEX_INST_TEXKILL) {
1287 new_unit = 0;
1288 } else {
1289 if (tmu_mappings[unit] >= 0) {
1290 new_unit = tmu_mappings[unit];
1291 } else {
1292 new_unit = 0;
1293 }
1294 }
1295 val |= R500_TEX_ID(new_unit);
1296 code->inst[i].inst1 = val;
1297 }
1298 }
1299 }
1300
1301 static GLuint translate_lod_bias(GLfloat bias)
1302 {
1303 GLint b = (int)(bias*32);
1304 if (b >= (1 << 9))
1305 b = (1 << 9)-1;
1306 else if (b < -(1 << 9))
1307 b = -(1 << 9);
1308 return (((GLuint)b) << R300_LOD_BIAS_SHIFT) & R300_LOD_BIAS_MASK;
1309 }
1310
1311 static void r300SetupTextures(GLcontext * ctx)
1312 {
1313 int i, mtu;
1314 struct radeon_tex_obj *t;
1315 r300ContextPtr r300 = R300_CONTEXT(ctx);
1316 int hw_tmu = 0;
1317 int last_hw_tmu = -1; /* -1 translates into no setup costs for fields */
1318 int tmu_mappings[R300_MAX_TEXTURE_UNITS] = { -1, };
1319 struct r300_fragment_program *fp = (struct r300_fragment_program *)
1320 (char *)ctx->FragmentProgram._Current;
1321
1322 R300_STATECHANGE(r300, txe);
1323 R300_STATECHANGE(r300, tex.filter);
1324 R300_STATECHANGE(r300, tex.filter_1);
1325 R300_STATECHANGE(r300, tex.size);
1326 R300_STATECHANGE(r300, tex.format);
1327 R300_STATECHANGE(r300, tex.pitch);
1328 R300_STATECHANGE(r300, tex.offset);
1329 R300_STATECHANGE(r300, tex.chroma_key);
1330 R300_STATECHANGE(r300, tex.border_color);
1331
1332 r300->hw.txe.cmd[R300_TXE_ENABLE] = 0x0;
1333
1334 mtu = r300->radeon.glCtx->Const.MaxTextureUnits;
1335 if (RADEON_DEBUG & DEBUG_STATE)
1336 fprintf(stderr, "mtu=%d\n", mtu);
1337
1338 if (mtu > R300_MAX_TEXTURE_UNITS) {
1339 fprintf(stderr,
1340 "Aiiee ! mtu=%d is greater than R300_MAX_TEXTURE_UNITS=%d\n",
1341 mtu, R300_MAX_TEXTURE_UNITS);
1342 _mesa_exit(-1);
1343 }
1344
1345 /* We cannot let disabled tmu offsets pass DRM */
1346 for (i = 0; i < mtu; i++) {
1347 if (ctx->Texture.Unit[i]._ReallyEnabled) {
1348 tmu_mappings[i] = hw_tmu;
1349
1350 t = radeon_tex_obj(ctx->Texture.Unit[i]._Current);
1351 if (!t)
1352 continue;
1353
1354 if ((t->pp_txformat & 0xffffff00) == 0xffffff00) {
1355 WARN_ONCE
1356 ("unknown texture format (entry %x) encountered. Help me !\n",
1357 t->pp_txformat & 0xff);
1358 }
1359
1360 if (RADEON_DEBUG & DEBUG_STATE)
1361 fprintf(stderr,
1362 "Activating texture unit %d\n", i);
1363
1364 r300->hw.txe.cmd[R300_TXE_ENABLE] |= (1 << hw_tmu);
1365
1366 r300->hw.tex.filter.cmd[R300_TEX_VALUE_0 +
1367 hw_tmu] =
1368 gen_fixed_filter(t->pp_txfilter) | (hw_tmu << 28);
1369 /* Note: There is a LOD bias per texture unit and a LOD bias
1370 * per texture object. We add them here to get the correct behaviour.
1371 * (The per-texture object LOD bias was introduced in OpenGL 1.4
1372 * and is not present in the EXT_texture_object extension).
1373 */
1374 r300->hw.tex.filter_1.cmd[R300_TEX_VALUE_0 + hw_tmu] =
1375 t->pp_txfilter_1 |
1376 translate_lod_bias(ctx->Texture.Unit[i].LodBias + t->base.LodBias);
1377 r300->hw.tex.size.cmd[R300_TEX_VALUE_0 + hw_tmu] =
1378 t->pp_txsize;
1379 r300->hw.tex.format.cmd[R300_TEX_VALUE_0 +
1380 hw_tmu] = t->pp_txformat;
1381 r300->hw.tex.pitch.cmd[R300_TEX_VALUE_0 + hw_tmu] =
1382 t->pp_txpitch;
1383 r300->hw.textures[hw_tmu] = t;
1384
1385 if (t->tile_bits & R300_TXO_MACRO_TILE) {
1386 WARN_ONCE("macro tiling enabled!\n");
1387 }
1388
1389 if (t->tile_bits & R300_TXO_MICRO_TILE) {
1390 WARN_ONCE("micro tiling enabled!\n");
1391 }
1392
1393 r300->hw.tex.chroma_key.cmd[R300_TEX_VALUE_0 +
1394 hw_tmu] = 0x0;
1395 r300->hw.tex.border_color.cmd[R300_TEX_VALUE_0 +
1396 hw_tmu] =
1397 t->pp_border_color;
1398
1399 last_hw_tmu = hw_tmu;
1400
1401 hw_tmu++;
1402 }
1403 }
1404
1405 r300->hw.tex.filter.cmd[R300_TEX_CMD_0] =
1406 cmdpacket0(r300->radeon.radeonScreen, R300_TX_FILTER0_0, last_hw_tmu + 1);
1407 r300->hw.tex.filter_1.cmd[R300_TEX_CMD_0] =
1408 cmdpacket0(r300->radeon.radeonScreen, R300_TX_FILTER1_0, last_hw_tmu + 1);
1409 r300->hw.tex.size.cmd[R300_TEX_CMD_0] =
1410 cmdpacket0(r300->radeon.radeonScreen, R300_TX_SIZE_0, last_hw_tmu + 1);
1411 r300->hw.tex.format.cmd[R300_TEX_CMD_0] =
1412 cmdpacket0(r300->radeon.radeonScreen, R300_TX_FORMAT_0, last_hw_tmu + 1);
1413 r300->hw.tex.pitch.cmd[R300_TEX_CMD_0] =
1414 cmdpacket0(r300->radeon.radeonScreen, R300_TX_FORMAT2_0, last_hw_tmu + 1);
1415 r300->hw.tex.offset.cmd[R300_TEX_CMD_0] =
1416 cmdpacket0(r300->radeon.radeonScreen, R300_TX_OFFSET_0, last_hw_tmu + 1);
1417 r300->hw.tex.chroma_key.cmd[R300_TEX_CMD_0] =
1418 cmdpacket0(r300->radeon.radeonScreen, R300_TX_CHROMA_KEY_0, last_hw_tmu + 1);
1419 r300->hw.tex.border_color.cmd[R300_TEX_CMD_0] =
1420 cmdpacket0(r300->radeon.radeonScreen, R300_TX_BORDER_COLOR_0, last_hw_tmu + 1);
1421
1422 if (r300->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV515) {
1423 if (fp->Base.UsesKill && last_hw_tmu < 0) {
1424 // The KILL operation requires the first texture unit
1425 // to be enabled.
1426 r300->hw.txe.cmd[R300_TXE_ENABLE] |= 1;
1427 r300->hw.tex.filter.cmd[R300_TEX_VALUE_0] = 0;
1428 r300->hw.tex.filter.cmd[R300_TEX_CMD_0] =
1429 cmdpacket0(r300->radeon.radeonScreen, R300_TX_FILTER0_0, 1);
1430 }
1431 }
1432 r300->vtbl.SetupFragmentShaderTextures(ctx, tmu_mappings);
1433
1434 if (RADEON_DEBUG & DEBUG_STATE)
1435 fprintf(stderr, "TX_ENABLE: %08x last_hw_tmu=%d\n",
1436 r300->hw.txe.cmd[R300_TXE_ENABLE], last_hw_tmu);
1437 }
1438
1439 union r300_outputs_written {
1440 GLuint vp_outputs; /* hw_tcl_on */
1441 DECLARE_RENDERINPUTS(index_bitset); /* !hw_tcl_on */
1442 };
1443
1444 #define R300_OUTPUTS_WRITTEN_TEST(ow, vp_result, tnl_attrib) \
1445 ((hw_tcl_on) ? (ow).vp_outputs & (1 << (vp_result)) : \
1446 RENDERINPUTS_TEST( (ow.index_bitset), (tnl_attrib) ))
1447
1448 static void r300SetupRSUnit(GLcontext * ctx)
1449 {
1450 r300ContextPtr r300 = R300_CONTEXT(ctx);
1451 union r300_outputs_written OutputsWritten;
1452 GLuint InputsRead;
1453 int fp_reg, high_rr;
1454 int col_ip, tex_ip;
1455 int rs_tex_count = 0;
1456 int i, col_fmt, hw_tcl_on;
1457
1458 hw_tcl_on = r300->options.hw_tcl_enabled;
1459
1460 if (hw_tcl_on)
1461 OutputsWritten.vp_outputs = r300->selected_vp->key.OutputsWritten;
1462 else
1463 RENDERINPUTS_COPY(OutputsWritten.index_bitset, r300->render_inputs_bitset);
1464
1465 InputsRead = ctx->FragmentProgram._Current->Base.InputsRead;
1466
1467 R300_STATECHANGE(r300, ri);
1468 R300_STATECHANGE(r300, rc);
1469 R300_STATECHANGE(r300, rr);
1470
1471 fp_reg = col_ip = tex_ip = col_fmt = 0;
1472
1473 r300->hw.rc.cmd[1] = 0;
1474 r300->hw.rc.cmd[2] = 0;
1475 for (i=0; i<R300_RR_CMDSIZE-1; ++i)
1476 r300->hw.rr.cmd[R300_RR_INST_0 + i] = 0;
1477
1478 for (i=0; i<R300_RI_CMDSIZE-1; ++i)
1479 r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0;
1480
1481
1482 if (InputsRead & FRAG_BIT_COL0) {
1483 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
1484 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R300_RS_COL_PTR(col_ip) | R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
1485 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R300_RS_INST_COL_ID(col_ip) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_reg);
1486 InputsRead &= ~FRAG_BIT_COL0;
1487 ++col_ip;
1488 ++fp_reg;
1489 } else {
1490 WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
1491 }
1492 }
1493
1494 if (InputsRead & FRAG_BIT_COL1) {
1495 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
1496 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R300_RS_COL_PTR(col_ip) | R300_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
1497 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R300_RS_INST_COL_ID(col_ip) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_reg);
1498 InputsRead &= ~FRAG_BIT_COL1;
1499 ++col_ip;
1500 ++fp_reg;
1501 } else {
1502 WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
1503 }
1504 }
1505
1506 /* We always route 4 texcoord components */
1507 for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
1508 if (! ( InputsRead & FRAG_BIT_TEX(i) ) )
1509 continue;
1510
1511 if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
1512 WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
1513 continue;
1514 }
1515
1516 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count);
1517 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
1518 InputsRead &= ~(FRAG_BIT_TEX0 << i);
1519 rs_tex_count += 4;
1520 ++tex_ip;
1521 ++fp_reg;
1522 }
1523
1524 if (InputsRead & FRAG_BIT_WPOS) {
1525 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count);
1526 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
1527 InputsRead &= ~FRAG_BIT_WPOS;
1528 rs_tex_count += 4;
1529 ++tex_ip;
1530 ++fp_reg;
1531 }
1532
1533 if (InputsRead & FRAG_BIT_FOGC) {
1534 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_FOGC, _TNL_ATTRIB_FOG)) {
1535 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(R300_RS_SEL_K0) | R300_RS_SEL_R(R300_RS_SEL_K0);
1536 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_Q(R300_RS_SEL_K1) | R300_RS_TEX_PTR(rs_tex_count);
1537 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
1538 InputsRead &= ~FRAG_BIT_FOGC;
1539 rs_tex_count += 1;
1540 ++tex_ip;
1541 ++fp_reg;
1542 } else {
1543 WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n");
1544 }
1545 }
1546
1547 /* Setup default color if no color or tex was set */
1548 if (rs_tex_count == 0 && col_ip == 0) {
1549 r300->hw.rr.cmd[R300_RR_INST_0] = R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(0) | R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
1550 ++col_ip;
1551 }
1552
1553 high_rr = (col_ip > tex_ip) ? col_ip : tex_ip;
1554 r300->hw.rc.cmd[1] |= (rs_tex_count << R300_IT_COUNT_SHIFT) | (col_ip << R300_IC_COUNT_SHIFT) | R300_HIRES_EN;
1555 r300->hw.rc.cmd[2] |= high_rr - 1;
1556
1557 r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_RS_INST_0, high_rr);
1558
1559 if (InputsRead)
1560 WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead);
1561 }
1562
1563 static void r500SetupRSUnit(GLcontext * ctx)
1564 {
1565 r300ContextPtr r300 = R300_CONTEXT(ctx);
1566 union r300_outputs_written OutputsWritten;
1567 GLuint InputsRead;
1568 int fp_reg, high_rr;
1569 int col_ip, tex_ip;
1570 int rs_tex_count = 0;
1571 int i, col_fmt, hw_tcl_on;
1572
1573 hw_tcl_on = r300->options.hw_tcl_enabled;
1574
1575 if (hw_tcl_on)
1576 OutputsWritten.vp_outputs = r300->selected_vp->key.OutputsWritten;
1577 else
1578 RENDERINPUTS_COPY(OutputsWritten.index_bitset, r300->render_inputs_bitset);
1579
1580 InputsRead = ctx->FragmentProgram._Current->Base.InputsRead;
1581
1582 R300_STATECHANGE(r300, ri);
1583 R300_STATECHANGE(r300, rc);
1584 R300_STATECHANGE(r300, rr);
1585
1586 fp_reg = col_ip = tex_ip = col_fmt = 0;
1587
1588 r300->hw.rc.cmd[1] = 0;
1589 r300->hw.rc.cmd[2] = 0;
1590 for (i=0; i<R300_RR_CMDSIZE-1; ++i)
1591 r300->hw.rr.cmd[R300_RR_INST_0 + i] = 0;
1592
1593 for (i=0; i<R500_RI_CMDSIZE-1; ++i)
1594 r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0;
1595
1596
1597 if (InputsRead & FRAG_BIT_COL0) {
1598 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
1599 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R500_RS_COL_PTR(col_ip) | R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
1600 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R500_RS_INST_COL_ID(col_ip) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_reg);
1601 InputsRead &= ~FRAG_BIT_COL0;
1602 ++col_ip;
1603 ++fp_reg;
1604 } else {
1605 WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
1606 }
1607 }
1608
1609 if (InputsRead & FRAG_BIT_COL1) {
1610 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
1611 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R500_RS_COL_PTR(col_ip) | R500_RS_COL_FMT(R300_RS_COL_FMT_RGBA);
1612 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R500_RS_INST_COL_ID(col_ip) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_reg);
1613 InputsRead &= ~FRAG_BIT_COL1;
1614 ++col_ip;
1615 ++fp_reg;
1616 } else {
1617 WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
1618 }
1619 }
1620
1621 /* We always route 4 texcoord components */
1622 for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
1623 if (! ( InputsRead & FRAG_BIT_TEX(i) ) )
1624 continue;
1625
1626 if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
1627 WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
1628 continue;
1629 }
1630
1631 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) |
1632 ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) |
1633 ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) |
1634 ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT);
1635
1636 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
1637 InputsRead &= ~(FRAG_BIT_TEX0 << i);
1638 rs_tex_count += 4;
1639 ++tex_ip;
1640 ++fp_reg;
1641 }
1642
1643 if (InputsRead & FRAG_BIT_WPOS) {
1644 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) |
1645 ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) |
1646 ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) |
1647 ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT);
1648
1649 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
1650 InputsRead &= ~FRAG_BIT_WPOS;
1651 rs_tex_count += 4;
1652 ++tex_ip;
1653 ++fp_reg;
1654 }
1655
1656 if (InputsRead & FRAG_BIT_FOGC) {
1657 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_FOGC, _TNL_ATTRIB_FOG)) {
1658 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= (rs_tex_count << R500_RS_IP_TEX_PTR_S_SHIFT) |
1659 (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) |
1660 (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) |
1661 (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT);
1662
1663 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
1664 InputsRead &= ~FRAG_BIT_FOGC;
1665 rs_tex_count += 1;
1666 ++tex_ip;
1667 ++fp_reg;
1668 } else {
1669 WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n");
1670 }
1671 }
1672
1673 /* Setup default color if no color or tex was set */
1674 if (rs_tex_count == 0 && col_ip == 0) {
1675 r300->hw.rr.cmd[R300_RR_INST_0] |= R500_RS_INST_COL_ID(0) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(0) | R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
1676 ++col_ip;
1677 }
1678
1679 high_rr = (col_ip > tex_ip) ? col_ip : tex_ip;
1680 r300->hw.rc.cmd[1] |= (rs_tex_count << R300_IT_COUNT_SHIFT) | (col_ip << R300_IC_COUNT_SHIFT) | R300_HIRES_EN;
1681 r300->hw.rc.cmd[2] |= 0xC0 | (high_rr - 1);
1682
1683 r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R500_RS_INST_0, high_rr);
1684
1685 if (InputsRead)
1686 WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead);
1687 }
1688
1689 #define MIN3(a, b, c) ((a) < (b) ? MIN2(a, c) : MIN2(b, c))
1690
1691 void r300VapCntl(r300ContextPtr rmesa, GLuint input_count,
1692 GLuint output_count, GLuint temp_count)
1693 {
1694 int vtx_mem_size;
1695 int pvs_num_slots;
1696 int pvs_num_cntrls;
1697
1698 /* Flush PVS engine before changing PVS_NUM_SLOTS, PVS_NUM_CNTRLS.
1699 * See r500 docs 6.5.2 - done in emit */
1700
1701 /* avoid division by zero */
1702 if (input_count == 0) input_count = 1;
1703 if (output_count == 0) output_count = 1;
1704 if (temp_count == 0) temp_count = 1;
1705
1706 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
1707 vtx_mem_size = 128;
1708 else
1709 vtx_mem_size = 72;
1710
1711 pvs_num_slots = MIN3(10, vtx_mem_size/input_count, vtx_mem_size/output_count);
1712 pvs_num_cntrls = MIN2(6, vtx_mem_size/temp_count);
1713
1714 R300_STATECHANGE(rmesa, vap_cntl);
1715 if (rmesa->options.hw_tcl_enabled) {
1716 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] =
1717 (pvs_num_slots << R300_PVS_NUM_SLOTS_SHIFT) |
1718 (pvs_num_cntrls << R300_PVS_NUM_CNTLRS_SHIFT) |
1719 (12 << R300_VF_MAX_VTX_NUM_SHIFT);
1720 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
1721 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= R500_TCL_STATE_OPTIMIZATION;
1722 } else
1723 /* not sure about non-tcl */
1724 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] = ((10 << R300_PVS_NUM_SLOTS_SHIFT) |
1725 (5 << R300_PVS_NUM_CNTLRS_SHIFT) |
1726 (5 << R300_VF_MAX_VTX_NUM_SHIFT));
1727
1728 if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV515)
1729 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (2 << R300_PVS_NUM_FPUS_SHIFT);
1730 else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV530) ||
1731 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV560) ||
1732 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV570))
1733 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (5 << R300_PVS_NUM_FPUS_SHIFT);
1734 else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV410) ||
1735 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R420))
1736 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (6 << R300_PVS_NUM_FPUS_SHIFT);
1737 else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R520) ||
1738 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R580))
1739 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (8 << R300_PVS_NUM_FPUS_SHIFT);
1740 else
1741 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (4 << R300_PVS_NUM_FPUS_SHIFT);
1742
1743 }
1744
1745 /**
1746 * Enable/Disable states.
1747 *
1748 * \note Mesa already filters redundant calls to this function.
1749 */
1750 static void r300Enable(GLcontext * ctx, GLenum cap, GLboolean state)
1751 {
1752 r300ContextPtr rmesa = R300_CONTEXT(ctx);
1753 if (RADEON_DEBUG & DEBUG_STATE)
1754 fprintf(stderr, "%s( %s = %s )\n", __FUNCTION__,
1755 _mesa_lookup_enum_by_nr(cap),
1756 state ? "GL_TRUE" : "GL_FALSE");
1757
1758 switch (cap) {
1759 case GL_ALPHA_TEST:
1760 r300SetAlphaState(ctx);
1761 break;
1762 case GL_COLOR_LOGIC_OP:
1763 r300SetLogicOpState(ctx);
1764 /* fall-through, because logic op overrides blending */
1765 case GL_BLEND:
1766 r300SetBlendState(ctx);
1767 break;
1768 case GL_CLIP_PLANE0:
1769 case GL_CLIP_PLANE1:
1770 case GL_CLIP_PLANE2:
1771 case GL_CLIP_PLANE3:
1772 case GL_CLIP_PLANE4:
1773 case GL_CLIP_PLANE5:
1774 r300SetClipPlaneState(ctx, cap, state);
1775 break;
1776 case GL_CULL_FACE:
1777 r300UpdateCulling(ctx);
1778 break;
1779 case GL_DEPTH_TEST:
1780 r300SetDepthState(ctx);
1781 break;
1782 case GL_LINE_SMOOTH:
1783 if (rmesa->options.conformance_mode)
1784 r300SwitchFallback(ctx, R300_FALLBACK_LINE_SMOOTH, ctx->Line.SmoothFlag);
1785 break;
1786 case GL_LINE_STIPPLE:
1787 if (rmesa->options.conformance_mode)
1788 r300SwitchFallback(ctx, R300_FALLBACK_LINE_STIPPLE, ctx->Line.StippleFlag);
1789 break;
1790 case GL_POINT_SMOOTH:
1791 if (rmesa->options.conformance_mode)
1792 r300SwitchFallback(ctx, R300_FALLBACK_POINT_SMOOTH, ctx->Point.SmoothFlag);
1793 break;
1794 case GL_POLYGON_SMOOTH:
1795 if (rmesa->options.conformance_mode)
1796 r300SwitchFallback(ctx, R300_FALLBACK_POLYGON_SMOOTH, ctx->Polygon.SmoothFlag);
1797 break;
1798 case GL_POLYGON_STIPPLE:
1799 if (rmesa->options.conformance_mode)
1800 r300SwitchFallback(ctx, R300_FALLBACK_POLYGON_STIPPLE, ctx->Polygon.StippleFlag);
1801 break;
1802 case GL_POLYGON_OFFSET_POINT:
1803 case GL_POLYGON_OFFSET_LINE:
1804 case GL_POLYGON_OFFSET_FILL:
1805 r300SetPolygonOffsetState(ctx, state);
1806 break;
1807 case GL_SCISSOR_TEST:
1808 radeon_firevertices(&rmesa->radeon);
1809 rmesa->radeon.state.scissor.enabled = state;
1810 radeonUpdateScissor( ctx );
1811 break;
1812 case GL_STENCIL_TEST:
1813 r300SetStencilState(ctx, state);
1814 break;
1815 default:
1816 break;
1817 }
1818 }
1819
1820 /**
1821 * Completely recalculates hardware state based on the Mesa state.
1822 */
1823 static void r300ResetHwState(r300ContextPtr r300)
1824 {
1825 GLcontext *ctx = r300->radeon.glCtx;
1826 int has_tcl;
1827
1828 has_tcl = r300->options.hw_tcl_enabled;
1829
1830 if (RADEON_DEBUG & DEBUG_STATE)
1831 fprintf(stderr, "%s\n", __FUNCTION__);
1832
1833 radeon_firevertices(&r300->radeon);
1834
1835 r300ColorMask(ctx,
1836 ctx->Color.ColorMask[RCOMP],
1837 ctx->Color.ColorMask[GCOMP],
1838 ctx->Color.ColorMask[BCOMP], ctx->Color.ColorMask[ACOMP]);
1839
1840 r300Enable(ctx, GL_DEPTH_TEST, ctx->Depth.Test);
1841 r300DepthMask(ctx, ctx->Depth.Mask);
1842 r300DepthFunc(ctx, ctx->Depth.Func);
1843
1844 /* stencil */
1845 r300Enable(ctx, GL_STENCIL_TEST, ctx->Stencil._Enabled);
1846 r300StencilMaskSeparate(ctx, 0, ctx->Stencil.WriteMask[0]);
1847 r300StencilFuncSeparate(ctx, 0, ctx->Stencil.Function[0],
1848 ctx->Stencil.Ref[0], ctx->Stencil.ValueMask[0]);
1849 r300StencilOpSeparate(ctx, 0, ctx->Stencil.FailFunc[0],
1850 ctx->Stencil.ZFailFunc[0],
1851 ctx->Stencil.ZPassFunc[0]);
1852
1853 r300UpdateCulling(ctx);
1854
1855 r300SetBlendState(ctx);
1856 r300SetLogicOpState(ctx);
1857
1858 r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef);
1859 r300Enable(ctx, GL_ALPHA_TEST, ctx->Color.AlphaEnabled);
1860
1861 r300->hw.vte.cmd[1] = R300_VPORT_X_SCALE_ENA
1862 | R300_VPORT_X_OFFSET_ENA
1863 | R300_VPORT_Y_SCALE_ENA
1864 | R300_VPORT_Y_OFFSET_ENA
1865 | R300_VPORT_Z_SCALE_ENA
1866 | R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT;
1867 r300->hw.vte.cmd[2] = 0x00000008;
1868
1869 r300->hw.vap_vf_max_vtx_indx.cmd[1] = 0x00FFFFFF;
1870 r300->hw.vap_vf_max_vtx_indx.cmd[2] = 0x00000000;
1871
1872 #ifdef MESA_LITTLE_ENDIAN
1873 r300->hw.vap_cntl_status.cmd[1] = R300_VC_NO_SWAP;
1874 #else
1875 r300->hw.vap_cntl_status.cmd[1] = R300_VC_32BIT_SWAP;
1876 #endif
1877
1878 /* disable VAP/TCL on non-TCL capable chips */
1879 if (!has_tcl)
1880 r300->hw.vap_cntl_status.cmd[1] |= R300_VAP_TCL_BYPASS;
1881
1882 r300->hw.vap_psc_sgn_norm_cntl.cmd[1] = 0xAAAAAAAA;
1883
1884 /* XXX: Other families? */
1885 if (has_tcl) {
1886 r300->hw.vap_clip_cntl.cmd[1] = R300_PS_UCP_MODE_DIST_COP;
1887
1888 r300->hw.vap_clip.cmd[1] = r300PackFloat32(1.0); /* X */
1889 r300->hw.vap_clip.cmd[2] = r300PackFloat32(1.0); /* X */
1890 r300->hw.vap_clip.cmd[3] = r300PackFloat32(1.0); /* Y */
1891 r300->hw.vap_clip.cmd[4] = r300PackFloat32(1.0); /* Y */
1892
1893 switch (r300->radeon.radeonScreen->chip_family) {
1894 case CHIP_FAMILY_R300:
1895 r300->hw.vap_pvs_vtx_timeout_reg.cmd[1] = R300_2288_R300;
1896 break;
1897 default:
1898 r300->hw.vap_pvs_vtx_timeout_reg.cmd[1] = R300_2288_RV350;
1899 break;
1900 }
1901 }
1902
1903 r300->hw.gb_enable.cmd[1] = R300_GB_POINT_STUFF_ENABLE
1904 | R300_GB_LINE_STUFF_ENABLE
1905 | R300_GB_TRIANGLE_STUFF_ENABLE;
1906
1907 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_0] = 0x66666666;
1908 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_1] = 0x06666666;
1909
1910 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] =
1911 R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16 /*| R300_GB_SUBPIXEL_1_16*/;
1912 switch (r300->radeon.radeonScreen->num_gb_pipes) {
1913 case 1:
1914 default:
1915 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
1916 R300_GB_TILE_PIPE_COUNT_RV300;
1917 break;
1918 case 2:
1919 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
1920 R300_GB_TILE_PIPE_COUNT_R300;
1921 break;
1922 case 3:
1923 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
1924 R300_GB_TILE_PIPE_COUNT_R420_3P;
1925 break;
1926 case 4:
1927 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
1928 R300_GB_TILE_PIPE_COUNT_R420;
1929 break;
1930 }
1931
1932 /* XXX: Enable anti-aliasing? */
1933 r300->hw.gb_misc2.cmd[R300_GB_MISC2_AA_CONFIG] = GB_AA_CONFIG_AA_DISABLE;
1934 r300->hw.gb_misc2.cmd[R300_GB_MISC2_SELECT] = 0;
1935
1936 r300->hw.ga_point_s0.cmd[1] = r300PackFloat32(0.0);
1937 r300->hw.ga_point_s0.cmd[2] = r300PackFloat32(0.0);
1938 r300->hw.ga_point_s0.cmd[3] = r300PackFloat32(1.0);
1939 r300->hw.ga_point_s0.cmd[4] = r300PackFloat32(1.0);
1940
1941 r300->hw.ga_triangle_stipple.cmd[1] = 0x00050005;
1942
1943 r300PointSize(ctx, 1.0);
1944
1945 r300->hw.ga_point_minmax.cmd[1] = 0x18000006;
1946 r300->hw.ga_point_minmax.cmd[2] = 0x00020006;
1947 r300->hw.ga_point_minmax.cmd[3] = r300PackFloat32(1.0 / 192.0);
1948
1949 r300LineWidth(ctx, 1.0);
1950
1951 r300->hw.ga_line_stipple.cmd[1] = 0;
1952 r300->hw.ga_line_stipple.cmd[2] = r300PackFloat32(0.0);
1953 r300->hw.ga_line_stipple.cmd[3] = r300PackFloat32(1.0);
1954
1955 r300ShadeModel(ctx, ctx->Light.ShadeModel);
1956
1957 r300PolygonMode(ctx, GL_FRONT, ctx->Polygon.FrontMode);
1958 r300PolygonMode(ctx, GL_BACK, ctx->Polygon.BackMode);
1959 r300->hw.zbias_cntl.cmd[1] = 0x00000000;
1960
1961 r300PolygonOffset(ctx, ctx->Polygon.OffsetFactor,
1962 ctx->Polygon.OffsetUnits);
1963 r300Enable(ctx, GL_POLYGON_OFFSET_POINT, ctx->Polygon.OffsetPoint);
1964 r300Enable(ctx, GL_POLYGON_OFFSET_LINE, ctx->Polygon.OffsetLine);
1965 r300Enable(ctx, GL_POLYGON_OFFSET_FILL, ctx->Polygon.OffsetFill);
1966
1967 r300->hw.su_depth_scale.cmd[1] = 0x4B7FFFFF;
1968 r300->hw.su_depth_scale.cmd[2] = 0x00000000;
1969
1970 r300->hw.sc_hyperz.cmd[1] = 0x0000001C;
1971 r300->hw.sc_hyperz.cmd[2] = 0x2DA49525;
1972
1973 r300->hw.sc_screendoor.cmd[1] = 0x00FFFFFF;
1974
1975 r300->hw.us_out_fmt.cmd[1] = R500_OUT_FMT_C4_8 |
1976 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
1977 r300->hw.us_out_fmt.cmd[2] = R500_OUT_FMT_UNUSED |
1978 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
1979 r300->hw.us_out_fmt.cmd[3] = R500_OUT_FMT_UNUSED |
1980 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
1981 r300->hw.us_out_fmt.cmd[4] = R500_OUT_FMT_UNUSED |
1982 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
1983 r300->hw.us_out_fmt.cmd[5] = R300_W_FMT_W0 | R300_W_SRC_US;
1984
1985 /* disable fog unit */
1986 r300->hw.fogs.cmd[R300_FOGS_STATE] = 0;
1987 r300->hw.fg_depth_src.cmd[1] = R300_FG_DEPTH_SRC_SCAN;
1988
1989 r300->hw.rb3d_cctl.cmd[1] = 0;
1990
1991 r300BlendColor(ctx, ctx->Color.BlendColor);
1992
1993 r300->hw.rb3d_dither_ctl.cmd[1] = 0;
1994 r300->hw.rb3d_dither_ctl.cmd[2] = 0;
1995 r300->hw.rb3d_dither_ctl.cmd[3] = 0;
1996 r300->hw.rb3d_dither_ctl.cmd[4] = 0;
1997 r300->hw.rb3d_dither_ctl.cmd[5] = 0;
1998 r300->hw.rb3d_dither_ctl.cmd[6] = 0;
1999 r300->hw.rb3d_dither_ctl.cmd[7] = 0;
2000 r300->hw.rb3d_dither_ctl.cmd[8] = 0;
2001 r300->hw.rb3d_dither_ctl.cmd[9] = 0;
2002
2003 r300->hw.rb3d_aaresolve_ctl.cmd[1] = 0;
2004
2005 r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[1] = 0x00000000;
2006 r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[2] = 0xffffffff;
2007
2008 r300->hw.zb_depthclearvalue.cmd[1] = 0;
2009
2010 r300->hw.zstencil_format.cmd[2] = R300_ZTOP_DISABLE;
2011 r300->hw.zstencil_format.cmd[3] = 0x00000003;
2012 r300->hw.zstencil_format.cmd[4] = 0x00000000;
2013 r300SetEarlyZState(ctx);
2014
2015 r300->hw.zb_zmask.cmd[1] = 0;
2016 r300->hw.zb_zmask.cmd[2] = 0;
2017
2018 r300->hw.zb_hiz_offset.cmd[1] = 0;
2019
2020 r300->hw.zb_hiz_pitch.cmd[1] = 0;
2021
2022 r300VapCntl(r300, 0, 0, 0);
2023 if (has_tcl) {
2024 r300->hw.vps.cmd[R300_VPS_ZERO_0] = 0;
2025 r300->hw.vps.cmd[R300_VPS_ZERO_1] = 0;
2026 r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
2027 r300->hw.vps.cmd[R300_VPS_ZERO_3] = 0;
2028 }
2029
2030 r300->radeon.hw.all_dirty = GL_TRUE;
2031 }
2032
2033 void r300UpdateShaders(r300ContextPtr rmesa)
2034 {
2035 GLcontext *ctx;
2036 struct r300_fragment_program *fp;
2037 int i;
2038
2039 ctx = rmesa->radeon.glCtx;
2040 fp = (struct r300_fragment_program *) ctx->FragmentProgram._Current;
2041
2042 /* should only happenen once, just after context is created */
2043 /* TODO: shouldn't we fallback to sw here? */
2044 if (!fp) {
2045 _mesa_fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
2046 return;
2047 }
2048
2049 if (rmesa->radeon.NewGLState && rmesa->options.hw_tcl_enabled) {
2050 for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) {
2051 rmesa->temp_attrib[i] =
2052 TNL_CONTEXT(ctx)->vb.AttribPtr[i];
2053 TNL_CONTEXT(ctx)->vb.AttribPtr[i] =
2054 &rmesa->dummy_attrib[i];
2055 }
2056
2057 _tnl_UpdateFixedFunctionProgram(ctx);
2058
2059 for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) {
2060 TNL_CONTEXT(ctx)->vb.AttribPtr[i] =
2061 rmesa->temp_attrib[i];
2062 }
2063
2064 r300SelectVertexShader(rmesa);
2065 r300SwitchFallback(ctx, R300_FALLBACK_VERTEX_PROGRAM, rmesa->selected_vp->error);
2066 }
2067
2068 if (!fp->translated || rmesa->radeon.NewGLState)
2069 r300TranslateFragmentShader(ctx, ctx->FragmentProgram._Current);
2070
2071 r300SwitchFallback(ctx, R300_FALLBACK_FRAGMENT_PROGRAM, fp->error);
2072
2073 r300UpdateStateParameters(ctx, _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS);
2074 rmesa->radeon.NewGLState = 0;
2075 }
2076
2077 static const GLfloat *get_fragmentprogram_constant(GLcontext *ctx,
2078 struct gl_program *program, struct prog_src_register srcreg)
2079 {
2080 static const GLfloat dummy[4] = { 0, 0, 0, 0 };
2081
2082 switch(srcreg.File) {
2083 case PROGRAM_LOCAL_PARAM:
2084 return program->LocalParams[srcreg.Index];
2085 case PROGRAM_ENV_PARAM:
2086 return ctx->FragmentProgram.Parameters[srcreg.Index];
2087 case PROGRAM_STATE_VAR:
2088 case PROGRAM_NAMED_PARAM:
2089 case PROGRAM_CONSTANT:
2090 return program->Parameters->ParameterValues[srcreg.Index];
2091 default:
2092 _mesa_problem(ctx, "get_fragmentprogram_constant: Unknown\n");
2093 return dummy;
2094 }
2095 }
2096
2097
2098 static void r300SetupPixelShader(GLcontext *ctx)
2099 {
2100 r300ContextPtr rmesa = R300_CONTEXT(ctx);
2101 struct r300_fragment_program *fp = (struct r300_fragment_program *) ctx->FragmentProgram._Current;
2102 struct r300_fragment_program_code *code;
2103 int i, k;
2104
2105 code = &fp->code.r300;
2106
2107 R300_STATECHANGE(rmesa, fpi[0]);
2108 R300_STATECHANGE(rmesa, fpi[1]);
2109 R300_STATECHANGE(rmesa, fpi[2]);
2110 R300_STATECHANGE(rmesa, fpi[3]);
2111 rmesa->hw.fpi[0].cmd[R300_FPI_CMD_0] = cmdpacket0(rmesa->radeon.radeonScreen, R300_US_ALU_RGB_INST_0, code->alu.length);
2112 rmesa->hw.fpi[1].cmd[R300_FPI_CMD_0] = cmdpacket0(rmesa->radeon.radeonScreen, R300_US_ALU_RGB_ADDR_0, code->alu.length);
2113 rmesa->hw.fpi[2].cmd[R300_FPI_CMD_0] = cmdpacket0(rmesa->radeon.radeonScreen, R300_US_ALU_ALPHA_INST_0, code->alu.length);
2114 rmesa->hw.fpi[3].cmd[R300_FPI_CMD_0] = cmdpacket0(rmesa->radeon.radeonScreen, R300_US_ALU_ALPHA_ADDR_0, code->alu.length);
2115 for (i = 0; i < code->alu.length; i++) {
2116 rmesa->hw.fpi[0].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst0;
2117 rmesa->hw.fpi[1].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst1;
2118 rmesa->hw.fpi[2].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst2;
2119 rmesa->hw.fpi[3].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst3;
2120 }
2121
2122 R300_STATECHANGE(rmesa, fp);
2123 rmesa->hw.fp.cmd[R300_FP_CNTL0] = code->cur_node | (code->first_node_has_tex << 3);
2124 rmesa->hw.fp.cmd[R300_FP_CNTL1] = code->max_temp_idx;
2125 rmesa->hw.fp.cmd[R300_FP_CNTL2] =
2126 (0 << R300_PFS_CNTL_ALU_OFFSET_SHIFT) |
2127 ((code->alu.length-1) << R300_PFS_CNTL_ALU_END_SHIFT) |
2128 (0 << R300_PFS_CNTL_TEX_OFFSET_SHIFT) |
2129 ((code->tex.length ? code->tex.length-1 : 0) << R300_PFS_CNTL_TEX_END_SHIFT);
2130 /* I just want to say, the way these nodes are stored.. weird.. */
2131 for (i = 0, k = (4 - (code->cur_node + 1)); i < 4; i++, k++) {
2132 if (i < (code->cur_node + 1)) {
2133 rmesa->hw.fp.cmd[R300_FP_NODE0 + k] =
2134 (code->node[i].alu_offset << R300_ALU_START_SHIFT) |
2135 (code->node[i].alu_end << R300_ALU_SIZE_SHIFT) |
2136 (code->node[i].tex_offset << R300_TEX_START_SHIFT) |
2137 (code->node[i].tex_end << R300_TEX_SIZE_SHIFT) |
2138 code->node[i].flags;
2139 } else {
2140 rmesa->hw.fp.cmd[R300_FP_NODE0 + (3 - i)] = 0;
2141 }
2142 }
2143
2144 R300_STATECHANGE(rmesa, fpp);
2145 rmesa->hw.fpp.cmd[R300_FPP_CMD_0] = cmdpacket0(rmesa->radeon.radeonScreen, R300_PFS_PARAM_0_X, code->const_nr * 4);
2146 for (i = 0; i < code->const_nr; i++) {
2147 const GLfloat *constant = get_fragmentprogram_constant(ctx,
2148 &fp->Base.Base, code->constant[i]);
2149 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat24(constant[0]);
2150 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat24(constant[1]);
2151 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat24(constant[2]);
2152 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat24(constant[3]);
2153 }
2154 }
2155
2156 #define bump_r500fp_count(ptr, new_count) do{\
2157 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
2158 int _nc=(new_count)/6; \
2159 assert(_nc < 256); \
2160 if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
2161 } while(0)
2162
2163 #define bump_r500fp_const_count(ptr, new_count) do{\
2164 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
2165 int _nc=(new_count)/4; \
2166 assert(_nc < 256); \
2167 if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
2168 } while(0)
2169
2170 static void r500SetupPixelShader(GLcontext *ctx)
2171 {
2172 r300ContextPtr rmesa = R300_CONTEXT(ctx);
2173 struct r300_fragment_program *fp = (struct r300_fragment_program *) ctx->FragmentProgram._Current;
2174 int i;
2175 struct r500_fragment_program_code *code;
2176
2177 ((drm_r300_cmd_header_t *) rmesa->hw.r500fp.cmd)->r500fp.count = 0;
2178 ((drm_r300_cmd_header_t *) rmesa->hw.r500fp_const.cmd)->r500fp.count = 0;
2179
2180 code = &fp->code.r500;
2181
2182 R300_STATECHANGE(rmesa, fp);
2183 rmesa->hw.fp.cmd[R500_FP_PIXSIZE] = code->max_temp_idx;
2184
2185 rmesa->hw.fp.cmd[R500_FP_CODE_ADDR] =
2186 R500_US_CODE_START_ADDR(code->inst_offset) |
2187 R500_US_CODE_END_ADDR(code->inst_end);
2188 rmesa->hw.fp.cmd[R500_FP_CODE_RANGE] =
2189 R500_US_CODE_RANGE_ADDR(code->inst_offset) |
2190 R500_US_CODE_RANGE_SIZE(code->inst_end);
2191 rmesa->hw.fp.cmd[R500_FP_CODE_OFFSET] =
2192 R500_US_CODE_OFFSET_ADDR(0); /* FIXME when we add flow control */
2193
2194 R300_STATECHANGE(rmesa, r500fp);
2195 /* Emit our shader... */
2196 for (i = 0; i < code->inst_end+1; i++) {
2197 rmesa->hw.r500fp.cmd[i*6+1] = code->inst[i].inst0;
2198 rmesa->hw.r500fp.cmd[i*6+2] = code->inst[i].inst1;
2199 rmesa->hw.r500fp.cmd[i*6+3] = code->inst[i].inst2;
2200 rmesa->hw.r500fp.cmd[i*6+4] = code->inst[i].inst3;
2201 rmesa->hw.r500fp.cmd[i*6+5] = code->inst[i].inst4;
2202 rmesa->hw.r500fp.cmd[i*6+6] = code->inst[i].inst5;
2203 }
2204
2205 bump_r500fp_count(rmesa->hw.r500fp.cmd, (code->inst_end + 1) * 6);
2206
2207 R300_STATECHANGE(rmesa, r500fp_const);
2208 for (i = 0; i < code->const_nr; i++) {
2209 const GLfloat *constant = get_fragmentprogram_constant(ctx,
2210 &fp->Base.Base, code->constant[i]);
2211 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat32(constant[0]);
2212 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat32(constant[1]);
2213 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat32(constant[2]);
2214 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat32(constant[3]);
2215 }
2216 bump_r500fp_const_count(rmesa->hw.r500fp_const.cmd, code->const_nr * 4);
2217 }
2218
2219 void r300SetupVAP(GLcontext *ctx, GLuint InputsRead, GLuint OutputsWritten)
2220 {
2221 r300ContextPtr rmesa = R300_CONTEXT( ctx );
2222 struct vertex_attribute *attrs = rmesa->vbuf.attribs;
2223 int i, j, reg_count;
2224 uint32_t *vir0 = &rmesa->hw.vir[0].cmd[1];
2225 uint32_t *vir1 = &rmesa->hw.vir[1].cmd[1];
2226
2227 for (i = 0; i < R300_VIR_CMDSIZE-1; ++i)
2228 vir0[i] = vir1[i] = 0;
2229
2230 for (i = 0, j = 0; i < rmesa->vbuf.num_attribs; ++i) {
2231 int tmp;
2232
2233 tmp = attrs[i].data_type | (attrs[i].dst_loc << R300_DST_VEC_LOC_SHIFT);
2234 if (attrs[i]._signed)
2235 tmp |= R300_SIGNED;
2236 if (attrs[i].normalize)
2237 tmp |= R300_NORMALIZE;
2238
2239 if (i % 2 == 0) {
2240 vir0[j] = tmp << R300_DATA_TYPE_0_SHIFT;
2241 vir1[j] = attrs[i].swizzle | (attrs[i].write_mask << R300_WRITE_ENA_SHIFT);
2242 } else {
2243 vir0[j] |= tmp << R300_DATA_TYPE_1_SHIFT;
2244 vir1[j] |= (attrs[i].swizzle | (attrs[i].write_mask << R300_WRITE_ENA_SHIFT)) << R300_SWIZZLE1_SHIFT;
2245 ++j;
2246 }
2247 }
2248
2249 reg_count = (rmesa->vbuf.num_attribs + 1) >> 1;
2250 if (rmesa->vbuf.num_attribs % 2 != 0) {
2251 vir0[reg_count-1] |= R300_LAST_VEC << R300_DATA_TYPE_0_SHIFT;
2252 } else {
2253 vir0[reg_count-1] |= R300_LAST_VEC << R300_DATA_TYPE_1_SHIFT;
2254 }
2255
2256 R300_STATECHANGE(rmesa, vir[0]);
2257 R300_STATECHANGE(rmesa, vir[1]);
2258 R300_STATECHANGE(rmesa, vof);
2259 R300_STATECHANGE(rmesa, vic);
2260
2261 if (rmesa->radeon.radeonScreen->kernel_mm) {
2262 rmesa->hw.vir[0].cmd[0] &= 0xC000FFFF;
2263 rmesa->hw.vir[1].cmd[0] &= 0xC000FFFF;
2264 rmesa->hw.vir[0].cmd[0] |= (reg_count & 0x3FFF) << 16;
2265 rmesa->hw.vir[1].cmd[0] |= (reg_count & 0x3FFF) << 16;
2266 } else {
2267 ((drm_r300_cmd_header_t *) rmesa->hw.vir[0].cmd)->packet0.count = reg_count;
2268 ((drm_r300_cmd_header_t *) rmesa->hw.vir[1].cmd)->packet0.count = reg_count;
2269 }
2270
2271 rmesa->hw.vic.cmd[R300_VIC_CNTL_0] = r300VAPInputCntl0(ctx, InputsRead);
2272 rmesa->hw.vic.cmd[R300_VIC_CNTL_1] = r300VAPInputCntl1(ctx, InputsRead);
2273 rmesa->hw.vof.cmd[R300_VOF_CNTL_0] = r300VAPOutputCntl0(ctx, OutputsWritten);
2274 rmesa->hw.vof.cmd[R300_VOF_CNTL_1] = r300VAPOutputCntl1(ctx, OutputsWritten);
2275 }
2276
2277 void r300UpdateShaderStates(r300ContextPtr rmesa)
2278 {
2279 GLcontext *ctx;
2280 ctx = rmesa->radeon.glCtx;
2281 struct r300_fragment_program *r300_fp;
2282
2283 r300_fp = (struct r300_fragment_program *) ctx->FragmentProgram._Current;
2284
2285 /* should only happenen once, just after context is created */
2286 if (!r300_fp)
2287 return;
2288
2289 r300SetEarlyZState(ctx);
2290
2291 r300SetupTextures(ctx);
2292
2293 rmesa->vtbl.SetupPixelShader(ctx);
2294
2295 rmesa->vtbl.SetupRSUnit(ctx);
2296
2297 if (rmesa->options.hw_tcl_enabled) {
2298 if (rmesa->fallback & R300_FALLBACK_VERTEX_PROGRAM)
2299 r300SetupSwtclVertexProgram(rmesa);
2300 else
2301 r300SetupVertexProgram(rmesa);
2302 }
2303 }
2304
2305 /**
2306 * Called by Mesa after an internal state update.
2307 */
2308 static void r300InvalidateState(GLcontext * ctx, GLuint new_state)
2309 {
2310 r300ContextPtr r300 = R300_CONTEXT(ctx);
2311
2312 _swrast_InvalidateState(ctx, new_state);
2313 _swsetup_InvalidateState(ctx, new_state);
2314 _vbo_InvalidateState(ctx, new_state);
2315 _tnl_InvalidateState(ctx, new_state);
2316
2317 if (new_state & _NEW_BUFFERS) {
2318 _mesa_update_framebuffer(ctx);
2319 /* this updates the DrawBuffer's Width/Height if it's a FBO */
2320 _mesa_update_draw_buffer_bounds(ctx);
2321
2322 R300_STATECHANGE(r300, cb);
2323 }
2324
2325 r300UpdateStateParameters(ctx, new_state);
2326
2327 r300->radeon.NewGLState |= new_state;
2328 }
2329
2330 /**
2331 * Calculate initial hardware state and register state functions.
2332 * Assumes that the command buffer and state atoms have been
2333 * initialized already.
2334 */
2335 void r300InitState(r300ContextPtr r300)
2336 {
2337 r300ResetHwState(r300);
2338 }
2339
2340 static void r300RenderMode(GLcontext * ctx, GLenum mode)
2341 {
2342 r300SwitchFallback(ctx, R300_FALLBACK_RENDER_MODE, ctx->RenderMode != GL_RENDER);
2343 }
2344
2345 /**
2346 * Initialize driver's state callback functions
2347 */
2348 void r300InitStateFuncs(struct dd_function_table *functions)
2349 {
2350
2351 functions->UpdateState = r300InvalidateState;
2352 functions->AlphaFunc = r300AlphaFunc;
2353 functions->BlendColor = r300BlendColor;
2354 functions->BlendEquationSeparate = r300BlendEquationSeparate;
2355 functions->BlendFuncSeparate = r300BlendFuncSeparate;
2356 functions->Enable = r300Enable;
2357 functions->ColorMask = r300ColorMask;
2358 functions->DepthFunc = r300DepthFunc;
2359 functions->DepthMask = r300DepthMask;
2360 functions->CullFace = r300CullFace;
2361 functions->FrontFace = r300FrontFace;
2362 functions->ShadeModel = r300ShadeModel;
2363 functions->LogicOpcode = r300LogicOpcode;
2364
2365 /* ARB_point_parameters */
2366 functions->PointParameterfv = r300PointParameter;
2367
2368 /* Stencil related */
2369 functions->StencilFuncSeparate = r300StencilFuncSeparate;
2370 functions->StencilMaskSeparate = r300StencilMaskSeparate;
2371 functions->StencilOpSeparate = r300StencilOpSeparate;
2372
2373 /* Viewport related */
2374 functions->Viewport = r300Viewport;
2375 functions->DepthRange = r300DepthRange;
2376 functions->PointSize = r300PointSize;
2377 functions->LineWidth = r300LineWidth;
2378
2379 functions->PolygonOffset = r300PolygonOffset;
2380 functions->PolygonMode = r300PolygonMode;
2381
2382 functions->RenderMode = r300RenderMode;
2383
2384 functions->ClipPlane = r300ClipPlane;
2385 functions->Scissor = radeonScissor;
2386
2387 functions->DrawBuffer = radeonDrawBuffer;
2388 functions->ReadBuffer = radeonReadBuffer;
2389 }
2390
2391 void r300InitShaderFunctions(r300ContextPtr r300)
2392 {
2393 if (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
2394 r300->vtbl.SetupRSUnit = r500SetupRSUnit;
2395 r300->vtbl.SetupPixelShader = r500SetupPixelShader;
2396 r300->vtbl.SetupFragmentShaderTextures = r500SetupFragmentShaderTextures;
2397 r300->vtbl.BuildFragmentProgramHwCode = r500BuildFragmentProgramHwCode;
2398 r300->vtbl.FragmentProgramDump = r500FragmentProgramDump;
2399 } else {
2400 r300->vtbl.SetupRSUnit = r300SetupRSUnit;
2401 r300->vtbl.SetupPixelShader = r300SetupPixelShader;
2402 r300->vtbl.SetupFragmentShaderTextures = r300SetupFragmentShaderTextures;
2403 r300->vtbl.BuildFragmentProgramHwCode = r300BuildFragmentProgramHwCode;
2404 r300->vtbl.FragmentProgramDump = r300FragmentProgramDump;
2405 }
2406 }