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[mesa.git] / src / mesa / drivers / dri / r300 / r300_state.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002.
3 Copyright (C) 2004 Nicolai Haehnle.
4 All Rights Reserved.
5
6 The Weather Channel (TM) funded Tungsten Graphics to develop the
7 initial release of the Radeon 8500 driver under the XFree86 license.
8 This notice must be preserved.
9
10 Permission is hereby granted, free of charge, to any person obtaining
11 a copy of this software and associated documentation files (the
12 "Software"), to deal in the Software without restriction, including
13 without limitation the rights to use, copy, modify, merge, publish,
14 distribute, sublicense, and/or sell copies of the Software, and to
15 permit persons to whom the Software is furnished to do so, subject to
16 the following conditions:
17
18 The above copyright notice and this permission notice (including the
19 next paragraph) shall be included in all copies or substantial
20 portions of the Software.
21
22 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
25 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
26 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
27 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
28 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29
30 **************************************************************************/
31
32 /**
33 * \file
34 *
35 * \author Nicolai Haehnle <prefect_@gmx.net>
36 */
37
38 #include "main/glheader.h"
39 #include "main/state.h"
40 #include "main/imports.h"
41 #include "main/enums.h"
42 #include "main/macros.h"
43 #include "main/context.h"
44 #include "main/dd.h"
45 #include "main/framebuffer.h"
46 #include "main/simple_list.h"
47 #include "main/api_arrayelt.h"
48 #include "main/texformat.h"
49
50 #include "swrast/swrast.h"
51 #include "swrast_setup/swrast_setup.h"
52 #include "shader/prog_parameter.h"
53 #include "shader/prog_statevars.h"
54 #include "vbo/vbo.h"
55 #include "tnl/tnl.h"
56 #include "tnl/t_vp_build.h"
57
58 #include "r300_context.h"
59 #include "r300_ioctl.h"
60 #include "r300_state.h"
61 #include "r300_reg.h"
62 #include "r300_emit.h"
63 #include "r300_tex.h"
64 #include "r300_fragprog_common.h"
65 #include "r300_fragprog.h"
66 #include "r500_fragprog.h"
67
68 #include "drirenderbuffer.h"
69
70 extern int future_hw_tcl_on;
71
72 static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4])
73 {
74 r300ContextPtr rmesa = R300_CONTEXT(ctx);
75
76 R300_STATECHANGE(rmesa, blend_color);
77
78 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
79 GLuint r = IROUND(cf[0]*1023.0f);
80 GLuint g = IROUND(cf[1]*1023.0f);
81 GLuint b = IROUND(cf[2]*1023.0f);
82 GLuint a = IROUND(cf[3]*1023.0f);
83
84 rmesa->hw.blend_color.cmd[1] = r | (a << 16);
85 rmesa->hw.blend_color.cmd[2] = b | (g << 16);
86 } else {
87 GLubyte color[4];
88 CLAMPED_FLOAT_TO_UBYTE(color[0], cf[0]);
89 CLAMPED_FLOAT_TO_UBYTE(color[1], cf[1]);
90 CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]);
91 CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]);
92
93 rmesa->hw.blend_color.cmd[1] = PACK_COLOR_8888(color[3], color[0],
94 color[1], color[2]);
95 }
96 }
97
98 /**
99 * Calculate the hardware blend factor setting. This same function is used
100 * for source and destination of both alpha and RGB.
101 *
102 * \returns
103 * The hardware register value for the specified blend factor. This value
104 * will need to be shifted into the correct position for either source or
105 * destination factor.
106 *
107 * \todo
108 * Since the two cases where source and destination are handled differently
109 * are essentially error cases, they should never happen. Determine if these
110 * cases can be removed.
111 */
112 static int blend_factor(GLenum factor, GLboolean is_src)
113 {
114 switch (factor) {
115 case GL_ZERO:
116 return R300_BLEND_GL_ZERO;
117 break;
118 case GL_ONE:
119 return R300_BLEND_GL_ONE;
120 break;
121 case GL_DST_COLOR:
122 return R300_BLEND_GL_DST_COLOR;
123 break;
124 case GL_ONE_MINUS_DST_COLOR:
125 return R300_BLEND_GL_ONE_MINUS_DST_COLOR;
126 break;
127 case GL_SRC_COLOR:
128 return R300_BLEND_GL_SRC_COLOR;
129 break;
130 case GL_ONE_MINUS_SRC_COLOR:
131 return R300_BLEND_GL_ONE_MINUS_SRC_COLOR;
132 break;
133 case GL_SRC_ALPHA:
134 return R300_BLEND_GL_SRC_ALPHA;
135 break;
136 case GL_ONE_MINUS_SRC_ALPHA:
137 return R300_BLEND_GL_ONE_MINUS_SRC_ALPHA;
138 break;
139 case GL_DST_ALPHA:
140 return R300_BLEND_GL_DST_ALPHA;
141 break;
142 case GL_ONE_MINUS_DST_ALPHA:
143 return R300_BLEND_GL_ONE_MINUS_DST_ALPHA;
144 break;
145 case GL_SRC_ALPHA_SATURATE:
146 return (is_src) ? R300_BLEND_GL_SRC_ALPHA_SATURATE :
147 R300_BLEND_GL_ZERO;
148 break;
149 case GL_CONSTANT_COLOR:
150 return R300_BLEND_GL_CONST_COLOR;
151 break;
152 case GL_ONE_MINUS_CONSTANT_COLOR:
153 return R300_BLEND_GL_ONE_MINUS_CONST_COLOR;
154 break;
155 case GL_CONSTANT_ALPHA:
156 return R300_BLEND_GL_CONST_ALPHA;
157 break;
158 case GL_ONE_MINUS_CONSTANT_ALPHA:
159 return R300_BLEND_GL_ONE_MINUS_CONST_ALPHA;
160 break;
161 default:
162 fprintf(stderr, "unknown blend factor %x\n", factor);
163 return (is_src) ? R300_BLEND_GL_ONE : R300_BLEND_GL_ZERO;
164 break;
165 }
166 }
167
168 /**
169 * Sets both the blend equation and the blend function.
170 * This is done in a single
171 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
172 * change the interpretation of the blend function.
173 * Also, make sure that blend function and blend equation are set to their
174 * default value if color blending is not enabled, since at least blend
175 * equations GL_MIN and GL_FUNC_REVERSE_SUBTRACT will cause wrong results
176 * otherwise for unknown reasons.
177 */
178
179 /* helper function */
180 static void r300SetBlendCntl(r300ContextPtr r300, int func, int eqn,
181 int cbits, int funcA, int eqnA)
182 {
183 GLuint new_ablend, new_cblend;
184
185 #if 0
186 fprintf(stderr,
187 "eqnA=%08x funcA=%08x eqn=%08x func=%08x cbits=%08x\n",
188 eqnA, funcA, eqn, func, cbits);
189 #endif
190 new_ablend = eqnA | funcA;
191 new_cblend = eqn | func;
192
193 /* Some blend factor combinations don't seem to work when the
194 * BLEND_NO_SEPARATE bit is set.
195 *
196 * Especially problematic candidates are the ONE_MINUS_* flags,
197 * but I can't see a real pattern.
198 */
199 #if 0
200 if (new_ablend == new_cblend) {
201 new_cblend |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
202 }
203 #endif
204 new_cblend |= cbits;
205
206 if ((new_ablend != r300->hw.bld.cmd[R300_BLD_ABLEND]) ||
207 (new_cblend != r300->hw.bld.cmd[R300_BLD_CBLEND])) {
208 R300_STATECHANGE(r300, bld);
209 r300->hw.bld.cmd[R300_BLD_ABLEND] = new_ablend;
210 r300->hw.bld.cmd[R300_BLD_CBLEND] = new_cblend;
211 }
212 }
213
214 static void r300SetBlendState(GLcontext * ctx)
215 {
216 r300ContextPtr r300 = R300_CONTEXT(ctx);
217 int func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
218 (R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
219 int eqn = R300_COMB_FCN_ADD_CLAMP;
220 int funcA = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
221 (R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
222 int eqnA = R300_COMB_FCN_ADD_CLAMP;
223
224 if (RGBA_LOGICOP_ENABLED(ctx) || !ctx->Color.BlendEnabled) {
225 r300SetBlendCntl(r300, func, eqn, 0, func, eqn);
226 return;
227 }
228
229 func =
230 (blend_factor(ctx->Color.BlendSrcRGB, GL_TRUE) <<
231 R300_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstRGB,
232 GL_FALSE) <<
233 R300_DST_BLEND_SHIFT);
234
235 switch (ctx->Color.BlendEquationRGB) {
236 case GL_FUNC_ADD:
237 eqn = R300_COMB_FCN_ADD_CLAMP;
238 break;
239
240 case GL_FUNC_SUBTRACT:
241 eqn = R300_COMB_FCN_SUB_CLAMP;
242 break;
243
244 case GL_FUNC_REVERSE_SUBTRACT:
245 eqn = R300_COMB_FCN_RSUB_CLAMP;
246 break;
247
248 case GL_MIN:
249 eqn = R300_COMB_FCN_MIN;
250 func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
251 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
252 break;
253
254 case GL_MAX:
255 eqn = R300_COMB_FCN_MAX;
256 func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
257 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
258 break;
259
260 default:
261 fprintf(stderr,
262 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
263 __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB);
264 return;
265 }
266
267 funcA =
268 (blend_factor(ctx->Color.BlendSrcA, GL_TRUE) <<
269 R300_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstA,
270 GL_FALSE) <<
271 R300_DST_BLEND_SHIFT);
272
273 switch (ctx->Color.BlendEquationA) {
274 case GL_FUNC_ADD:
275 eqnA = R300_COMB_FCN_ADD_CLAMP;
276 break;
277
278 case GL_FUNC_SUBTRACT:
279 eqnA = R300_COMB_FCN_SUB_CLAMP;
280 break;
281
282 case GL_FUNC_REVERSE_SUBTRACT:
283 eqnA = R300_COMB_FCN_RSUB_CLAMP;
284 break;
285
286 case GL_MIN:
287 eqnA = R300_COMB_FCN_MIN;
288 funcA = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
289 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
290 break;
291
292 case GL_MAX:
293 eqnA = R300_COMB_FCN_MAX;
294 funcA = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
295 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
296 break;
297
298 default:
299 fprintf(stderr,
300 "[%s:%u] Invalid A blend equation (0x%04x).\n",
301 __FUNCTION__, __LINE__, ctx->Color.BlendEquationA);
302 return;
303 }
304
305 r300SetBlendCntl(r300,
306 func, eqn,
307 (R300_SEPARATE_ALPHA_ENABLE |
308 R300_READ_ENABLE |
309 R300_ALPHA_BLEND_ENABLE), funcA, eqnA);
310 }
311
312 static void r300BlendEquationSeparate(GLcontext * ctx,
313 GLenum modeRGB, GLenum modeA)
314 {
315 r300SetBlendState(ctx);
316 }
317
318 static void r300BlendFuncSeparate(GLcontext * ctx,
319 GLenum sfactorRGB, GLenum dfactorRGB,
320 GLenum sfactorA, GLenum dfactorA)
321 {
322 r300SetBlendState(ctx);
323 }
324
325 /**
326 * Translate LogicOp enums into hardware representation.
327 * Both use a very logical bit-wise layout, but unfortunately the order
328 * of bits is reversed.
329 */
330 static GLuint translate_logicop(GLenum logicop)
331 {
332 GLuint bits = logicop - GL_CLEAR;
333 bits = ((bits & 1) << 3) | ((bits & 2) << 1) | ((bits & 4) >> 1) | ((bits & 8) >> 3);
334 return bits << R300_RB3D_ROPCNTL_ROP_SHIFT;
335 }
336
337 /**
338 * Used internally to update the r300->hw hardware state to match the
339 * current OpenGL state.
340 */
341 static void r300SetLogicOpState(GLcontext *ctx)
342 {
343 r300ContextPtr r300 = R300_CONTEXT(ctx);
344 R300_STATECHANGE(r300, rop);
345 if (RGBA_LOGICOP_ENABLED(ctx)) {
346 r300->hw.rop.cmd[1] = R300_RB3D_ROPCNTL_ROP_ENABLE |
347 translate_logicop(ctx->Color.LogicOp);
348 } else {
349 r300->hw.rop.cmd[1] = 0;
350 }
351 }
352
353 /**
354 * Called by Mesa when an application program changes the LogicOp state
355 * via glLogicOp.
356 */
357 static void r300LogicOpcode(GLcontext *ctx, GLenum logicop)
358 {
359 if (RGBA_LOGICOP_ENABLED(ctx))
360 r300SetLogicOpState(ctx);
361 }
362
363 static void r300ClipPlane( GLcontext *ctx, GLenum plane, const GLfloat *eq )
364 {
365 r300ContextPtr rmesa = R300_CONTEXT(ctx);
366 GLint p;
367 GLint *ip;
368
369 /* no VAP UCP on non-TCL chipsets */
370 if (!(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
371 return;
372
373 p = (GLint) plane - (GLint) GL_CLIP_PLANE0;
374 ip = (GLint *)ctx->Transform._ClipUserPlane[p];
375
376 R300_STATECHANGE( rmesa, vpucp[p] );
377 rmesa->hw.vpucp[p].cmd[R300_VPUCP_X] = ip[0];
378 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Y] = ip[1];
379 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Z] = ip[2];
380 rmesa->hw.vpucp[p].cmd[R300_VPUCP_W] = ip[3];
381 }
382
383 static void r300SetClipPlaneState(GLcontext * ctx, GLenum cap, GLboolean state)
384 {
385 r300ContextPtr r300 = R300_CONTEXT(ctx);
386 GLuint p;
387
388 /* no VAP UCP on non-TCL chipsets */
389 if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
390 return;
391
392 p = cap - GL_CLIP_PLANE0;
393 R300_STATECHANGE(r300, vap_clip_cntl);
394 if (state) {
395 r300->hw.vap_clip_cntl.cmd[1] |= (R300_VAP_UCP_ENABLE_0 << p);
396 r300ClipPlane(ctx, cap, NULL);
397 } else {
398 r300->hw.vap_clip_cntl.cmd[1] &= ~(R300_VAP_UCP_ENABLE_0 << p);
399 }
400 }
401
402 /**
403 * Update our tracked culling state based on Mesa's state.
404 */
405 static void r300UpdateCulling(GLcontext * ctx)
406 {
407 r300ContextPtr r300 = R300_CONTEXT(ctx);
408 uint32_t val = 0;
409
410 if (ctx->Polygon.CullFlag) {
411 switch (ctx->Polygon.CullFaceMode) {
412 case GL_FRONT:
413 val = R300_CULL_FRONT;
414 break;
415 case GL_BACK:
416 val = R300_CULL_BACK;
417 break;
418 case GL_FRONT_AND_BACK:
419 val = R300_CULL_FRONT | R300_CULL_BACK;
420 break;
421 default:
422 break;
423 }
424 }
425
426 switch (ctx->Polygon.FrontFace) {
427 case GL_CW:
428 val |= R300_FRONT_FACE_CW;
429 break;
430 case GL_CCW:
431 val |= R300_FRONT_FACE_CCW;
432 break;
433 default:
434 break;
435 }
436
437 R300_STATECHANGE(r300, cul);
438 r300->hw.cul.cmd[R300_CUL_CULL] = val;
439 }
440
441 static void r300SetPolygonOffsetState(GLcontext * ctx, GLboolean state)
442 {
443 r300ContextPtr r300 = R300_CONTEXT(ctx);
444
445 R300_STATECHANGE(r300, occlusion_cntl);
446 if (state) {
447 r300->hw.occlusion_cntl.cmd[1] |= (3 << 0);
448 } else {
449 r300->hw.occlusion_cntl.cmd[1] &= ~(3 << 0);
450 }
451 }
452
453 static GLboolean current_fragment_program_writes_depth(GLcontext* ctx)
454 {
455 struct r300_fragment_program *fp = (struct r300_fragment_program *) ctx->FragmentProgram._Current;
456
457 return (fp && fp->writes_depth);
458 }
459
460 static void r300SetEarlyZState(GLcontext * ctx)
461 {
462 r300ContextPtr r300 = R300_CONTEXT(ctx);
463 GLuint topZ = R300_ZTOP_ENABLE;
464
465 if (ctx->Color.AlphaEnabled && ctx->Color.AlphaFunc != GL_ALWAYS)
466 topZ = R300_ZTOP_DISABLE;
467 else if (current_fragment_program_writes_depth(ctx))
468 topZ = R300_ZTOP_DISABLE;
469 else if (ctx->FragmentProgram._Current && ctx->FragmentProgram._Current->UsesKill)
470 topZ = R300_ZTOP_DISABLE;
471
472 if (topZ != r300->hw.zstencil_format.cmd[2]) {
473 /* Note: This completely reemits the stencil format.
474 * I have not tested whether this is strictly necessary,
475 * or if emitting a write to ZB_ZTOP is enough.
476 */
477 R300_STATECHANGE(r300, zstencil_format);
478 r300->hw.zstencil_format.cmd[2] = topZ;
479 }
480 }
481
482 static void r300SetAlphaState(GLcontext * ctx)
483 {
484 r300ContextPtr r300 = R300_CONTEXT(ctx);
485 GLubyte refByte;
486 uint32_t pp_misc = 0x0;
487 GLboolean really_enabled = ctx->Color.AlphaEnabled;
488
489 CLAMPED_FLOAT_TO_UBYTE(refByte, ctx->Color.AlphaRef);
490
491 switch (ctx->Color.AlphaFunc) {
492 case GL_NEVER:
493 pp_misc |= R300_FG_ALPHA_FUNC_NEVER;
494 break;
495 case GL_LESS:
496 pp_misc |= R300_FG_ALPHA_FUNC_LESS;
497 break;
498 case GL_EQUAL:
499 pp_misc |= R300_FG_ALPHA_FUNC_EQUAL;
500 break;
501 case GL_LEQUAL:
502 pp_misc |= R300_FG_ALPHA_FUNC_LE;
503 break;
504 case GL_GREATER:
505 pp_misc |= R300_FG_ALPHA_FUNC_GREATER;
506 break;
507 case GL_NOTEQUAL:
508 pp_misc |= R300_FG_ALPHA_FUNC_NOTEQUAL;
509 break;
510 case GL_GEQUAL:
511 pp_misc |= R300_FG_ALPHA_FUNC_GE;
512 break;
513 case GL_ALWAYS:
514 /*pp_misc |= FG_ALPHA_FUNC_ALWAYS; */
515 really_enabled = GL_FALSE;
516 break;
517 }
518
519 if (really_enabled) {
520 pp_misc |= R300_FG_ALPHA_FUNC_ENABLE;
521 pp_misc |= R500_FG_ALPHA_FUNC_8BIT;
522 pp_misc |= (refByte & R300_FG_ALPHA_FUNC_VAL_MASK);
523 } else {
524 pp_misc = 0x0;
525 }
526
527 R300_STATECHANGE(r300, at);
528 r300->hw.at.cmd[R300_AT_ALPHA_TEST] = pp_misc;
529 r300->hw.at.cmd[R300_AT_UNKNOWN] = 0;
530 }
531
532 static void r300AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
533 {
534 (void)func;
535 (void)ref;
536 r300SetAlphaState(ctx);
537 }
538
539 static int translate_func(int func)
540 {
541 switch (func) {
542 case GL_NEVER:
543 return R300_ZS_NEVER;
544 case GL_LESS:
545 return R300_ZS_LESS;
546 case GL_EQUAL:
547 return R300_ZS_EQUAL;
548 case GL_LEQUAL:
549 return R300_ZS_LEQUAL;
550 case GL_GREATER:
551 return R300_ZS_GREATER;
552 case GL_NOTEQUAL:
553 return R300_ZS_NOTEQUAL;
554 case GL_GEQUAL:
555 return R300_ZS_GEQUAL;
556 case GL_ALWAYS:
557 return R300_ZS_ALWAYS;
558 }
559 return 0;
560 }
561
562 static void r300SetDepthState(GLcontext * ctx)
563 {
564 r300ContextPtr r300 = R300_CONTEXT(ctx);
565
566 R300_STATECHANGE(r300, zs);
567 r300->hw.zs.cmd[R300_ZS_CNTL_0] &= R300_STENCIL_ENABLE|R300_STENCIL_FRONT_BACK;
568 r300->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(R300_ZS_MASK << R300_Z_FUNC_SHIFT);
569
570 if (ctx->Depth.Test) {
571 r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_Z_ENABLE;
572 if (ctx->Depth.Mask)
573 r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_Z_WRITE_ENABLE;
574 r300->hw.zs.cmd[R300_ZS_CNTL_1] |=
575 translate_func(ctx->Depth.Func) << R300_Z_FUNC_SHIFT;
576 }
577 }
578
579 static void r300SetStencilState(GLcontext * ctx, GLboolean state)
580 {
581 r300ContextPtr r300 = R300_CONTEXT(ctx);
582 GLboolean hw_stencil = GL_FALSE;
583 if (ctx->DrawBuffer) {
584 struct radeon_renderbuffer *rrbStencil
585 = radeon_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
586 hw_stencil = (rrbStencil && rrbStencil->bo);
587 }
588
589 if (hw_stencil) {
590 R300_STATECHANGE(r300, zs);
591 if (state) {
592 r300->hw.zs.cmd[R300_ZS_CNTL_0] |=
593 R300_STENCIL_ENABLE;
594 } else {
595 r300->hw.zs.cmd[R300_ZS_CNTL_0] &=
596 ~R300_STENCIL_ENABLE;
597 }
598 } else {
599 #if R200_MERGED
600 FALLBACK(&r300->radeon, RADEON_FALLBACK_STENCIL, state);
601 #endif
602 }
603 }
604
605 static void r300UpdatePolygonMode(GLcontext * ctx)
606 {
607 r300ContextPtr r300 = R300_CONTEXT(ctx);
608 uint32_t hw_mode = R300_GA_POLY_MODE_DISABLE;
609
610 /* Only do something if a polygon mode is wanted, default is GL_FILL */
611 if (ctx->Polygon.FrontMode != GL_FILL ||
612 ctx->Polygon.BackMode != GL_FILL) {
613 GLenum f, b;
614
615 /* Handle GL_CW (clock wise and GL_CCW (counter clock wise)
616 * correctly by selecting the correct front and back face
617 */
618 if (ctx->Polygon.FrontFace == GL_CCW) {
619 f = ctx->Polygon.FrontMode;
620 b = ctx->Polygon.BackMode;
621 } else {
622 f = ctx->Polygon.BackMode;
623 b = ctx->Polygon.FrontMode;
624 }
625
626 /* Enable polygon mode */
627 hw_mode |= R300_GA_POLY_MODE_DUAL;
628
629 switch (f) {
630 case GL_LINE:
631 hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_LINE;
632 break;
633 case GL_POINT:
634 hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_POINT;
635 break;
636 case GL_FILL:
637 hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_TRI;
638 break;
639 }
640
641 switch (b) {
642 case GL_LINE:
643 hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_LINE;
644 break;
645 case GL_POINT:
646 hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_POINT;
647 break;
648 case GL_FILL:
649 hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_TRI;
650 break;
651 }
652 }
653
654 if (r300->hw.polygon_mode.cmd[1] != hw_mode) {
655 R300_STATECHANGE(r300, polygon_mode);
656 r300->hw.polygon_mode.cmd[1] = hw_mode;
657 }
658
659 r300->hw.polygon_mode.cmd[2] = 0x00000001;
660 r300->hw.polygon_mode.cmd[3] = 0x00000000;
661 }
662
663 /**
664 * Change the culling mode.
665 *
666 * \note Mesa already filters redundant calls to this function.
667 */
668 static void r300CullFace(GLcontext * ctx, GLenum mode)
669 {
670 (void)mode;
671
672 r300UpdateCulling(ctx);
673 }
674
675 /**
676 * Change the polygon orientation.
677 *
678 * \note Mesa already filters redundant calls to this function.
679 */
680 static void r300FrontFace(GLcontext * ctx, GLenum mode)
681 {
682 (void)mode;
683
684 r300UpdateCulling(ctx);
685 r300UpdatePolygonMode(ctx);
686 }
687
688 /**
689 * Change the depth testing function.
690 *
691 * \note Mesa already filters redundant calls to this function.
692 */
693 static void r300DepthFunc(GLcontext * ctx, GLenum func)
694 {
695 (void)func;
696 r300SetDepthState(ctx);
697 }
698
699 /**
700 * Enable/Disable depth writing.
701 *
702 * \note Mesa already filters redundant calls to this function.
703 */
704 static void r300DepthMask(GLcontext * ctx, GLboolean mask)
705 {
706 (void)mask;
707 r300SetDepthState(ctx);
708 }
709
710 /**
711 * Handle glColorMask()
712 */
713 static void r300ColorMask(GLcontext * ctx,
714 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
715 {
716 r300ContextPtr r300 = R300_CONTEXT(ctx);
717 int mask = (r ? RB3D_COLOR_CHANNEL_MASK_RED_MASK0 : 0) |
718 (g ? RB3D_COLOR_CHANNEL_MASK_GREEN_MASK0 : 0) |
719 (b ? RB3D_COLOR_CHANNEL_MASK_BLUE_MASK0 : 0) |
720 (a ? RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK0 : 0);
721
722 if (mask != r300->hw.cmk.cmd[R300_CMK_COLORMASK]) {
723 R300_STATECHANGE(r300, cmk);
724 r300->hw.cmk.cmd[R300_CMK_COLORMASK] = mask;
725 }
726 }
727
728 /* =============================================================
729 * Point state
730 */
731 static void r300PointSize(GLcontext * ctx, GLfloat size)
732 {
733 r300ContextPtr r300 = R300_CONTEXT(ctx);
734
735 /* We need to clamp to user defined range here, because
736 * the HW clamping happens only for per vertex point size. */
737 size = CLAMP(size, ctx->Point.MinSize, ctx->Point.MaxSize);
738
739 /* same size limits for AA, non-AA points */
740 size = CLAMP(size, ctx->Const.MinPointSize, ctx->Const.MaxPointSize);
741
742 R300_STATECHANGE(r300, ps);
743 r300->hw.ps.cmd[R300_PS_POINTSIZE] =
744 ((int)(size * 6) << R300_POINTSIZE_X_SHIFT) |
745 ((int)(size * 6) << R300_POINTSIZE_Y_SHIFT);
746 }
747
748 static void r300PointParameter(GLcontext * ctx, GLenum pname, const GLfloat * param)
749 {
750 r300ContextPtr r300 = R300_CONTEXT(ctx);
751
752 switch (pname) {
753 case GL_POINT_SIZE_MIN:
754 R300_STATECHANGE(r300, ga_point_minmax);
755 r300->hw.ga_point_minmax.cmd[1] &= ~R300_GA_POINT_MINMAX_MIN_MASK;
756 r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MinSize * 6.0);
757 break;
758 case GL_POINT_SIZE_MAX:
759 R300_STATECHANGE(r300, ga_point_minmax);
760 r300->hw.ga_point_minmax.cmd[1] &= ~R300_GA_POINT_MINMAX_MAX_MASK;
761 r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MaxSize * 6.0)
762 << R300_GA_POINT_MINMAX_MAX_SHIFT;
763 break;
764 case GL_POINT_DISTANCE_ATTENUATION:
765 break;
766 case GL_POINT_FADE_THRESHOLD_SIZE:
767 break;
768 default:
769 break;
770 }
771 }
772
773 /* =============================================================
774 * Line state
775 */
776 static void r300LineWidth(GLcontext * ctx, GLfloat widthf)
777 {
778 r300ContextPtr r300 = R300_CONTEXT(ctx);
779
780 widthf = CLAMP(widthf,
781 ctx->Const.MinPointSize,
782 ctx->Const.MaxPointSize);
783 R300_STATECHANGE(r300, lcntl);
784 r300->hw.lcntl.cmd[1] =
785 R300_LINE_CNT_HO | R300_LINE_CNT_VE | (int)(widthf * 6.0);
786 }
787
788 static void r300PolygonMode(GLcontext * ctx, GLenum face, GLenum mode)
789 {
790 (void)face;
791 (void)mode;
792
793 r300UpdatePolygonMode(ctx);
794 }
795
796 /* =============================================================
797 * Stencil
798 */
799
800 static int translate_stencil_op(int op)
801 {
802 switch (op) {
803 case GL_KEEP:
804 return R300_ZS_KEEP;
805 case GL_ZERO:
806 return R300_ZS_ZERO;
807 case GL_REPLACE:
808 return R300_ZS_REPLACE;
809 case GL_INCR:
810 return R300_ZS_INCR;
811 case GL_DECR:
812 return R300_ZS_DECR;
813 case GL_INCR_WRAP_EXT:
814 return R300_ZS_INCR_WRAP;
815 case GL_DECR_WRAP_EXT:
816 return R300_ZS_DECR_WRAP;
817 case GL_INVERT:
818 return R300_ZS_INVERT;
819 default:
820 WARN_ONCE("Do not know how to translate stencil op");
821 return R300_ZS_KEEP;
822 }
823 return 0;
824 }
825
826 static void r300ShadeModel(GLcontext * ctx, GLenum mode)
827 {
828 r300ContextPtr rmesa = R300_CONTEXT(ctx);
829
830 R300_STATECHANGE(rmesa, shade);
831 rmesa->hw.shade.cmd[1] = 0x00000002;
832 switch (mode) {
833 case GL_FLAT:
834 rmesa->hw.shade.cmd[2] = R300_RE_SHADE_MODEL_FLAT;
835 break;
836 case GL_SMOOTH:
837 rmesa->hw.shade.cmd[2] = R300_RE_SHADE_MODEL_SMOOTH;
838 break;
839 default:
840 return;
841 }
842 rmesa->hw.shade.cmd[3] = 0x00000000;
843 rmesa->hw.shade.cmd[4] = 0x00000000;
844 }
845
846 static void r300StencilFuncSeparate(GLcontext * ctx, GLenum face,
847 GLenum func, GLint ref, GLuint mask)
848 {
849 r300ContextPtr rmesa = R300_CONTEXT(ctx);
850 GLuint refmask =
851 ((ctx->Stencil.Ref[0] & 0xff) << R300_STENCILREF_SHIFT)
852 | ((ctx->Stencil.ValueMask[0] & 0xff) << R300_STENCILMASK_SHIFT);
853 const unsigned back = ctx->Stencil._BackFace;
854 GLuint flag;
855
856 R300_STATECHANGE(rmesa, zs);
857 rmesa->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_STENCIL_FRONT_BACK;
858 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= ~((R300_ZS_MASK <<
859 R300_S_FRONT_FUNC_SHIFT)
860 | (R300_ZS_MASK <<
861 R300_S_BACK_FUNC_SHIFT));
862
863 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &=
864 ~((R300_STENCILREF_MASK << R300_STENCILREF_SHIFT) |
865 (R300_STENCILREF_MASK << R300_STENCILMASK_SHIFT));
866
867 flag = translate_func(ctx->Stencil.Function[0]);
868 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
869 (flag << R300_S_FRONT_FUNC_SHIFT);
870
871 flag = translate_func(ctx->Stencil.Function[back]);
872
873 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
874 (flag << R300_S_BACK_FUNC_SHIFT);
875 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= refmask;
876 }
877
878 static void r300StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
879 {
880 r300ContextPtr rmesa = R300_CONTEXT(ctx);
881
882 R300_STATECHANGE(rmesa, zs);
883 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &=
884 ~(R300_STENCILREF_MASK <<
885 R300_STENCILWRITEMASK_SHIFT);
886 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |=
887 (ctx->Stencil.
888 WriteMask[0] & R300_STENCILREF_MASK) <<
889 R300_STENCILWRITEMASK_SHIFT;
890 }
891
892 static void r300StencilOpSeparate(GLcontext * ctx, GLenum face,
893 GLenum fail, GLenum zfail, GLenum zpass)
894 {
895 r300ContextPtr rmesa = R300_CONTEXT(ctx);
896 const unsigned back = ctx->Stencil._BackFace;
897
898 R300_STATECHANGE(rmesa, zs);
899 /* It is easier to mask what's left.. */
900 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &=
901 (R300_ZS_MASK << R300_Z_FUNC_SHIFT) |
902 (R300_ZS_MASK << R300_S_FRONT_FUNC_SHIFT) |
903 (R300_ZS_MASK << R300_S_BACK_FUNC_SHIFT);
904
905 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
906 (translate_stencil_op(ctx->Stencil.FailFunc[0]) <<
907 R300_S_FRONT_SFAIL_OP_SHIFT)
908 | (translate_stencil_op(ctx->Stencil.ZFailFunc[0]) <<
909 R300_S_FRONT_ZFAIL_OP_SHIFT)
910 | (translate_stencil_op(ctx->Stencil.ZPassFunc[0]) <<
911 R300_S_FRONT_ZPASS_OP_SHIFT);
912
913 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
914 (translate_stencil_op(ctx->Stencil.FailFunc[back]) <<
915 R300_S_BACK_SFAIL_OP_SHIFT)
916 | (translate_stencil_op(ctx->Stencil.ZFailFunc[back]) <<
917 R300_S_BACK_ZFAIL_OP_SHIFT)
918 | (translate_stencil_op(ctx->Stencil.ZPassFunc[back]) <<
919 R300_S_BACK_ZPASS_OP_SHIFT);
920 }
921
922 /* =============================================================
923 * Window position and viewport transformation
924 */
925
926 static void r300UpdateWindow(GLcontext * ctx)
927 {
928 r300ContextPtr rmesa = R300_CONTEXT(ctx);
929 __DRIdrawablePrivate *dPriv = rmesa->radeon.dri.drawable;
930 GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0;
931 GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0;
932 const GLfloat *v = ctx->Viewport._WindowMap.m;
933 const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
934 const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0);
935 GLfloat y_scale, y_bias;
936
937 if (render_to_fbo) {
938 y_scale = 1.0;
939 y_bias = 0;
940 } else {
941 y_scale = -1.0;
942 y_bias = yoffset;
943 }
944
945 GLfloat sx = v[MAT_SX];
946 GLfloat tx = v[MAT_TX] + xoffset;
947 GLfloat sy = v[MAT_SY] * y_scale;
948 GLfloat ty = (v[MAT_TY] * y_scale) + y_bias;
949 GLfloat sz = v[MAT_SZ] * depthScale;
950 GLfloat tz = v[MAT_TZ] * depthScale;
951
952 R300_STATECHANGE(rmesa, vpt);
953
954 rmesa->hw.vpt.cmd[R300_VPT_XSCALE] = r300PackFloat32(sx);
955 rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx);
956 rmesa->hw.vpt.cmd[R300_VPT_YSCALE] = r300PackFloat32(sy);
957 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty);
958 rmesa->hw.vpt.cmd[R300_VPT_ZSCALE] = r300PackFloat32(sz);
959 rmesa->hw.vpt.cmd[R300_VPT_ZOFFSET] = r300PackFloat32(tz);
960 }
961
962 static void r300Viewport(GLcontext * ctx, GLint x, GLint y,
963 GLsizei width, GLsizei height)
964 {
965 /* Don't pipeline viewport changes, conflict with window offset
966 * setting below. Could apply deltas to rescue pipelined viewport
967 * values, or keep the originals hanging around.
968 */
969 r300UpdateWindow(ctx);
970
971 radeon_viewport(ctx, x, y, width, height);
972 }
973
974 static void r300DepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval)
975 {
976 r300UpdateWindow(ctx);
977 }
978
979 void r300UpdateViewportOffset(GLcontext * ctx)
980 {
981 r300ContextPtr rmesa = R300_CONTEXT(ctx);
982 __DRIdrawablePrivate *dPriv = ((radeonContextPtr) rmesa)->dri.drawable;
983 GLfloat xoffset = (GLfloat) dPriv->x;
984 GLfloat yoffset = (GLfloat) dPriv->y + dPriv->h;
985 const GLfloat *v = ctx->Viewport._WindowMap.m;
986
987 GLfloat tx = v[MAT_TX] + xoffset;
988 GLfloat ty = (-v[MAT_TY]) + yoffset;
989
990 if (rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] != r300PackFloat32(tx) ||
991 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] != r300PackFloat32(ty)) {
992 /* Note: this should also modify whatever data the context reset
993 * code uses...
994 */
995 R300_STATECHANGE(rmesa, vpt);
996 rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx);
997 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty);
998
999 }
1000
1001 radeonUpdateScissor(ctx);
1002 }
1003
1004 static void
1005 r300FetchStateParameter(GLcontext * ctx,
1006 const gl_state_index state[STATE_LENGTH],
1007 GLfloat * value)
1008 {
1009 r300ContextPtr r300 = R300_CONTEXT(ctx);
1010
1011 switch (state[0]) {
1012 case STATE_INTERNAL:
1013 switch (state[1]) {
1014 case STATE_R300_WINDOW_DIMENSION:
1015 value[0] = r300->radeon.dri.drawable->w * 0.5f; /* width*0.5 */
1016 value[1] = r300->radeon.dri.drawable->h * 0.5f; /* height*0.5 */
1017 value[2] = 0.5F; /* for moving range [-1 1] -> [0 1] */
1018 value[3] = 1.0F; /* not used */
1019 break;
1020
1021 case STATE_R300_TEXRECT_FACTOR:{
1022 struct gl_texture_object *t =
1023 ctx->Texture.Unit[state[2]].CurrentTex[TEXTURE_RECT_INDEX];
1024
1025 if (t && t->Image[0][t->BaseLevel]) {
1026 struct gl_texture_image *image =
1027 t->Image[0][t->BaseLevel];
1028 value[0] = 1.0 / image->Width2;
1029 value[1] = 1.0 / image->Height2;
1030 } else {
1031 value[0] = 1.0;
1032 value[1] = 1.0;
1033 }
1034 value[2] = 1.0;
1035 value[3] = 1.0;
1036 break;
1037 }
1038
1039 default:
1040 break;
1041 }
1042 break;
1043
1044 default:
1045 break;
1046 }
1047 }
1048
1049 /**
1050 * Update R300's own internal state parameters.
1051 * For now just STATE_R300_WINDOW_DIMENSION
1052 */
1053 void r300UpdateStateParameters(GLcontext * ctx, GLuint new_state)
1054 {
1055 struct r300_fragment_program *fp;
1056 struct gl_program_parameter_list *paramList;
1057 GLuint i;
1058
1059 if (!(new_state & (_NEW_BUFFERS | _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS)))
1060 return;
1061
1062 fp = (struct r300_fragment_program *)ctx->FragmentProgram._Current;
1063 if (!fp)
1064 return;
1065
1066 paramList = fp->Base.Base.Parameters;
1067
1068 if (!paramList)
1069 return;
1070
1071 for (i = 0; i < paramList->NumParameters; i++) {
1072 if (paramList->Parameters[i].Type == PROGRAM_STATE_VAR) {
1073 r300FetchStateParameter(ctx,
1074 paramList->Parameters[i].
1075 StateIndexes,
1076 paramList->ParameterValues[i]);
1077 }
1078 }
1079 }
1080
1081 /* =============================================================
1082 * Polygon state
1083 */
1084 static void r300PolygonOffset(GLcontext * ctx, GLfloat factor, GLfloat units)
1085 {
1086 r300ContextPtr rmesa = R300_CONTEXT(ctx);
1087 GLfloat constant = units;
1088
1089 switch (ctx->Visual.depthBits) {
1090 case 16:
1091 constant *= 4.0;
1092 break;
1093 case 24:
1094 constant *= 2.0;
1095 break;
1096 }
1097
1098 factor *= 12.0;
1099
1100 /* fprintf(stderr, "%s f:%f u:%f\n", __FUNCTION__, factor, constant); */
1101
1102 R300_STATECHANGE(rmesa, zbs);
1103 rmesa->hw.zbs.cmd[R300_ZBS_T_FACTOR] = r300PackFloat32(factor);
1104 rmesa->hw.zbs.cmd[R300_ZBS_T_CONSTANT] = r300PackFloat32(constant);
1105 rmesa->hw.zbs.cmd[R300_ZBS_W_FACTOR] = r300PackFloat32(factor);
1106 rmesa->hw.zbs.cmd[R300_ZBS_W_CONSTANT] = r300PackFloat32(constant);
1107 }
1108
1109 /* Routing and texture-related */
1110
1111 /* r300 doesnt handle GL_CLAMP and GL_MIRROR_CLAMP_EXT correctly when filter is NEAREST.
1112 * Since texwrap produces same results for GL_CLAMP and GL_CLAMP_TO_EDGE we use them instead.
1113 * We need to recalculate wrap modes whenever filter mode is changed because someone might do:
1114 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST);
1115 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP);
1116 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
1117 * Since r300 completely ignores R300_TX_CLAMP when either min or mag is nearest it cant handle
1118 * combinations where only one of them is nearest.
1119 */
1120 static unsigned long gen_fixed_filter(unsigned long f)
1121 {
1122 unsigned long mag, min, needs_fixing = 0;
1123 //return f;
1124
1125 /* We ignore MIRROR bit so we dont have to do everything twice */
1126 if ((f & ((7 - 1) << R300_TX_WRAP_S_SHIFT)) ==
1127 (R300_TX_CLAMP << R300_TX_WRAP_S_SHIFT)) {
1128 needs_fixing |= 1;
1129 }
1130 if ((f & ((7 - 1) << R300_TX_WRAP_T_SHIFT)) ==
1131 (R300_TX_CLAMP << R300_TX_WRAP_T_SHIFT)) {
1132 needs_fixing |= 2;
1133 }
1134 if ((f & ((7 - 1) << R300_TX_WRAP_R_SHIFT)) ==
1135 (R300_TX_CLAMP << R300_TX_WRAP_R_SHIFT)) {
1136 needs_fixing |= 4;
1137 }
1138
1139 if (!needs_fixing)
1140 return f;
1141
1142 mag = f & R300_TX_MAG_FILTER_MASK;
1143 min = f & (R300_TX_MIN_FILTER_MASK|R300_TX_MIN_FILTER_MIP_MASK);
1144
1145 /* TODO: Check for anisto filters too */
1146 if ((mag != R300_TX_MAG_FILTER_NEAREST)
1147 && (min != R300_TX_MIN_FILTER_NEAREST))
1148 return f;
1149
1150 /* r300 cant handle these modes hence we force nearest to linear */
1151 if ((mag == R300_TX_MAG_FILTER_NEAREST)
1152 && (min != R300_TX_MIN_FILTER_NEAREST)) {
1153 f &= ~R300_TX_MAG_FILTER_NEAREST;
1154 f |= R300_TX_MAG_FILTER_LINEAR;
1155 return f;
1156 }
1157
1158 if ((min == R300_TX_MIN_FILTER_NEAREST)
1159 && (mag != R300_TX_MAG_FILTER_NEAREST)) {
1160 f &= ~R300_TX_MIN_FILTER_NEAREST;
1161 f |= R300_TX_MIN_FILTER_LINEAR;
1162 return f;
1163 }
1164
1165 /* Both are nearest */
1166 if (needs_fixing & 1) {
1167 f &= ~((7 - 1) << R300_TX_WRAP_S_SHIFT);
1168 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_S_SHIFT;
1169 }
1170 if (needs_fixing & 2) {
1171 f &= ~((7 - 1) << R300_TX_WRAP_T_SHIFT);
1172 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_T_SHIFT;
1173 }
1174 if (needs_fixing & 4) {
1175 f &= ~((7 - 1) << R300_TX_WRAP_R_SHIFT);
1176 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_R_SHIFT;
1177 }
1178 return f;
1179 }
1180
1181 static void r300SetupFragmentShaderTextures(GLcontext *ctx, int *tmu_mappings)
1182 {
1183 r300ContextPtr r300 = R300_CONTEXT(ctx);
1184 int i;
1185 struct r300_fragment_program *fp = (struct r300_fragment_program *) ctx->FragmentProgram._Current;
1186 struct r300_fragment_program_code *code = &fp->code.r300;
1187
1188 R300_STATECHANGE(r300, fpt);
1189
1190 for (i = 0; i < code->tex.length; i++) {
1191 int unit;
1192 int opcode;
1193 unsigned long val;
1194
1195 unit = code->tex.inst[i] >> R300_TEX_ID_SHIFT;
1196 unit &= 15;
1197
1198 val = code->tex.inst[i];
1199 val &= ~R300_TEX_ID_MASK;
1200
1201 opcode =
1202 (val & R300_TEX_INST_MASK) >> R300_TEX_INST_SHIFT;
1203 if (opcode == R300_TEX_OP_KIL) {
1204 r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
1205 } else {
1206 if (tmu_mappings[unit] >= 0) {
1207 val |=
1208 tmu_mappings[unit] <<
1209 R300_TEX_ID_SHIFT;
1210 r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
1211 } else {
1212 // We get here when the corresponding texture image is incomplete
1213 // (e.g. incomplete mipmaps etc.)
1214 r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
1215 }
1216 }
1217 }
1218
1219 r300->hw.fpt.cmd[R300_FPT_CMD_0] =
1220 cmdpacket0(r300->radeon.radeonScreen,
1221 R300_US_TEX_INST_0, code->tex.length);
1222 }
1223
1224 static void r500SetupFragmentShaderTextures(GLcontext *ctx, int *tmu_mappings)
1225 {
1226 int i;
1227 struct r300_fragment_program *fp = (struct r300_fragment_program *) ctx->FragmentProgram._Current;
1228 struct r500_fragment_program_code *code = &fp->code.r500;
1229
1230 /* find all the texture instructions and relocate the texture units */
1231 for (i = 0; i < code->inst_end + 1; i++) {
1232 if ((code->inst[i].inst0 & 0x3) == R500_INST_TYPE_TEX) {
1233 uint32_t val;
1234 int unit, opcode, new_unit;
1235
1236 val = code->inst[i].inst1;
1237
1238 unit = (val >> 16) & 0xf;
1239
1240 val &= ~(0xf << 16);
1241
1242 opcode = val & (0x7 << 22);
1243 if (opcode == R500_TEX_INST_TEXKILL) {
1244 new_unit = 0;
1245 } else {
1246 if (tmu_mappings[unit] >= 0) {
1247 new_unit = tmu_mappings[unit];
1248 } else {
1249 new_unit = 0;
1250 }
1251 }
1252 val |= R500_TEX_ID(new_unit);
1253 code->inst[i].inst1 = val;
1254 }
1255 }
1256 }
1257
1258 static GLuint translate_lod_bias(GLfloat bias)
1259 {
1260 GLint b = (int)(bias*32);
1261 if (b >= (1 << 9))
1262 b = (1 << 9)-1;
1263 else if (b < -(1 << 9))
1264 b = -(1 << 9);
1265 return (((GLuint)b) << R300_LOD_BIAS_SHIFT) & R300_LOD_BIAS_MASK;
1266 }
1267
1268 static void r300SetupTextures(GLcontext * ctx)
1269 {
1270 int i, mtu;
1271 struct radeon_tex_obj *t;
1272 r300ContextPtr r300 = R300_CONTEXT(ctx);
1273 int hw_tmu = 0;
1274 int last_hw_tmu = -1; /* -1 translates into no setup costs for fields */
1275 int tmu_mappings[R300_MAX_TEXTURE_UNITS] = { -1, };
1276 struct r300_fragment_program *fp = (struct r300_fragment_program *)
1277 (char *)ctx->FragmentProgram._Current;
1278
1279 R300_STATECHANGE(r300, txe);
1280 R300_STATECHANGE(r300, tex.filter);
1281 R300_STATECHANGE(r300, tex.filter_1);
1282 R300_STATECHANGE(r300, tex.size);
1283 R300_STATECHANGE(r300, tex.format);
1284 R300_STATECHANGE(r300, tex.pitch);
1285 R300_STATECHANGE(r300, tex.offset);
1286 R300_STATECHANGE(r300, tex.chroma_key);
1287 R300_STATECHANGE(r300, tex.border_color);
1288
1289 r300->hw.txe.cmd[R300_TXE_ENABLE] = 0x0;
1290
1291 mtu = r300->radeon.glCtx->Const.MaxTextureUnits;
1292 if (RADEON_DEBUG & DEBUG_STATE)
1293 fprintf(stderr, "mtu=%d\n", mtu);
1294
1295 if (mtu > R300_MAX_TEXTURE_UNITS) {
1296 fprintf(stderr,
1297 "Aiiee ! mtu=%d is greater than R300_MAX_TEXTURE_UNITS=%d\n",
1298 mtu, R300_MAX_TEXTURE_UNITS);
1299 _mesa_exit(-1);
1300 }
1301
1302 /* We cannot let disabled tmu offsets pass DRM */
1303 for (i = 0; i < mtu; i++) {
1304 if (ctx->Texture.Unit[i]._ReallyEnabled) {
1305 tmu_mappings[i] = hw_tmu;
1306
1307 t = radeon_tex_obj(ctx->Texture.Unit[i]._Current);
1308 if (!t)
1309 continue;
1310
1311 if ((t->pp_txformat & 0xffffff00) == 0xffffff00) {
1312 WARN_ONCE
1313 ("unknown texture format (entry %x) encountered. Help me !\n",
1314 t->pp_txformat & 0xff);
1315 }
1316
1317 if (RADEON_DEBUG & DEBUG_STATE)
1318 fprintf(stderr,
1319 "Activating texture unit %d\n", i);
1320
1321 r300->hw.txe.cmd[R300_TXE_ENABLE] |= (1 << hw_tmu);
1322
1323 r300->hw.tex.filter.cmd[R300_TEX_VALUE_0 +
1324 hw_tmu] =
1325 gen_fixed_filter(t->pp_txfilter) | (hw_tmu << 28);
1326 /* Note: There is a LOD bias per texture unit and a LOD bias
1327 * per texture object. We add them here to get the correct behaviour.
1328 * (The per-texture object LOD bias was introduced in OpenGL 1.4
1329 * and is not present in the EXT_texture_object extension).
1330 */
1331 r300->hw.tex.filter_1.cmd[R300_TEX_VALUE_0 + hw_tmu] =
1332 t->pp_txfilter_1 |
1333 translate_lod_bias(ctx->Texture.Unit[i].LodBias + t->base.LodBias);
1334 r300->hw.tex.size.cmd[R300_TEX_VALUE_0 + hw_tmu] =
1335 t->pp_txsize;
1336 r300->hw.tex.format.cmd[R300_TEX_VALUE_0 +
1337 hw_tmu] = t->pp_txformat;
1338 r300->hw.tex.pitch.cmd[R300_TEX_VALUE_0 + hw_tmu] =
1339 t->pp_txpitch;
1340 r300->hw.textures[hw_tmu] = t;
1341
1342 if (t->tile_bits & R300_TXO_MACRO_TILE) {
1343 WARN_ONCE("macro tiling enabled!\n");
1344 }
1345
1346 if (t->tile_bits & R300_TXO_MICRO_TILE) {
1347 WARN_ONCE("micro tiling enabled!\n");
1348 }
1349
1350 r300->hw.tex.chroma_key.cmd[R300_TEX_VALUE_0 +
1351 hw_tmu] = 0x0;
1352 r300->hw.tex.border_color.cmd[R300_TEX_VALUE_0 +
1353 hw_tmu] =
1354 t->pp_border_color;
1355
1356 last_hw_tmu = hw_tmu;
1357
1358 hw_tmu++;
1359 }
1360 }
1361
1362 r300->hw.tex.filter.cmd[R300_TEX_CMD_0] =
1363 cmdpacket0(r300->radeon.radeonScreen, R300_TX_FILTER0_0, last_hw_tmu + 1);
1364 r300->hw.tex.filter_1.cmd[R300_TEX_CMD_0] =
1365 cmdpacket0(r300->radeon.radeonScreen, R300_TX_FILTER1_0, last_hw_tmu + 1);
1366 r300->hw.tex.size.cmd[R300_TEX_CMD_0] =
1367 cmdpacket0(r300->radeon.radeonScreen, R300_TX_SIZE_0, last_hw_tmu + 1);
1368 r300->hw.tex.format.cmd[R300_TEX_CMD_0] =
1369 cmdpacket0(r300->radeon.radeonScreen, R300_TX_FORMAT_0, last_hw_tmu + 1);
1370 r300->hw.tex.pitch.cmd[R300_TEX_CMD_0] =
1371 cmdpacket0(r300->radeon.radeonScreen, R300_TX_FORMAT2_0, last_hw_tmu + 1);
1372 r300->hw.tex.offset.cmd[R300_TEX_CMD_0] =
1373 cmdpacket0(r300->radeon.radeonScreen, R300_TX_OFFSET_0, last_hw_tmu + 1);
1374 r300->hw.tex.chroma_key.cmd[R300_TEX_CMD_0] =
1375 cmdpacket0(r300->radeon.radeonScreen, R300_TX_CHROMA_KEY_0, last_hw_tmu + 1);
1376 r300->hw.tex.border_color.cmd[R300_TEX_CMD_0] =
1377 cmdpacket0(r300->radeon.radeonScreen, R300_TX_BORDER_COLOR_0, last_hw_tmu + 1);
1378
1379 if (!fp) /* should only happenen once, just after context is created */
1380 return;
1381
1382 if (r300->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV515) {
1383 if (fp->Base.UsesKill && last_hw_tmu < 0) {
1384 // The KILL operation requires the first texture unit
1385 // to be enabled.
1386 r300->hw.txe.cmd[R300_TXE_ENABLE] |= 1;
1387 r300->hw.tex.filter.cmd[R300_TEX_VALUE_0] = 0;
1388 r300->hw.tex.filter.cmd[R300_TEX_CMD_0] =
1389 cmdpacket0(r300->radeon.radeonScreen, R300_TX_FILTER0_0, 1);
1390 }
1391 }
1392 r300->vtbl.SetupFragmentShaderTextures(ctx, tmu_mappings);
1393
1394 if (RADEON_DEBUG & DEBUG_STATE)
1395 fprintf(stderr, "TX_ENABLE: %08x last_hw_tmu=%d\n",
1396 r300->hw.txe.cmd[R300_TXE_ENABLE], last_hw_tmu);
1397 }
1398
1399 union r300_outputs_written {
1400 GLuint vp_outputs; /* hw_tcl_on */
1401 DECLARE_RENDERINPUTS(index_bitset); /* !hw_tcl_on */
1402 };
1403
1404 #define R300_OUTPUTS_WRITTEN_TEST(ow, vp_result, tnl_attrib) \
1405 ((hw_tcl_on) ? (ow).vp_outputs & (1 << (vp_result)) : \
1406 RENDERINPUTS_TEST( (ow.index_bitset), (tnl_attrib) ))
1407
1408 static void r300SetupRSUnit(GLcontext * ctx)
1409 {
1410 r300ContextPtr r300 = R300_CONTEXT(ctx);
1411 TNLcontext *tnl = TNL_CONTEXT(ctx);
1412 struct vertex_buffer *VB = &tnl->vb;
1413 union r300_outputs_written OutputsWritten;
1414 GLuint InputsRead;
1415 int fp_reg, high_rr;
1416 int col_ip, tex_ip;
1417 int rs_tex_count = 0;
1418 int i, count, col_fmt;
1419
1420 if (hw_tcl_on)
1421 OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten;
1422 else
1423 RENDERINPUTS_COPY(OutputsWritten.index_bitset, r300->render_inputs_bitset);
1424
1425 if (ctx->FragmentProgram._Current)
1426 InputsRead = ctx->FragmentProgram._Current->Base.InputsRead;
1427 else {
1428 fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
1429 return; /* This should only ever happen once.. */
1430 }
1431
1432 R300_STATECHANGE(r300, ri);
1433 R300_STATECHANGE(r300, rc);
1434 R300_STATECHANGE(r300, rr);
1435
1436 fp_reg = col_ip = tex_ip = col_fmt = 0;
1437
1438 r300->hw.rc.cmd[1] = 0;
1439 r300->hw.rc.cmd[2] = 0;
1440 for (i=0; i<R300_RR_CMDSIZE-1; ++i)
1441 r300->hw.rr.cmd[R300_RR_INST_0 + i] = 0;
1442
1443 for (i=0; i<R300_RI_CMDSIZE-1; ++i)
1444 r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0;
1445
1446
1447 if (InputsRead & FRAG_BIT_COL0) {
1448 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
1449 count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
1450 if (count == 4)
1451 col_fmt = R300_RS_COL_FMT_RGBA;
1452 else if (count == 3)
1453 col_fmt = R300_RS_COL_FMT_RGB1;
1454 else
1455 col_fmt = R300_RS_COL_FMT_0001;
1456
1457 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R300_RS_COL_PTR(col_ip) | R300_RS_COL_FMT(col_fmt);
1458 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R300_RS_INST_COL_ID(col_ip) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_reg);
1459 InputsRead &= ~FRAG_BIT_COL0;
1460 ++col_ip;
1461 ++fp_reg;
1462 } else {
1463 WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
1464 }
1465 }
1466
1467 if (InputsRead & FRAG_BIT_COL1) {
1468 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
1469 count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size;
1470 if (count == 4)
1471 col_fmt = R300_RS_COL_FMT_RGBA;
1472 else if (count == 3)
1473 col_fmt = R300_RS_COL_FMT_RGB1;
1474 else
1475 col_fmt = R300_RS_COL_FMT_0001;
1476
1477 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R300_RS_COL_PTR(col_ip) | R300_RS_COL_FMT(col_fmt);
1478 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R300_RS_INST_COL_ID(col_ip) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_reg);
1479 InputsRead &= ~FRAG_BIT_COL1;
1480 ++col_ip;
1481 ++fp_reg;
1482 } else {
1483 WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
1484 }
1485 }
1486
1487 /* We always route 4 texcoord components */
1488 for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
1489 if (! ( InputsRead & FRAG_BIT_TEX(i) ) )
1490 continue;
1491
1492 if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
1493 WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
1494 continue;
1495 }
1496
1497 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count);
1498 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
1499 InputsRead &= ~(FRAG_BIT_TEX0 << i);
1500 rs_tex_count += 4;
1501 ++tex_ip;
1502 ++fp_reg;
1503 }
1504
1505 if (InputsRead & FRAG_BIT_WPOS) {
1506 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count);
1507 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
1508 InputsRead &= ~FRAG_BIT_WPOS;
1509 rs_tex_count += 4;
1510 ++tex_ip;
1511 ++fp_reg;
1512 }
1513
1514 if (InputsRead & FRAG_BIT_FOGC) {
1515 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_FOGC, _TNL_ATTRIB_FOG)) {
1516 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(R300_RS_SEL_K0) | R300_RS_SEL_R(R300_RS_SEL_K0);
1517 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_Q(R300_RS_SEL_K1) | R300_RS_TEX_PTR(rs_tex_count);
1518 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
1519 InputsRead &= ~FRAG_BIT_FOGC;
1520 rs_tex_count += 1;
1521 ++tex_ip;
1522 ++fp_reg;
1523 } else {
1524 WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n");
1525 }
1526 }
1527
1528 /* Setup default color if no color or tex was set */
1529 if (rs_tex_count == 0 && col_ip == 0) {
1530 r300->hw.rr.cmd[R300_RR_INST_0] = R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(0) | R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
1531 ++col_ip;
1532 }
1533
1534 high_rr = (col_ip > tex_ip) ? col_ip : tex_ip;
1535 r300->hw.rc.cmd[1] |= (rs_tex_count << R300_IT_COUNT_SHIFT) | (col_ip << R300_IC_COUNT_SHIFT) | R300_HIRES_EN;
1536 r300->hw.rc.cmd[2] |= high_rr - 1;
1537
1538 r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_RS_INST_0, high_rr);
1539
1540 if (InputsRead)
1541 WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead);
1542 }
1543
1544 static void r500SetupRSUnit(GLcontext * ctx)
1545 {
1546 r300ContextPtr r300 = R300_CONTEXT(ctx);
1547 TNLcontext *tnl = TNL_CONTEXT(ctx);
1548 struct vertex_buffer *VB = &tnl->vb;
1549 union r300_outputs_written OutputsWritten;
1550 GLuint InputsRead;
1551 int fp_reg, high_rr;
1552 int col_ip, tex_ip;
1553 int rs_tex_count = 0;
1554 int i, count, col_fmt;
1555
1556 if (hw_tcl_on)
1557 OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten;
1558 else
1559 RENDERINPUTS_COPY(OutputsWritten.index_bitset, r300->render_inputs_bitset);
1560
1561 if (ctx->FragmentProgram._Current)
1562 InputsRead = ctx->FragmentProgram._Current->Base.InputsRead;
1563 else {
1564 fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
1565 return; /* This should only ever happen once.. */
1566 }
1567
1568 R300_STATECHANGE(r300, ri);
1569 R300_STATECHANGE(r300, rc);
1570 R300_STATECHANGE(r300, rr);
1571
1572 fp_reg = col_ip = tex_ip = col_fmt = 0;
1573
1574 r300->hw.rc.cmd[1] = 0;
1575 r300->hw.rc.cmd[2] = 0;
1576 for (i=0; i<R300_RR_CMDSIZE-1; ++i)
1577 r300->hw.rr.cmd[R300_RR_INST_0 + i] = 0;
1578
1579 for (i=0; i<R500_RI_CMDSIZE-1; ++i)
1580 r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0;
1581
1582
1583 if (InputsRead & FRAG_BIT_COL0) {
1584 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
1585 count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
1586 if (count == 4)
1587 col_fmt = R300_RS_COL_FMT_RGBA;
1588 else if (count == 3)
1589 col_fmt = R300_RS_COL_FMT_RGB1;
1590 else
1591 col_fmt = R300_RS_COL_FMT_0001;
1592
1593 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R500_RS_COL_PTR(col_ip) | R500_RS_COL_FMT(col_fmt);
1594 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R500_RS_INST_COL_ID(col_ip) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_reg);
1595 InputsRead &= ~FRAG_BIT_COL0;
1596 ++col_ip;
1597 ++fp_reg;
1598 } else {
1599 WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
1600 }
1601 }
1602
1603 if (InputsRead & FRAG_BIT_COL1) {
1604 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
1605 count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size;
1606 if (count == 4)
1607 col_fmt = R300_RS_COL_FMT_RGBA;
1608 else if (count == 3)
1609 col_fmt = R300_RS_COL_FMT_RGB1;
1610 else
1611 col_fmt = R300_RS_COL_FMT_0001;
1612
1613 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R500_RS_COL_PTR(col_ip) | R500_RS_COL_FMT(col_fmt);
1614 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R500_RS_INST_COL_ID(col_ip) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_reg);
1615 InputsRead &= ~FRAG_BIT_COL1;
1616 ++col_ip;
1617 ++fp_reg;
1618 } else {
1619 WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
1620 }
1621 }
1622
1623 /* We always route 4 texcoord components */
1624 for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
1625 if (! ( InputsRead & FRAG_BIT_TEX(i) ) )
1626 continue;
1627
1628 if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
1629 WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
1630 continue;
1631 }
1632
1633 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) |
1634 ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) |
1635 ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) |
1636 ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT);
1637
1638 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
1639 InputsRead &= ~(FRAG_BIT_TEX0 << i);
1640 rs_tex_count += 4;
1641 ++tex_ip;
1642 ++fp_reg;
1643 }
1644
1645 if (InputsRead & FRAG_BIT_WPOS) {
1646 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) |
1647 ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) |
1648 ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) |
1649 ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT);
1650
1651 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
1652 InputsRead &= ~FRAG_BIT_WPOS;
1653 rs_tex_count += 4;
1654 ++tex_ip;
1655 ++fp_reg;
1656 }
1657
1658 if (InputsRead & FRAG_BIT_FOGC) {
1659 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_FOGC, _TNL_ATTRIB_FOG)) {
1660 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= (rs_tex_count << R500_RS_IP_TEX_PTR_S_SHIFT) |
1661 (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT) |
1662 (R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT) |
1663 (R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT);
1664
1665 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
1666 InputsRead &= ~FRAG_BIT_FOGC;
1667 rs_tex_count += 1;
1668 ++tex_ip;
1669 ++fp_reg;
1670 } else {
1671 WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n");
1672 }
1673 }
1674
1675 /* Setup default color if no color or tex was set */
1676 if (rs_tex_count == 0 && col_ip == 0) {
1677 r300->hw.rr.cmd[R300_RR_INST_0] |= R500_RS_INST_COL_ID(0) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(0) | R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
1678 ++col_ip;
1679 }
1680
1681 high_rr = (col_ip > tex_ip) ? col_ip : tex_ip;
1682 r300->hw.rc.cmd[1] |= (rs_tex_count << R300_IT_COUNT_SHIFT) | (col_ip << R300_IC_COUNT_SHIFT) | R300_HIRES_EN;
1683 r300->hw.rc.cmd[2] |= 0xC0 | (high_rr - 1);
1684
1685 r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R500_RS_INST_0, high_rr);
1686
1687 if (InputsRead)
1688 WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead);
1689 }
1690
1691
1692
1693
1694 #define bump_vpu_count(ptr, new_count) do{\
1695 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
1696 int _nc=(new_count)/4; \
1697 assert(_nc < 256); \
1698 if(_nc>_p->vpu.count)_p->vpu.count=_nc;\
1699 }while(0)
1700
1701 static INLINE void r300SetupVertexProgramFragment(r300ContextPtr r300, int dest, struct r300_vertex_shader_fragment *vsf)
1702 {
1703 int i;
1704
1705 if (vsf->length == 0)
1706 return;
1707
1708 if (vsf->length & 0x3) {
1709 fprintf(stderr, "VERTEX_SHADER_FRAGMENT must have length divisible by 4\n");
1710 _mesa_exit(-1);
1711 }
1712
1713 switch ((dest >> 8) & 0xf) {
1714 case 0:
1715 R300_STATECHANGE(r300, vpi);
1716 for (i = 0; i < vsf->length; i++)
1717 r300->hw.vpi.cmd[R300_VPI_INSTR_0 + i + 4 * (dest & 0xff)] = (vsf->body.d[i]);
1718 bump_vpu_count(r300->hw.vpi.cmd, vsf->length + 4 * (dest & 0xff));
1719 break;
1720
1721 case 2:
1722 R300_STATECHANGE(r300, vpp);
1723 for (i = 0; i < vsf->length; i++)
1724 r300->hw.vpp.cmd[R300_VPP_PARAM_0 + i + 4 * (dest & 0xff)] = (vsf->body.d[i]);
1725 bump_vpu_count(r300->hw.vpp.cmd, vsf->length + 4 * (dest & 0xff));
1726 break;
1727 case 4:
1728 R300_STATECHANGE(r300, vps);
1729 for (i = 0; i < vsf->length; i++)
1730 r300->hw.vps.cmd[1 + i + 4 * (dest & 0xff)] = (vsf->body.d[i]);
1731 bump_vpu_count(r300->hw.vps.cmd, vsf->length + 4 * (dest & 0xff));
1732 break;
1733 default:
1734 fprintf(stderr, "%s:%s don't know how to handle dest %04x\n", __FILE__, __FUNCTION__, dest);
1735 _mesa_exit(-1);
1736 }
1737 }
1738
1739 #define MIN3(a, b, c) ((a) < (b) ? MIN2(a, c) : MIN2(b, c))
1740
1741
1742 static void r300VapCntl(r300ContextPtr rmesa, GLuint input_count,
1743 GLuint output_count, GLuint temp_count)
1744 {
1745 int vtx_mem_size;
1746 int pvs_num_slots;
1747 int pvs_num_cntrls;
1748
1749 /* Flush PVS engine before changing PVS_NUM_SLOTS, PVS_NUM_CNTRLS.
1750 * See r500 docs 6.5.2 - done in emit */
1751
1752 /* avoid division by zero */
1753 if (input_count == 0) input_count = 1;
1754 if (output_count == 0) output_count = 1;
1755 if (temp_count == 0) temp_count = 1;
1756
1757 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
1758 vtx_mem_size = 128;
1759 else
1760 vtx_mem_size = 72;
1761
1762 pvs_num_slots = MIN3(10, vtx_mem_size/input_count, vtx_mem_size/output_count);
1763 pvs_num_cntrls = MIN2(6, vtx_mem_size/temp_count);
1764
1765 R300_STATECHANGE(rmesa, vap_cntl);
1766 if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
1767 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] =
1768 (pvs_num_slots << R300_PVS_NUM_SLOTS_SHIFT) |
1769 (pvs_num_cntrls << R300_PVS_NUM_CNTLRS_SHIFT) |
1770 (12 << R300_VF_MAX_VTX_NUM_SHIFT);
1771 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
1772 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= R500_TCL_STATE_OPTIMIZATION;
1773 } else
1774 /* not sure about non-tcl */
1775 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] = ((10 << R300_PVS_NUM_SLOTS_SHIFT) |
1776 (5 << R300_PVS_NUM_CNTLRS_SHIFT) |
1777 (5 << R300_VF_MAX_VTX_NUM_SHIFT));
1778
1779 if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV515)
1780 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (2 << R300_PVS_NUM_FPUS_SHIFT);
1781 else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV530) ||
1782 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV560) ||
1783 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV570))
1784 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (5 << R300_PVS_NUM_FPUS_SHIFT);
1785 else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV410) ||
1786 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R420))
1787 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (6 << R300_PVS_NUM_FPUS_SHIFT);
1788 else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R520) ||
1789 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R580))
1790 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (8 << R300_PVS_NUM_FPUS_SHIFT);
1791 else
1792 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (4 << R300_PVS_NUM_FPUS_SHIFT);
1793
1794 }
1795
1796 static void r300SetupDefaultVertexProgram(r300ContextPtr rmesa)
1797 {
1798 struct r300_vertex_shader_state *prog = &(rmesa->vertex_shader);
1799 GLuint o_reg = 0;
1800 GLuint i_reg = 0;
1801 int i;
1802 int inst_count = 0;
1803 int param_count = 0;
1804 int program_end = 0;
1805
1806 for (i = VERT_ATTRIB_POS; i < VERT_ATTRIB_MAX; i++) {
1807 if (rmesa->swtcl.sw_tcl_inputs[i] != -1) {
1808 prog->program.body.i[program_end + 0] = PVS_OP_DST_OPERAND(VE_MULTIPLY, GL_FALSE, GL_FALSE, o_reg++, VSF_FLAG_ALL, PVS_DST_REG_OUT);
1809 prog->program.body.i[program_end + 1] = PVS_SRC_OPERAND(rmesa->swtcl.sw_tcl_inputs[i], PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y, PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W, PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
1810 prog->program.body.i[program_end + 2] = PVS_SRC_OPERAND(rmesa->swtcl.sw_tcl_inputs[i], PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
1811 prog->program.body.i[program_end + 3] = PVS_SRC_OPERAND(rmesa->swtcl.sw_tcl_inputs[i], PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
1812 program_end += 4;
1813 i_reg++;
1814 }
1815 }
1816
1817 prog->program.length = program_end;
1818
1819 r300SetupVertexProgramFragment(rmesa, R300_PVS_CODE_START,
1820 &(prog->program));
1821 inst_count = (prog->program.length / 4) - 1;
1822
1823 r300VapCntl(rmesa, i_reg, o_reg, 0);
1824
1825 R300_STATECHANGE(rmesa, pvs);
1826 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1] =
1827 (0 << R300_PVS_FIRST_INST_SHIFT) |
1828 (inst_count << R300_PVS_XYZW_VALID_INST_SHIFT) |
1829 (inst_count << R300_PVS_LAST_INST_SHIFT);
1830 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] =
1831 (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) |
1832 (param_count << R300_PVS_MAX_CONST_ADDR_SHIFT);
1833 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3] =
1834 (inst_count << R300_PVS_LAST_VTX_SRC_INST_SHIFT);
1835 }
1836
1837 static int bit_count (int x)
1838 {
1839 x = ((x & 0xaaaaaaaaU) >> 1) + (x & 0x55555555U);
1840 x = ((x & 0xccccccccU) >> 2) + (x & 0x33333333U);
1841 x = (x >> 16) + (x & 0xffff);
1842 x = ((x & 0xf0f0) >> 4) + (x & 0x0f0f);
1843 return (x >> 8) + (x & 0x00ff);
1844 }
1845
1846 static void r300SetupRealVertexProgram(r300ContextPtr rmesa)
1847 {
1848 GLcontext *ctx = rmesa->radeon.glCtx;
1849 struct r300_vertex_program *prog = (struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx);
1850 int inst_count = 0;
1851 int param_count = 0;
1852
1853 /* FIXME: r300SetupVertexProgramFragment */
1854 R300_STATECHANGE(rmesa, vpp);
1855 param_count =
1856 r300VertexProgUpdateParams(ctx,
1857 (struct r300_vertex_program_cont *)
1858 ctx->VertexProgram._Current,
1859 (float *)&rmesa->hw.vpp.
1860 cmd[R300_VPP_PARAM_0]);
1861 bump_vpu_count(rmesa->hw.vpp.cmd, param_count);
1862 param_count /= 4;
1863
1864 r300SetupVertexProgramFragment(rmesa, R300_PVS_CODE_START, &(prog->program));
1865 inst_count = (prog->program.length / 4) - 1;
1866
1867 r300VapCntl(rmesa, bit_count(prog->key.InputsRead),
1868 bit_count(prog->key.OutputsWritten), prog->num_temporaries);
1869
1870 R300_STATECHANGE(rmesa, pvs);
1871 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1] =
1872 (0 << R300_PVS_FIRST_INST_SHIFT) |
1873 (inst_count << R300_PVS_XYZW_VALID_INST_SHIFT) |
1874 (inst_count << R300_PVS_LAST_INST_SHIFT);
1875 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] =
1876 (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) |
1877 (param_count << R300_PVS_MAX_CONST_ADDR_SHIFT);
1878 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3] =
1879 (inst_count << R300_PVS_LAST_VTX_SRC_INST_SHIFT);
1880 }
1881
1882
1883 static void r300SetupVertexProgram(r300ContextPtr rmesa)
1884 {
1885 GLcontext *ctx = rmesa->radeon.glCtx;
1886
1887 /* Reset state, in case we don't use something */
1888 ((drm_r300_cmd_header_t *) rmesa->hw.vpp.cmd)->vpu.count = 0;
1889 ((drm_r300_cmd_header_t *) rmesa->hw.vpi.cmd)->vpu.count = 0;
1890 ((drm_r300_cmd_header_t *) rmesa->hw.vps.cmd)->vpu.count = 0;
1891
1892 /* Not sure why this doesnt work...
1893 0x400 area might have something to do with pixel shaders as it appears right after pfs programming.
1894 0x406 is set to { 0.0, 0.0, 1.0, 0.0 } most of the time but should change with smooth points and in other rare cases. */
1895 //setup_vertex_shader_fragment(rmesa, 0x406, &unk4);
1896 if (hw_tcl_on && ((struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx))->translated) {
1897 r300SetupRealVertexProgram(rmesa);
1898 } else {
1899 /* FIXME: This needs to be replaced by vertex shader generation code. */
1900 r300SetupDefaultVertexProgram(rmesa);
1901 }
1902
1903 }
1904
1905 /**
1906 * Enable/Disable states.
1907 *
1908 * \note Mesa already filters redundant calls to this function.
1909 */
1910 static void r300Enable(GLcontext * ctx, GLenum cap, GLboolean state)
1911 {
1912 r300ContextPtr rmesa = R300_CONTEXT(ctx);
1913 if (RADEON_DEBUG & DEBUG_STATE)
1914 fprintf(stderr, "%s( %s = %s )\n", __FUNCTION__,
1915 _mesa_lookup_enum_by_nr(cap),
1916 state ? "GL_TRUE" : "GL_FALSE");
1917
1918 switch (cap) {
1919 case GL_TEXTURE_1D:
1920 case GL_TEXTURE_2D:
1921 case GL_TEXTURE_3D:
1922 /* empty */
1923 break;
1924 case GL_FOG:
1925 /* empty */
1926 break;
1927 case GL_ALPHA_TEST:
1928 r300SetAlphaState(ctx);
1929 break;
1930 case GL_COLOR_LOGIC_OP:
1931 r300SetLogicOpState(ctx);
1932 /* fall-through, because logic op overrides blending */
1933 case GL_BLEND:
1934 r300SetBlendState(ctx);
1935 break;
1936 case GL_CLIP_PLANE0:
1937 case GL_CLIP_PLANE1:
1938 case GL_CLIP_PLANE2:
1939 case GL_CLIP_PLANE3:
1940 case GL_CLIP_PLANE4:
1941 case GL_CLIP_PLANE5:
1942 r300SetClipPlaneState(ctx, cap, state);
1943 break;
1944 case GL_DEPTH_TEST:
1945 r300SetDepthState(ctx);
1946 break;
1947 case GL_STENCIL_TEST:
1948 r300SetStencilState(ctx, state);
1949 break;
1950 case GL_CULL_FACE:
1951 r300UpdateCulling(ctx);
1952 break;
1953 case GL_POLYGON_OFFSET_POINT:
1954 case GL_POLYGON_OFFSET_LINE:
1955 case GL_POLYGON_OFFSET_FILL:
1956 r300SetPolygonOffsetState(ctx, state);
1957 break;
1958 case GL_SCISSOR_TEST:
1959 radeon_firevertices(&rmesa->radeon);
1960 rmesa->radeon.state.scissor.enabled = state;
1961 radeonUpdateScissor( ctx );
1962 break;
1963 default:
1964 break;
1965 }
1966 }
1967
1968 /**
1969 * Completely recalculates hardware state based on the Mesa state.
1970 */
1971 static void r300ResetHwState(r300ContextPtr r300)
1972 {
1973 GLcontext *ctx = r300->radeon.glCtx;
1974 int has_tcl = 1;
1975
1976 if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
1977 has_tcl = 0;
1978
1979 if (RADEON_DEBUG & DEBUG_STATE)
1980 fprintf(stderr, "%s\n", __FUNCTION__);
1981
1982 radeon_firevertices(&r300->radeon);
1983
1984 r300ColorMask(ctx,
1985 ctx->Color.ColorMask[RCOMP],
1986 ctx->Color.ColorMask[GCOMP],
1987 ctx->Color.ColorMask[BCOMP], ctx->Color.ColorMask[ACOMP]);
1988
1989 r300Enable(ctx, GL_DEPTH_TEST, ctx->Depth.Test);
1990 r300DepthMask(ctx, ctx->Depth.Mask);
1991 r300DepthFunc(ctx, ctx->Depth.Func);
1992
1993 /* stencil */
1994 r300Enable(ctx, GL_STENCIL_TEST, ctx->Stencil._Enabled);
1995 r300StencilMaskSeparate(ctx, 0, ctx->Stencil.WriteMask[0]);
1996 r300StencilFuncSeparate(ctx, 0, ctx->Stencil.Function[0],
1997 ctx->Stencil.Ref[0], ctx->Stencil.ValueMask[0]);
1998 r300StencilOpSeparate(ctx, 0, ctx->Stencil.FailFunc[0],
1999 ctx->Stencil.ZFailFunc[0],
2000 ctx->Stencil.ZPassFunc[0]);
2001
2002 r300UpdateCulling(ctx);
2003
2004 r300SetBlendState(ctx);
2005 r300SetLogicOpState(ctx);
2006
2007 r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef);
2008 r300Enable(ctx, GL_ALPHA_TEST, ctx->Color.AlphaEnabled);
2009
2010 r300->hw.vte.cmd[1] = R300_VPORT_X_SCALE_ENA
2011 | R300_VPORT_X_OFFSET_ENA
2012 | R300_VPORT_Y_SCALE_ENA
2013 | R300_VPORT_Y_OFFSET_ENA
2014 | R300_VPORT_Z_SCALE_ENA
2015 | R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT;
2016 r300->hw.vte.cmd[2] = 0x00000008;
2017
2018 r300->hw.vap_vf_max_vtx_indx.cmd[1] = 0x00FFFFFF;
2019 r300->hw.vap_vf_max_vtx_indx.cmd[2] = 0x00000000;
2020
2021 #ifdef MESA_LITTLE_ENDIAN
2022 r300->hw.vap_cntl_status.cmd[1] = R300_VC_NO_SWAP;
2023 #else
2024 r300->hw.vap_cntl_status.cmd[1] = R300_VC_32BIT_SWAP;
2025 #endif
2026
2027 /* disable VAP/TCL on non-TCL capable chips */
2028 if (!has_tcl)
2029 r300->hw.vap_cntl_status.cmd[1] |= R300_VAP_TCL_BYPASS;
2030
2031 r300->hw.vap_psc_sgn_norm_cntl.cmd[1] = 0xAAAAAAAA;
2032
2033 /* XXX: Other families? */
2034 if (has_tcl) {
2035 r300->hw.vap_clip_cntl.cmd[1] = R300_PS_UCP_MODE_DIST_COP;
2036
2037 r300->hw.vap_clip.cmd[1] = r300PackFloat32(1.0); /* X */
2038 r300->hw.vap_clip.cmd[2] = r300PackFloat32(1.0); /* X */
2039 r300->hw.vap_clip.cmd[3] = r300PackFloat32(1.0); /* Y */
2040 r300->hw.vap_clip.cmd[4] = r300PackFloat32(1.0); /* Y */
2041
2042 switch (r300->radeon.radeonScreen->chip_family) {
2043 case CHIP_FAMILY_R300:
2044 r300->hw.vap_pvs_vtx_timeout_reg.cmd[1] = R300_2288_R300;
2045 break;
2046 default:
2047 r300->hw.vap_pvs_vtx_timeout_reg.cmd[1] = R300_2288_RV350;
2048 break;
2049 }
2050 }
2051
2052 r300->hw.gb_enable.cmd[1] = R300_GB_POINT_STUFF_ENABLE
2053 | R300_GB_LINE_STUFF_ENABLE
2054 | R300_GB_TRIANGLE_STUFF_ENABLE;
2055
2056 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_0] = 0x66666666;
2057 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_1] = 0x06666666;
2058
2059 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] =
2060 R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16 /*| R300_GB_SUBPIXEL_1_16*/;
2061 switch (r300->radeon.radeonScreen->num_gb_pipes) {
2062 case 1:
2063 default:
2064 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2065 R300_GB_TILE_PIPE_COUNT_RV300;
2066 break;
2067 case 2:
2068 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2069 R300_GB_TILE_PIPE_COUNT_R300;
2070 break;
2071 case 3:
2072 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2073 R300_GB_TILE_PIPE_COUNT_R420_3P;
2074 break;
2075 case 4:
2076 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2077 R300_GB_TILE_PIPE_COUNT_R420;
2078 break;
2079 }
2080
2081 /* XXX: Enable anti-aliasing? */
2082 r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = GB_AA_CONFIG_AA_DISABLE;
2083 r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = 0;
2084
2085 r300->hw.ga_point_s0.cmd[1] = r300PackFloat32(0.0);
2086 r300->hw.ga_point_s0.cmd[2] = r300PackFloat32(0.0);
2087 r300->hw.ga_point_s0.cmd[3] = r300PackFloat32(1.0);
2088 r300->hw.ga_point_s0.cmd[4] = r300PackFloat32(1.0);
2089
2090 r300->hw.ga_triangle_stipple.cmd[1] = 0x00050005;
2091
2092 r300PointSize(ctx, 1.0);
2093
2094 r300->hw.ga_point_minmax.cmd[1] = 0x18000006;
2095 r300->hw.ga_point_minmax.cmd[2] = 0x00020006;
2096 r300->hw.ga_point_minmax.cmd[3] = r300PackFloat32(1.0 / 192.0);
2097
2098 r300LineWidth(ctx, 1.0);
2099
2100 r300->hw.ga_line_stipple.cmd[1] = 0;
2101 r300->hw.ga_line_stipple.cmd[2] = r300PackFloat32(0.0);
2102 r300->hw.ga_line_stipple.cmd[3] = r300PackFloat32(1.0);
2103
2104 r300ShadeModel(ctx, ctx->Light.ShadeModel);
2105
2106 r300PolygonMode(ctx, GL_FRONT, ctx->Polygon.FrontMode);
2107 r300PolygonMode(ctx, GL_BACK, ctx->Polygon.BackMode);
2108 r300->hw.zbias_cntl.cmd[1] = 0x00000000;
2109
2110 r300PolygonOffset(ctx, ctx->Polygon.OffsetFactor,
2111 ctx->Polygon.OffsetUnits);
2112 r300Enable(ctx, GL_POLYGON_OFFSET_POINT, ctx->Polygon.OffsetPoint);
2113 r300Enable(ctx, GL_POLYGON_OFFSET_LINE, ctx->Polygon.OffsetLine);
2114 r300Enable(ctx, GL_POLYGON_OFFSET_FILL, ctx->Polygon.OffsetFill);
2115
2116 r300->hw.su_depth_scale.cmd[1] = 0x4B7FFFFF;
2117 r300->hw.su_depth_scale.cmd[2] = 0x00000000;
2118
2119 r300->hw.sc_hyperz.cmd[1] = 0x0000001C;
2120 r300->hw.sc_hyperz.cmd[2] = 0x2DA49525;
2121
2122 r300->hw.sc_screendoor.cmd[1] = 0x00FFFFFF;
2123
2124 r300->hw.us_out_fmt.cmd[1] = R500_OUT_FMT_C4_8 |
2125 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2126 r300->hw.us_out_fmt.cmd[2] = R500_OUT_FMT_UNUSED |
2127 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2128 r300->hw.us_out_fmt.cmd[3] = R500_OUT_FMT_UNUSED |
2129 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2130 r300->hw.us_out_fmt.cmd[4] = R500_OUT_FMT_UNUSED |
2131 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2132 r300->hw.us_out_fmt.cmd[5] = R300_W_FMT_W0 | R300_W_SRC_US;
2133
2134 /* disable fog unit */
2135 r300->hw.fogs.cmd[R300_FOGS_STATE] = 0;
2136 r300->hw.fg_depth_src.cmd[1] = R300_FG_DEPTH_SRC_SCAN;
2137
2138 r300->hw.rb3d_cctl.cmd[1] = 0;
2139
2140 r300BlendColor(ctx, ctx->Color.BlendColor);
2141
2142 r300->hw.rb3d_dither_ctl.cmd[1] = 0;
2143 r300->hw.rb3d_dither_ctl.cmd[2] = 0;
2144 r300->hw.rb3d_dither_ctl.cmd[3] = 0;
2145 r300->hw.rb3d_dither_ctl.cmd[4] = 0;
2146 r300->hw.rb3d_dither_ctl.cmd[5] = 0;
2147 r300->hw.rb3d_dither_ctl.cmd[6] = 0;
2148 r300->hw.rb3d_dither_ctl.cmd[7] = 0;
2149 r300->hw.rb3d_dither_ctl.cmd[8] = 0;
2150 r300->hw.rb3d_dither_ctl.cmd[9] = 0;
2151
2152 r300->hw.rb3d_aaresolve_ctl.cmd[1] = 0;
2153
2154 r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[1] = 0x00000000;
2155 r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[2] = 0xffffffff;
2156
2157 r300->hw.zb_depthclearvalue.cmd[1] = 0;
2158
2159 r300->hw.zstencil_format.cmd[2] = R300_ZTOP_DISABLE;
2160 r300->hw.zstencil_format.cmd[3] = 0x00000003;
2161 r300->hw.zstencil_format.cmd[4] = 0x00000000;
2162 r300SetEarlyZState(ctx);
2163
2164 r300->hw.zb_zmask.cmd[1] = 0;
2165 r300->hw.zb_zmask.cmd[2] = 0;
2166
2167 r300->hw.zb_hiz_offset.cmd[1] = 0;
2168
2169 r300->hw.zb_hiz_pitch.cmd[1] = 0;
2170
2171 r300VapCntl(r300, 0, 0, 0);
2172 if (has_tcl) {
2173 r300->hw.vps.cmd[R300_VPS_ZERO_0] = 0;
2174 r300->hw.vps.cmd[R300_VPS_ZERO_1] = 0;
2175 r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
2176 r300->hw.vps.cmd[R300_VPS_ZERO_3] = 0;
2177 }
2178
2179 r300->radeon.hw.all_dirty = GL_TRUE;
2180 }
2181
2182 void r300UpdateShaders(r300ContextPtr rmesa)
2183 {
2184 GLcontext *ctx;
2185 struct r300_vertex_program *vp;
2186 int i;
2187
2188 ctx = rmesa->radeon.glCtx;
2189
2190 if (rmesa->radeon.NewGLState && hw_tcl_on) {
2191 rmesa->radeon.NewGLState = 0;
2192
2193 for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) {
2194 rmesa->temp_attrib[i] =
2195 TNL_CONTEXT(ctx)->vb.AttribPtr[i];
2196 TNL_CONTEXT(ctx)->vb.AttribPtr[i] =
2197 &rmesa->dummy_attrib[i];
2198 }
2199
2200 _tnl_UpdateFixedFunctionProgram(ctx);
2201
2202 for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) {
2203 TNL_CONTEXT(ctx)->vb.AttribPtr[i] =
2204 rmesa->temp_attrib[i];
2205 }
2206
2207 r300SelectVertexShader(rmesa);
2208 vp = (struct r300_vertex_program *)
2209 CURRENT_VERTEX_SHADER(ctx);
2210 /*if (vp->translated == GL_FALSE)
2211 r300TranslateVertexShader(vp); */
2212 if (vp->translated == GL_FALSE) {
2213 fprintf(stderr, "Failing back to sw-tcl\n");
2214 hw_tcl_on = future_hw_tcl_on = 0;
2215 r300ResetHwState(rmesa);
2216
2217 r300UpdateStateParameters(ctx, _NEW_PROGRAM |
2218 _NEW_PROGRAM_CONSTANTS);
2219 return;
2220 }
2221 }
2222 r300UpdateStateParameters(ctx, _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS);
2223 }
2224
2225 static const GLfloat *get_fragmentprogram_constant(GLcontext *ctx,
2226 struct gl_program *program, struct prog_src_register srcreg)
2227 {
2228 static const GLfloat dummy[4] = { 0, 0, 0, 0 };
2229
2230 switch(srcreg.File) {
2231 case PROGRAM_LOCAL_PARAM:
2232 return program->LocalParams[srcreg.Index];
2233 case PROGRAM_ENV_PARAM:
2234 return ctx->FragmentProgram.Parameters[srcreg.Index];
2235 case PROGRAM_STATE_VAR:
2236 case PROGRAM_NAMED_PARAM:
2237 case PROGRAM_CONSTANT:
2238 return program->Parameters->ParameterValues[srcreg.Index];
2239 default:
2240 _mesa_problem(ctx, "get_fragmentprogram_constant: Unknown\n");
2241 return dummy;
2242 }
2243 }
2244
2245
2246 static GLboolean r300SetupPixelShader(GLcontext *ctx)
2247 {
2248 r300ContextPtr rmesa = R300_CONTEXT(ctx);
2249 struct r300_fragment_program *fp = (struct r300_fragment_program *) ctx->FragmentProgram._Current;
2250 struct r300_fragment_program_code *code;
2251 int i, k;
2252
2253 /* Program is not native, fallback to software */
2254 if (fp->error)
2255 return GL_FALSE;
2256
2257 code = &fp->code.r300;
2258
2259 r300SetupTextures(ctx);
2260
2261 R300_STATECHANGE(rmesa, fpi[0]);
2262 R300_STATECHANGE(rmesa, fpi[1]);
2263 R300_STATECHANGE(rmesa, fpi[2]);
2264 R300_STATECHANGE(rmesa, fpi[3]);
2265 rmesa->hw.fpi[0].cmd[R300_FPI_CMD_0] = cmdpacket0(rmesa->radeon.radeonScreen, R300_US_ALU_RGB_INST_0, code->alu.length);
2266 rmesa->hw.fpi[1].cmd[R300_FPI_CMD_0] = cmdpacket0(rmesa->radeon.radeonScreen, R300_US_ALU_RGB_ADDR_0, code->alu.length);
2267 rmesa->hw.fpi[2].cmd[R300_FPI_CMD_0] = cmdpacket0(rmesa->radeon.radeonScreen, R300_US_ALU_ALPHA_INST_0, code->alu.length);
2268 rmesa->hw.fpi[3].cmd[R300_FPI_CMD_0] = cmdpacket0(rmesa->radeon.radeonScreen, R300_US_ALU_ALPHA_ADDR_0, code->alu.length);
2269 for (i = 0; i < code->alu.length; i++) {
2270 rmesa->hw.fpi[0].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst0;
2271 rmesa->hw.fpi[1].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst1;
2272 rmesa->hw.fpi[2].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst2;
2273 rmesa->hw.fpi[3].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst3;
2274 }
2275
2276 R300_STATECHANGE(rmesa, fp);
2277 rmesa->hw.fp.cmd[R300_FP_CNTL0] = code->cur_node | (code->first_node_has_tex << 3);
2278 rmesa->hw.fp.cmd[R300_FP_CNTL1] = code->max_temp_idx;
2279 rmesa->hw.fp.cmd[R300_FP_CNTL2] =
2280 (0 << R300_PFS_CNTL_ALU_OFFSET_SHIFT) |
2281 ((code->alu.length-1) << R300_PFS_CNTL_ALU_END_SHIFT) |
2282 (0 << R300_PFS_CNTL_TEX_OFFSET_SHIFT) |
2283 ((code->tex.length ? code->tex.length-1 : 0) << R300_PFS_CNTL_TEX_END_SHIFT);
2284 /* I just want to say, the way these nodes are stored.. weird.. */
2285 for (i = 0, k = (4 - (code->cur_node + 1)); i < 4; i++, k++) {
2286 if (i < (code->cur_node + 1)) {
2287 rmesa->hw.fp.cmd[R300_FP_NODE0 + k] =
2288 (code->node[i].alu_offset << R300_ALU_START_SHIFT) |
2289 (code->node[i].alu_end << R300_ALU_SIZE_SHIFT) |
2290 (code->node[i].tex_offset << R300_TEX_START_SHIFT) |
2291 (code->node[i].tex_end << R300_TEX_SIZE_SHIFT) |
2292 code->node[i].flags;
2293 } else {
2294 rmesa->hw.fp.cmd[R300_FP_NODE0 + (3 - i)] = 0;
2295 }
2296 }
2297
2298 R300_STATECHANGE(rmesa, fpp);
2299 rmesa->hw.fpp.cmd[R300_FPP_CMD_0] = cmdpacket0(rmesa->radeon.radeonScreen, R300_PFS_PARAM_0_X, code->const_nr * 4);
2300 for (i = 0; i < code->const_nr; i++) {
2301 const GLfloat *constant = get_fragmentprogram_constant(ctx,
2302 &fp->Base.Base, code->constant[i]);
2303 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat24(constant[0]);
2304 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat24(constant[1]);
2305 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat24(constant[2]);
2306 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat24(constant[3]);
2307 }
2308
2309 return GL_TRUE;
2310 }
2311
2312 #define bump_r500fp_count(ptr, new_count) do{\
2313 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
2314 int _nc=(new_count)/6; \
2315 assert(_nc < 256); \
2316 if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
2317 } while(0)
2318
2319 #define bump_r500fp_const_count(ptr, new_count) do{\
2320 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
2321 int _nc=(new_count)/4; \
2322 assert(_nc < 256); \
2323 if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
2324 } while(0)
2325
2326 static GLboolean r500SetupPixelShader(GLcontext *ctx)
2327 {
2328 r300ContextPtr rmesa = R300_CONTEXT(ctx);
2329 struct r300_fragment_program *fp = (struct r300_fragment_program *) ctx->FragmentProgram._Current;
2330 int i;
2331 struct r500_fragment_program_code *code;
2332
2333 ((drm_r300_cmd_header_t *) rmesa->hw.r500fp.cmd)->r500fp.count = 0;
2334 ((drm_r300_cmd_header_t *) rmesa->hw.r500fp_const.cmd)->r500fp.count = 0;
2335
2336 /* Program is not native, fallback to software */
2337 if (fp->error)
2338 return GL_FALSE;
2339
2340 code = &fp->code.r500;
2341
2342 r300SetupTextures(ctx);
2343
2344 R300_STATECHANGE(rmesa, fp);
2345 rmesa->hw.fp.cmd[R500_FP_PIXSIZE] = code->max_temp_idx;
2346
2347 rmesa->hw.fp.cmd[R500_FP_CODE_ADDR] =
2348 R500_US_CODE_START_ADDR(code->inst_offset) |
2349 R500_US_CODE_END_ADDR(code->inst_end);
2350 rmesa->hw.fp.cmd[R500_FP_CODE_RANGE] =
2351 R500_US_CODE_RANGE_ADDR(code->inst_offset) |
2352 R500_US_CODE_RANGE_SIZE(code->inst_end);
2353 rmesa->hw.fp.cmd[R500_FP_CODE_OFFSET] =
2354 R500_US_CODE_OFFSET_ADDR(0); /* FIXME when we add flow control */
2355
2356 R300_STATECHANGE(rmesa, r500fp);
2357 /* Emit our shader... */
2358 for (i = 0; i < code->inst_end+1; i++) {
2359 rmesa->hw.r500fp.cmd[i*6+1] = code->inst[i].inst0;
2360 rmesa->hw.r500fp.cmd[i*6+2] = code->inst[i].inst1;
2361 rmesa->hw.r500fp.cmd[i*6+3] = code->inst[i].inst2;
2362 rmesa->hw.r500fp.cmd[i*6+4] = code->inst[i].inst3;
2363 rmesa->hw.r500fp.cmd[i*6+5] = code->inst[i].inst4;
2364 rmesa->hw.r500fp.cmd[i*6+6] = code->inst[i].inst5;
2365 }
2366
2367 bump_r500fp_count(rmesa->hw.r500fp.cmd, (code->inst_end + 1) * 6);
2368
2369 R300_STATECHANGE(rmesa, r500fp_const);
2370 for (i = 0; i < code->const_nr; i++) {
2371 const GLfloat *constant = get_fragmentprogram_constant(ctx,
2372 &fp->Base.Base, code->constant[i]);
2373 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat32(constant[0]);
2374 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat32(constant[1]);
2375 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat32(constant[2]);
2376 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat32(constant[3]);
2377 }
2378 bump_r500fp_const_count(rmesa->hw.r500fp_const.cmd, code->const_nr * 4);
2379
2380 return GL_TRUE;
2381 }
2382
2383 void r300UpdateShaderStates(r300ContextPtr rmesa)
2384 {
2385 GLcontext *ctx;
2386 ctx = rmesa->radeon.glCtx;
2387
2388 /* should only happenen once, just after context is created */
2389 if (!ctx->FragmentProgram._Current)
2390 return;
2391
2392 r300SetEarlyZState(ctx);
2393
2394 /* w_fmt value is set to get best performance
2395 * see p.130 R5xx 3D acceleration guide v1.3 */
2396 GLuint w_fmt, fgdepthsrc;
2397 if (current_fragment_program_writes_depth(ctx)) {
2398 fgdepthsrc = R300_FG_DEPTH_SRC_SHADER;
2399 w_fmt = R300_W_FMT_W24 | R300_W_SRC_US;
2400 } else {
2401 fgdepthsrc = R300_FG_DEPTH_SRC_SCAN;
2402 w_fmt = R300_W_FMT_W0 | R300_W_SRC_US;
2403 }
2404
2405 if (w_fmt != rmesa->hw.us_out_fmt.cmd[5]) {
2406 R300_STATECHANGE(rmesa, us_out_fmt);
2407 rmesa->hw.us_out_fmt.cmd[5] = w_fmt;
2408 }
2409
2410 if (fgdepthsrc != rmesa->hw.fg_depth_src.cmd[1]) {
2411 R300_STATECHANGE(rmesa, fg_depth_src);
2412 rmesa->hw.fg_depth_src.cmd[1] = fgdepthsrc;
2413 }
2414
2415 r300TranslateFragmentShader(ctx, ctx->FragmentProgram._Current);
2416
2417 if (!rmesa->vtbl.SetupPixelShader(ctx))
2418 return;
2419
2420 rmesa->vtbl.SetupRSUnit(ctx);
2421
2422 if ((rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
2423 r300SetupVertexProgram(rmesa);
2424 }
2425
2426 /**
2427 * Called by Mesa after an internal state update.
2428 */
2429 static void r300InvalidateState(GLcontext * ctx, GLuint new_state)
2430 {
2431 r300ContextPtr r300 = R300_CONTEXT(ctx);
2432
2433 _swrast_InvalidateState(ctx, new_state);
2434 _swsetup_InvalidateState(ctx, new_state);
2435 _vbo_InvalidateState(ctx, new_state);
2436 _tnl_InvalidateState(ctx, new_state);
2437
2438 if (new_state & _NEW_BUFFERS) {
2439 _mesa_update_framebuffer(ctx);
2440 /* this updates the DrawBuffer's Width/Height if it's a FBO */
2441 _mesa_update_draw_buffer_bounds(ctx);
2442
2443 R300_STATECHANGE(r300, cb);
2444 }
2445
2446 r300UpdateStateParameters(ctx, new_state);
2447
2448 r300->radeon.NewGLState |= new_state;
2449 }
2450
2451 /**
2452 * Calculate initial hardware state and register state functions.
2453 * Assumes that the command buffer and state atoms have been
2454 * initialized already.
2455 */
2456 void r300InitState(r300ContextPtr r300)
2457 {
2458 r300ResetHwState(r300);
2459 }
2460
2461 static void r300RenderMode(GLcontext * ctx, GLenum mode)
2462 {
2463 r300ContextPtr rmesa = R300_CONTEXT(ctx);
2464 (void)rmesa;
2465 (void)mode;
2466 }
2467
2468 /**
2469 * Initialize driver's state callback functions
2470 */
2471 void r300InitStateFuncs(struct dd_function_table *functions)
2472 {
2473
2474 functions->UpdateState = r300InvalidateState;
2475 functions->AlphaFunc = r300AlphaFunc;
2476 functions->BlendColor = r300BlendColor;
2477 functions->BlendEquationSeparate = r300BlendEquationSeparate;
2478 functions->BlendFuncSeparate = r300BlendFuncSeparate;
2479 functions->Enable = r300Enable;
2480 functions->ColorMask = r300ColorMask;
2481 functions->DepthFunc = r300DepthFunc;
2482 functions->DepthMask = r300DepthMask;
2483 functions->CullFace = r300CullFace;
2484 functions->FrontFace = r300FrontFace;
2485 functions->ShadeModel = r300ShadeModel;
2486 functions->LogicOpcode = r300LogicOpcode;
2487
2488 /* ARB_point_parameters */
2489 functions->PointParameterfv = r300PointParameter;
2490
2491 /* Stencil related */
2492 functions->StencilFuncSeparate = r300StencilFuncSeparate;
2493 functions->StencilMaskSeparate = r300StencilMaskSeparate;
2494 functions->StencilOpSeparate = r300StencilOpSeparate;
2495
2496 /* Viewport related */
2497 functions->Viewport = r300Viewport;
2498 functions->DepthRange = r300DepthRange;
2499 functions->PointSize = r300PointSize;
2500 functions->LineWidth = r300LineWidth;
2501
2502 functions->PolygonOffset = r300PolygonOffset;
2503 functions->PolygonMode = r300PolygonMode;
2504
2505 functions->RenderMode = r300RenderMode;
2506
2507 functions->ClipPlane = r300ClipPlane;
2508 functions->Scissor = radeonScissor;
2509
2510 functions->DrawBuffer = radeonDrawBuffer;
2511 functions->ReadBuffer = radeonReadBuffer;
2512 }
2513
2514 void r300InitShaderFunctions(r300ContextPtr r300)
2515 {
2516 if (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
2517 r300->vtbl.SetupRSUnit = r500SetupRSUnit;
2518 r300->vtbl.SetupPixelShader = r500SetupPixelShader;
2519 r300->vtbl.SetupFragmentShaderTextures = r500SetupFragmentShaderTextures;
2520 r300->vtbl.FragmentProgramEmit = r500FragmentProgramEmit;
2521 r300->vtbl.FragmentProgramDump = r500FragmentProgramDump;
2522 } else {
2523 r300->vtbl.SetupRSUnit = r300SetupRSUnit;
2524 r300->vtbl.SetupPixelShader = r300SetupPixelShader;
2525 r300->vtbl.SetupFragmentShaderTextures = r300SetupFragmentShaderTextures;
2526 r300->vtbl.FragmentProgramEmit = r300FragmentProgramEmit;
2527 r300->vtbl.FragmentProgramDump = r300FragmentProgramDump;
2528 }
2529 }