2 Copyright (C) The Weather Channel, Inc. 2002.
3 Copyright (C) 2004 Nicolai Haehnle.
6 The Weather Channel (TM) funded Tungsten Graphics to develop the
7 initial release of the Radeon 8500 driver under the XFree86 license.
8 This notice must be preserved.
10 Permission is hereby granted, free of charge, to any person obtaining
11 a copy of this software and associated documentation files (the
12 "Software"), to deal in the Software without restriction, including
13 without limitation the rights to use, copy, modify, merge, publish,
14 distribute, sublicense, and/or sell copies of the Software, and to
15 permit persons to whom the Software is furnished to do so, subject to
16 the following conditions:
18 The above copyright notice and this permission notice (including the
19 next paragraph) shall be included in all copies or substantial
20 portions of the Software.
22 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
25 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
26 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
27 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
28 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 **************************************************************************/
35 * \author Nicolai Haehnle <prefect_@gmx.net>
38 #include "main/glheader.h"
39 #include "main/state.h"
40 #include "main/imports.h"
41 #include "main/enums.h"
42 #include "main/macros.h"
43 #include "main/context.h"
45 #include "main/simple_list.h"
46 #include "main/api_arrayelt.h"
47 #include "main/texformat.h"
49 #include "swrast/swrast.h"
50 #include "swrast_setup/swrast_setup.h"
51 #include "shader/prog_parameter.h"
52 #include "shader/prog_statevars.h"
56 #include "r300_context.h"
57 #include "r300_ioctl.h"
58 #include "r300_state.h"
60 #include "r300_emit.h"
61 #include "r300_fragprog.h"
64 #include "drirenderbuffer.h"
66 extern int future_hw_tcl_on
;
67 extern void _tnl_UpdateFixedFunctionProgram(GLcontext
* ctx
);
69 static void r300BlendColor(GLcontext
* ctx
, const GLfloat cf
[4])
71 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
73 R300_STATECHANGE(rmesa
, blend_color
);
75 if (rmesa
->radeon
.radeonScreen
->chip_family
>= CHIP_FAMILY_RV515
) {
76 GLuint r
= IROUND(cf
[0]*1023.0f
);
77 GLuint g
= IROUND(cf
[1]*1023.0f
);
78 GLuint b
= IROUND(cf
[2]*1023.0f
);
79 GLuint a
= IROUND(cf
[3]*1023.0f
);
81 rmesa
->hw
.blend_color
.cmd
[1] = r
| (a
<< 16);
82 rmesa
->hw
.blend_color
.cmd
[2] = b
| (g
<< 16);
85 CLAMPED_FLOAT_TO_UBYTE(color
[0], cf
[0]);
86 CLAMPED_FLOAT_TO_UBYTE(color
[1], cf
[1]);
87 CLAMPED_FLOAT_TO_UBYTE(color
[2], cf
[2]);
88 CLAMPED_FLOAT_TO_UBYTE(color
[3], cf
[3]);
90 rmesa
->hw
.blend_color
.cmd
[1] = PACK_COLOR_8888(color
[3], color
[0],
96 * Calculate the hardware blend factor setting. This same function is used
97 * for source and destination of both alpha and RGB.
100 * The hardware register value for the specified blend factor. This value
101 * will need to be shifted into the correct position for either source or
102 * destination factor.
105 * Since the two cases where source and destination are handled differently
106 * are essentially error cases, they should never happen. Determine if these
107 * cases can be removed.
109 static int blend_factor(GLenum factor
, GLboolean is_src
)
113 return R300_BLEND_GL_ZERO
;
116 return R300_BLEND_GL_ONE
;
119 return R300_BLEND_GL_DST_COLOR
;
121 case GL_ONE_MINUS_DST_COLOR
:
122 return R300_BLEND_GL_ONE_MINUS_DST_COLOR
;
125 return R300_BLEND_GL_SRC_COLOR
;
127 case GL_ONE_MINUS_SRC_COLOR
:
128 return R300_BLEND_GL_ONE_MINUS_SRC_COLOR
;
131 return R300_BLEND_GL_SRC_ALPHA
;
133 case GL_ONE_MINUS_SRC_ALPHA
:
134 return R300_BLEND_GL_ONE_MINUS_SRC_ALPHA
;
137 return R300_BLEND_GL_DST_ALPHA
;
139 case GL_ONE_MINUS_DST_ALPHA
:
140 return R300_BLEND_GL_ONE_MINUS_DST_ALPHA
;
142 case GL_SRC_ALPHA_SATURATE
:
143 return (is_src
) ? R300_BLEND_GL_SRC_ALPHA_SATURATE
:
146 case GL_CONSTANT_COLOR
:
147 return R300_BLEND_GL_CONST_COLOR
;
149 case GL_ONE_MINUS_CONSTANT_COLOR
:
150 return R300_BLEND_GL_ONE_MINUS_CONST_COLOR
;
152 case GL_CONSTANT_ALPHA
:
153 return R300_BLEND_GL_CONST_ALPHA
;
155 case GL_ONE_MINUS_CONSTANT_ALPHA
:
156 return R300_BLEND_GL_ONE_MINUS_CONST_ALPHA
;
159 fprintf(stderr
, "unknown blend factor %x\n", factor
);
160 return (is_src
) ? R300_BLEND_GL_ONE
: R300_BLEND_GL_ZERO
;
166 * Sets both the blend equation and the blend function.
167 * This is done in a single
168 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
169 * change the interpretation of the blend function.
170 * Also, make sure that blend function and blend equation are set to their
171 * default value if color blending is not enabled, since at least blend
172 * equations GL_MIN and GL_FUNC_REVERSE_SUBTRACT will cause wrong results
173 * otherwise for unknown reasons.
176 /* helper function */
177 static void r300SetBlendCntl(r300ContextPtr r300
, int func
, int eqn
,
178 int cbits
, int funcA
, int eqnA
)
180 GLuint new_ablend
, new_cblend
;
184 "eqnA=%08x funcA=%08x eqn=%08x func=%08x cbits=%08x\n",
185 eqnA
, funcA
, eqn
, func
, cbits
);
187 new_ablend
= eqnA
| funcA
;
188 new_cblend
= eqn
| func
;
190 /* Some blend factor combinations don't seem to work when the
191 * BLEND_NO_SEPARATE bit is set.
193 * Especially problematic candidates are the ONE_MINUS_* flags,
194 * but I can't see a real pattern.
197 if (new_ablend
== new_cblend
) {
198 new_cblend
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0
;
203 if ((new_ablend
!= r300
->hw
.bld
.cmd
[R300_BLD_ABLEND
]) ||
204 (new_cblend
!= r300
->hw
.bld
.cmd
[R300_BLD_CBLEND
])) {
205 R300_STATECHANGE(r300
, bld
);
206 r300
->hw
.bld
.cmd
[R300_BLD_ABLEND
] = new_ablend
;
207 r300
->hw
.bld
.cmd
[R300_BLD_CBLEND
] = new_cblend
;
211 static void r300SetBlendState(GLcontext
* ctx
)
213 r300ContextPtr r300
= R300_CONTEXT(ctx
);
214 int func
= (R300_BLEND_GL_ONE
<< R300_SRC_BLEND_SHIFT
) |
215 (R300_BLEND_GL_ZERO
<< R300_DST_BLEND_SHIFT
);
216 int eqn
= R300_COMB_FCN_ADD_CLAMP
;
217 int funcA
= (R300_BLEND_GL_ONE
<< R300_SRC_BLEND_SHIFT
) |
218 (R300_BLEND_GL_ZERO
<< R300_DST_BLEND_SHIFT
);
219 int eqnA
= R300_COMB_FCN_ADD_CLAMP
;
221 if (RGBA_LOGICOP_ENABLED(ctx
) || !ctx
->Color
.BlendEnabled
) {
222 r300SetBlendCntl(r300
, func
, eqn
, 0, func
, eqn
);
227 (blend_factor(ctx
->Color
.BlendSrcRGB
, GL_TRUE
) <<
228 R300_SRC_BLEND_SHIFT
) | (blend_factor(ctx
->Color
.BlendDstRGB
,
230 R300_DST_BLEND_SHIFT
);
232 switch (ctx
->Color
.BlendEquationRGB
) {
234 eqn
= R300_COMB_FCN_ADD_CLAMP
;
237 case GL_FUNC_SUBTRACT
:
238 eqn
= R300_COMB_FCN_SUB_CLAMP
;
241 case GL_FUNC_REVERSE_SUBTRACT
:
242 eqn
= R300_COMB_FCN_RSUB_CLAMP
;
246 eqn
= R300_COMB_FCN_MIN
;
247 func
= (R300_BLEND_GL_ONE
<< R300_SRC_BLEND_SHIFT
) |
248 (R300_BLEND_GL_ONE
<< R300_DST_BLEND_SHIFT
);
252 eqn
= R300_COMB_FCN_MAX
;
253 func
= (R300_BLEND_GL_ONE
<< R300_SRC_BLEND_SHIFT
) |
254 (R300_BLEND_GL_ONE
<< R300_DST_BLEND_SHIFT
);
259 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
260 __FUNCTION__
, __LINE__
, ctx
->Color
.BlendEquationRGB
);
265 (blend_factor(ctx
->Color
.BlendSrcA
, GL_TRUE
) <<
266 R300_SRC_BLEND_SHIFT
) | (blend_factor(ctx
->Color
.BlendDstA
,
268 R300_DST_BLEND_SHIFT
);
270 switch (ctx
->Color
.BlendEquationA
) {
272 eqnA
= R300_COMB_FCN_ADD_CLAMP
;
275 case GL_FUNC_SUBTRACT
:
276 eqnA
= R300_COMB_FCN_SUB_CLAMP
;
279 case GL_FUNC_REVERSE_SUBTRACT
:
280 eqnA
= R300_COMB_FCN_RSUB_CLAMP
;
284 eqnA
= R300_COMB_FCN_MIN
;
285 funcA
= (R300_BLEND_GL_ONE
<< R300_SRC_BLEND_SHIFT
) |
286 (R300_BLEND_GL_ONE
<< R300_DST_BLEND_SHIFT
);
290 eqnA
= R300_COMB_FCN_MAX
;
291 funcA
= (R300_BLEND_GL_ONE
<< R300_SRC_BLEND_SHIFT
) |
292 (R300_BLEND_GL_ONE
<< R300_DST_BLEND_SHIFT
);
297 "[%s:%u] Invalid A blend equation (0x%04x).\n",
298 __FUNCTION__
, __LINE__
, ctx
->Color
.BlendEquationA
);
302 r300SetBlendCntl(r300
,
304 (R300_SEPARATE_ALPHA_ENABLE
|
306 R300_ALPHA_BLEND_ENABLE
), funcA
, eqnA
);
309 static void r300BlendEquationSeparate(GLcontext
* ctx
,
310 GLenum modeRGB
, GLenum modeA
)
312 r300SetBlendState(ctx
);
315 static void r300BlendFuncSeparate(GLcontext
* ctx
,
316 GLenum sfactorRGB
, GLenum dfactorRGB
,
317 GLenum sfactorA
, GLenum dfactorA
)
319 r300SetBlendState(ctx
);
323 * Translate LogicOp enums into hardware representation.
324 * Both use a very logical bit-wise layout, but unfortunately the order
325 * of bits is reversed.
327 static GLuint
translate_logicop(GLenum logicop
)
329 GLuint bits
= logicop
- GL_CLEAR
;
330 bits
= ((bits
& 1) << 3) | ((bits
& 2) << 1) | ((bits
& 4) >> 1) | ((bits
& 8) >> 3);
331 return bits
<< R300_RB3D_ROPCNTL_ROP_SHIFT
;
335 * Used internally to update the r300->hw hardware state to match the
336 * current OpenGL state.
338 static void r300SetLogicOpState(GLcontext
*ctx
)
340 r300ContextPtr r300
= R300_CONTEXT(ctx
);
341 R300_STATECHANGE(r300
, rop
);
342 if (RGBA_LOGICOP_ENABLED(ctx
)) {
343 r300
->hw
.rop
.cmd
[1] = R300_RB3D_ROPCNTL_ROP_ENABLE
|
344 translate_logicop(ctx
->Color
.LogicOp
);
346 r300
->hw
.rop
.cmd
[1] = 0;
351 * Called by Mesa when an application program changes the LogicOp state
354 static void r300LogicOpcode(GLcontext
*ctx
, GLenum logicop
)
356 if (RGBA_LOGICOP_ENABLED(ctx
))
357 r300SetLogicOpState(ctx
);
360 static void r300ClipPlane( GLcontext
*ctx
, GLenum plane
, const GLfloat
*eq
)
362 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
366 /* no VAP UCP on non-TCL chipsets */
367 if (!(rmesa
->radeon
.radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
))
370 p
= (GLint
) plane
- (GLint
) GL_CLIP_PLANE0
;
371 ip
= (GLint
*)ctx
->Transform
._ClipUserPlane
[p
];
373 R300_STATECHANGE( rmesa
, vpucp
[p
] );
374 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_X
] = ip
[0];
375 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_Y
] = ip
[1];
376 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_Z
] = ip
[2];
377 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_W
] = ip
[3];
380 static void r300SetClipPlaneState(GLcontext
* ctx
, GLenum cap
, GLboolean state
)
382 r300ContextPtr r300
= R300_CONTEXT(ctx
);
385 /* no VAP UCP on non-TCL chipsets */
386 if (!(r300
->radeon
.radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
))
389 p
= cap
- GL_CLIP_PLANE0
;
390 R300_STATECHANGE(r300
, vap_clip_cntl
);
392 r300
->hw
.vap_clip_cntl
.cmd
[1] |= (R300_VAP_UCP_ENABLE_0
<< p
);
393 r300ClipPlane(ctx
, cap
, NULL
);
395 r300
->hw
.vap_clip_cntl
.cmd
[1] &= ~(R300_VAP_UCP_ENABLE_0
<< p
);
400 * Update our tracked culling state based on Mesa's state.
402 static void r300UpdateCulling(GLcontext
* ctx
)
404 r300ContextPtr r300
= R300_CONTEXT(ctx
);
407 if (ctx
->Polygon
.CullFlag
) {
408 switch (ctx
->Polygon
.CullFaceMode
) {
410 val
= R300_CULL_FRONT
;
413 val
= R300_CULL_BACK
;
415 case GL_FRONT_AND_BACK
:
416 val
= R300_CULL_FRONT
| R300_CULL_BACK
;
423 switch (ctx
->Polygon
.FrontFace
) {
425 val
|= R300_FRONT_FACE_CW
;
428 val
|= R300_FRONT_FACE_CCW
;
434 R300_STATECHANGE(r300
, cul
);
435 r300
->hw
.cul
.cmd
[R300_CUL_CULL
] = val
;
438 static void r300SetPolygonOffsetState(GLcontext
* ctx
, GLboolean state
)
440 r300ContextPtr r300
= R300_CONTEXT(ctx
);
442 R300_STATECHANGE(r300
, occlusion_cntl
);
444 r300
->hw
.occlusion_cntl
.cmd
[1] |= (3 << 0);
446 r300
->hw
.occlusion_cntl
.cmd
[1] &= ~(3 << 0);
450 static GLboolean
current_fragment_program_writes_depth(GLcontext
* ctx
)
452 r300ContextPtr r300
= R300_CONTEXT(ctx
);
454 if (r300
->radeon
.radeonScreen
->chip_family
< CHIP_FAMILY_RV515
) {
455 struct r300_fragment_program
*fp
= (struct r300_fragment_program
*)
456 (char *)ctx
->FragmentProgram
._Current
;
457 return (fp
&& fp
->WritesDepth
);
459 struct r500_fragment_program
* fp
=
460 (struct r500_fragment_program
*)(char*)
461 ctx
->FragmentProgram
._Current
;
462 return (fp
&& fp
->writes_depth
);
466 static void r300SetEarlyZState(GLcontext
* ctx
)
468 r300ContextPtr r300
= R300_CONTEXT(ctx
);
469 GLuint topZ
= R300_ZTOP_ENABLE
;
471 if (ctx
->Color
.AlphaEnabled
&& ctx
->Color
.AlphaFunc
!= GL_ALWAYS
)
472 topZ
= R300_ZTOP_DISABLE
;
473 if (current_fragment_program_writes_depth(ctx
))
474 topZ
= R300_ZTOP_DISABLE
;
476 if (topZ
!= r300
->hw
.zstencil_format
.cmd
[2]) {
477 /* Note: This completely reemits the stencil format.
478 * I have not tested whether this is strictly necessary,
479 * or if emitting a write to ZB_ZTOP is enough.
481 R300_STATECHANGE(r300
, zstencil_format
);
482 r300
->hw
.zstencil_format
.cmd
[2] = topZ
;
486 static void r300SetAlphaState(GLcontext
* ctx
)
488 r300ContextPtr r300
= R300_CONTEXT(ctx
);
490 uint32_t pp_misc
= 0x0;
491 GLboolean really_enabled
= ctx
->Color
.AlphaEnabled
;
493 CLAMPED_FLOAT_TO_UBYTE(refByte
, ctx
->Color
.AlphaRef
);
495 switch (ctx
->Color
.AlphaFunc
) {
497 pp_misc
|= R300_FG_ALPHA_FUNC_NEVER
;
500 pp_misc
|= R300_FG_ALPHA_FUNC_LESS
;
503 pp_misc
|= R300_FG_ALPHA_FUNC_EQUAL
;
506 pp_misc
|= R300_FG_ALPHA_FUNC_LE
;
509 pp_misc
|= R300_FG_ALPHA_FUNC_GREATER
;
512 pp_misc
|= R300_FG_ALPHA_FUNC_NOTEQUAL
;
515 pp_misc
|= R300_FG_ALPHA_FUNC_GE
;
518 /*pp_misc |= FG_ALPHA_FUNC_ALWAYS; */
519 really_enabled
= GL_FALSE
;
523 if (really_enabled
) {
524 pp_misc
|= R300_FG_ALPHA_FUNC_ENABLE
;
525 pp_misc
|= R500_FG_ALPHA_FUNC_8BIT
;
526 pp_misc
|= (refByte
& R300_FG_ALPHA_FUNC_VAL_MASK
);
531 R300_STATECHANGE(r300
, at
);
532 r300
->hw
.at
.cmd
[R300_AT_ALPHA_TEST
] = pp_misc
;
533 r300
->hw
.at
.cmd
[R300_AT_UNKNOWN
] = 0;
535 r300SetEarlyZState(ctx
);
538 static void r300AlphaFunc(GLcontext
* ctx
, GLenum func
, GLfloat ref
)
542 r300SetAlphaState(ctx
);
545 static int translate_func(int func
)
549 return R300_ZS_NEVER
;
553 return R300_ZS_EQUAL
;
555 return R300_ZS_LEQUAL
;
557 return R300_ZS_GREATER
;
559 return R300_ZS_NOTEQUAL
;
561 return R300_ZS_GEQUAL
;
563 return R300_ZS_ALWAYS
;
568 static void r300SetDepthState(GLcontext
* ctx
)
570 r300ContextPtr r300
= R300_CONTEXT(ctx
);
572 R300_STATECHANGE(r300
, zs
);
573 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_0
] &= R300_STENCIL_ENABLE
|R300_STENCIL_FRONT_BACK
;
574 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] &= ~(R300_ZS_MASK
<< R300_Z_FUNC_SHIFT
);
576 if (ctx
->Depth
.Test
) {
577 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_0
] |= R300_Z_ENABLE
;
579 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_0
] |= R300_Z_WRITE_ENABLE
;
580 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] |=
581 translate_func(ctx
->Depth
.Func
) << R300_Z_FUNC_SHIFT
;
584 r300SetEarlyZState(ctx
);
587 static void r300SetStencilState(GLcontext
* ctx
, GLboolean state
)
589 r300ContextPtr r300
= R300_CONTEXT(ctx
);
591 if (r300
->radeon
.state
.stencil
.hwBuffer
) {
592 R300_STATECHANGE(r300
, zs
);
594 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_0
] |=
597 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_0
] &=
598 ~R300_STENCIL_ENABLE
;
602 FALLBACK(&r300
->radeon
, RADEON_FALLBACK_STENCIL
, state
);
607 static void r300UpdatePolygonMode(GLcontext
* ctx
)
609 r300ContextPtr r300
= R300_CONTEXT(ctx
);
610 uint32_t hw_mode
= R300_GA_POLY_MODE_DISABLE
;
612 /* Only do something if a polygon mode is wanted, default is GL_FILL */
613 if (ctx
->Polygon
.FrontMode
!= GL_FILL
||
614 ctx
->Polygon
.BackMode
!= GL_FILL
) {
617 /* Handle GL_CW (clock wise and GL_CCW (counter clock wise)
618 * correctly by selecting the correct front and back face
620 if (ctx
->Polygon
.FrontFace
== GL_CCW
) {
621 f
= ctx
->Polygon
.FrontMode
;
622 b
= ctx
->Polygon
.BackMode
;
624 f
= ctx
->Polygon
.BackMode
;
625 b
= ctx
->Polygon
.FrontMode
;
628 /* Enable polygon mode */
629 hw_mode
|= R300_GA_POLY_MODE_DUAL
;
633 hw_mode
|= R300_GA_POLY_MODE_FRONT_PTYPE_LINE
;
636 hw_mode
|= R300_GA_POLY_MODE_FRONT_PTYPE_POINT
;
639 hw_mode
|= R300_GA_POLY_MODE_FRONT_PTYPE_TRI
;
645 hw_mode
|= R300_GA_POLY_MODE_BACK_PTYPE_LINE
;
648 hw_mode
|= R300_GA_POLY_MODE_BACK_PTYPE_POINT
;
651 hw_mode
|= R300_GA_POLY_MODE_BACK_PTYPE_TRI
;
656 if (r300
->hw
.polygon_mode
.cmd
[1] != hw_mode
) {
657 R300_STATECHANGE(r300
, polygon_mode
);
658 r300
->hw
.polygon_mode
.cmd
[1] = hw_mode
;
661 r300
->hw
.polygon_mode
.cmd
[2] = 0x00000001;
662 r300
->hw
.polygon_mode
.cmd
[3] = 0x00000000;
666 * Change the culling mode.
668 * \note Mesa already filters redundant calls to this function.
670 static void r300CullFace(GLcontext
* ctx
, GLenum mode
)
674 r300UpdateCulling(ctx
);
678 * Change the polygon orientation.
680 * \note Mesa already filters redundant calls to this function.
682 static void r300FrontFace(GLcontext
* ctx
, GLenum mode
)
686 r300UpdateCulling(ctx
);
687 r300UpdatePolygonMode(ctx
);
691 * Change the depth testing function.
693 * \note Mesa already filters redundant calls to this function.
695 static void r300DepthFunc(GLcontext
* ctx
, GLenum func
)
698 r300SetDepthState(ctx
);
702 * Enable/Disable depth writing.
704 * \note Mesa already filters redundant calls to this function.
706 static void r300DepthMask(GLcontext
* ctx
, GLboolean mask
)
709 r300SetDepthState(ctx
);
713 * Handle glColorMask()
715 static void r300ColorMask(GLcontext
* ctx
,
716 GLboolean r
, GLboolean g
, GLboolean b
, GLboolean a
)
718 r300ContextPtr r300
= R300_CONTEXT(ctx
);
719 int mask
= (r
? RB3D_COLOR_CHANNEL_MASK_RED_MASK0
: 0) |
720 (g
? RB3D_COLOR_CHANNEL_MASK_GREEN_MASK0
: 0) |
721 (b
? RB3D_COLOR_CHANNEL_MASK_BLUE_MASK0
: 0) |
722 (a
? RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK0
: 0);
724 if (mask
!= r300
->hw
.cmk
.cmd
[R300_CMK_COLORMASK
]) {
725 R300_STATECHANGE(r300
, cmk
);
726 r300
->hw
.cmk
.cmd
[R300_CMK_COLORMASK
] = mask
;
730 /* =============================================================
733 static void r300PointSize(GLcontext
* ctx
, GLfloat size
)
735 r300ContextPtr r300
= R300_CONTEXT(ctx
);
736 /* same size limits for AA, non-AA points */
737 size
= CLAMP(size
, ctx
->Const
.MinPointSize
, ctx
->Const
.MaxPointSize
);
739 R300_STATECHANGE(r300
, ps
);
740 r300
->hw
.ps
.cmd
[R300_PS_POINTSIZE
] =
741 ((int)(size
* 6) << R300_POINTSIZE_X_SHIFT
) |
742 ((int)(size
* 6) << R300_POINTSIZE_Y_SHIFT
);
745 static void r300PointParameter(GLcontext
* ctx
, GLenum pname
, const GLfloat
* param
)
747 r300ContextPtr r300
= R300_CONTEXT(ctx
);
750 case GL_POINT_SIZE_MIN
:
751 R300_STATECHANGE(r300
, ga_point_minmax
);
752 r300
->hw
.ga_point_minmax
.cmd
[1] &= ~R300_GA_POINT_MINMAX_MIN_MASK
;
753 r300
->hw
.ga_point_minmax
.cmd
[1] |= (GLuint
)(ctx
->Point
.MinSize
* 6.0);
755 case GL_POINT_SIZE_MAX
:
756 R300_STATECHANGE(r300
, ga_point_minmax
);
757 r300
->hw
.ga_point_minmax
.cmd
[1] &= ~R300_GA_POINT_MINMAX_MAX_MASK
;
758 r300
->hw
.ga_point_minmax
.cmd
[1] |= (GLuint
)(ctx
->Point
.MaxSize
* 6.0)
759 << R300_GA_POINT_MINMAX_MAX_SHIFT
;
761 case GL_POINT_DISTANCE_ATTENUATION
:
763 case GL_POINT_FADE_THRESHOLD_SIZE
:
770 /* =============================================================
773 static void r300LineWidth(GLcontext
* ctx
, GLfloat widthf
)
775 r300ContextPtr r300
= R300_CONTEXT(ctx
);
777 widthf
= CLAMP(widthf
,
778 ctx
->Const
.MinPointSize
,
779 ctx
->Const
.MaxPointSize
);
780 R300_STATECHANGE(r300
, lcntl
);
781 r300
->hw
.lcntl
.cmd
[1] =
782 R300_LINE_CNT_HO
| R300_LINE_CNT_VE
| (int)(widthf
* 6.0);
785 static void r300PolygonMode(GLcontext
* ctx
, GLenum face
, GLenum mode
)
790 r300UpdatePolygonMode(ctx
);
793 /* =============================================================
797 static int translate_stencil_op(int op
)
805 return R300_ZS_REPLACE
;
810 case GL_INCR_WRAP_EXT
:
811 return R300_ZS_INCR_WRAP
;
812 case GL_DECR_WRAP_EXT
:
813 return R300_ZS_DECR_WRAP
;
815 return R300_ZS_INVERT
;
817 WARN_ONCE("Do not know how to translate stencil op");
823 static void r300ShadeModel(GLcontext
* ctx
, GLenum mode
)
825 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
827 R300_STATECHANGE(rmesa
, shade
);
828 rmesa
->hw
.shade
.cmd
[1] = 0x00000002;
831 rmesa
->hw
.shade
.cmd
[2] = R300_RE_SHADE_MODEL_FLAT
;
834 rmesa
->hw
.shade
.cmd
[2] = R300_RE_SHADE_MODEL_SMOOTH
;
839 rmesa
->hw
.shade
.cmd
[3] = 0x00000000;
840 rmesa
->hw
.shade
.cmd
[4] = 0x00000000;
843 static void r300StencilFuncSeparate(GLcontext
* ctx
, GLenum face
,
844 GLenum func
, GLint ref
, GLuint mask
)
846 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
848 ((ctx
->Stencil
.Ref
[0] & 0xff) << R300_STENCILREF_SHIFT
)
849 | ((ctx
->Stencil
.ValueMask
[0] & 0xff) << R300_STENCILMASK_SHIFT
);
850 const unsigned back
= ctx
->Stencil
._BackFace
;
853 R300_STATECHANGE(rmesa
, zs
);
854 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_0
] |= R300_STENCIL_FRONT_BACK
;
855 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] &= ~((R300_ZS_MASK
<<
856 R300_S_FRONT_FUNC_SHIFT
)
858 R300_S_BACK_FUNC_SHIFT
));
860 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_2
] &=
861 ~((R300_STENCILREF_MASK
<< R300_STENCILREF_SHIFT
) |
862 (R300_STENCILREF_MASK
<< R300_STENCILMASK_SHIFT
));
864 flag
= translate_func(ctx
->Stencil
.Function
[0]);
865 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] |=
866 (flag
<< R300_S_FRONT_FUNC_SHIFT
);
868 flag
= translate_func(ctx
->Stencil
.Function
[back
]);
870 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] |=
871 (flag
<< R300_S_BACK_FUNC_SHIFT
);
872 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_2
] |= refmask
;
875 static void r300StencilMaskSeparate(GLcontext
* ctx
, GLenum face
, GLuint mask
)
877 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
879 R300_STATECHANGE(rmesa
, zs
);
880 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_2
] &=
881 ~(R300_STENCILREF_MASK
<<
882 R300_STENCILWRITEMASK_SHIFT
);
883 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_2
] |=
885 WriteMask
[0] & R300_STENCILREF_MASK
) <<
886 R300_STENCILWRITEMASK_SHIFT
;
889 static void r300StencilOpSeparate(GLcontext
* ctx
, GLenum face
,
890 GLenum fail
, GLenum zfail
, GLenum zpass
)
892 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
893 const unsigned back
= ctx
->Stencil
._BackFace
;
895 R300_STATECHANGE(rmesa
, zs
);
896 /* It is easier to mask what's left.. */
897 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] &=
898 (R300_ZS_MASK
<< R300_Z_FUNC_SHIFT
) |
899 (R300_ZS_MASK
<< R300_S_FRONT_FUNC_SHIFT
) |
900 (R300_ZS_MASK
<< R300_S_BACK_FUNC_SHIFT
);
902 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] |=
903 (translate_stencil_op(ctx
->Stencil
.FailFunc
[0]) <<
904 R300_S_FRONT_SFAIL_OP_SHIFT
)
905 | (translate_stencil_op(ctx
->Stencil
.ZFailFunc
[0]) <<
906 R300_S_FRONT_ZFAIL_OP_SHIFT
)
907 | (translate_stencil_op(ctx
->Stencil
.ZPassFunc
[0]) <<
908 R300_S_FRONT_ZPASS_OP_SHIFT
);
910 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] |=
911 (translate_stencil_op(ctx
->Stencil
.FailFunc
[back
]) <<
912 R300_S_BACK_SFAIL_OP_SHIFT
)
913 | (translate_stencil_op(ctx
->Stencil
.ZFailFunc
[back
]) <<
914 R300_S_BACK_ZFAIL_OP_SHIFT
)
915 | (translate_stencil_op(ctx
->Stencil
.ZPassFunc
[back
]) <<
916 R300_S_BACK_ZPASS_OP_SHIFT
);
919 /* =============================================================
920 * Window position and viewport transformation
924 * To correctly position primitives:
926 #define SUBPIXEL_X 0.125
927 #define SUBPIXEL_Y 0.125
929 static void r300UpdateWindow(GLcontext
* ctx
)
931 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
932 __DRIdrawablePrivate
*dPriv
= rmesa
->radeon
.dri
.drawable
;
933 GLfloat xoffset
= dPriv
? (GLfloat
) dPriv
->x
: 0;
934 GLfloat yoffset
= dPriv
? (GLfloat
) dPriv
->y
+ dPriv
->h
: 0;
935 const GLfloat
*v
= ctx
->Viewport
._WindowMap
.m
;
937 GLfloat sx
= v
[MAT_SX
];
938 GLfloat tx
= v
[MAT_TX
] + xoffset
+ SUBPIXEL_X
;
939 GLfloat sy
= -v
[MAT_SY
];
940 GLfloat ty
= (-v
[MAT_TY
]) + yoffset
+ SUBPIXEL_Y
;
941 GLfloat sz
= v
[MAT_SZ
] * rmesa
->radeon
.state
.depth
.scale
;
942 GLfloat tz
= v
[MAT_TZ
] * rmesa
->radeon
.state
.depth
.scale
;
944 R300_STATECHANGE(rmesa
, vpt
);
946 rmesa
->hw
.vpt
.cmd
[R300_VPT_XSCALE
] = r300PackFloat32(sx
);
947 rmesa
->hw
.vpt
.cmd
[R300_VPT_XOFFSET
] = r300PackFloat32(tx
);
948 rmesa
->hw
.vpt
.cmd
[R300_VPT_YSCALE
] = r300PackFloat32(sy
);
949 rmesa
->hw
.vpt
.cmd
[R300_VPT_YOFFSET
] = r300PackFloat32(ty
);
950 rmesa
->hw
.vpt
.cmd
[R300_VPT_ZSCALE
] = r300PackFloat32(sz
);
951 rmesa
->hw
.vpt
.cmd
[R300_VPT_ZOFFSET
] = r300PackFloat32(tz
);
954 static void r300Viewport(GLcontext
* ctx
, GLint x
, GLint y
,
955 GLsizei width
, GLsizei height
)
957 /* Don't pipeline viewport changes, conflict with window offset
958 * setting below. Could apply deltas to rescue pipelined viewport
959 * values, or keep the originals hanging around.
961 r300UpdateWindow(ctx
);
963 radeon_viewport(ctx
, x
, y
, width
, height
);
966 static void r300DepthRange(GLcontext
* ctx
, GLclampd nearval
, GLclampd farval
)
968 r300UpdateWindow(ctx
);
971 void r300UpdateViewportOffset(GLcontext
* ctx
)
973 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
974 __DRIdrawablePrivate
*dPriv
= ((radeonContextPtr
) rmesa
)->dri
.drawable
;
975 GLfloat xoffset
= (GLfloat
) dPriv
->x
;
976 GLfloat yoffset
= (GLfloat
) dPriv
->y
+ dPriv
->h
;
977 const GLfloat
*v
= ctx
->Viewport
._WindowMap
.m
;
979 GLfloat tx
= v
[MAT_TX
] + xoffset
+ SUBPIXEL_X
;
980 GLfloat ty
= (-v
[MAT_TY
]) + yoffset
+ SUBPIXEL_Y
;
982 if (rmesa
->hw
.vpt
.cmd
[R300_VPT_XOFFSET
] != r300PackFloat32(tx
) ||
983 rmesa
->hw
.vpt
.cmd
[R300_VPT_YOFFSET
] != r300PackFloat32(ty
)) {
984 /* Note: this should also modify whatever data the context reset
987 R300_STATECHANGE(rmesa
, vpt
);
988 rmesa
->hw
.vpt
.cmd
[R300_VPT_XOFFSET
] = r300PackFloat32(tx
);
989 rmesa
->hw
.vpt
.cmd
[R300_VPT_YOFFSET
] = r300PackFloat32(ty
);
993 radeonUpdateScissor(ctx
);
997 r300FetchStateParameter(GLcontext
* ctx
,
998 const gl_state_index state
[STATE_LENGTH
],
1001 r300ContextPtr r300
= R300_CONTEXT(ctx
);
1004 case STATE_INTERNAL
:
1006 case STATE_R300_WINDOW_DIMENSION
:
1007 value
[0] = r300
->radeon
.dri
.drawable
->w
* 0.5f
; /* width*0.5 */
1008 value
[1] = r300
->radeon
.dri
.drawable
->h
* 0.5f
; /* height*0.5 */
1009 value
[2] = 0.5F
; /* for moving range [-1 1] -> [0 1] */
1010 value
[3] = 1.0F
; /* not used */
1013 case STATE_R300_TEXRECT_FACTOR
:{
1014 struct gl_texture_object
*t
=
1015 ctx
->Texture
.Unit
[state
[2]].CurrentTex
[TEXTURE_RECT_INDEX
];
1017 if (t
&& t
->Image
[0][t
->BaseLevel
]) {
1018 struct gl_texture_image
*image
=
1019 t
->Image
[0][t
->BaseLevel
];
1020 value
[0] = 1.0 / image
->Width2
;
1021 value
[1] = 1.0 / image
->Height2
;
1042 * Update R300's own internal state parameters.
1043 * For now just STATE_R300_WINDOW_DIMENSION
1045 void r300UpdateStateParameters(GLcontext
* ctx
, GLuint new_state
)
1047 struct r300_fragment_program
*fp
;
1048 struct gl_program_parameter_list
*paramList
;
1051 if (!(new_state
& (_NEW_BUFFERS
| _NEW_PROGRAM
)))
1054 fp
= (struct r300_fragment_program
*)ctx
->FragmentProgram
._Current
;
1058 paramList
= fp
->mesa_program
.Base
.Parameters
;
1063 for (i
= 0; i
< paramList
->NumParameters
; i
++) {
1064 if (paramList
->Parameters
[i
].Type
== PROGRAM_STATE_VAR
) {
1065 r300FetchStateParameter(ctx
,
1066 paramList
->Parameters
[i
].
1068 paramList
->ParameterValues
[i
]);
1073 /* =============================================================
1076 static void r300PolygonOffset(GLcontext
* ctx
, GLfloat factor
, GLfloat units
)
1078 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
1079 GLfloat constant
= units
;
1081 switch (ctx
->Visual
.depthBits
) {
1092 /* fprintf(stderr, "%s f:%f u:%f\n", __FUNCTION__, factor, constant); */
1094 R300_STATECHANGE(rmesa
, zbs
);
1095 rmesa
->hw
.zbs
.cmd
[R300_ZBS_T_FACTOR
] = r300PackFloat32(factor
);
1096 rmesa
->hw
.zbs
.cmd
[R300_ZBS_T_CONSTANT
] = r300PackFloat32(constant
);
1097 rmesa
->hw
.zbs
.cmd
[R300_ZBS_W_FACTOR
] = r300PackFloat32(factor
);
1098 rmesa
->hw
.zbs
.cmd
[R300_ZBS_W_CONSTANT
] = r300PackFloat32(constant
);
1101 /* Routing and texture-related */
1103 /* r300 doesnt handle GL_CLAMP and GL_MIRROR_CLAMP_EXT correctly when filter is NEAREST.
1104 * Since texwrap produces same results for GL_CLAMP and GL_CLAMP_TO_EDGE we use them instead.
1105 * We need to recalculate wrap modes whenever filter mode is changed because someone might do:
1106 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST);
1107 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP);
1108 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
1109 * Since r300 completely ignores R300_TX_CLAMP when either min or mag is nearest it cant handle
1110 * combinations where only one of them is nearest.
1112 static unsigned long gen_fixed_filter(unsigned long f
)
1114 unsigned long mag
, min
, needs_fixing
= 0;
1117 /* We ignore MIRROR bit so we dont have to do everything twice */
1118 if ((f
& ((7 - 1) << R300_TX_WRAP_S_SHIFT
)) ==
1119 (R300_TX_CLAMP
<< R300_TX_WRAP_S_SHIFT
)) {
1122 if ((f
& ((7 - 1) << R300_TX_WRAP_T_SHIFT
)) ==
1123 (R300_TX_CLAMP
<< R300_TX_WRAP_T_SHIFT
)) {
1126 if ((f
& ((7 - 1) << R300_TX_WRAP_R_SHIFT
)) ==
1127 (R300_TX_CLAMP
<< R300_TX_WRAP_R_SHIFT
)) {
1134 mag
= f
& R300_TX_MAG_FILTER_MASK
;
1135 min
= f
& (R300_TX_MIN_FILTER_MASK
|R300_TX_MIN_FILTER_MIP_MASK
);
1137 /* TODO: Check for anisto filters too */
1138 if ((mag
!= R300_TX_MAG_FILTER_NEAREST
)
1139 && (min
!= R300_TX_MIN_FILTER_NEAREST
))
1142 /* r300 cant handle these modes hence we force nearest to linear */
1143 if ((mag
== R300_TX_MAG_FILTER_NEAREST
)
1144 && (min
!= R300_TX_MIN_FILTER_NEAREST
)) {
1145 f
&= ~R300_TX_MAG_FILTER_NEAREST
;
1146 f
|= R300_TX_MAG_FILTER_LINEAR
;
1150 if ((min
== R300_TX_MIN_FILTER_NEAREST
)
1151 && (mag
!= R300_TX_MAG_FILTER_NEAREST
)) {
1152 f
&= ~R300_TX_MIN_FILTER_NEAREST
;
1153 f
|= R300_TX_MIN_FILTER_LINEAR
;
1157 /* Both are nearest */
1158 if (needs_fixing
& 1) {
1159 f
&= ~((7 - 1) << R300_TX_WRAP_S_SHIFT
);
1160 f
|= R300_TX_CLAMP_TO_EDGE
<< R300_TX_WRAP_S_SHIFT
;
1162 if (needs_fixing
& 2) {
1163 f
&= ~((7 - 1) << R300_TX_WRAP_T_SHIFT
);
1164 f
|= R300_TX_CLAMP_TO_EDGE
<< R300_TX_WRAP_T_SHIFT
;
1166 if (needs_fixing
& 4) {
1167 f
&= ~((7 - 1) << R300_TX_WRAP_R_SHIFT
);
1168 f
|= R300_TX_CLAMP_TO_EDGE
<< R300_TX_WRAP_R_SHIFT
;
1173 static void r300SetupFragmentShaderTextures(GLcontext
*ctx
, int *tmu_mappings
)
1175 r300ContextPtr r300
= R300_CONTEXT(ctx
);
1177 struct r300_fragment_program
*fp
= (struct r300_fragment_program
*)
1178 (char *)ctx
->FragmentProgram
._Current
;
1179 struct r300_fragment_program_code
*code
= &fp
->code
;
1181 R300_STATECHANGE(r300
, fpt
);
1183 for (i
= 0; i
< code
->tex
.length
; i
++) {
1188 unit
= code
->tex
.inst
[i
] >> R300_TEX_ID_SHIFT
;
1191 val
= code
->tex
.inst
[i
];
1192 val
&= ~R300_TEX_ID_MASK
;
1195 (val
& R300_TEX_INST_MASK
) >> R300_TEX_INST_SHIFT
;
1196 if (opcode
== R300_TEX_OP_KIL
) {
1197 r300
->hw
.fpt
.cmd
[R300_FPT_INSTR_0
+ i
] = val
;
1199 if (tmu_mappings
[unit
] >= 0) {
1201 tmu_mappings
[unit
] <<
1203 r300
->hw
.fpt
.cmd
[R300_FPT_INSTR_0
+ i
] = val
;
1205 // We get here when the corresponding texture image is incomplete
1206 // (e.g. incomplete mipmaps etc.)
1207 r300
->hw
.fpt
.cmd
[R300_FPT_INSTR_0
+ i
] = val
;
1212 r300
->hw
.fpt
.cmd
[R300_FPT_CMD_0
] =
1213 cmdpacket0(r300
->radeon
.radeonScreen
,
1214 R300_US_TEX_INST_0
, code
->tex
.length
);
1217 static void r500SetupFragmentShaderTextures(GLcontext
*ctx
, int *tmu_mappings
)
1220 struct r500_fragment_program
*fp
= (struct r500_fragment_program
*)
1221 (char *)ctx
->FragmentProgram
._Current
;
1222 struct r500_fragment_program_code
*code
= &fp
->code
;
1224 /* find all the texture instructions and relocate the texture units */
1225 for (i
= 0; i
< code
->inst_end
+ 1; i
++) {
1226 if ((code
->inst
[i
].inst0
& 0x3) == R500_INST_TYPE_TEX
) {
1228 int unit
, opcode
, new_unit
;
1230 val
= code
->inst
[i
].inst1
;
1232 unit
= (val
>> 16) & 0xf;
1234 val
&= ~(0xf << 16);
1236 opcode
= val
& (0x7 << 22);
1237 if (opcode
== R500_TEX_INST_TEXKILL
) {
1240 if (tmu_mappings
[unit
] >= 0) {
1241 new_unit
= tmu_mappings
[unit
];
1246 val
|= R500_TEX_ID(new_unit
);
1247 code
->inst
[i
].inst1
= val
;
1252 static GLuint
translate_lod_bias(GLfloat bias
)
1254 GLint b
= (int)(bias
*32);
1257 else if (b
< -(1 << 9))
1259 return (((GLuint
)b
) << R300_LOD_BIAS_SHIFT
) & R300_LOD_BIAS_MASK
;
1262 static void r300SetupTextures(GLcontext
* ctx
)
1265 struct radeon_tex_obj
*t
;
1266 r300ContextPtr r300
= R300_CONTEXT(ctx
);
1268 int last_hw_tmu
= -1; /* -1 translates into no setup costs for fields */
1269 int tmu_mappings
[R300_MAX_TEXTURE_UNITS
] = { -1, };
1270 struct r300_fragment_program
*fp
= (struct r300_fragment_program
*)
1271 (char *)ctx
->FragmentProgram
._Current
;
1273 R300_STATECHANGE(r300
, txe
);
1274 R300_STATECHANGE(r300
, tex
.filter
);
1275 R300_STATECHANGE(r300
, tex
.filter_1
);
1276 R300_STATECHANGE(r300
, tex
.size
);
1277 R300_STATECHANGE(r300
, tex
.format
);
1278 R300_STATECHANGE(r300
, tex
.pitch
);
1279 R300_STATECHANGE(r300
, tex
.offset
);
1280 R300_STATECHANGE(r300
, tex
.chroma_key
);
1281 R300_STATECHANGE(r300
, tex
.border_color
);
1283 r300
->hw
.txe
.cmd
[R300_TXE_ENABLE
] = 0x0;
1285 mtu
= r300
->radeon
.glCtx
->Const
.MaxTextureUnits
;
1286 if (RADEON_DEBUG
& DEBUG_STATE
)
1287 fprintf(stderr
, "mtu=%d\n", mtu
);
1289 if (mtu
> R300_MAX_TEXTURE_UNITS
) {
1291 "Aiiee ! mtu=%d is greater than R300_MAX_TEXTURE_UNITS=%d\n",
1292 mtu
, R300_MAX_TEXTURE_UNITS
);
1296 /* We cannot let disabled tmu offsets pass DRM */
1297 for (i
= 0; i
< mtu
; i
++) {
1298 if (ctx
->Texture
.Unit
[i
]._ReallyEnabled
) {
1299 tmu_mappings
[i
] = hw_tmu
;
1301 t
= radeon_tex_obj(ctx
->Texture
.Unit
[i
]._Current
);
1305 if ((t
->pp_txformat
& 0xffffff00) == 0xffffff00) {
1307 ("unknown texture format (entry %x) encountered. Help me !\n",
1308 t
->pp_txformat
& 0xff);
1311 if (RADEON_DEBUG
& DEBUG_STATE
)
1313 "Activating texture unit %d\n", i
);
1315 r300
->hw
.txe
.cmd
[R300_TXE_ENABLE
] |= (1 << hw_tmu
);
1317 r300
->hw
.tex
.filter
.cmd
[R300_TEX_VALUE_0
+
1319 gen_fixed_filter(t
->pp_txfilter
) | (hw_tmu
<< 28);
1320 /* Note: There is a LOD bias per texture unit and a LOD bias
1321 * per texture object. We add them here to get the correct behaviour.
1322 * (The per-texture object LOD bias was introduced in OpenGL 1.4
1323 * and is not present in the EXT_texture_object extension).
1325 r300
->hw
.tex
.filter_1
.cmd
[R300_TEX_VALUE_0
+ hw_tmu
] =
1327 translate_lod_bias(ctx
->Texture
.Unit
[i
].LodBias
+ t
->base
.LodBias
);
1328 r300
->hw
.tex
.size
.cmd
[R300_TEX_VALUE_0
+ hw_tmu
] =
1330 r300
->hw
.tex
.format
.cmd
[R300_TEX_VALUE_0
+
1331 hw_tmu
] = t
->pp_txformat
;
1332 r300
->hw
.tex
.pitch
.cmd
[R300_TEX_VALUE_0
+ hw_tmu
] =
1334 r300
->hw
.textures
[hw_tmu
] = t
;
1336 if (t
->tile_bits
& R300_TXO_MACRO_TILE
) {
1337 WARN_ONCE("macro tiling enabled!\n");
1340 if (t
->tile_bits
& R300_TXO_MICRO_TILE
) {
1341 WARN_ONCE("micro tiling enabled!\n");
1344 r300
->hw
.tex
.chroma_key
.cmd
[R300_TEX_VALUE_0
+
1346 r300
->hw
.tex
.border_color
.cmd
[R300_TEX_VALUE_0
+
1350 last_hw_tmu
= hw_tmu
;
1356 r300
->hw
.tex
.filter
.cmd
[R300_TEX_CMD_0
] =
1357 cmdpacket0(r300
->radeon
.radeonScreen
, R300_TX_FILTER0_0
, last_hw_tmu
+ 1);
1358 r300
->hw
.tex
.filter_1
.cmd
[R300_TEX_CMD_0
] =
1359 cmdpacket0(r300
->radeon
.radeonScreen
, R300_TX_FILTER1_0
, last_hw_tmu
+ 1);
1360 r300
->hw
.tex
.size
.cmd
[R300_TEX_CMD_0
] =
1361 cmdpacket0(r300
->radeon
.radeonScreen
, R300_TX_SIZE_0
, last_hw_tmu
+ 1);
1362 r300
->hw
.tex
.format
.cmd
[R300_TEX_CMD_0
] =
1363 cmdpacket0(r300
->radeon
.radeonScreen
, R300_TX_FORMAT_0
, last_hw_tmu
+ 1);
1364 r300
->hw
.tex
.pitch
.cmd
[R300_TEX_CMD_0
] =
1365 cmdpacket0(r300
->radeon
.radeonScreen
, R300_TX_FORMAT2_0
, last_hw_tmu
+ 1);
1366 r300
->hw
.tex
.offset
.cmd
[R300_TEX_CMD_0
] =
1367 cmdpacket0(r300
->radeon
.radeonScreen
, R300_TX_OFFSET_0
, last_hw_tmu
+ 1);
1368 r300
->hw
.tex
.chroma_key
.cmd
[R300_TEX_CMD_0
] =
1369 cmdpacket0(r300
->radeon
.radeonScreen
, R300_TX_CHROMA_KEY_0
, last_hw_tmu
+ 1);
1370 r300
->hw
.tex
.border_color
.cmd
[R300_TEX_CMD_0
] =
1371 cmdpacket0(r300
->radeon
.radeonScreen
, R300_TX_BORDER_COLOR_0
, last_hw_tmu
+ 1);
1373 if (!fp
) /* should only happenen once, just after context is created */
1376 if (r300
->radeon
.radeonScreen
->chip_family
< CHIP_FAMILY_RV515
) {
1377 if (fp
->mesa_program
.UsesKill
&& last_hw_tmu
< 0) {
1378 // The KILL operation requires the first texture unit
1380 r300
->hw
.txe
.cmd
[R300_TXE_ENABLE
] |= 1;
1381 r300
->hw
.tex
.filter
.cmd
[R300_TEX_VALUE_0
] = 0;
1382 r300
->hw
.tex
.filter
.cmd
[R300_TEX_CMD_0
] =
1383 cmdpacket0(r300
->radeon
.radeonScreen
, R300_TX_FILTER0_0
, 1);
1385 r300SetupFragmentShaderTextures(ctx
, tmu_mappings
);
1387 r500SetupFragmentShaderTextures(ctx
, tmu_mappings
);
1389 if (RADEON_DEBUG
& DEBUG_STATE
)
1390 fprintf(stderr
, "TX_ENABLE: %08x last_hw_tmu=%d\n",
1391 r300
->hw
.txe
.cmd
[R300_TXE_ENABLE
], last_hw_tmu
);
1394 union r300_outputs_written
{
1395 GLuint vp_outputs
; /* hw_tcl_on */
1396 DECLARE_RENDERINPUTS(index_bitset
); /* !hw_tcl_on */
1399 #define R300_OUTPUTS_WRITTEN_TEST(ow, vp_result, tnl_attrib) \
1400 ((hw_tcl_on) ? (ow).vp_outputs & (1 << (vp_result)) : \
1401 RENDERINPUTS_TEST( (ow.index_bitset), (tnl_attrib) ))
1403 static void r300SetupRSUnit(GLcontext
* ctx
)
1405 r300ContextPtr r300
= R300_CONTEXT(ctx
);
1406 TNLcontext
*tnl
= TNL_CONTEXT(ctx
);
1407 struct vertex_buffer
*VB
= &tnl
->vb
;
1408 union r300_outputs_written OutputsWritten
;
1410 int fp_reg
, high_rr
;
1412 int rs_tex_count
= 0;
1413 int i
, count
, col_fmt
;
1416 OutputsWritten
.vp_outputs
= CURRENT_VERTEX_SHADER(ctx
)->key
.OutputsWritten
;
1418 RENDERINPUTS_COPY(OutputsWritten
.index_bitset
, r300
->state
.render_inputs_bitset
);
1420 if (ctx
->FragmentProgram
._Current
)
1421 InputsRead
= ctx
->FragmentProgram
._Current
->Base
.InputsRead
;
1423 fprintf(stderr
, "No ctx->FragmentProgram._Current!!\n");
1424 return; /* This should only ever happen once.. */
1427 R300_STATECHANGE(r300
, ri
);
1428 R300_STATECHANGE(r300
, rc
);
1429 R300_STATECHANGE(r300
, rr
);
1431 fp_reg
= col_ip
= tex_ip
= col_fmt
= 0;
1433 r300
->hw
.rc
.cmd
[1] = 0;
1434 r300
->hw
.rc
.cmd
[2] = 0;
1435 for (i
=0; i
<R300_RR_CMDSIZE
-1; ++i
)
1436 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ i
] = 0;
1438 for (i
=0; i
<R300_RI_CMDSIZE
-1; ++i
)
1439 r300
->hw
.ri
.cmd
[R300_RI_INTERP_0
+ i
] = 0;
1442 if (InputsRead
& FRAG_BIT_COL0
) {
1443 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten
, VERT_RESULT_COL0
, _TNL_ATTRIB_COLOR0
)) {
1444 count
= VB
->AttribPtr
[_TNL_ATTRIB_COLOR0
]->size
;
1446 col_fmt
= R300_RS_COL_FMT_RGBA
;
1447 else if (count
== 3)
1448 col_fmt
= R300_RS_COL_FMT_RGB1
;
1450 col_fmt
= R300_RS_COL_FMT_0001
;
1452 r300
->hw
.ri
.cmd
[R300_RI_INTERP_0
+ col_ip
] = R300_RS_COL_PTR(col_ip
) | R300_RS_COL_FMT(col_fmt
);
1453 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ col_ip
] = R300_RS_INST_COL_ID(col_ip
) | R300_RS_INST_COL_CN_WRITE
| R300_RS_INST_COL_ADDR(fp_reg
);
1454 InputsRead
&= ~FRAG_BIT_COL0
;
1458 WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
1462 if (InputsRead
& FRAG_BIT_COL1
) {
1463 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten
, VERT_RESULT_COL1
, _TNL_ATTRIB_COLOR1
)) {
1464 count
= VB
->AttribPtr
[_TNL_ATTRIB_COLOR1
]->size
;
1466 col_fmt
= R300_RS_COL_FMT_RGBA
;
1467 else if (count
== 3)
1468 col_fmt
= R300_RS_COL_FMT_RGB1
;
1470 col_fmt
= R300_RS_COL_FMT_0001
;
1472 r300
->hw
.ri
.cmd
[R300_RI_INTERP_0
+ col_ip
] = R300_RS_COL_PTR(col_ip
) | R300_RS_COL_FMT(col_fmt
);
1473 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ col_ip
] = R300_RS_INST_COL_ID(col_ip
) | R300_RS_INST_COL_CN_WRITE
| R300_RS_INST_COL_ADDR(fp_reg
);
1474 InputsRead
&= ~FRAG_BIT_COL1
;
1478 WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
1482 for (i
= 0; i
< ctx
->Const
.MaxTextureUnits
; i
++) {
1483 if (! ( InputsRead
& FRAG_BIT_TEX(i
) ) )
1486 if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten
, VERT_RESULT_TEX0
+ i
, _TNL_ATTRIB_TEX(i
))) {
1487 WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i
);
1493 /* with TCL we always seem to route 4 components */
1497 count
= VB
->AttribPtr
[_TNL_ATTRIB_TEX(i
)]->size
;
1500 case 4: swiz
= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3); break;
1501 case 3: swiz
= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(R300_RS_SEL_K1
); break;
1504 case 2: swiz
= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(R300_RS_SEL_K0
) | R300_RS_SEL_Q(R300_RS_SEL_K1
); break;
1507 r300
->hw
.ri
.cmd
[R300_RI_INTERP_0
+ tex_ip
] |= swiz
| R300_RS_TEX_PTR(rs_tex_count
);
1508 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ tex_ip
] |= R300_RS_INST_TEX_ID(tex_ip
) | R300_RS_INST_TEX_CN_WRITE
| R300_RS_INST_TEX_ADDR(fp_reg
);
1509 InputsRead
&= ~(FRAG_BIT_TEX0
<< i
);
1510 rs_tex_count
+= count
;
1515 if (InputsRead
& FRAG_BIT_FOGC
) {
1516 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten
, VERT_RESULT_FOGC
, _TNL_ATTRIB_FOG
)) {
1517 r300
->hw
.ri
.cmd
[R300_RI_INTERP_0
+ tex_ip
] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count
);
1518 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ tex_ip
] |= R300_RS_INST_TEX_ID(tex_ip
) | R300_RS_INST_TEX_CN_WRITE
| R300_RS_INST_TEX_ADDR(fp_reg
);
1519 InputsRead
&= ~FRAG_BIT_FOGC
;
1524 WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n");
1528 if (InputsRead
& FRAG_BIT_WPOS
) {
1529 r300
->hw
.ri
.cmd
[R300_RI_INTERP_0
+ tex_ip
] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count
);
1530 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ tex_ip
] |= R300_RS_INST_TEX_ID(tex_ip
) | R300_RS_INST_TEX_CN_WRITE
| R300_RS_INST_TEX_ADDR(fp_reg
);
1531 InputsRead
&= ~FRAG_BIT_WPOS
;
1536 InputsRead
&= ~FRAG_BIT_WPOS
;
1538 /* Setup default color if no color or tex was set */
1539 if (rs_tex_count
== 0 && col_ip
== 0) {
1540 r300
->hw
.rr
.cmd
[R300_RR_INST_0
] = R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE
| R300_RS_INST_COL_ADDR(0) | R300_RS_COL_FMT(R300_RS_COL_FMT_0001
);
1544 high_rr
= (col_ip
> tex_ip
) ? col_ip
: tex_ip
;
1545 r300
->hw
.rc
.cmd
[1] |= (rs_tex_count
<< R300_IT_COUNT_SHIFT
) | (col_ip
<< R300_IC_COUNT_SHIFT
) | R300_HIRES_EN
;
1546 r300
->hw
.rc
.cmd
[2] |= high_rr
- 1;
1548 r300
->hw
.rr
.cmd
[R300_RR_CMD_0
] = cmdpacket0(r300
->radeon
.radeonScreen
, R300_RS_INST_0
, high_rr
);
1551 WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead
);
1554 static void r500SetupRSUnit(GLcontext
* ctx
)
1556 r300ContextPtr r300
= R300_CONTEXT(ctx
);
1557 TNLcontext
*tnl
= TNL_CONTEXT(ctx
);
1558 struct vertex_buffer
*VB
= &tnl
->vb
;
1559 union r300_outputs_written OutputsWritten
;
1561 int fp_reg
, high_rr
;
1563 int rs_tex_count
= 0;
1564 int i
, count
, col_fmt
;
1567 OutputsWritten
.vp_outputs
= CURRENT_VERTEX_SHADER(ctx
)->key
.OutputsWritten
;
1569 RENDERINPUTS_COPY(OutputsWritten
.index_bitset
, r300
->state
.render_inputs_bitset
);
1571 if (ctx
->FragmentProgram
._Current
)
1572 InputsRead
= ctx
->FragmentProgram
._Current
->Base
.InputsRead
;
1574 fprintf(stderr
, "No ctx->FragmentProgram._Current!!\n");
1575 return; /* This should only ever happen once.. */
1578 R300_STATECHANGE(r300
, ri
);
1579 R300_STATECHANGE(r300
, rc
);
1580 R300_STATECHANGE(r300
, rr
);
1582 fp_reg
= col_ip
= tex_ip
= col_fmt
= 0;
1584 r300
->hw
.rc
.cmd
[1] = 0;
1585 r300
->hw
.rc
.cmd
[2] = 0;
1586 for (i
=0; i
<R300_RR_CMDSIZE
-1; ++i
)
1587 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ i
] = 0;
1589 for (i
=0; i
<R500_RI_CMDSIZE
-1; ++i
)
1590 r300
->hw
.ri
.cmd
[R300_RI_INTERP_0
+ i
] = 0;
1593 if (InputsRead
& FRAG_BIT_COL0
) {
1594 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten
, VERT_RESULT_COL0
, _TNL_ATTRIB_COLOR0
)) {
1595 count
= VB
->AttribPtr
[_TNL_ATTRIB_COLOR0
]->size
;
1597 col_fmt
= R300_RS_COL_FMT_RGBA
;
1598 else if (count
== 3)
1599 col_fmt
= R300_RS_COL_FMT_RGB1
;
1601 col_fmt
= R300_RS_COL_FMT_0001
;
1603 r300
->hw
.ri
.cmd
[R300_RI_INTERP_0
+ col_ip
] = R500_RS_COL_PTR(col_ip
) | R500_RS_COL_FMT(col_fmt
);
1604 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ col_ip
] = R500_RS_INST_COL_ID(col_ip
) | R500_RS_INST_COL_CN_WRITE
| R500_RS_INST_COL_ADDR(fp_reg
);
1605 InputsRead
&= ~FRAG_BIT_COL0
;
1609 WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
1613 if (InputsRead
& FRAG_BIT_COL1
) {
1614 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten
, VERT_RESULT_COL1
, _TNL_ATTRIB_COLOR1
)) {
1615 count
= VB
->AttribPtr
[_TNL_ATTRIB_COLOR1
]->size
;
1617 col_fmt
= R300_RS_COL_FMT_RGBA
;
1618 else if (count
== 3)
1619 col_fmt
= R300_RS_COL_FMT_RGB1
;
1621 col_fmt
= R300_RS_COL_FMT_0001
;
1623 r300
->hw
.ri
.cmd
[R300_RI_INTERP_0
+ col_ip
] = R500_RS_COL_PTR(col_ip
) | R500_RS_COL_FMT(col_fmt
);
1624 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ col_ip
] = R500_RS_INST_COL_ID(col_ip
) | R500_RS_INST_COL_CN_WRITE
| R500_RS_INST_COL_ADDR(fp_reg
);
1625 InputsRead
&= ~FRAG_BIT_COL1
;
1629 WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
1634 for (i
= 0; i
< ctx
->Const
.MaxTextureUnits
; i
++) {
1635 if (! ( InputsRead
& FRAG_BIT_TEX(i
) ) )
1638 if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten
, VERT_RESULT_TEX0
+ i
, _TNL_ATTRIB_TEX(i
))) {
1639 WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i
);
1645 /* with TCL we always seem to route 4 components */
1649 count
= VB
->AttribPtr
[_TNL_ATTRIB_TEX(i
)]->size
;
1652 swiz
|= (rs_tex_count
+ 0) << R500_RS_IP_TEX_PTR_S_SHIFT
;
1653 swiz
|= (rs_tex_count
+ 1) << R500_RS_IP_TEX_PTR_T_SHIFT
;
1654 swiz
|= (rs_tex_count
+ 2) << R500_RS_IP_TEX_PTR_R_SHIFT
;
1655 swiz
|= (rs_tex_count
+ 3) << R500_RS_IP_TEX_PTR_Q_SHIFT
;
1656 } else if (count
== 3) {
1657 swiz
|= (rs_tex_count
+ 0) << R500_RS_IP_TEX_PTR_S_SHIFT
;
1658 swiz
|= (rs_tex_count
+ 1) << R500_RS_IP_TEX_PTR_T_SHIFT
;
1659 swiz
|= (rs_tex_count
+ 2) << R500_RS_IP_TEX_PTR_R_SHIFT
;
1660 swiz
|= R500_RS_IP_PTR_K1
<< R500_RS_IP_TEX_PTR_Q_SHIFT
;
1661 } else if (count
== 2) {
1662 swiz
|= (rs_tex_count
+ 0) << R500_RS_IP_TEX_PTR_S_SHIFT
;
1663 swiz
|= (rs_tex_count
+ 1) << R500_RS_IP_TEX_PTR_T_SHIFT
;
1664 swiz
|= R500_RS_IP_PTR_K0
<< R500_RS_IP_TEX_PTR_R_SHIFT
;
1665 swiz
|= R500_RS_IP_PTR_K1
<< R500_RS_IP_TEX_PTR_Q_SHIFT
;
1666 } else if (count
== 1) {
1667 swiz
|= (rs_tex_count
+ 0) << R500_RS_IP_TEX_PTR_S_SHIFT
;
1668 swiz
|= R500_RS_IP_PTR_K0
<< R500_RS_IP_TEX_PTR_T_SHIFT
;
1669 swiz
|= R500_RS_IP_PTR_K0
<< R500_RS_IP_TEX_PTR_R_SHIFT
;
1670 swiz
|= R500_RS_IP_PTR_K1
<< R500_RS_IP_TEX_PTR_Q_SHIFT
;
1672 swiz
|= R500_RS_IP_PTR_K0
<< R500_RS_IP_TEX_PTR_S_SHIFT
;
1673 swiz
|= R500_RS_IP_PTR_K0
<< R500_RS_IP_TEX_PTR_T_SHIFT
;
1674 swiz
|= R500_RS_IP_PTR_K0
<< R500_RS_IP_TEX_PTR_R_SHIFT
;
1675 swiz
|= R500_RS_IP_PTR_K1
<< R500_RS_IP_TEX_PTR_Q_SHIFT
;
1678 r300
->hw
.ri
.cmd
[R300_RI_INTERP_0
+ tex_ip
] |= swiz
;
1679 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ tex_ip
] |= R500_RS_INST_TEX_ID(tex_ip
) | R500_RS_INST_TEX_CN_WRITE
| R500_RS_INST_TEX_ADDR(fp_reg
);
1680 InputsRead
&= ~(FRAG_BIT_TEX0
<< i
);
1681 rs_tex_count
+= count
;
1686 if (InputsRead
& FRAG_BIT_FOGC
) {
1687 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten
, VERT_RESULT_FOGC
, _TNL_ATTRIB_FOG
)) {
1688 r300
->hw
.ri
.cmd
[R300_RI_INTERP_0
+ tex_ip
] |= ((rs_tex_count
+ 0) << R500_RS_IP_TEX_PTR_S_SHIFT
) |
1689 ((rs_tex_count
+ 1) << R500_RS_IP_TEX_PTR_T_SHIFT
) |
1690 ((rs_tex_count
+ 2) << R500_RS_IP_TEX_PTR_R_SHIFT
) |
1691 ((rs_tex_count
+ 3) << R500_RS_IP_TEX_PTR_Q_SHIFT
);
1693 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ tex_ip
] |= R500_RS_INST_TEX_ID(tex_ip
) | R500_RS_INST_TEX_CN_WRITE
| R500_RS_INST_TEX_ADDR(fp_reg
);
1694 InputsRead
&= ~FRAG_BIT_FOGC
;
1699 WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n");
1703 if (InputsRead
& FRAG_BIT_WPOS
) {
1704 r300
->hw
.ri
.cmd
[R300_RI_INTERP_0
+ tex_ip
] |= ((rs_tex_count
+ 0) << R500_RS_IP_TEX_PTR_S_SHIFT
) |
1705 ((rs_tex_count
+ 1) << R500_RS_IP_TEX_PTR_T_SHIFT
) |
1706 ((rs_tex_count
+ 2) << R500_RS_IP_TEX_PTR_R_SHIFT
) |
1707 ((rs_tex_count
+ 3) << R500_RS_IP_TEX_PTR_Q_SHIFT
);
1709 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ tex_ip
] |= R500_RS_INST_TEX_ID(tex_ip
) | R500_RS_INST_TEX_CN_WRITE
| R500_RS_INST_TEX_ADDR(fp_reg
);
1710 InputsRead
&= ~FRAG_BIT_WPOS
;
1716 /* Setup default color if no color or tex was set */
1717 if (rs_tex_count
== 0 && col_ip
== 0) {
1718 r300
->hw
.rr
.cmd
[R300_RR_INST_0
] |= R500_RS_INST_COL_ID(0) | R500_RS_INST_COL_CN_WRITE
| R500_RS_INST_COL_ADDR(0) | R500_RS_COL_FMT(R300_RS_COL_FMT_0001
);
1722 high_rr
= (col_ip
> tex_ip
) ? col_ip
: tex_ip
;
1723 r300
->hw
.rc
.cmd
[1] |= (rs_tex_count
<< R300_IT_COUNT_SHIFT
) | (col_ip
<< R300_IC_COUNT_SHIFT
) | R300_HIRES_EN
;
1724 r300
->hw
.rc
.cmd
[2] |= 0xC0 | (high_rr
- 1);
1726 r300
->hw
.rr
.cmd
[R300_RR_CMD_0
] = cmdpacket0(r300
->radeon
.radeonScreen
, R500_RS_INST_0
, high_rr
);
1729 WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead
);
1735 #define bump_vpu_count(ptr, new_count) do{\
1736 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
1737 int _nc=(new_count)/4; \
1738 assert(_nc < 256); \
1739 if(_nc>_p->vpu.count)_p->vpu.count=_nc;\
1742 static INLINE
void r300SetupVertexProgramFragment(r300ContextPtr r300
, int dest
, struct r300_vertex_shader_fragment
*vsf
)
1746 if (vsf
->length
== 0)
1749 if (vsf
->length
& 0x3) {
1750 fprintf(stderr
, "VERTEX_SHADER_FRAGMENT must have length divisible by 4\n");
1754 switch ((dest
>> 8) & 0xf) {
1756 R300_STATECHANGE(r300
, vpi
);
1757 for (i
= 0; i
< vsf
->length
; i
++)
1758 r300
->hw
.vpi
.cmd
[R300_VPI_INSTR_0
+ i
+ 4 * (dest
& 0xff)] = (vsf
->body
.d
[i
]);
1759 bump_vpu_count(r300
->hw
.vpi
.cmd
, vsf
->length
+ 4 * (dest
& 0xff));
1763 R300_STATECHANGE(r300
, vpp
);
1764 for (i
= 0; i
< vsf
->length
; i
++)
1765 r300
->hw
.vpp
.cmd
[R300_VPP_PARAM_0
+ i
+ 4 * (dest
& 0xff)] = (vsf
->body
.d
[i
]);
1766 bump_vpu_count(r300
->hw
.vpp
.cmd
, vsf
->length
+ 4 * (dest
& 0xff));
1769 R300_STATECHANGE(r300
, vps
);
1770 for (i
= 0; i
< vsf
->length
; i
++)
1771 r300
->hw
.vps
.cmd
[1 + i
+ 4 * (dest
& 0xff)] = (vsf
->body
.d
[i
]);
1772 bump_vpu_count(r300
->hw
.vps
.cmd
, vsf
->length
+ 4 * (dest
& 0xff));
1775 fprintf(stderr
, "%s:%s don't know how to handle dest %04x\n", __FILE__
, __FUNCTION__
, dest
);
1780 #define MIN3(a, b, c) ((a) < (b) ? MIN2(a, c) : MIN2(b, c))
1783 static void r300VapCntl(r300ContextPtr rmesa
, GLuint input_count
,
1784 GLuint output_count
, GLuint temp_count
)
1790 /* Flush PVS engine before changing PVS_NUM_SLOTS, PVS_NUM_CNTRLS.
1791 * See r500 docs 6.5.2 - done in emit */
1793 /* avoid division by zero */
1794 if (input_count
== 0) input_count
= 1;
1795 if (output_count
== 0) output_count
= 1;
1796 if (temp_count
== 0) temp_count
= 1;
1798 if (rmesa
->radeon
.radeonScreen
->chip_family
>= CHIP_FAMILY_RV515
)
1803 pvs_num_slots
= MIN3(10, vtx_mem_size
/input_count
, vtx_mem_size
/output_count
);
1804 pvs_num_cntrls
= MIN2(6, vtx_mem_size
/temp_count
);
1806 R300_STATECHANGE(rmesa
, vap_cntl
);
1807 if (rmesa
->radeon
.radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
) {
1808 rmesa
->hw
.vap_cntl
.cmd
[R300_VAP_CNTL_INSTR
] =
1809 (pvs_num_slots
<< R300_PVS_NUM_SLOTS_SHIFT
) |
1810 (pvs_num_cntrls
<< R300_PVS_NUM_CNTLRS_SHIFT
) |
1811 (12 << R300_VF_MAX_VTX_NUM_SHIFT
);
1812 if (rmesa
->radeon
.radeonScreen
->chip_family
>= CHIP_FAMILY_RV515
)
1813 rmesa
->hw
.vap_cntl
.cmd
[R300_VAP_CNTL_INSTR
] |= R500_TCL_STATE_OPTIMIZATION
;
1815 /* not sure about non-tcl */
1816 rmesa
->hw
.vap_cntl
.cmd
[R300_VAP_CNTL_INSTR
] = ((10 << R300_PVS_NUM_SLOTS_SHIFT
) |
1817 (5 << R300_PVS_NUM_CNTLRS_SHIFT
) |
1818 (5 << R300_VF_MAX_VTX_NUM_SHIFT
));
1820 if (rmesa
->radeon
.radeonScreen
->chip_family
== CHIP_FAMILY_RV515
)
1821 rmesa
->hw
.vap_cntl
.cmd
[R300_VAP_CNTL_INSTR
] |= (2 << R300_PVS_NUM_FPUS_SHIFT
);
1822 else if ((rmesa
->radeon
.radeonScreen
->chip_family
== CHIP_FAMILY_RV530
) ||
1823 (rmesa
->radeon
.radeonScreen
->chip_family
== CHIP_FAMILY_RV560
) ||
1824 (rmesa
->radeon
.radeonScreen
->chip_family
== CHIP_FAMILY_RV570
))
1825 rmesa
->hw
.vap_cntl
.cmd
[R300_VAP_CNTL_INSTR
] |= (5 << R300_PVS_NUM_FPUS_SHIFT
);
1826 else if ((rmesa
->radeon
.radeonScreen
->chip_family
== CHIP_FAMILY_RV410
) ||
1827 (rmesa
->radeon
.radeonScreen
->chip_family
== CHIP_FAMILY_R420
))
1828 rmesa
->hw
.vap_cntl
.cmd
[R300_VAP_CNTL_INSTR
] |= (6 << R300_PVS_NUM_FPUS_SHIFT
);
1829 else if ((rmesa
->radeon
.radeonScreen
->chip_family
== CHIP_FAMILY_R520
) ||
1830 (rmesa
->radeon
.radeonScreen
->chip_family
== CHIP_FAMILY_R580
))
1831 rmesa
->hw
.vap_cntl
.cmd
[R300_VAP_CNTL_INSTR
] |= (8 << R300_PVS_NUM_FPUS_SHIFT
);
1833 rmesa
->hw
.vap_cntl
.cmd
[R300_VAP_CNTL_INSTR
] |= (4 << R300_PVS_NUM_FPUS_SHIFT
);
1837 static void r300SetupDefaultVertexProgram(r300ContextPtr rmesa
)
1839 struct r300_vertex_shader_state
*prog
= &(rmesa
->state
.vertex_shader
);
1844 int param_count
= 0;
1845 int program_end
= 0;
1847 for (i
= VERT_ATTRIB_POS
; i
< VERT_ATTRIB_MAX
; i
++) {
1848 if (rmesa
->state
.sw_tcl_inputs
[i
] != -1) {
1849 prog
->program
.body
.i
[program_end
+ 0] = PVS_OP_DST_OPERAND(VE_MULTIPLY
, GL_FALSE
, GL_FALSE
, o_reg
++, VSF_FLAG_ALL
, PVS_DST_REG_OUT
);
1850 prog
->program
.body
.i
[program_end
+ 1] = PVS_SRC_OPERAND(rmesa
->state
.sw_tcl_inputs
[i
], PVS_SRC_SELECT_X
, PVS_SRC_SELECT_Y
, PVS_SRC_SELECT_Z
, PVS_SRC_SELECT_W
, PVS_SRC_REG_INPUT
, VSF_FLAG_NONE
);
1851 prog
->program
.body
.i
[program_end
+ 2] = PVS_SRC_OPERAND(rmesa
->state
.sw_tcl_inputs
[i
], PVS_SRC_SELECT_FORCE_1
, PVS_SRC_SELECT_FORCE_1
, PVS_SRC_SELECT_FORCE_1
, PVS_SRC_SELECT_FORCE_1
, PVS_SRC_REG_INPUT
, VSF_FLAG_NONE
);
1852 prog
->program
.body
.i
[program_end
+ 3] = PVS_SRC_OPERAND(rmesa
->state
.sw_tcl_inputs
[i
], PVS_SRC_SELECT_FORCE_1
, PVS_SRC_SELECT_FORCE_1
, PVS_SRC_SELECT_FORCE_1
, PVS_SRC_SELECT_FORCE_1
, PVS_SRC_REG_INPUT
, VSF_FLAG_NONE
);
1858 prog
->program
.length
= program_end
;
1860 r300SetupVertexProgramFragment(rmesa
, R300_PVS_CODE_START
,
1862 inst_count
= (prog
->program
.length
/ 4) - 1;
1864 r300VapCntl(rmesa
, i_reg
, o_reg
, 0);
1866 R300_STATECHANGE(rmesa
, pvs
);
1867 rmesa
->hw
.pvs
.cmd
[R300_PVS_CNTL_1
] =
1868 (0 << R300_PVS_FIRST_INST_SHIFT
) |
1869 (inst_count
<< R300_PVS_XYZW_VALID_INST_SHIFT
) |
1870 (inst_count
<< R300_PVS_LAST_INST_SHIFT
);
1871 rmesa
->hw
.pvs
.cmd
[R300_PVS_CNTL_2
] =
1872 (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT
) |
1873 (param_count
<< R300_PVS_MAX_CONST_ADDR_SHIFT
);
1874 rmesa
->hw
.pvs
.cmd
[R300_PVS_CNTL_3
] =
1875 (inst_count
<< R300_PVS_LAST_VTX_SRC_INST_SHIFT
);
1878 static int bit_count (int x
)
1880 x
= ((x
& 0xaaaaaaaaU
) >> 1) + (x
& 0x55555555U
);
1881 x
= ((x
& 0xccccccccU
) >> 2) + (x
& 0x33333333U
);
1882 x
= (x
>> 16) + (x
& 0xffff);
1883 x
= ((x
& 0xf0f0) >> 4) + (x
& 0x0f0f);
1884 return (x
>> 8) + (x
& 0x00ff);
1887 static void r300SetupRealVertexProgram(r300ContextPtr rmesa
)
1889 GLcontext
*ctx
= rmesa
->radeon
.glCtx
;
1890 struct r300_vertex_program
*prog
= (struct r300_vertex_program
*)CURRENT_VERTEX_SHADER(ctx
);
1892 int param_count
= 0;
1894 /* FIXME: r300SetupVertexProgramFragment */
1895 R300_STATECHANGE(rmesa
, vpp
);
1897 r300VertexProgUpdateParams(ctx
,
1898 (struct r300_vertex_program_cont
*)
1899 ctx
->VertexProgram
._Current
,
1900 (float *)&rmesa
->hw
.vpp
.
1901 cmd
[R300_VPP_PARAM_0
]);
1902 bump_vpu_count(rmesa
->hw
.vpp
.cmd
, param_count
);
1905 r300SetupVertexProgramFragment(rmesa
, R300_PVS_CODE_START
, &(prog
->program
));
1906 inst_count
= (prog
->program
.length
/ 4) - 1;
1908 r300VapCntl(rmesa
, bit_count(prog
->key
.InputsRead
),
1909 bit_count(prog
->key
.OutputsWritten
), prog
->num_temporaries
);
1911 R300_STATECHANGE(rmesa
, pvs
);
1912 rmesa
->hw
.pvs
.cmd
[R300_PVS_CNTL_1
] =
1913 (0 << R300_PVS_FIRST_INST_SHIFT
) |
1914 (inst_count
<< R300_PVS_XYZW_VALID_INST_SHIFT
) |
1915 (inst_count
<< R300_PVS_LAST_INST_SHIFT
);
1916 rmesa
->hw
.pvs
.cmd
[R300_PVS_CNTL_2
] =
1917 (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT
) |
1918 (param_count
<< R300_PVS_MAX_CONST_ADDR_SHIFT
);
1919 rmesa
->hw
.pvs
.cmd
[R300_PVS_CNTL_3
] =
1920 (inst_count
<< R300_PVS_LAST_VTX_SRC_INST_SHIFT
);
1924 static void r300SetupVertexProgram(r300ContextPtr rmesa
)
1926 GLcontext
*ctx
= rmesa
->radeon
.glCtx
;
1928 /* Reset state, in case we don't use something */
1929 ((drm_r300_cmd_header_t
*) rmesa
->hw
.vpp
.cmd
)->vpu
.count
= 0;
1930 ((drm_r300_cmd_header_t
*) rmesa
->hw
.vpi
.cmd
)->vpu
.count
= 0;
1931 ((drm_r300_cmd_header_t
*) rmesa
->hw
.vps
.cmd
)->vpu
.count
= 0;
1933 /* Not sure why this doesnt work...
1934 0x400 area might have something to do with pixel shaders as it appears right after pfs programming.
1935 0x406 is set to { 0.0, 0.0, 1.0, 0.0 } most of the time but should change with smooth points and in other rare cases. */
1936 //setup_vertex_shader_fragment(rmesa, 0x406, &unk4);
1937 if (hw_tcl_on
&& ((struct r300_vertex_program
*)CURRENT_VERTEX_SHADER(ctx
))->translated
) {
1938 r300SetupRealVertexProgram(rmesa
);
1940 /* FIXME: This needs to be replaced by vertex shader generation code. */
1941 r300SetupDefaultVertexProgram(rmesa
);
1947 * Enable/Disable states.
1949 * \note Mesa already filters redundant calls to this function.
1951 static void r300Enable(GLcontext
* ctx
, GLenum cap
, GLboolean state
)
1953 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
1954 if (RADEON_DEBUG
& DEBUG_STATE
)
1955 fprintf(stderr
, "%s( %s = %s )\n", __FUNCTION__
,
1956 _mesa_lookup_enum_by_nr(cap
),
1957 state
? "GL_TRUE" : "GL_FALSE");
1969 r300SetAlphaState(ctx
);
1971 case GL_COLOR_LOGIC_OP
:
1972 r300SetLogicOpState(ctx
);
1973 /* fall-through, because logic op overrides blending */
1975 r300SetBlendState(ctx
);
1977 case GL_CLIP_PLANE0
:
1978 case GL_CLIP_PLANE1
:
1979 case GL_CLIP_PLANE2
:
1980 case GL_CLIP_PLANE3
:
1981 case GL_CLIP_PLANE4
:
1982 case GL_CLIP_PLANE5
:
1983 r300SetClipPlaneState(ctx
, cap
, state
);
1986 r300SetDepthState(ctx
);
1988 case GL_STENCIL_TEST
:
1989 r300SetStencilState(ctx
, state
);
1992 r300UpdateCulling(ctx
);
1994 case GL_POLYGON_OFFSET_POINT
:
1995 case GL_POLYGON_OFFSET_LINE
:
1996 case GL_POLYGON_OFFSET_FILL
:
1997 r300SetPolygonOffsetState(ctx
, state
);
1999 case GL_SCISSOR_TEST
:
2000 radeon_firevertices(&rmesa
->radeon
);
2001 rmesa
->radeon
.state
.scissor
.enabled
= state
;
2002 radeonUpdateScissor( ctx
);
2010 * Completely recalculates hardware state based on the Mesa state.
2012 static void r300ResetHwState(r300ContextPtr r300
)
2014 GLcontext
*ctx
= r300
->radeon
.glCtx
;
2015 struct radeon_renderbuffer
*rrb
;
2018 if (!(r300
->radeon
.radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
))
2021 if (RADEON_DEBUG
& DEBUG_STATE
)
2022 fprintf(stderr
, "%s\n", __FUNCTION__
);
2024 radeon_firevertices(&r300
->radeon
);
2025 r300UpdateWindow(ctx
);
2028 ctx
->Color
.ColorMask
[RCOMP
],
2029 ctx
->Color
.ColorMask
[GCOMP
],
2030 ctx
->Color
.ColorMask
[BCOMP
], ctx
->Color
.ColorMask
[ACOMP
]);
2032 r300Enable(ctx
, GL_DEPTH_TEST
, ctx
->Depth
.Test
);
2033 r300DepthMask(ctx
, ctx
->Depth
.Mask
);
2034 r300DepthFunc(ctx
, ctx
->Depth
.Func
);
2037 r300Enable(ctx
, GL_STENCIL_TEST
, ctx
->Stencil
._Enabled
);
2038 r300StencilMaskSeparate(ctx
, 0, ctx
->Stencil
.WriteMask
[0]);
2039 r300StencilFuncSeparate(ctx
, 0, ctx
->Stencil
.Function
[0],
2040 ctx
->Stencil
.Ref
[0], ctx
->Stencil
.ValueMask
[0]);
2041 r300StencilOpSeparate(ctx
, 0, ctx
->Stencil
.FailFunc
[0],
2042 ctx
->Stencil
.ZFailFunc
[0],
2043 ctx
->Stencil
.ZPassFunc
[0]);
2045 r300UpdateCulling(ctx
);
2047 r300SetBlendState(ctx
);
2048 r300SetLogicOpState(ctx
);
2050 r300AlphaFunc(ctx
, ctx
->Color
.AlphaFunc
, ctx
->Color
.AlphaRef
);
2051 r300Enable(ctx
, GL_ALPHA_TEST
, ctx
->Color
.AlphaEnabled
);
2053 r300
->hw
.vte
.cmd
[1] = R300_VPORT_X_SCALE_ENA
2054 | R300_VPORT_X_OFFSET_ENA
2055 | R300_VPORT_Y_SCALE_ENA
2056 | R300_VPORT_Y_OFFSET_ENA
2057 | R300_VPORT_Z_SCALE_ENA
2058 | R300_VPORT_Z_OFFSET_ENA
| R300_VTX_W0_FMT
;
2059 r300
->hw
.vte
.cmd
[2] = 0x00000008;
2061 r300
->hw
.vap_vf_max_vtx_indx
.cmd
[1] = 0x00FFFFFF;
2062 r300
->hw
.vap_vf_max_vtx_indx
.cmd
[2] = 0x00000000;
2064 #ifdef MESA_LITTLE_ENDIAN
2065 r300
->hw
.vap_cntl_status
.cmd
[1] = R300_VC_NO_SWAP
;
2067 r300
->hw
.vap_cntl_status
.cmd
[1] = R300_VC_32BIT_SWAP
;
2070 /* disable VAP/TCL on non-TCL capable chips */
2072 r300
->hw
.vap_cntl_status
.cmd
[1] |= R300_VAP_TCL_BYPASS
;
2074 r300
->hw
.vap_psc_sgn_norm_cntl
.cmd
[1] = 0xAAAAAAAA;
2076 /* XXX: Other families? */
2078 r300
->hw
.vap_clip_cntl
.cmd
[1] = R300_PS_UCP_MODE_DIST_COP
;
2080 r300
->hw
.vap_clip
.cmd
[1] = r300PackFloat32(1.0); /* X */
2081 r300
->hw
.vap_clip
.cmd
[2] = r300PackFloat32(1.0); /* X */
2082 r300
->hw
.vap_clip
.cmd
[3] = r300PackFloat32(1.0); /* Y */
2083 r300
->hw
.vap_clip
.cmd
[4] = r300PackFloat32(1.0); /* Y */
2085 switch (r300
->radeon
.radeonScreen
->chip_family
) {
2086 case CHIP_FAMILY_R300
:
2087 r300
->hw
.vap_pvs_vtx_timeout_reg
.cmd
[1] = R300_2288_R300
;
2090 r300
->hw
.vap_pvs_vtx_timeout_reg
.cmd
[1] = R300_2288_RV350
;
2095 r300
->hw
.gb_enable
.cmd
[1] = R300_GB_POINT_STUFF_ENABLE
2096 | R300_GB_LINE_STUFF_ENABLE
2097 | R300_GB_TRIANGLE_STUFF_ENABLE
;
2099 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_MSPOS_0
] = 0x66666666;
2100 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_MSPOS_1
] = 0x06666666;
2102 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_TILE_CONFIG
] =
2103 R300_GB_TILE_ENABLE
| R300_GB_TILE_SIZE_16
/*| R300_GB_SUBPIXEL_1_16*/;
2104 switch (r300
->radeon
.radeonScreen
->num_gb_pipes
) {
2107 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_TILE_CONFIG
] |=
2108 R300_GB_TILE_PIPE_COUNT_RV300
;
2111 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_TILE_CONFIG
] |=
2112 R300_GB_TILE_PIPE_COUNT_R300
;
2115 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_TILE_CONFIG
] |=
2116 R300_GB_TILE_PIPE_COUNT_R420_3P
;
2119 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_TILE_CONFIG
] |=
2120 R300_GB_TILE_PIPE_COUNT_R420
;
2124 /* XXX: Enable anti-aliasing? */
2125 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_AA_CONFIG
] = GB_AA_CONFIG_AA_DISABLE
;
2126 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_SELECT
] = 0;
2128 r300
->hw
.ga_point_s0
.cmd
[1] = r300PackFloat32(0.0);
2129 r300
->hw
.ga_point_s0
.cmd
[2] = r300PackFloat32(0.0);
2130 r300
->hw
.ga_point_s0
.cmd
[3] = r300PackFloat32(1.0);
2131 r300
->hw
.ga_point_s0
.cmd
[4] = r300PackFloat32(1.0);
2133 r300
->hw
.ga_triangle_stipple
.cmd
[1] = 0x00050005;
2135 r300PointSize(ctx
, 1.0);
2137 r300
->hw
.ga_point_minmax
.cmd
[1] = 0x18000006;
2138 r300
->hw
.ga_point_minmax
.cmd
[2] = 0x00020006;
2139 r300
->hw
.ga_point_minmax
.cmd
[3] = r300PackFloat32(1.0 / 192.0);
2141 r300LineWidth(ctx
, 1.0);
2143 r300
->hw
.ga_line_stipple
.cmd
[1] = 0;
2144 r300
->hw
.ga_line_stipple
.cmd
[2] = r300PackFloat32(0.0);
2145 r300
->hw
.ga_line_stipple
.cmd
[3] = r300PackFloat32(1.0);
2147 r300ShadeModel(ctx
, ctx
->Light
.ShadeModel
);
2149 r300PolygonMode(ctx
, GL_FRONT
, ctx
->Polygon
.FrontMode
);
2150 r300PolygonMode(ctx
, GL_BACK
, ctx
->Polygon
.BackMode
);
2151 r300
->hw
.zbias_cntl
.cmd
[1] = 0x00000000;
2153 r300PolygonOffset(ctx
, ctx
->Polygon
.OffsetFactor
,
2154 ctx
->Polygon
.OffsetUnits
);
2155 r300Enable(ctx
, GL_POLYGON_OFFSET_POINT
, ctx
->Polygon
.OffsetPoint
);
2156 r300Enable(ctx
, GL_POLYGON_OFFSET_LINE
, ctx
->Polygon
.OffsetLine
);
2157 r300Enable(ctx
, GL_POLYGON_OFFSET_FILL
, ctx
->Polygon
.OffsetFill
);
2159 r300
->hw
.su_depth_scale
.cmd
[1] = 0x4B7FFFFF;
2160 r300
->hw
.su_depth_scale
.cmd
[2] = 0x00000000;
2162 r300
->hw
.sc_hyperz
.cmd
[1] = 0x0000001C;
2163 r300
->hw
.sc_hyperz
.cmd
[2] = 0x2DA49525;
2165 r300
->hw
.sc_screendoor
.cmd
[1] = 0x00FFFFFF;
2167 r300
->hw
.us_out_fmt
.cmd
[1] = R500_OUT_FMT_C4_8
|
2168 R500_C0_SEL_B
| R500_C1_SEL_G
| R500_C2_SEL_R
| R500_C3_SEL_A
;
2169 r300
->hw
.us_out_fmt
.cmd
[2] = R500_OUT_FMT_UNUSED
|
2170 R500_C0_SEL_B
| R500_C1_SEL_G
| R500_C2_SEL_R
| R500_C3_SEL_A
;
2171 r300
->hw
.us_out_fmt
.cmd
[3] = R500_OUT_FMT_UNUSED
|
2172 R500_C0_SEL_B
| R500_C1_SEL_G
| R500_C2_SEL_R
| R500_C3_SEL_A
;
2173 r300
->hw
.us_out_fmt
.cmd
[4] = R500_OUT_FMT_UNUSED
|
2174 R500_C0_SEL_B
| R500_C1_SEL_G
| R500_C2_SEL_R
| R500_C3_SEL_A
;
2175 r300
->hw
.us_out_fmt
.cmd
[5] = R300_W_FMT_W0
| R300_W_SRC_US
;
2177 /* disable fog unit */
2178 r300
->hw
.fogs
.cmd
[R300_FOGS_STATE
] = 0;
2179 r300
->hw
.fg_depth_src
.cmd
[1] = R300_FG_DEPTH_SRC_SCAN
;
2181 r300
->hw
.rb3d_cctl
.cmd
[1] = 0;
2183 r300BlendColor(ctx
, ctx
->Color
.BlendColor
);
2185 r300
->hw
.rb3d_dither_ctl
.cmd
[1] = 0;
2186 r300
->hw
.rb3d_dither_ctl
.cmd
[2] = 0;
2187 r300
->hw
.rb3d_dither_ctl
.cmd
[3] = 0;
2188 r300
->hw
.rb3d_dither_ctl
.cmd
[4] = 0;
2189 r300
->hw
.rb3d_dither_ctl
.cmd
[5] = 0;
2190 r300
->hw
.rb3d_dither_ctl
.cmd
[6] = 0;
2191 r300
->hw
.rb3d_dither_ctl
.cmd
[7] = 0;
2192 r300
->hw
.rb3d_dither_ctl
.cmd
[8] = 0;
2193 r300
->hw
.rb3d_dither_ctl
.cmd
[9] = 0;
2195 r300
->hw
.rb3d_aaresolve_ctl
.cmd
[1] = 0;
2197 r300
->hw
.rb3d_discard_src_pixel_lte_threshold
.cmd
[1] = 0x00000000;
2198 r300
->hw
.rb3d_discard_src_pixel_lte_threshold
.cmd
[2] = 0xffffffff;
2200 rrb
= r300
->radeon
.state
.depth
.rrb
;
2201 if (rrb
&& rrb
->bo
&& (rrb
->bo
->flags
& RADEON_BO_FLAGS_MACRO_TILE
)) {
2202 /* XXX: Turn off when clearing buffers ? */
2203 r300
->hw
.zb
.cmd
[R300_ZB_PITCH
] |= R300_DEPTHMACROTILE_ENABLE
;
2205 if (ctx
->Visual
.depthBits
== 24)
2206 r300
->hw
.zb
.cmd
[R300_ZB_PITCH
] |=
2207 R300_DEPTHMICROTILE_TILED
;
2210 r300
->hw
.zb_depthclearvalue
.cmd
[1] = 0;
2212 r300
->hw
.zstencil_format
.cmd
[2] = R300_ZTOP_DISABLE
;
2213 r300
->hw
.zstencil_format
.cmd
[3] = 0x00000003;
2214 r300
->hw
.zstencil_format
.cmd
[4] = 0x00000000;
2215 r300SetEarlyZState(ctx
);
2217 r300
->hw
.unk4F30
.cmd
[1] = 0;
2218 r300
->hw
.unk4F30
.cmd
[2] = 0;
2220 r300
->hw
.zb_hiz_offset
.cmd
[1] = 0;
2222 r300
->hw
.zb_hiz_pitch
.cmd
[1] = 0;
2224 r300VapCntl(r300
, 0, 0, 0);
2226 r300
->hw
.vps
.cmd
[R300_VPS_ZERO_0
] = 0;
2227 r300
->hw
.vps
.cmd
[R300_VPS_ZERO_1
] = 0;
2228 r300
->hw
.vps
.cmd
[R300_VPS_POINTSIZE
] = r300PackFloat32(1.0);
2229 r300
->hw
.vps
.cmd
[R300_VPS_ZERO_3
] = 0;
2232 r300
->radeon
.hw
.all_dirty
= GL_TRUE
;
2235 void r300UpdateShaders(r300ContextPtr rmesa
)
2238 struct r300_vertex_program
*vp
;
2241 ctx
= rmesa
->radeon
.glCtx
;
2243 if (rmesa
->radeon
.NewGLState
&& hw_tcl_on
) {
2244 rmesa
->radeon
.NewGLState
= 0;
2246 for (i
= _TNL_FIRST_MAT
; i
<= _TNL_LAST_MAT
; i
++) {
2247 rmesa
->temp_attrib
[i
] =
2248 TNL_CONTEXT(ctx
)->vb
.AttribPtr
[i
];
2249 TNL_CONTEXT(ctx
)->vb
.AttribPtr
[i
] =
2250 &rmesa
->dummy_attrib
[i
];
2253 _tnl_UpdateFixedFunctionProgram(ctx
);
2255 for (i
= _TNL_FIRST_MAT
; i
<= _TNL_LAST_MAT
; i
++) {
2256 TNL_CONTEXT(ctx
)->vb
.AttribPtr
[i
] =
2257 rmesa
->temp_attrib
[i
];
2260 r300SelectVertexShader(rmesa
);
2261 vp
= (struct r300_vertex_program
*)
2262 CURRENT_VERTEX_SHADER(ctx
);
2263 /*if (vp->translated == GL_FALSE)
2264 r300TranslateVertexShader(vp); */
2265 if (vp
->translated
== GL_FALSE
) {
2266 fprintf(stderr
, "Failing back to sw-tcl\n");
2267 hw_tcl_on
= future_hw_tcl_on
= 0;
2268 r300ResetHwState(rmesa
);
2270 r300UpdateStateParameters(ctx
, _NEW_PROGRAM
);
2274 r300UpdateStateParameters(ctx
, _NEW_PROGRAM
);
2277 static const GLfloat
*get_fragmentprogram_constant(GLcontext
*ctx
,
2278 struct gl_program
*program
, struct prog_src_register srcreg
)
2280 static const GLfloat dummy
[4] = { 0, 0, 0, 0 };
2282 switch(srcreg
.File
) {
2283 case PROGRAM_LOCAL_PARAM
:
2284 return program
->LocalParams
[srcreg
.Index
];
2285 case PROGRAM_ENV_PARAM
:
2286 return ctx
->FragmentProgram
.Parameters
[srcreg
.Index
];
2287 case PROGRAM_STATE_VAR
:
2288 case PROGRAM_NAMED_PARAM
:
2289 case PROGRAM_CONSTANT
:
2290 return program
->Parameters
->ParameterValues
[srcreg
.Index
];
2292 _mesa_problem(ctx
, "get_fragmentprogram_constant: Unknown\n");
2298 static void r300SetupPixelShader(r300ContextPtr rmesa
)
2300 GLcontext
*ctx
= rmesa
->radeon
.glCtx
;
2301 struct r300_fragment_program
*fp
= (struct r300_fragment_program
*)
2302 (char *)ctx
->FragmentProgram
._Current
;
2303 struct r300_fragment_program_code
*code
;
2306 if (!fp
) /* should only happenen once, just after context is created */
2309 r300TranslateFragmentShader(rmesa
, fp
);
2310 if (!fp
->translated
) {
2311 fprintf(stderr
, "%s: No valid fragment shader, exiting\n",
2317 r300SetupTextures(ctx
);
2319 R300_STATECHANGE(rmesa
, fpi
[0]);
2320 R300_STATECHANGE(rmesa
, fpi
[1]);
2321 R300_STATECHANGE(rmesa
, fpi
[2]);
2322 R300_STATECHANGE(rmesa
, fpi
[3]);
2323 rmesa
->hw
.fpi
[0].cmd
[R300_FPI_CMD_0
] = cmdpacket0(rmesa
->radeon
.radeonScreen
, R300_US_ALU_RGB_INST_0
, code
->alu
.length
);
2324 rmesa
->hw
.fpi
[1].cmd
[R300_FPI_CMD_0
] = cmdpacket0(rmesa
->radeon
.radeonScreen
, R300_US_ALU_RGB_ADDR_0
, code
->alu
.length
);
2325 rmesa
->hw
.fpi
[2].cmd
[R300_FPI_CMD_0
] = cmdpacket0(rmesa
->radeon
.radeonScreen
, R300_US_ALU_ALPHA_INST_0
, code
->alu
.length
);
2326 rmesa
->hw
.fpi
[3].cmd
[R300_FPI_CMD_0
] = cmdpacket0(rmesa
->radeon
.radeonScreen
, R300_US_ALU_ALPHA_ADDR_0
, code
->alu
.length
);
2327 for (i
= 0; i
< code
->alu
.length
; i
++) {
2328 rmesa
->hw
.fpi
[0].cmd
[R300_FPI_INSTR_0
+ i
] = code
->alu
.inst
[i
].inst0
;
2329 rmesa
->hw
.fpi
[1].cmd
[R300_FPI_INSTR_0
+ i
] = code
->alu
.inst
[i
].inst1
;
2330 rmesa
->hw
.fpi
[2].cmd
[R300_FPI_INSTR_0
+ i
] = code
->alu
.inst
[i
].inst2
;
2331 rmesa
->hw
.fpi
[3].cmd
[R300_FPI_INSTR_0
+ i
] = code
->alu
.inst
[i
].inst3
;
2334 R300_STATECHANGE(rmesa
, fp
);
2335 rmesa
->hw
.fp
.cmd
[R300_FP_CNTL0
] = code
->cur_node
| (code
->first_node_has_tex
<< 3);
2336 rmesa
->hw
.fp
.cmd
[R300_FP_CNTL1
] = code
->max_temp_idx
;
2337 rmesa
->hw
.fp
.cmd
[R300_FP_CNTL2
] =
2338 (0 << R300_PFS_CNTL_ALU_OFFSET_SHIFT
) |
2339 ((code
->alu
.length
-1) << R300_PFS_CNTL_ALU_END_SHIFT
) |
2340 (0 << R300_PFS_CNTL_TEX_OFFSET_SHIFT
) |
2341 ((code
->tex
.length
? code
->tex
.length
-1 : 0) << R300_PFS_CNTL_TEX_END_SHIFT
);
2342 /* I just want to say, the way these nodes are stored.. weird.. */
2343 for (i
= 0, k
= (4 - (code
->cur_node
+ 1)); i
< 4; i
++, k
++) {
2344 if (i
< (code
->cur_node
+ 1)) {
2345 rmesa
->hw
.fp
.cmd
[R300_FP_NODE0
+ k
] =
2346 (code
->node
[i
].alu_offset
<< R300_ALU_START_SHIFT
) |
2347 (code
->node
[i
].alu_end
<< R300_ALU_SIZE_SHIFT
) |
2348 (code
->node
[i
].tex_offset
<< R300_TEX_START_SHIFT
) |
2349 (code
->node
[i
].tex_end
<< R300_TEX_SIZE_SHIFT
) |
2350 code
->node
[i
].flags
;
2352 rmesa
->hw
.fp
.cmd
[R300_FP_NODE0
+ (3 - i
)] = 0;
2356 R300_STATECHANGE(rmesa
, fpp
);
2357 rmesa
->hw
.fpp
.cmd
[R300_FPP_CMD_0
] = cmdpacket0(rmesa
->radeon
.radeonScreen
, R300_PFS_PARAM_0_X
, code
->const_nr
* 4);
2358 for (i
= 0; i
< code
->const_nr
; i
++) {
2359 const GLfloat
*constant
= get_fragmentprogram_constant(ctx
,
2360 &fp
->mesa_program
.Base
, code
->constant
[i
]);
2361 rmesa
->hw
.fpp
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 0] = r300PackFloat24(constant
[0]);
2362 rmesa
->hw
.fpp
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 1] = r300PackFloat24(constant
[1]);
2363 rmesa
->hw
.fpp
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 2] = r300PackFloat24(constant
[2]);
2364 rmesa
->hw
.fpp
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 3] = r300PackFloat24(constant
[3]);
2368 #define bump_r500fp_count(ptr, new_count) do{\
2369 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
2370 int _nc=(new_count)/6; \
2371 assert(_nc < 256); \
2372 if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
2375 #define bump_r500fp_const_count(ptr, new_count) do{\
2376 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
2377 int _nc=(new_count)/4; \
2378 assert(_nc < 256); \
2379 if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
2382 static void r500SetupPixelShader(r300ContextPtr rmesa
)
2384 GLcontext
*ctx
= rmesa
->radeon
.glCtx
;
2385 struct r500_fragment_program
*fp
= (struct r500_fragment_program
*)
2386 (char *)ctx
->FragmentProgram
._Current
;
2388 struct r500_fragment_program_code
*code
;
2390 if (!fp
) /* should only happenen once, just after context is created */
2393 ((drm_r300_cmd_header_t
*) rmesa
->hw
.r500fp
.cmd
)->r500fp
.count
= 0;
2394 ((drm_r300_cmd_header_t
*) rmesa
->hw
.r500fp_const
.cmd
)->r500fp
.count
= 0;
2396 r500TranslateFragmentShader(rmesa
, fp
);
2397 if (!fp
->translated
) {
2398 fprintf(stderr
, "%s: No valid fragment shader, exiting\n",
2404 r300SetupTextures(ctx
);
2406 R300_STATECHANGE(rmesa
, fp
);
2407 rmesa
->hw
.fp
.cmd
[R500_FP_PIXSIZE
] = code
->max_temp_idx
;
2409 rmesa
->hw
.fp
.cmd
[R500_FP_CODE_ADDR
] =
2410 R500_US_CODE_START_ADDR(code
->inst_offset
) |
2411 R500_US_CODE_END_ADDR(code
->inst_end
);
2412 rmesa
->hw
.fp
.cmd
[R500_FP_CODE_RANGE
] =
2413 R500_US_CODE_RANGE_ADDR(code
->inst_offset
) |
2414 R500_US_CODE_RANGE_SIZE(code
->inst_end
);
2415 rmesa
->hw
.fp
.cmd
[R500_FP_CODE_OFFSET
] =
2416 R500_US_CODE_OFFSET_ADDR(0); /* FIXME when we add flow control */
2418 R300_STATECHANGE(rmesa
, r500fp
);
2419 /* Emit our shader... */
2420 for (i
= 0; i
< code
->inst_end
+1; i
++) {
2421 rmesa
->hw
.r500fp
.cmd
[i
*6+1] = code
->inst
[i
].inst0
;
2422 rmesa
->hw
.r500fp
.cmd
[i
*6+2] = code
->inst
[i
].inst1
;
2423 rmesa
->hw
.r500fp
.cmd
[i
*6+3] = code
->inst
[i
].inst2
;
2424 rmesa
->hw
.r500fp
.cmd
[i
*6+4] = code
->inst
[i
].inst3
;
2425 rmesa
->hw
.r500fp
.cmd
[i
*6+5] = code
->inst
[i
].inst4
;
2426 rmesa
->hw
.r500fp
.cmd
[i
*6+6] = code
->inst
[i
].inst5
;
2429 bump_r500fp_count(rmesa
->hw
.r500fp
.cmd
, (code
->inst_end
+ 1) * 6);
2431 R300_STATECHANGE(rmesa
, r500fp_const
);
2432 for (i
= 0; i
< code
->const_nr
; i
++) {
2433 const GLfloat
*constant
= get_fragmentprogram_constant(ctx
,
2434 &fp
->mesa_program
.Base
, code
->constant
[i
]);
2435 rmesa
->hw
.r500fp_const
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 0] = r300PackFloat32(constant
[0]);
2436 rmesa
->hw
.r500fp_const
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 1] = r300PackFloat32(constant
[1]);
2437 rmesa
->hw
.r500fp_const
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 2] = r300PackFloat32(constant
[2]);
2438 rmesa
->hw
.r500fp_const
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 3] = r300PackFloat32(constant
[3]);
2440 bump_r500fp_const_count(rmesa
->hw
.r500fp_const
.cmd
, code
->const_nr
* 4);
2444 void r300UpdateShaderStates(r300ContextPtr rmesa
)
2447 ctx
= rmesa
->radeon
.glCtx
;
2449 r300SetEarlyZState(ctx
);
2451 /* w_fmt value is set to get best performance
2452 * see p.130 R5xx 3D acceleration guide v1.3 */
2453 GLuint w_fmt
, fgdepthsrc
;
2454 if (current_fragment_program_writes_depth(ctx
)) {
2455 fgdepthsrc
= R300_FG_DEPTH_SRC_SHADER
;
2456 w_fmt
= R300_W_FMT_W24
| R300_W_SRC_US
;
2458 fgdepthsrc
= R300_FG_DEPTH_SRC_SCAN
;
2459 w_fmt
= R300_W_FMT_W0
| R300_W_SRC_US
;
2462 if (w_fmt
!= rmesa
->hw
.us_out_fmt
.cmd
[5]) {
2463 R300_STATECHANGE(rmesa
, us_out_fmt
);
2464 rmesa
->hw
.us_out_fmt
.cmd
[5] = w_fmt
;
2467 if (fgdepthsrc
!= rmesa
->hw
.fg_depth_src
.cmd
[1]) {
2468 R300_STATECHANGE(rmesa
, fg_depth_src
);
2469 rmesa
->hw
.fg_depth_src
.cmd
[1] = fgdepthsrc
;
2472 if (rmesa
->radeon
.radeonScreen
->chip_family
>= CHIP_FAMILY_RV515
)
2473 r500SetupPixelShader(rmesa
);
2475 r300SetupPixelShader(rmesa
);
2477 if (rmesa
->radeon
.radeonScreen
->chip_family
>= CHIP_FAMILY_RV515
)
2478 r500SetupRSUnit(ctx
);
2480 r300SetupRSUnit(ctx
);
2482 if ((rmesa
->radeon
.radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
))
2483 r300SetupVertexProgram(rmesa
);
2488 * Called by Mesa after an internal state update.
2490 static void r300InvalidateState(GLcontext
* ctx
, GLuint new_state
)
2492 r300ContextPtr r300
= R300_CONTEXT(ctx
);
2494 _swrast_InvalidateState(ctx
, new_state
);
2495 _swsetup_InvalidateState(ctx
, new_state
);
2496 _vbo_InvalidateState(ctx
, new_state
);
2497 _tnl_InvalidateState(ctx
, new_state
);
2498 _ae_invalidate_state(ctx
, new_state
);
2500 if (new_state
& (_NEW_BUFFERS
| _NEW_COLOR
| _NEW_PIXEL
)) {
2501 _mesa_update_framebuffer(ctx
);
2502 /* this updates the DrawBuffer's Width/Height if it's a FBO */
2503 _mesa_update_draw_buffer_bounds(ctx
);
2505 R300_STATECHANGE(r300
, cb
);
2508 r300UpdateStateParameters(ctx
, new_state
);
2510 r300
->radeon
.NewGLState
|= new_state
;
2514 * Calculate initial hardware state and register state functions.
2515 * Assumes that the command buffer and state atoms have been
2516 * initialized already.
2518 void r300InitState(r300ContextPtr r300
)
2520 GLcontext
*ctx
= r300
->radeon
.glCtx
;
2523 /* Only have hw stencil when depth buffer is 24 bits deep */
2524 r300
->radeon
.state
.stencil
.hwBuffer
= (ctx
->Visual
.stencilBits
> 0 &&
2525 ctx
->Visual
.depthBits
== 24);
2527 memset(&(r300
->state
.texture
), 0, sizeof(r300
->state
.texture
));
2529 r300ResetHwState(r300
);
2532 static void r300RenderMode(GLcontext
* ctx
, GLenum mode
)
2534 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
2539 void r300UpdateClipPlanes( GLcontext
*ctx
)
2541 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
2544 for (p
= 0; p
< ctx
->Const
.MaxClipPlanes
; p
++) {
2545 if (ctx
->Transform
.ClipPlanesEnabled
& (1 << p
)) {
2546 GLint
*ip
= (GLint
*)ctx
->Transform
._ClipUserPlane
[p
];
2548 R300_STATECHANGE( rmesa
, vpucp
[p
] );
2549 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_X
] = ip
[0];
2550 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_Y
] = ip
[1];
2551 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_Z
] = ip
[2];
2552 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_W
] = ip
[3];
2558 * Initialize driver's state callback functions
2560 void r300InitStateFuncs(struct dd_function_table
*functions
)
2563 functions
->UpdateState
= r300InvalidateState
;
2564 functions
->AlphaFunc
= r300AlphaFunc
;
2565 functions
->BlendColor
= r300BlendColor
;
2566 functions
->BlendEquationSeparate
= r300BlendEquationSeparate
;
2567 functions
->BlendFuncSeparate
= r300BlendFuncSeparate
;
2568 functions
->Enable
= r300Enable
;
2569 functions
->ColorMask
= r300ColorMask
;
2570 functions
->DepthFunc
= r300DepthFunc
;
2571 functions
->DepthMask
= r300DepthMask
;
2572 functions
->CullFace
= r300CullFace
;
2573 functions
->FrontFace
= r300FrontFace
;
2574 functions
->ShadeModel
= r300ShadeModel
;
2575 functions
->LogicOpcode
= r300LogicOpcode
;
2577 /* ARB_point_parameters */
2578 functions
->PointParameterfv
= r300PointParameter
;
2580 /* Stencil related */
2581 functions
->StencilFuncSeparate
= r300StencilFuncSeparate
;
2582 functions
->StencilMaskSeparate
= r300StencilMaskSeparate
;
2583 functions
->StencilOpSeparate
= r300StencilOpSeparate
;
2585 /* Viewport related */
2586 functions
->Viewport
= r300Viewport
;
2587 functions
->DepthRange
= r300DepthRange
;
2588 functions
->PointSize
= r300PointSize
;
2589 functions
->LineWidth
= r300LineWidth
;
2591 functions
->PolygonOffset
= r300PolygonOffset
;
2592 functions
->PolygonMode
= r300PolygonMode
;
2594 functions
->RenderMode
= r300RenderMode
;
2596 functions
->ClipPlane
= r300ClipPlane
;
2597 functions
->Scissor
= radeonScissor
;
2599 functions
->DrawBuffer
= radeonDrawBuffer
;
2600 functions
->ReadBuffer
= radeonReadBuffer
;