2 Copyright (C) The Weather Channel, Inc. 2002.
3 Copyright (C) 2004 Nicolai Haehnle.
6 The Weather Channel (TM) funded Tungsten Graphics to develop the
7 initial release of the Radeon 8500 driver under the XFree86 license.
8 This notice must be preserved.
10 Permission is hereby granted, free of charge, to any person obtaining
11 a copy of this software and associated documentation files (the
12 "Software"), to deal in the Software without restriction, including
13 without limitation the rights to use, copy, modify, merge, publish,
14 distribute, sublicense, and/or sell copies of the Software, and to
15 permit persons to whom the Software is furnished to do so, subject to
16 the following conditions:
18 The above copyright notice and this permission notice (including the
19 next paragraph) shall be included in all copies or substantial
20 portions of the Software.
22 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
25 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
26 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
27 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
28 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 **************************************************************************/
35 * \author Nicolai Haehnle <prefect_@gmx.net>
45 #include "simple_list.h"
47 #include "api_arrayelt.h"
48 #include "swrast/swrast.h"
49 #include "swrast_setup/swrast_setup.h"
50 #include "shader/prog_parameter.h"
51 #include "shader/prog_statevars.h"
54 #include "texformat.h"
56 #include "radeon_ioctl.h"
57 #include "radeon_state.h"
58 #include "r300_context.h"
59 #include "r300_ioctl.h"
60 #include "r300_state.h"
62 #include "r300_emit.h"
63 #include "r300_fragprog.h"
66 #include "drirenderbuffer.h"
68 extern int future_hw_tcl_on
;
69 extern void _tnl_UpdateFixedFunctionProgram(GLcontext
* ctx
);
71 static void r300BlendColor(GLcontext
* ctx
, const GLfloat cf
[4])
74 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
76 R300_STATECHANGE(rmesa
, blend_color
);
78 CLAMPED_FLOAT_TO_UBYTE(color
[0], cf
[0]);
79 CLAMPED_FLOAT_TO_UBYTE(color
[1], cf
[1]);
80 CLAMPED_FLOAT_TO_UBYTE(color
[2], cf
[2]);
81 CLAMPED_FLOAT_TO_UBYTE(color
[3], cf
[3]);
83 rmesa
->hw
.blend_color
.cmd
[1] = PACK_COLOR_8888(color
[3], color
[0],
85 rmesa
->hw
.blend_color
.cmd
[2] = 0;
86 rmesa
->hw
.blend_color
.cmd
[3] = 0;
90 * Calculate the hardware blend factor setting. This same function is used
91 * for source and destination of both alpha and RGB.
94 * The hardware register value for the specified blend factor. This value
95 * will need to be shifted into the correct position for either source or
99 * Since the two cases where source and destination are handled differently
100 * are essentially error cases, they should never happen. Determine if these
101 * cases can be removed.
103 static int blend_factor(GLenum factor
, GLboolean is_src
)
107 return R300_BLEND_GL_ZERO
;
110 return R300_BLEND_GL_ONE
;
113 return R300_BLEND_GL_DST_COLOR
;
115 case GL_ONE_MINUS_DST_COLOR
:
116 return R300_BLEND_GL_ONE_MINUS_DST_COLOR
;
119 return R300_BLEND_GL_SRC_COLOR
;
121 case GL_ONE_MINUS_SRC_COLOR
:
122 return R300_BLEND_GL_ONE_MINUS_SRC_COLOR
;
125 return R300_BLEND_GL_SRC_ALPHA
;
127 case GL_ONE_MINUS_SRC_ALPHA
:
128 return R300_BLEND_GL_ONE_MINUS_SRC_ALPHA
;
131 return R300_BLEND_GL_DST_ALPHA
;
133 case GL_ONE_MINUS_DST_ALPHA
:
134 return R300_BLEND_GL_ONE_MINUS_DST_ALPHA
;
136 case GL_SRC_ALPHA_SATURATE
:
137 return (is_src
) ? R300_BLEND_GL_SRC_ALPHA_SATURATE
:
140 case GL_CONSTANT_COLOR
:
141 return R300_BLEND_GL_CONST_COLOR
;
143 case GL_ONE_MINUS_CONSTANT_COLOR
:
144 return R300_BLEND_GL_ONE_MINUS_CONST_COLOR
;
146 case GL_CONSTANT_ALPHA
:
147 return R300_BLEND_GL_CONST_ALPHA
;
149 case GL_ONE_MINUS_CONSTANT_ALPHA
:
150 return R300_BLEND_GL_ONE_MINUS_CONST_ALPHA
;
153 fprintf(stderr
, "unknown blend factor %x\n", factor
);
154 return (is_src
) ? R300_BLEND_GL_ONE
: R300_BLEND_GL_ZERO
;
160 * Sets both the blend equation and the blend function.
161 * This is done in a single
162 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
163 * change the interpretation of the blend function.
164 * Also, make sure that blend function and blend equation are set to their
165 * default value if color blending is not enabled, since at least blend
166 * equations GL_MIN and GL_FUNC_REVERSE_SUBTRACT will cause wrong results
167 * otherwise for unknown reasons.
170 /* helper function */
171 static void r300SetBlendCntl(r300ContextPtr r300
, int func
, int eqn
,
172 int cbits
, int funcA
, int eqnA
)
174 GLuint new_ablend
, new_cblend
;
178 "eqnA=%08x funcA=%08x eqn=%08x func=%08x cbits=%08x\n",
179 eqnA
, funcA
, eqn
, func
, cbits
);
181 new_ablend
= eqnA
| funcA
;
182 new_cblend
= eqn
| func
;
184 /* Some blend factor combinations don't seem to work when the
185 * BLEND_NO_SEPARATE bit is set.
187 * Especially problematic candidates are the ONE_MINUS_* flags,
188 * but I can't see a real pattern.
191 if (new_ablend
== new_cblend
) {
192 new_cblend
|= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0
;
197 if ((new_ablend
!= r300
->hw
.bld
.cmd
[R300_BLD_ABLEND
]) ||
198 (new_cblend
!= r300
->hw
.bld
.cmd
[R300_BLD_CBLEND
])) {
199 R300_STATECHANGE(r300
, bld
);
200 r300
->hw
.bld
.cmd
[R300_BLD_ABLEND
] = new_ablend
;
201 r300
->hw
.bld
.cmd
[R300_BLD_CBLEND
] = new_cblend
;
205 static void r300SetBlendState(GLcontext
* ctx
)
207 r300ContextPtr r300
= R300_CONTEXT(ctx
);
208 int func
= (R300_BLEND_GL_ONE
<< R300_SRC_BLEND_SHIFT
) |
209 (R300_BLEND_GL_ZERO
<< R300_DST_BLEND_SHIFT
);
210 int eqn
= R300_COMB_FCN_ADD_CLAMP
;
211 int funcA
= (R300_BLEND_GL_ONE
<< R300_SRC_BLEND_SHIFT
) |
212 (R300_BLEND_GL_ZERO
<< R300_DST_BLEND_SHIFT
);
213 int eqnA
= R300_COMB_FCN_ADD_CLAMP
;
215 if (RGBA_LOGICOP_ENABLED(ctx
) || !ctx
->Color
.BlendEnabled
) {
216 r300SetBlendCntl(r300
, func
, eqn
, 0, func
, eqn
);
221 (blend_factor(ctx
->Color
.BlendSrcRGB
, GL_TRUE
) <<
222 R300_SRC_BLEND_SHIFT
) | (blend_factor(ctx
->Color
.BlendDstRGB
,
224 R300_DST_BLEND_SHIFT
);
226 switch (ctx
->Color
.BlendEquationRGB
) {
228 eqn
= R300_COMB_FCN_ADD_CLAMP
;
231 case GL_FUNC_SUBTRACT
:
232 eqn
= R300_COMB_FCN_SUB_CLAMP
;
235 case GL_FUNC_REVERSE_SUBTRACT
:
236 eqn
= R300_COMB_FCN_RSUB_CLAMP
;
240 eqn
= R300_COMB_FCN_MIN
;
241 func
= (R300_BLEND_GL_ONE
<< R300_SRC_BLEND_SHIFT
) |
242 (R300_BLEND_GL_ONE
<< R300_DST_BLEND_SHIFT
);
246 eqn
= R300_COMB_FCN_MAX
;
247 func
= (R300_BLEND_GL_ONE
<< R300_SRC_BLEND_SHIFT
) |
248 (R300_BLEND_GL_ONE
<< R300_DST_BLEND_SHIFT
);
253 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
254 __FUNCTION__
, __LINE__
, ctx
->Color
.BlendEquationRGB
);
259 (blend_factor(ctx
->Color
.BlendSrcA
, GL_TRUE
) <<
260 R300_SRC_BLEND_SHIFT
) | (blend_factor(ctx
->Color
.BlendDstA
,
262 R300_DST_BLEND_SHIFT
);
264 switch (ctx
->Color
.BlendEquationA
) {
266 eqnA
= R300_COMB_FCN_ADD_CLAMP
;
269 case GL_FUNC_SUBTRACT
:
270 eqnA
= R300_COMB_FCN_SUB_CLAMP
;
273 case GL_FUNC_REVERSE_SUBTRACT
:
274 eqnA
= R300_COMB_FCN_RSUB_CLAMP
;
278 eqnA
= R300_COMB_FCN_MIN
;
279 funcA
= (R300_BLEND_GL_ONE
<< R300_SRC_BLEND_SHIFT
) |
280 (R300_BLEND_GL_ONE
<< R300_DST_BLEND_SHIFT
);
284 eqnA
= R300_COMB_FCN_MAX
;
285 funcA
= (R300_BLEND_GL_ONE
<< R300_SRC_BLEND_SHIFT
) |
286 (R300_BLEND_GL_ONE
<< R300_DST_BLEND_SHIFT
);
291 "[%s:%u] Invalid A blend equation (0x%04x).\n",
292 __FUNCTION__
, __LINE__
, ctx
->Color
.BlendEquationA
);
296 r300SetBlendCntl(r300
,
298 (R300_SEPARATE_ALPHA_ENABLE
|
300 R300_ALPHA_BLEND_ENABLE
), funcA
, eqnA
);
303 static void r300BlendEquationSeparate(GLcontext
* ctx
,
304 GLenum modeRGB
, GLenum modeA
)
306 r300SetBlendState(ctx
);
309 static void r300BlendFuncSeparate(GLcontext
* ctx
,
310 GLenum sfactorRGB
, GLenum dfactorRGB
,
311 GLenum sfactorA
, GLenum dfactorA
)
313 r300SetBlendState(ctx
);
316 static void r300ClipPlane( GLcontext
*ctx
, GLenum plane
, const GLfloat
*eq
)
318 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
322 /* no VAP UCP on non-TCL chipsets */
323 if (!(rmesa
->radeon
.radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
))
326 p
= (GLint
) plane
- (GLint
) GL_CLIP_PLANE0
;
327 ip
= (GLint
*)ctx
->Transform
._ClipUserPlane
[p
];
329 R300_STATECHANGE( rmesa
, vpucp
[p
] );
330 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_X
] = ip
[0];
331 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_Y
] = ip
[1];
332 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_Z
] = ip
[2];
333 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_W
] = ip
[3];
336 static void r300SetClipPlaneState(GLcontext
* ctx
, GLenum cap
, GLboolean state
)
338 r300ContextPtr r300
= R300_CONTEXT(ctx
);
341 /* no VAP UCP on non-TCL chipsets */
342 if (!(r300
->radeon
.radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
))
345 p
= cap
- GL_CLIP_PLANE0
;
346 R300_STATECHANGE(r300
, vap_clip_cntl
);
348 r300
->hw
.vap_clip_cntl
.cmd
[1] |= (R300_VAP_UCP_ENABLE_0
<< p
);
349 r300ClipPlane(ctx
, cap
, NULL
);
351 r300
->hw
.vap_clip_cntl
.cmd
[1] &= ~(R300_VAP_UCP_ENABLE_0
<< p
);
356 * Update our tracked culling state based on Mesa's state.
358 static void r300UpdateCulling(GLcontext
* ctx
)
360 r300ContextPtr r300
= R300_CONTEXT(ctx
);
363 if (ctx
->Polygon
.CullFlag
) {
364 switch (ctx
->Polygon
.CullFaceMode
) {
366 val
= R300_CULL_FRONT
;
369 val
= R300_CULL_BACK
;
371 case GL_FRONT_AND_BACK
:
372 val
= R300_CULL_FRONT
| R300_CULL_BACK
;
379 switch (ctx
->Polygon
.FrontFace
) {
381 val
|= R300_FRONT_FACE_CW
;
384 val
|= R300_FRONT_FACE_CCW
;
390 R300_STATECHANGE(r300
, cul
);
391 r300
->hw
.cul
.cmd
[R300_CUL_CULL
] = val
;
394 static void r300SetPolygonOffsetState(GLcontext
* ctx
, GLboolean state
)
396 r300ContextPtr r300
= R300_CONTEXT(ctx
);
398 R300_STATECHANGE(r300
, occlusion_cntl
);
400 r300
->hw
.occlusion_cntl
.cmd
[1] |= (3 << 0);
402 r300
->hw
.occlusion_cntl
.cmd
[1] &= ~(3 << 0);
406 static void r300SetEarlyZState(GLcontext
* ctx
)
408 /* updates register R300_RB3D_EARLY_Z (0x4F14)
409 if depth test is not enabled it should be R300_EARLY_Z_DISABLE
410 if depth is enabled and alpha not it should be R300_EARLY_Z_ENABLE
411 if depth and alpha is enabled it should be R300_EARLY_Z_DISABLE
413 r300ContextPtr r300
= R300_CONTEXT(ctx
);
415 R300_STATECHANGE(r300
, zstencil_format
);
416 switch (ctx
->Visual
.depthBits
) {
418 r300
->hw
.zstencil_format
.cmd
[1] = R300_DEPTHFORMAT_16BIT_INT_Z
;
421 r300
->hw
.zstencil_format
.cmd
[1] = R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL
;
424 fprintf(stderr
, "Error: Unsupported depth %d... exiting\n", ctx
->Visual
.depthBits
);
428 if (ctx
->Color
.AlphaEnabled
&& ctx
->Color
.AlphaFunc
!= GL_ALWAYS
)
429 /* disable early Z */
430 r300
->hw
.zstencil_format
.cmd
[2] = R300_ZTOP_DISABLE
;
432 if (ctx
->Depth
.Test
&& ctx
->Depth
.Func
!= GL_NEVER
)
434 r300
->hw
.zstencil_format
.cmd
[2] = R300_ZTOP_ENABLE
;
436 /* disable early Z */
437 r300
->hw
.zstencil_format
.cmd
[2] = R300_ZTOP_DISABLE
;
440 r300
->hw
.zstencil_format
.cmd
[3] = 0x00000003;
441 r300
->hw
.zstencil_format
.cmd
[4] = 0x00000000;
444 static void r300SetAlphaState(GLcontext
* ctx
)
446 r300ContextPtr r300
= R300_CONTEXT(ctx
);
448 uint32_t pp_misc
= 0x0;
449 GLboolean really_enabled
= ctx
->Color
.AlphaEnabled
;
451 CLAMPED_FLOAT_TO_UBYTE(refByte
, ctx
->Color
.AlphaRef
);
453 switch (ctx
->Color
.AlphaFunc
) {
455 pp_misc
|= R300_FG_ALPHA_FUNC_NEVER
;
458 pp_misc
|= R300_FG_ALPHA_FUNC_LESS
;
461 pp_misc
|= R300_FG_ALPHA_FUNC_EQUAL
;
464 pp_misc
|= R300_FG_ALPHA_FUNC_LE
;
467 pp_misc
|= R300_FG_ALPHA_FUNC_GREATER
;
470 pp_misc
|= R300_FG_ALPHA_FUNC_NOTEQUAL
;
473 pp_misc
|= R300_FG_ALPHA_FUNC_GE
;
476 /*pp_misc |= FG_ALPHA_FUNC_ALWAYS; */
477 really_enabled
= GL_FALSE
;
481 if (really_enabled
) {
482 pp_misc
|= R300_FG_ALPHA_FUNC_ENABLE
;
483 pp_misc
|= (refByte
& R300_FG_ALPHA_FUNC_VAL_MASK
);
488 R300_STATECHANGE(r300
, at
);
489 r300
->hw
.at
.cmd
[R300_AT_ALPHA_TEST
] = pp_misc
;
490 r300
->hw
.at
.cmd
[R300_AT_UNKNOWN
] = 0;
492 r300SetEarlyZState(ctx
);
495 static void r300AlphaFunc(GLcontext
* ctx
, GLenum func
, GLfloat ref
)
499 r300SetAlphaState(ctx
);
502 static int translate_func(int func
)
506 return R300_ZS_NEVER
;
510 return R300_ZS_EQUAL
;
512 return R300_ZS_LEQUAL
;
514 return R300_ZS_GREATER
;
516 return R300_ZS_NOTEQUAL
;
518 return R300_ZS_GEQUAL
;
520 return R300_ZS_ALWAYS
;
525 static void r300SetDepthState(GLcontext
* ctx
)
527 r300ContextPtr r300
= R300_CONTEXT(ctx
);
529 R300_STATECHANGE(r300
, zs
);
530 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_0
] &= R300_STENCIL_ENABLE
; // XXX
531 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] &=
532 ~(R300_ZS_MASK
<< R300_Z_FUNC_SHIFT
);
534 if (ctx
->Depth
.Test
&& ctx
->Depth
.Func
!= GL_NEVER
) {
536 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_0
] |=
537 R300_Z_ENABLE
| R300_Z_WRITE_ENABLE
| R300_STENCIL_FRONT_BACK
; // XXX
539 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_0
] |= R300_Z_ENABLE
| R300_STENCIL_FRONT_BACK
; // XXX
541 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] |=
542 translate_func(ctx
->Depth
.
543 Func
) << R300_Z_FUNC_SHIFT
;
545 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_0
] |= R300_STENCIL_FRONT_BACK
; // XXX
546 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] |=
547 translate_func(GL_NEVER
) << R300_Z_FUNC_SHIFT
;
550 r300SetEarlyZState(ctx
);
553 static void r300SetStencilState(GLcontext
* ctx
, GLboolean state
)
555 r300ContextPtr r300
= R300_CONTEXT(ctx
);
557 if (r300
->state
.stencil
.hw_stencil
) {
558 R300_STATECHANGE(r300
, zs
);
560 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_0
] |=
563 r300
->hw
.zs
.cmd
[R300_ZS_CNTL_0
] &=
564 ~R300_STENCIL_ENABLE
;
568 FALLBACK(&r300
->radeon
, RADEON_FALLBACK_STENCIL
, state
);
573 static void r300UpdatePolygonMode(GLcontext
* ctx
)
575 r300ContextPtr r300
= R300_CONTEXT(ctx
);
576 uint32_t hw_mode
= R300_GA_POLY_MODE_DISABLE
;
578 /* Only do something if a polygon mode is wanted, default is GL_FILL */
579 if (ctx
->Polygon
.FrontMode
!= GL_FILL
||
580 ctx
->Polygon
.BackMode
!= GL_FILL
) {
583 /* Handle GL_CW (clock wise and GL_CCW (counter clock wise)
584 * correctly by selecting the correct front and back face
586 if (ctx
->Polygon
.FrontFace
== GL_CCW
) {
587 f
= ctx
->Polygon
.FrontMode
;
588 b
= ctx
->Polygon
.BackMode
;
590 f
= ctx
->Polygon
.BackMode
;
591 b
= ctx
->Polygon
.FrontMode
;
594 /* Enable polygon mode */
595 hw_mode
|= R300_GA_POLY_MODE_DUAL
;
599 hw_mode
|= R300_GA_POLY_MODE_FRONT_PTYPE_LINE
;
602 hw_mode
|= R300_GA_POLY_MODE_FRONT_PTYPE_POINT
;
605 hw_mode
|= R300_GA_POLY_MODE_FRONT_PTYPE_TRI
;
611 hw_mode
|= R300_GA_POLY_MODE_BACK_PTYPE_LINE
;
614 hw_mode
|= R300_GA_POLY_MODE_BACK_PTYPE_POINT
;
617 hw_mode
|= R300_GA_POLY_MODE_BACK_PTYPE_TRI
;
622 if (r300
->hw
.polygon_mode
.cmd
[1] != hw_mode
) {
623 R300_STATECHANGE(r300
, polygon_mode
);
624 r300
->hw
.polygon_mode
.cmd
[1] = hw_mode
;
627 r300
->hw
.polygon_mode
.cmd
[2] = 0x00000001;
628 r300
->hw
.polygon_mode
.cmd
[3] = 0x00000000;
632 * Change the culling mode.
634 * \note Mesa already filters redundant calls to this function.
636 static void r300CullFace(GLcontext
* ctx
, GLenum mode
)
640 r300UpdateCulling(ctx
);
644 * Change the polygon orientation.
646 * \note Mesa already filters redundant calls to this function.
648 static void r300FrontFace(GLcontext
* ctx
, GLenum mode
)
652 r300UpdateCulling(ctx
);
653 r300UpdatePolygonMode(ctx
);
657 * Change the depth testing function.
659 * \note Mesa already filters redundant calls to this function.
661 static void r300DepthFunc(GLcontext
* ctx
, GLenum func
)
664 r300SetDepthState(ctx
);
668 * Enable/Disable depth writing.
670 * \note Mesa already filters redundant calls to this function.
672 static void r300DepthMask(GLcontext
* ctx
, GLboolean mask
)
675 r300SetDepthState(ctx
);
679 * Handle glColorMask()
681 static void r300ColorMask(GLcontext
* ctx
,
682 GLboolean r
, GLboolean g
, GLboolean b
, GLboolean a
)
684 r300ContextPtr r300
= R300_CONTEXT(ctx
);
685 int mask
= (r
? RB3D_COLOR_CHANNEL_MASK_RED_MASK0
: 0) |
686 (g
? RB3D_COLOR_CHANNEL_MASK_GREEN_MASK0
: 0) |
687 (b
? RB3D_COLOR_CHANNEL_MASK_BLUE_MASK0
: 0) |
688 (a
? RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK0
: 0);
690 if (mask
!= r300
->hw
.cmk
.cmd
[R300_CMK_COLORMASK
]) {
691 R300_STATECHANGE(r300
, cmk
);
692 r300
->hw
.cmk
.cmd
[R300_CMK_COLORMASK
] = mask
;
696 /* =============================================================
699 static void r300Fogfv(GLcontext
* ctx
, GLenum pname
, const GLfloat
* param
)
701 r300ContextPtr r300
= R300_CONTEXT(ctx
);
705 } fogScale
, fogStart
;
709 fogScale
.i
= r300
->hw
.fogp
.cmd
[R300_FOGP_SCALE
];
710 fogStart
.i
= r300
->hw
.fogp
.cmd
[R300_FOGP_START
];
714 if (!ctx
->Fog
.Enabled
)
716 switch (ctx
->Fog
.Mode
) {
718 R300_STATECHANGE(r300
, fogs
);
719 r300
->hw
.fogs
.cmd
[R300_FOGS_STATE
] =
721 cmd
[R300_FOGS_STATE
] & ~R300_FG_FOG_BLEND_FN_MASK
) |
722 R300_FG_FOG_BLEND_FN_LINEAR
;
724 if (ctx
->Fog
.Start
== ctx
->Fog
.End
) {
729 1.0 / (ctx
->Fog
.End
- ctx
->Fog
.Start
);
731 -ctx
->Fog
.Start
/ (ctx
->Fog
.End
-
736 R300_STATECHANGE(r300
, fogs
);
737 r300
->hw
.fogs
.cmd
[R300_FOGS_STATE
] =
739 cmd
[R300_FOGS_STATE
] & ~R300_FG_FOG_BLEND_FN_MASK
) |
740 R300_FG_FOG_BLEND_FN_EXP
;
741 fogScale
.f
= 0.0933 * ctx
->Fog
.Density
;
745 R300_STATECHANGE(r300
, fogs
);
746 r300
->hw
.fogs
.cmd
[R300_FOGS_STATE
] =
748 cmd
[R300_FOGS_STATE
] & ~R300_FG_FOG_BLEND_FN_MASK
) |
749 R300_FG_FOG_BLEND_FN_EXP2
;
750 fogScale
.f
= 0.3 * ctx
->Fog
.Density
;
757 switch (ctx
->Fog
.Mode
) {
759 fogScale
.f
= 0.0933 * ctx
->Fog
.Density
;
763 fogScale
.f
= 0.3 * ctx
->Fog
.Density
;
771 if (ctx
->Fog
.Mode
== GL_LINEAR
) {
772 if (ctx
->Fog
.Start
== ctx
->Fog
.End
) {
777 1.0 / (ctx
->Fog
.End
- ctx
->Fog
.Start
);
779 -ctx
->Fog
.Start
/ (ctx
->Fog
.End
-
785 R300_STATECHANGE(r300
, fogc
);
786 r300
->hw
.fogc
.cmd
[R300_FOGC_R
] =
787 (GLuint
) (ctx
->Fog
.Color
[0] * 1023.0F
) & 0x3FF;
788 r300
->hw
.fogc
.cmd
[R300_FOGC_G
] =
789 (GLuint
) (ctx
->Fog
.Color
[1] * 1023.0F
) & 0x3FF;
790 r300
->hw
.fogc
.cmd
[R300_FOGC_B
] =
791 (GLuint
) (ctx
->Fog
.Color
[2] * 1023.0F
) & 0x3FF;
793 case GL_FOG_COORD_SRC
:
799 if (fogScale
.i
!= r300
->hw
.fogp
.cmd
[R300_FOGP_SCALE
] ||
800 fogStart
.i
!= r300
->hw
.fogp
.cmd
[R300_FOGP_START
]) {
801 R300_STATECHANGE(r300
, fogp
);
802 r300
->hw
.fogp
.cmd
[R300_FOGP_SCALE
] = fogScale
.i
;
803 r300
->hw
.fogp
.cmd
[R300_FOGP_START
] = fogStart
.i
;
807 static void r300SetFogState(GLcontext
* ctx
, GLboolean state
)
809 r300ContextPtr r300
= R300_CONTEXT(ctx
);
811 R300_STATECHANGE(r300
, fogs
);
813 r300
->hw
.fogs
.cmd
[R300_FOGS_STATE
] |= R300_FG_FOG_BLEND_ENABLE
;
815 r300Fogfv(ctx
, GL_FOG_MODE
, NULL
);
816 r300Fogfv(ctx
, GL_FOG_DENSITY
, &ctx
->Fog
.Density
);
817 r300Fogfv(ctx
, GL_FOG_START
, &ctx
->Fog
.Start
);
818 r300Fogfv(ctx
, GL_FOG_END
, &ctx
->Fog
.End
);
819 r300Fogfv(ctx
, GL_FOG_COLOR
, ctx
->Fog
.Color
);
821 r300
->hw
.fogs
.cmd
[R300_FOGS_STATE
] &= ~R300_FG_FOG_BLEND_ENABLE
;
825 /* =============================================================
828 static void r300PointSize(GLcontext
* ctx
, GLfloat size
)
830 r300ContextPtr r300
= R300_CONTEXT(ctx
);
831 /* same size limits for AA, non-AA points */
832 size
= CLAMP(size
, ctx
->Const
.MinPointSize
, ctx
->Const
.MaxPointSize
);
834 R300_STATECHANGE(r300
, ps
);
835 r300
->hw
.ps
.cmd
[R300_PS_POINTSIZE
] =
836 ((int)(size
* 6) << R300_POINTSIZE_X_SHIFT
) |
837 ((int)(size
* 6) << R300_POINTSIZE_Y_SHIFT
);
840 /* =============================================================
843 static void r300LineWidth(GLcontext
* ctx
, GLfloat widthf
)
845 r300ContextPtr r300
= R300_CONTEXT(ctx
);
847 widthf
= CLAMP(widthf
,
848 ctx
->Const
.MinPointSize
,
849 ctx
->Const
.MaxPointSize
);
850 R300_STATECHANGE(r300
, lcntl
);
851 r300
->hw
.lcntl
.cmd
[1] =
852 R300_LINE_CNT_HO
| R300_LINE_CNT_VE
| (int)(widthf
* 6.0);
855 static void r300PolygonMode(GLcontext
* ctx
, GLenum face
, GLenum mode
)
860 r300UpdatePolygonMode(ctx
);
863 /* =============================================================
867 static int translate_stencil_op(int op
)
875 return R300_ZS_REPLACE
;
880 case GL_INCR_WRAP_EXT
:
881 return R300_ZS_INCR_WRAP
;
882 case GL_DECR_WRAP_EXT
:
883 return R300_ZS_DECR_WRAP
;
885 return R300_ZS_INVERT
;
887 WARN_ONCE("Do not know how to translate stencil op");
893 static void r300ShadeModel(GLcontext
* ctx
, GLenum mode
)
895 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
897 R300_STATECHANGE(rmesa
, shade
);
898 rmesa
->hw
.shade
.cmd
[1] = 0x00000002;
901 rmesa
->hw
.shade
.cmd
[2] = R300_RE_SHADE_MODEL_FLAT
;
904 rmesa
->hw
.shade
.cmd
[2] = R300_RE_SHADE_MODEL_SMOOTH
;
909 rmesa
->hw
.shade
.cmd
[3] = 0x00000000;
910 rmesa
->hw
.shade
.cmd
[4] = 0x00000000;
913 static void r300StencilFuncSeparate(GLcontext
* ctx
, GLenum face
,
914 GLenum func
, GLint ref
, GLuint mask
)
916 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
919 Ref
[0] & 0xff) << R300_STENCILREF_SHIFT
) | ((ctx
->
925 R300_STENCILMASK_SHIFT
));
929 R300_STATECHANGE(rmesa
, zs
);
931 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] &= ~((R300_ZS_MASK
<<
932 R300_S_FRONT_FUNC_SHIFT
)
934 R300_S_BACK_FUNC_SHIFT
));
936 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_2
] &=
937 ~((R300_STENCILREF_MASK
<< R300_STENCILREF_SHIFT
) |
938 (R300_STENCILREF_MASK
<< R300_STENCILMASK_SHIFT
));
940 flag
= translate_func(ctx
->Stencil
.Function
[0]);
941 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] |=
942 (flag
<< R300_S_FRONT_FUNC_SHIFT
);
944 if (ctx
->Stencil
._TestTwoSide
)
945 flag
= translate_func(ctx
->Stencil
.Function
[1]);
947 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] |=
948 (flag
<< R300_S_BACK_FUNC_SHIFT
);
949 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_2
] |= refmask
;
952 static void r300StencilMaskSeparate(GLcontext
* ctx
, GLenum face
, GLuint mask
)
954 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
956 R300_STATECHANGE(rmesa
, zs
);
957 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_2
] &=
958 ~(R300_STENCILREF_MASK
<<
959 R300_STENCILWRITEMASK_SHIFT
);
960 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_2
] |=
962 WriteMask
[0] & R300_STENCILREF_MASK
) <<
963 R300_STENCILWRITEMASK_SHIFT
;
966 static void r300StencilOpSeparate(GLcontext
* ctx
, GLenum face
,
967 GLenum fail
, GLenum zfail
, GLenum zpass
)
969 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
971 R300_STATECHANGE(rmesa
, zs
);
972 /* It is easier to mask what's left.. */
973 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] &=
974 (R300_ZS_MASK
<< R300_Z_FUNC_SHIFT
) |
975 (R300_ZS_MASK
<< R300_S_FRONT_FUNC_SHIFT
) |
976 (R300_ZS_MASK
<< R300_S_BACK_FUNC_SHIFT
);
978 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] |=
979 (translate_stencil_op(ctx
->Stencil
.FailFunc
[0]) <<
980 R300_S_FRONT_SFAIL_OP_SHIFT
)
981 | (translate_stencil_op(ctx
->Stencil
.ZFailFunc
[0]) <<
982 R300_S_FRONT_ZFAIL_OP_SHIFT
)
983 | (translate_stencil_op(ctx
->Stencil
.ZPassFunc
[0]) <<
984 R300_S_FRONT_ZPASS_OP_SHIFT
);
986 if (ctx
->Stencil
._TestTwoSide
) {
987 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] |=
988 (translate_stencil_op(ctx
->Stencil
.FailFunc
[1]) <<
989 R300_S_BACK_SFAIL_OP_SHIFT
)
990 | (translate_stencil_op(ctx
->Stencil
.ZFailFunc
[1]) <<
991 R300_S_BACK_ZFAIL_OP_SHIFT
)
992 | (translate_stencil_op(ctx
->Stencil
.ZPassFunc
[1]) <<
993 R300_S_BACK_ZPASS_OP_SHIFT
);
995 rmesa
->hw
.zs
.cmd
[R300_ZS_CNTL_1
] |=
996 (translate_stencil_op(ctx
->Stencil
.FailFunc
[0]) <<
997 R300_S_BACK_SFAIL_OP_SHIFT
)
998 | (translate_stencil_op(ctx
->Stencil
.ZFailFunc
[0]) <<
999 R300_S_BACK_ZFAIL_OP_SHIFT
)
1000 | (translate_stencil_op(ctx
->Stencil
.ZPassFunc
[0]) <<
1001 R300_S_BACK_ZPASS_OP_SHIFT
);
1005 static void r300ClearStencil(GLcontext
* ctx
, GLint s
)
1007 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
1009 rmesa
->state
.stencil
.clear
=
1010 ((GLuint
) (ctx
->Stencil
.Clear
& R300_STENCILREF_MASK
) |
1011 (R300_STENCILREF_MASK
<< R300_STENCILMASK_SHIFT
) |
1012 ((ctx
->Stencil
.WriteMask
[0] & R300_STENCILREF_MASK
) <<
1013 R300_STENCILMASK_SHIFT
));
1016 /* =============================================================
1017 * Window position and viewport transformation
1021 * To correctly position primitives:
1023 #define SUBPIXEL_X 0.125
1024 #define SUBPIXEL_Y 0.125
1026 static void r300UpdateWindow(GLcontext
* ctx
)
1028 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
1029 __DRIdrawablePrivate
*dPriv
= rmesa
->radeon
.dri
.drawable
;
1030 GLfloat xoffset
= dPriv
? (GLfloat
) dPriv
->x
: 0;
1031 GLfloat yoffset
= dPriv
? (GLfloat
) dPriv
->y
+ dPriv
->h
: 0;
1032 const GLfloat
*v
= ctx
->Viewport
._WindowMap
.m
;
1034 GLfloat sx
= v
[MAT_SX
];
1035 GLfloat tx
= v
[MAT_TX
] + xoffset
+ SUBPIXEL_X
;
1036 GLfloat sy
= -v
[MAT_SY
];
1037 GLfloat ty
= (-v
[MAT_TY
]) + yoffset
+ SUBPIXEL_Y
;
1038 GLfloat sz
= v
[MAT_SZ
] * rmesa
->state
.depth
.scale
;
1039 GLfloat tz
= v
[MAT_TZ
] * rmesa
->state
.depth
.scale
;
1041 R300_FIREVERTICES(rmesa
);
1042 R300_STATECHANGE(rmesa
, vpt
);
1044 rmesa
->hw
.vpt
.cmd
[R300_VPT_XSCALE
] = r300PackFloat32(sx
);
1045 rmesa
->hw
.vpt
.cmd
[R300_VPT_XOFFSET
] = r300PackFloat32(tx
);
1046 rmesa
->hw
.vpt
.cmd
[R300_VPT_YSCALE
] = r300PackFloat32(sy
);
1047 rmesa
->hw
.vpt
.cmd
[R300_VPT_YOFFSET
] = r300PackFloat32(ty
);
1048 rmesa
->hw
.vpt
.cmd
[R300_VPT_ZSCALE
] = r300PackFloat32(sz
);
1049 rmesa
->hw
.vpt
.cmd
[R300_VPT_ZOFFSET
] = r300PackFloat32(tz
);
1052 static void r300Viewport(GLcontext
* ctx
, GLint x
, GLint y
,
1053 GLsizei width
, GLsizei height
)
1055 /* Don't pipeline viewport changes, conflict with window offset
1056 * setting below. Could apply deltas to rescue pipelined viewport
1057 * values, or keep the originals hanging around.
1059 r300UpdateWindow(ctx
);
1062 static void r300DepthRange(GLcontext
* ctx
, GLclampd nearval
, GLclampd farval
)
1064 r300UpdateWindow(ctx
);
1067 void r300UpdateViewportOffset(GLcontext
* ctx
)
1069 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
1070 __DRIdrawablePrivate
*dPriv
= ((radeonContextPtr
) rmesa
)->dri
.drawable
;
1071 GLfloat xoffset
= (GLfloat
) dPriv
->x
;
1072 GLfloat yoffset
= (GLfloat
) dPriv
->y
+ dPriv
->h
;
1073 const GLfloat
*v
= ctx
->Viewport
._WindowMap
.m
;
1075 GLfloat tx
= v
[MAT_TX
] + xoffset
+ SUBPIXEL_X
;
1076 GLfloat ty
= (-v
[MAT_TY
]) + yoffset
+ SUBPIXEL_Y
;
1078 if (rmesa
->hw
.vpt
.cmd
[R300_VPT_XOFFSET
] != r300PackFloat32(tx
) ||
1079 rmesa
->hw
.vpt
.cmd
[R300_VPT_YOFFSET
] != r300PackFloat32(ty
)) {
1080 /* Note: this should also modify whatever data the context reset
1083 R300_STATECHANGE(rmesa
, vpt
);
1084 rmesa
->hw
.vpt
.cmd
[R300_VPT_XOFFSET
] = r300PackFloat32(tx
);
1085 rmesa
->hw
.vpt
.cmd
[R300_VPT_YOFFSET
] = r300PackFloat32(ty
);
1089 radeonUpdateScissor(ctx
);
1093 * Tell the card where to render (offset, pitch).
1094 * Effected by glDrawBuffer, etc
1096 void r300UpdateDrawBuffer(GLcontext
* ctx
)
1098 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
1099 r300ContextPtr r300
= rmesa
;
1100 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
1101 driRenderbuffer
*drb
;
1103 if (fb
->_ColorDrawBufferIndexes
[0] == BUFFER_FRONT_LEFT
) {
1106 (driRenderbuffer
*) fb
->Attachment
[BUFFER_FRONT_LEFT
].
1108 } else if (fb
->_ColorDrawBufferIndexes
[0] == BUFFER_BACK_LEFT
) {
1111 (driRenderbuffer
*) fb
->Attachment
[BUFFER_BACK_LEFT
].
1114 /* drawing to multiple buffers, or none */
1119 assert(drb
->flippedPitch
);
1121 R300_STATECHANGE(rmesa
, cb
);
1123 r300
->hw
.cb
.cmd
[R300_CB_OFFSET
] = drb
->flippedOffset
+ //r300->radeon.state.color.drawOffset +
1124 r300
->radeon
.radeonScreen
->fbLocation
;
1125 r300
->hw
.cb
.cmd
[R300_CB_PITCH
] = drb
->flippedPitch
; //r300->radeon.state.color.drawPitch;
1127 if (r300
->radeon
.radeonScreen
->cpp
== 4)
1128 r300
->hw
.cb
.cmd
[R300_CB_PITCH
] |= R300_COLOR_FORMAT_ARGB8888
;
1130 r300
->hw
.cb
.cmd
[R300_CB_PITCH
] |= R300_COLOR_FORMAT_RGB565
;
1132 if (r300
->radeon
.sarea
->tiling_enabled
)
1133 r300
->hw
.cb
.cmd
[R300_CB_PITCH
] |= R300_COLOR_TILE_ENABLE
;
1135 R200_STATECHANGE(rmesa
, ctx
);
1137 /* Note: we used the (possibly) page-flipped values */
1138 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_COLOROFFSET
]
1139 = ((drb
->flippedOffset
+ rmesa
->r200Screen
->fbLocation
)
1140 & R200_COLOROFFSET_MASK
);
1141 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_COLORPITCH
] = drb
->flippedPitch
;
1143 if (rmesa
->sarea
->tiling_enabled
) {
1144 rmesa
->hw
.ctx
.cmd
[CTX_RB3D_COLORPITCH
] |=
1145 R200_COLOR_TILE_ENABLE
;
1151 r300FetchStateParameter(GLcontext
* ctx
,
1152 const gl_state_index state
[STATE_LENGTH
],
1155 r300ContextPtr r300
= R300_CONTEXT(ctx
);
1158 case STATE_INTERNAL
:
1160 case STATE_R300_WINDOW_DIMENSION
:
1161 value
[0] = r300
->radeon
.dri
.drawable
->w
* 0.5f
; /* width*0.5 */
1162 value
[1] = r300
->radeon
.dri
.drawable
->h
* 0.5f
; /* height*0.5 */
1163 value
[2] = 0.5F
; /* for moving range [-1 1] -> [0 1] */
1164 value
[3] = 1.0F
; /* not used */
1167 case STATE_R300_TEXRECT_FACTOR
:{
1168 struct gl_texture_object
*t
=
1169 ctx
->Texture
.Unit
[state
[2]].CurrentRect
;
1171 if (t
&& t
->Image
[0][t
->BaseLevel
]) {
1172 struct gl_texture_image
*image
=
1173 t
->Image
[0][t
->BaseLevel
];
1174 value
[0] = 1.0 / image
->Width2
;
1175 value
[1] = 1.0 / image
->Height2
;
1196 * Update R300's own internal state parameters.
1197 * For now just STATE_R300_WINDOW_DIMENSION
1199 void r300UpdateStateParameters(GLcontext
* ctx
, GLuint new_state
)
1201 struct r300_fragment_program
*fp
;
1202 struct gl_program_parameter_list
*paramList
;
1205 if (!(new_state
& (_NEW_BUFFERS
| _NEW_PROGRAM
)))
1208 fp
= (struct r300_fragment_program
*)ctx
->FragmentProgram
._Current
;
1212 paramList
= fp
->mesa_program
.Base
.Parameters
;
1217 for (i
= 0; i
< paramList
->NumParameters
; i
++) {
1218 if (paramList
->Parameters
[i
].Type
== PROGRAM_STATE_VAR
) {
1219 r300FetchStateParameter(ctx
,
1220 paramList
->Parameters
[i
].
1222 paramList
->ParameterValues
[i
]);
1227 /* =============================================================
1230 static void r300PolygonOffset(GLcontext
* ctx
, GLfloat factor
, GLfloat units
)
1232 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
1233 GLfloat constant
= units
;
1235 switch (ctx
->Visual
.depthBits
) {
1246 /* fprintf(stderr, "%s f:%f u:%f\n", __FUNCTION__, factor, constant); */
1248 R300_STATECHANGE(rmesa
, zbs
);
1249 rmesa
->hw
.zbs
.cmd
[R300_ZBS_T_FACTOR
] = r300PackFloat32(factor
);
1250 rmesa
->hw
.zbs
.cmd
[R300_ZBS_T_CONSTANT
] = r300PackFloat32(constant
);
1251 rmesa
->hw
.zbs
.cmd
[R300_ZBS_W_FACTOR
] = r300PackFloat32(factor
);
1252 rmesa
->hw
.zbs
.cmd
[R300_ZBS_W_CONSTANT
] = r300PackFloat32(constant
);
1255 /* Routing and texture-related */
1257 /* r300 doesnt handle GL_CLAMP and GL_MIRROR_CLAMP_EXT correctly when filter is NEAREST.
1258 * Since texwrap produces same results for GL_CLAMP and GL_CLAMP_TO_EDGE we use them instead.
1259 * We need to recalculate wrap modes whenever filter mode is changed because someone might do:
1260 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST);
1261 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP);
1262 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
1263 * Since r300 completely ignores R300_TX_CLAMP when either min or mag is nearest it cant handle
1264 * combinations where only one of them is nearest.
1266 static unsigned long gen_fixed_filter(unsigned long f
)
1268 unsigned long mag
, min
, needs_fixing
= 0;
1271 /* We ignore MIRROR bit so we dont have to do everything twice */
1272 if ((f
& ((7 - 1) << R300_TX_WRAP_S_SHIFT
)) ==
1273 (R300_TX_CLAMP
<< R300_TX_WRAP_S_SHIFT
)) {
1276 if ((f
& ((7 - 1) << R300_TX_WRAP_T_SHIFT
)) ==
1277 (R300_TX_CLAMP
<< R300_TX_WRAP_T_SHIFT
)) {
1280 if ((f
& ((7 - 1) << R300_TX_WRAP_Q_SHIFT
)) ==
1281 (R300_TX_CLAMP
<< R300_TX_WRAP_Q_SHIFT
)) {
1288 mag
= f
& R300_TX_MAG_FILTER_MASK
;
1289 min
= f
& R300_TX_MIN_FILTER_MASK
;
1291 /* TODO: Check for anisto filters too */
1292 if ((mag
!= R300_TX_MAG_FILTER_NEAREST
)
1293 && (min
!= R300_TX_MIN_FILTER_NEAREST
))
1296 /* r300 cant handle these modes hence we force nearest to linear */
1297 if ((mag
== R300_TX_MAG_FILTER_NEAREST
)
1298 && (min
!= R300_TX_MIN_FILTER_NEAREST
)) {
1299 f
&= ~R300_TX_MAG_FILTER_NEAREST
;
1300 f
|= R300_TX_MAG_FILTER_LINEAR
;
1304 if ((min
== R300_TX_MIN_FILTER_NEAREST
)
1305 && (mag
!= R300_TX_MAG_FILTER_NEAREST
)) {
1306 f
&= ~R300_TX_MIN_FILTER_NEAREST
;
1307 f
|= R300_TX_MIN_FILTER_LINEAR
;
1311 /* Both are nearest */
1312 if (needs_fixing
& 1) {
1313 f
&= ~((7 - 1) << R300_TX_WRAP_S_SHIFT
);
1314 f
|= R300_TX_CLAMP_TO_EDGE
<< R300_TX_WRAP_S_SHIFT
;
1316 if (needs_fixing
& 2) {
1317 f
&= ~((7 - 1) << R300_TX_WRAP_T_SHIFT
);
1318 f
|= R300_TX_CLAMP_TO_EDGE
<< R300_TX_WRAP_T_SHIFT
;
1320 if (needs_fixing
& 4) {
1321 f
&= ~((7 - 1) << R300_TX_WRAP_Q_SHIFT
);
1322 f
|= R300_TX_CLAMP_TO_EDGE
<< R300_TX_WRAP_Q_SHIFT
;
1327 static void r300SetupTextures(GLcontext
* ctx
)
1330 struct r300_tex_obj
*t
;
1331 r300ContextPtr r300
= R300_CONTEXT(ctx
);
1333 int last_hw_tmu
= -1; /* -1 translates into no setup costs for fields */
1334 int tmu_mappings
[R300_MAX_TEXTURE_UNITS
] = { -1, };
1335 struct r300_fragment_program
*fp
= (struct r300_fragment_program
*)
1336 (char *)ctx
->FragmentProgram
._Current
;
1338 R300_STATECHANGE(r300
, txe
);
1339 R300_STATECHANGE(r300
, tex
.filter
);
1340 R300_STATECHANGE(r300
, tex
.filter_1
);
1341 R300_STATECHANGE(r300
, tex
.size
);
1342 R300_STATECHANGE(r300
, tex
.format
);
1343 R300_STATECHANGE(r300
, tex
.pitch
);
1344 R300_STATECHANGE(r300
, tex
.offset
);
1345 R300_STATECHANGE(r300
, tex
.chroma_key
);
1346 R300_STATECHANGE(r300
, tex
.border_color
);
1348 r300
->hw
.txe
.cmd
[R300_TXE_ENABLE
] = 0x0;
1350 mtu
= r300
->radeon
.glCtx
->Const
.MaxTextureUnits
;
1351 if (RADEON_DEBUG
& DEBUG_STATE
)
1352 fprintf(stderr
, "mtu=%d\n", mtu
);
1354 if (mtu
> R300_MAX_TEXTURE_UNITS
) {
1356 "Aiiee ! mtu=%d is greater than R300_MAX_TEXTURE_UNITS=%d\n",
1357 mtu
, R300_MAX_TEXTURE_UNITS
);
1361 /* We cannot let disabled tmu offsets pass DRM */
1362 for (i
= 0; i
< mtu
; i
++) {
1363 if (ctx
->Texture
.Unit
[i
]._ReallyEnabled
) {
1365 #if 0 /* Enables old behaviour */
1368 tmu_mappings
[i
] = hw_tmu
;
1370 t
= r300
->state
.texture
.unit
[i
].texobj
;
1371 /* XXX questionable fix for bug 9170: */
1375 if ((t
->format
& 0xffffff00) == 0xffffff00) {
1377 ("unknown texture format (entry %x) encountered. Help me !\n",
1381 if (RADEON_DEBUG
& DEBUG_STATE
)
1383 "Activating texture unit %d\n", i
);
1385 r300
->hw
.txe
.cmd
[R300_TXE_ENABLE
] |= (1 << hw_tmu
);
1387 r300
->hw
.tex
.filter
.cmd
[R300_TEX_VALUE_0
+
1389 gen_fixed_filter(t
->filter
) | (hw_tmu
<< 28);
1390 /* Currently disabled! */
1391 r300
->hw
.tex
.filter_1
.cmd
[R300_TEX_VALUE_0
+ hw_tmu
] = 0x0; //0x20501f80;
1392 r300
->hw
.tex
.size
.cmd
[R300_TEX_VALUE_0
+ hw_tmu
] =
1394 r300
->hw
.tex
.format
.cmd
[R300_TEX_VALUE_0
+
1395 hw_tmu
] = t
->format
;
1396 r300
->hw
.tex
.pitch
.cmd
[R300_TEX_VALUE_0
+ hw_tmu
] =
1398 r300
->hw
.tex
.offset
.cmd
[R300_TEX_VALUE_0
+
1399 hw_tmu
] = t
->offset
;
1401 if (t
->offset
& R300_TXO_MACRO_TILE
) {
1402 WARN_ONCE("macro tiling enabled!\n");
1405 if (t
->offset
& R300_TXO_MICRO_TILE
) {
1406 WARN_ONCE("micro tiling enabled!\n");
1409 r300
->hw
.tex
.chroma_key
.cmd
[R300_TEX_VALUE_0
+
1411 r300
->hw
.tex
.border_color
.cmd
[R300_TEX_VALUE_0
+
1415 last_hw_tmu
= hw_tmu
;
1421 r300
->hw
.tex
.filter
.cmd
[R300_TEX_CMD_0
] =
1422 cmdpacket0(R300_TX_FILTER0_0
, last_hw_tmu
+ 1);
1423 r300
->hw
.tex
.filter_1
.cmd
[R300_TEX_CMD_0
] =
1424 cmdpacket0(R300_TX_FILTER1_0
, last_hw_tmu
+ 1);
1425 r300
->hw
.tex
.size
.cmd
[R300_TEX_CMD_0
] =
1426 cmdpacket0(R300_TX_SIZE_0
, last_hw_tmu
+ 1);
1427 r300
->hw
.tex
.format
.cmd
[R300_TEX_CMD_0
] =
1428 cmdpacket0(R300_TX_FORMAT_0
, last_hw_tmu
+ 1);
1429 r300
->hw
.tex
.pitch
.cmd
[R300_TEX_CMD_0
] =
1430 cmdpacket0(R300_TX_FORMAT2_0
, last_hw_tmu
+ 1);
1431 r300
->hw
.tex
.offset
.cmd
[R300_TEX_CMD_0
] =
1432 cmdpacket0(R300_TX_OFFSET_0
, last_hw_tmu
+ 1);
1433 r300
->hw
.tex
.chroma_key
.cmd
[R300_TEX_CMD_0
] =
1434 cmdpacket0(R300_TX_CHROMA_KEY_0
, last_hw_tmu
+ 1);
1435 r300
->hw
.tex
.border_color
.cmd
[R300_TEX_CMD_0
] =
1436 cmdpacket0(R300_TX_BORDER_COLOR_0
, last_hw_tmu
+ 1);
1438 if (!fp
) /* should only happenen once, just after context is created */
1442 if (r300
->radeon
.radeonScreen
->chip_family
< CHIP_FAMILY_RV515
) {
1443 R300_STATECHANGE(r300
, fpt
);
1445 for (i
= 0; i
< fp
->tex
.length
; i
++) {
1450 unit
= fp
->tex
.inst
[i
] >> R300_TEX_ID_SHIFT
;
1453 val
= fp
->tex
.inst
[i
];
1454 val
&= ~R300_TEX_ID_MASK
;
1457 (val
& R300_TEX_INST_MASK
) >> R300_TEX_INST_SHIFT
;
1458 if (opcode
== R300_TEX_OP_KIL
) {
1459 r300
->hw
.fpt
.cmd
[R300_FPT_INSTR_0
+ i
] = val
;
1461 if (tmu_mappings
[unit
] >= 0) {
1463 tmu_mappings
[unit
] <<
1465 r300
->hw
.fpt
.cmd
[R300_FPT_INSTR_0
+ i
] = val
;
1467 // We get here when the corresponding texture image is incomplete
1468 // (e.g. incomplete mipmaps etc.)
1469 r300
->hw
.fpt
.cmd
[R300_FPT_INSTR_0
+ i
] = val
;
1474 r300
->hw
.fpt
.cmd
[R300_FPT_CMD_0
] =
1475 cmdpacket0(R300_US_TEX_INST_0
, fp
->tex
.length
);
1478 if (RADEON_DEBUG
& DEBUG_STATE
)
1479 fprintf(stderr
, "TX_ENABLE: %08x last_hw_tmu=%d\n",
1480 r300
->hw
.txe
.cmd
[R300_TXE_ENABLE
], last_hw_tmu
);
1483 union r300_outputs_written
{
1484 GLuint vp_outputs
; /* hw_tcl_on */
1485 DECLARE_RENDERINPUTS(index_bitset
); /* !hw_tcl_on */
1488 #define R300_OUTPUTS_WRITTEN_TEST(ow, vp_result, tnl_attrib) \
1489 ((hw_tcl_on) ? (ow).vp_outputs & (1 << (vp_result)) : \
1490 RENDERINPUTS_TEST( (ow.index_bitset), (tnl_attrib) ))
1492 static void r300SetupRSUnit(GLcontext
* ctx
)
1494 r300ContextPtr r300
= R300_CONTEXT(ctx
);
1495 /* I'm still unsure if these are needed */
1496 GLuint interp_col
[8];
1497 TNLcontext
*tnl
= TNL_CONTEXT(ctx
);
1498 struct vertex_buffer
*VB
= &tnl
->vb
;
1499 union r300_outputs_written OutputsWritten
;
1501 int fp_reg
, high_rr
;
1503 int rs_tex_count
= 0, rs_col_count
= 0;
1506 memset(interp_col
, 0, sizeof(interp_col
));
1509 OutputsWritten
.vp_outputs
= CURRENT_VERTEX_SHADER(ctx
)->key
.OutputsWritten
;
1511 RENDERINPUTS_COPY(OutputsWritten
.index_bitset
, r300
->state
.render_inputs_bitset
);
1513 if (ctx
->FragmentProgram
._Current
)
1514 InputsRead
= ctx
->FragmentProgram
._Current
->Base
.InputsRead
;
1516 fprintf(stderr
, "No ctx->FragmentProgram._Current!!\n");
1517 return; /* This should only ever happen once.. */
1520 R300_STATECHANGE(r300
, ri
);
1521 R300_STATECHANGE(r300
, rc
);
1522 R300_STATECHANGE(r300
, rr
);
1524 fp_reg
= col_interp_nr
= high_rr
= 0;
1526 r300
->hw
.rr
.cmd
[R300_RR_INST_1
] = 0;
1528 if (InputsRead
& FRAG_BIT_WPOS
) {
1529 for (i
= 0; i
< ctx
->Const
.MaxTextureUnits
; i
++)
1530 if (!(InputsRead
& (FRAG_BIT_TEX0
<< i
)))
1533 if (i
== ctx
->Const
.MaxTextureUnits
) {
1534 fprintf(stderr
, "\tno free texcoord found...\n");
1538 InputsRead
|= (FRAG_BIT_TEX0
<< i
);
1539 InputsRead
&= ~FRAG_BIT_WPOS
;
1542 if (InputsRead
& FRAG_BIT_COL0
) {
1543 count
= VB
->AttribPtr
[_TNL_ATTRIB_COLOR0
]->size
;
1544 interp_col
[0] |= R300_RS_COL_PTR(rs_col_count
);
1546 interp_col
[0] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGB1
);
1547 rs_col_count
+= count
;
1550 interp_col
[0] = R300_RS_COL_FMT(R300_RS_COL_FMT_0001
);
1552 if (InputsRead
& FRAG_BIT_COL1
) {
1553 count
= VB
->AttribPtr
[_TNL_ATTRIB_COLOR1
]->size
;
1555 interp_col
[1] |= R300_RS_COL_FMT(R300_RS_COL_FMT_RGB1
);
1556 interp_col
[1] |= R300_RS_COL_PTR(1);
1557 rs_col_count
+= count
;
1561 for (i
= 0; i
< ctx
->Const
.MaxTextureUnits
; i
++) {
1564 /* with TCL we always seem to route 4 components */
1568 count
= VB
->AttribPtr
[_TNL_ATTRIB_TEX(i
)]->size
;
1570 r300
->hw
.ri
.cmd
[R300_RI_INTERP_0
+ i
] = interp_col
[i
] | rs_tex_count
;
1572 case 4: swiz
= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3); break;
1573 case 3: swiz
= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(R300_RS_SEL_K1
); break;
1576 case 2: swiz
= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(R300_RS_SEL_K0
) | R300_RS_SEL_Q(R300_RS_SEL_K1
); break;
1579 r300
->hw
.ri
.cmd
[R300_RI_INTERP_0
+ i
] |= swiz
;
1581 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ fp_reg
] = 0;
1582 if (InputsRead
& (FRAG_BIT_TEX0
<< i
)) {
1584 rs_tex_count
+= count
;
1586 //assert(r300->state.texture.tc_count != 0);
1587 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ fp_reg
] |= R300_RS_INST_TEX_CN_WRITE
| i
/* source INTERP */
1588 | (fp_reg
<< R300_RS_INST_TEX_ADDR_SHIFT
);
1591 /* Passing invalid data here can lock the GPU. */
1592 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten
, VERT_RESULT_TEX0
+ i
, _TNL_ATTRIB_TEX(i
))) {
1593 InputsRead
&= ~(FRAG_BIT_TEX0
<< i
);
1596 WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i
);
1601 if (InputsRead
& FRAG_BIT_COL0
) {
1602 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten
, VERT_RESULT_COL0
, _TNL_ATTRIB_COLOR0
)) {
1603 r300
->hw
.rr
.cmd
[R300_RR_INST_0
] |= R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE
| (fp_reg
++ << R300_RS_INST_COL_ADDR_SHIFT
);
1604 InputsRead
&= ~FRAG_BIT_COL0
;
1607 WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
1611 if (InputsRead
& FRAG_BIT_COL1
) {
1612 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten
, VERT_RESULT_COL1
, _TNL_ATTRIB_COLOR1
)) {
1613 r300
->hw
.rr
.cmd
[R300_RR_INST_1
] |= R300_RS_INST_COL_ID(1) | R300_RS_INST_COL_CN_WRITE
| (fp_reg
++ << R300_RS_INST_COL_ADDR_SHIFT
);
1614 InputsRead
&= ~FRAG_BIT_COL1
;
1619 WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
1623 /* Need at least one. This might still lock as the values are undefined... */
1624 if (rs_tex_count
== 0 && col_interp_nr
== 0) {
1625 r300
->hw
.rr
.cmd
[R300_RR_INST_0
] |= R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE
| (fp_reg
++ << R300_RS_INST_COL_ADDR_SHIFT
);
1629 r300
->hw
.rc
.cmd
[1] = 0 | (rs_tex_count
<< R300_IT_COUNT_SHIFT
)
1630 | (col_interp_nr
<< R300_IC_COUNT_SHIFT
)
1633 assert(high_rr
>= 0);
1634 r300
->hw
.rr
.cmd
[R300_RR_CMD_0
] = cmdpacket0(R300_RS_INST_0
, high_rr
+ 1);
1635 r300
->hw
.rc
.cmd
[2] = high_rr
;
1638 WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead
);
1641 static void r500SetupRSUnit(GLcontext
* ctx
)
1643 r300ContextPtr r300
= R300_CONTEXT(ctx
);
1644 /* I'm still unsure if these are needed */
1645 GLuint interp_col
[8];
1646 union r300_outputs_written OutputsWritten
;
1647 TNLcontext
*tnl
= TNL_CONTEXT(ctx
);
1648 struct vertex_buffer
*VB
= &tnl
->vb
;
1650 int fp_reg
, high_rr
;
1651 int rs_col_count
= 0;
1652 int in_texcoords
, col_interp_nr
;
1655 memset(interp_col
, 0, sizeof(interp_col
));
1657 OutputsWritten
.vp_outputs
= CURRENT_VERTEX_SHADER(ctx
)->key
.OutputsWritten
;
1659 RENDERINPUTS_COPY(OutputsWritten
.index_bitset
, r300
->state
.render_inputs_bitset
);
1661 if (ctx
->FragmentProgram
._Current
)
1662 InputsRead
= ctx
->FragmentProgram
._Current
->Base
.InputsRead
;
1664 fprintf(stderr
, "No ctx->FragmentProgram._Current!!\n");
1665 return; /* This should only ever happen once.. */
1668 R300_STATECHANGE(r300
, ri
);
1669 R300_STATECHANGE(r300
, rc
);
1670 R300_STATECHANGE(r300
, rr
);
1672 fp_reg
= col_interp_nr
= high_rr
= in_texcoords
= 0;
1674 r300
->hw
.rr
.cmd
[R300_RR_INST_1
] = 0;
1676 if (InputsRead
& FRAG_BIT_WPOS
) {
1677 for (i
= 0; i
< ctx
->Const
.MaxTextureUnits
; i
++)
1678 if (!(InputsRead
& (FRAG_BIT_TEX0
<< i
)))
1681 if (i
== ctx
->Const
.MaxTextureUnits
) {
1682 fprintf(stderr
, "\tno free texcoord found...\n");
1686 InputsRead
|= (FRAG_BIT_TEX0
<< i
);
1687 InputsRead
&= ~FRAG_BIT_WPOS
;
1690 if (InputsRead
& FRAG_BIT_COL0
) {
1691 count
= VB
->AttribPtr
[_TNL_ATTRIB_COLOR0
]->size
;
1692 interp_col
[0] |= R500_RS_COL_PTR(rs_col_count
);
1694 interp_col
[0] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGB1
);
1695 rs_col_count
+= count
;
1698 interp_col
[0] = R500_RS_COL_FMT(R300_RS_COL_FMT_0001
);
1700 if (InputsRead
& FRAG_BIT_COL1
) {
1701 count
= VB
->AttribPtr
[_TNL_ATTRIB_COLOR1
]->size
;
1702 interp_col
[1] |= R500_RS_COL_PTR(1);
1704 interp_col
[1] |= R500_RS_COL_FMT(R300_RS_COL_FMT_RGB1
);
1705 rs_col_count
+= count
;
1708 for (i
= 0; i
< ctx
->Const
.MaxTextureUnits
; i
++) {
1711 /* with TCL we always seem to route 4 components */
1712 if (InputsRead
& (FRAG_BIT_TEX0
<< i
)) {
1717 count
= VB
->AttribPtr
[_TNL_ATTRIB_TEX(i
)]->size
;
1719 /* always have a least 2 tex coords */
1720 swiz
|= in_texcoords
++ << R500_RS_IP_TEX_PTR_S_SHIFT
;
1721 swiz
|= in_texcoords
++ << R500_RS_IP_TEX_PTR_T_SHIFT
;
1724 swiz
|= in_texcoords
++ << R500_RS_IP_TEX_PTR_R_SHIFT
;
1726 swiz
|= R500_RS_IP_PTR_K0
<< R500_RS_IP_TEX_PTR_R_SHIFT
;
1729 swiz
|= in_texcoords
++ << R500_RS_IP_TEX_PTR_Q_SHIFT
;
1731 swiz
|= R500_RS_IP_PTR_K1
<< R500_RS_IP_TEX_PTR_Q_SHIFT
;
1734 swiz
= (R500_RS_IP_PTR_K0
<< R500_RS_IP_TEX_PTR_S_SHIFT
) |
1735 (R500_RS_IP_PTR_K0
<< R500_RS_IP_TEX_PTR_T_SHIFT
) |
1736 (R500_RS_IP_PTR_K0
<< R500_RS_IP_TEX_PTR_R_SHIFT
) |
1737 (R500_RS_IP_PTR_K1
<< R500_RS_IP_TEX_PTR_Q_SHIFT
);
1739 r300
->hw
.ri
.cmd
[R300_RI_INTERP_0
+ i
] = interp_col
[i
] | swiz
;
1741 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ fp_reg
] = 0;
1742 if (InputsRead
& (FRAG_BIT_TEX0
<< i
)) {
1743 //assert(r300->state.texture.tc_count != 0);
1744 r300
->hw
.rr
.cmd
[R300_RR_INST_0
+ fp_reg
] |= R500_RS_INST_TEX_CN_WRITE
| i
/* source INTERP */
1745 | (fp_reg
<< R500_RS_INST_TEX_ADDR_SHIFT
);
1748 /* Passing invalid data here can lock the GPU. */
1749 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten
, VERT_RESULT_TEX0
+ i
, _TNL_ATTRIB_TEX(i
))) {
1750 InputsRead
&= ~(FRAG_BIT_TEX0
<< i
);
1753 WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i
);
1758 if (InputsRead
& FRAG_BIT_COL0
) {
1759 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten
, VERT_RESULT_COL0
, _TNL_ATTRIB_COLOR0
)) {
1760 r300
->hw
.rr
.cmd
[R300_RR_INST_0
] |= R500_RS_INST_COL_CN_WRITE
| (fp_reg
++ << R500_RS_INST_COL_ADDR_SHIFT
);
1761 InputsRead
&= ~FRAG_BIT_COL0
;
1764 WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
1768 if (InputsRead
& FRAG_BIT_COL1
) {
1769 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten
, VERT_RESULT_COL1
, _TNL_ATTRIB_COLOR1
)) {
1770 r300
->hw
.rr
.cmd
[R300_RR_INST_1
] |= (1 << 12) | R500_RS_INST_COL_CN_WRITE
| (fp_reg
++ << R500_RS_INST_COL_ADDR_SHIFT
);
1771 InputsRead
&= ~FRAG_BIT_COL1
;
1776 WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
1780 /* Need at least one. This might still lock as the values are undefined... */
1781 if (in_texcoords
== 0 && col_interp_nr
== 0) {
1782 r300
->hw
.rr
.cmd
[R300_RR_INST_0
] |= 0 | R500_RS_INST_COL_CN_WRITE
| (fp_reg
++ << R500_RS_INST_COL_ADDR_SHIFT
);
1786 r300
->hw
.rc
.cmd
[1] = 0 | (in_texcoords
<< R300_IT_COUNT_SHIFT
)
1787 | (col_interp_nr
<< R300_IC_COUNT_SHIFT
)
1790 assert(high_rr
>= 0);
1791 r300
->hw
.rr
.cmd
[R300_RR_CMD_0
] = cmdpacket0(R300_RS_INST_0
, high_rr
+ 1);
1792 r300
->hw
.rc
.cmd
[2] = 0xC0 | high_rr
;
1795 WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead
);
1801 #define bump_vpu_count(ptr, new_count) do{\
1802 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
1803 int _nc=(new_count)/4; \
1804 assert(_nc < 256); \
1805 if(_nc>_p->vpu.count)_p->vpu.count=_nc;\
1808 static inline void r300SetupVertexProgramFragment(r300ContextPtr r300
, int dest
, struct r300_vertex_shader_fragment
*vsf
)
1812 if (vsf
->length
== 0)
1815 if (vsf
->length
& 0x3) {
1816 fprintf(stderr
, "VERTEX_SHADER_FRAGMENT must have length divisible by 4\n");
1820 switch ((dest
>> 8) & 0xf) {
1822 R300_STATECHANGE(r300
, vpi
);
1823 for (i
= 0; i
< vsf
->length
; i
++)
1824 r300
->hw
.vpi
.cmd
[R300_VPI_INSTR_0
+ i
+ 4 * (dest
& 0xff)] = (vsf
->body
.d
[i
]);
1825 bump_vpu_count(r300
->hw
.vpi
.cmd
, vsf
->length
+ 4 * (dest
& 0xff));
1829 R300_STATECHANGE(r300
, vpp
);
1830 for (i
= 0; i
< vsf
->length
; i
++)
1831 r300
->hw
.vpp
.cmd
[R300_VPP_PARAM_0
+ i
+ 4 * (dest
& 0xff)] = (vsf
->body
.d
[i
]);
1832 bump_vpu_count(r300
->hw
.vpp
.cmd
, vsf
->length
+ 4 * (dest
& 0xff));
1835 R300_STATECHANGE(r300
, vps
);
1836 for (i
= 0; i
< vsf
->length
; i
++)
1837 r300
->hw
.vps
.cmd
[1 + i
+ 4 * (dest
& 0xff)] = (vsf
->body
.d
[i
]);
1838 bump_vpu_count(r300
->hw
.vps
.cmd
, vsf
->length
+ 4 * (dest
& 0xff));
1841 fprintf(stderr
, "%s:%s don't know how to handle dest %04x\n", __FILE__
, __FUNCTION__
, dest
);
1846 #define MIN3(a,b,c) ((a)<(b) ? MIN2(a, c): MIN2(b, c))
1848 static void r300VapCntl(r300ContextPtr rmesa
, GLuint input_count
, GLuint output_count
, GLuint temp_count
)
1851 int cmd_reserved
= 0;
1852 int cmd_written
= 0;
1853 drm_radeon_cmd_header_t
*cmd
= NULL
;
1857 /* Flush PVS engine before changing PVS_NUM_SLOTS, PVS_NUM_CNTRLS.
1858 * See r500 docs 6.5.2 */
1859 reg_start(R300_VAP_PVS_STATE_FLUSH_REG
, 0);
1862 /* avoid division by zero */
1863 if (input_count
== 0) input_count
= 1;
1864 if (output_count
== 0) output_count
= 1;
1865 if (temp_count
== 0) temp_count
= 1;
1867 if (rmesa
->radeon
.radeonScreen
->chip_family
>= CHIP_FAMILY_RV515
)
1872 pvs_num_slots
= MIN3(10, vtx_mem_size
/input_count
, vtx_mem_size
/output_count
);
1873 pvs_num_cntrls
= MIN2(6, vtx_mem_size
/temp_count
);
1875 R300_STATECHANGE(rmesa
, vap_cntl
);
1876 if (rmesa
->radeon
.radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
) {
1877 rmesa
->hw
.vap_cntl
.cmd
[1] =
1878 (pvs_num_slots
<< R300_PVS_NUM_SLOTS_SHIFT
) |
1879 (pvs_num_cntrls
<< R300_PVS_NUM_CNTLRS_SHIFT
) |
1880 (12 << R300_VF_MAX_VTX_NUM_SHIFT
);
1881 if (rmesa
->radeon
.radeonScreen
->chip_family
>= CHIP_FAMILY_RV515
)
1882 rmesa
->hw
.vap_cntl
.cmd
[1] |= R500_TCL_STATE_OPTIMIZATION
;
1884 /* not sure about non-tcl */
1885 rmesa
->hw
.vap_cntl
.cmd
[1] = ((10 << R300_PVS_NUM_SLOTS_SHIFT
) |
1886 (5 << R300_PVS_NUM_CNTLRS_SHIFT
) |
1887 (5 << R300_VF_MAX_VTX_NUM_SHIFT
));
1889 if (rmesa
->radeon
.radeonScreen
->chip_family
== CHIP_FAMILY_RV515
)
1890 rmesa
->hw
.vap_cntl
.cmd
[1] |= (2 << R300_PVS_NUM_FPUS_SHIFT
);
1891 else if ((rmesa
->radeon
.radeonScreen
->chip_family
== CHIP_FAMILY_RV530
) ||
1892 (rmesa
->radeon
.radeonScreen
->chip_family
== CHIP_FAMILY_RV560
))
1893 rmesa
->hw
.vap_cntl
.cmd
[1] |= (5 << R300_PVS_NUM_FPUS_SHIFT
);
1894 else if (rmesa
->radeon
.radeonScreen
->chip_family
== CHIP_FAMILY_R420
)
1895 rmesa
->hw
.vap_cntl
.cmd
[1] |= (6 << R300_PVS_NUM_FPUS_SHIFT
);
1896 else if ((rmesa
->radeon
.radeonScreen
->chip_family
== CHIP_FAMILY_R520
) ||
1897 (rmesa
->radeon
.radeonScreen
->chip_family
== CHIP_FAMILY_R580
) ||
1898 (rmesa
->radeon
.radeonScreen
->chip_family
== CHIP_FAMILY_RV570
))
1899 rmesa
->hw
.vap_cntl
.cmd
[1] |= (8 << R300_PVS_NUM_FPUS_SHIFT
);
1901 rmesa
->hw
.vap_cntl
.cmd
[1] |= (4 << R300_PVS_NUM_FPUS_SHIFT
);
1905 static void r300SetupDefaultVertexProgram(r300ContextPtr rmesa
)
1907 struct r300_vertex_shader_state
*prog
= &(rmesa
->state
.vertex_shader
);
1912 int param_count
= 0;
1913 int program_end
= 0;
1915 for (i
= VERT_ATTRIB_POS
; i
< VERT_ATTRIB_MAX
; i
++) {
1916 if (rmesa
->state
.sw_tcl_inputs
[i
] != -1) {
1917 prog
->program
.body
.i
[program_end
+ 0] = PVS_OP_DST_OPERAND(VE_MULTIPLY
, GL_FALSE
, GL_FALSE
, o_reg
++, VSF_FLAG_ALL
, PVS_DST_REG_OUT
);
1918 prog
->program
.body
.i
[program_end
+ 1] = PVS_SRC_OPERAND(rmesa
->state
.sw_tcl_inputs
[i
], PVS_SRC_SELECT_X
, PVS_SRC_SELECT_Y
, PVS_SRC_SELECT_Z
, PVS_SRC_SELECT_W
, PVS_SRC_REG_INPUT
, VSF_FLAG_NONE
);
1919 prog
->program
.body
.i
[program_end
+ 2] = PVS_SRC_OPERAND(rmesa
->state
.sw_tcl_inputs
[i
], PVS_SRC_SELECT_FORCE_1
, PVS_SRC_SELECT_FORCE_1
, PVS_SRC_SELECT_FORCE_1
, PVS_SRC_SELECT_FORCE_1
, PVS_SRC_REG_INPUT
, VSF_FLAG_NONE
);
1920 prog
->program
.body
.i
[program_end
+ 3] = PVS_SRC_OPERAND(rmesa
->state
.sw_tcl_inputs
[i
], PVS_SRC_SELECT_FORCE_1
, PVS_SRC_SELECT_FORCE_1
, PVS_SRC_SELECT_FORCE_1
, PVS_SRC_SELECT_FORCE_1
, PVS_SRC_REG_INPUT
, VSF_FLAG_NONE
);
1926 prog
->program
.length
= program_end
;
1928 r300SetupVertexProgramFragment(rmesa
, R300_PVS_CODE_START
,
1930 inst_count
= (prog
->program
.length
/ 4) - 1;
1932 r300VapCntl(rmesa
, i_reg
, o_reg
, 0);
1934 R300_STATECHANGE(rmesa
, pvs
);
1935 rmesa
->hw
.pvs
.cmd
[R300_PVS_CNTL_1
] =
1936 (0 << R300_PVS_FIRST_INST_SHIFT
) |
1937 (inst_count
<< R300_PVS_XYZW_VALID_INST_SHIFT
) |
1938 (inst_count
<< R300_PVS_LAST_INST_SHIFT
);
1939 rmesa
->hw
.pvs
.cmd
[R300_PVS_CNTL_2
] =
1940 (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT
) |
1941 (param_count
<< R300_PVS_MAX_CONST_ADDR_SHIFT
);
1942 rmesa
->hw
.pvs
.cmd
[R300_PVS_CNTL_3
] =
1943 (inst_count
<< R300_PVS_LAST_VTX_SRC_INST_SHIFT
);
1946 static int bit_count (int x
)
1948 x
= ((x
& 0xaaaaaaaaU
) >> 1) + (x
& 0x55555555U
);
1949 x
= ((x
& 0xccccccccU
) >> 2) + (x
& 0x33333333U
);
1950 x
= (x
>> 16) + (x
& 0xffff);
1951 x
= ((x
& 0xf0f0) >> 4) + (x
& 0x0f0f);
1952 return (x
>> 8) + (x
& 0x00ff);
1955 static void r300SetupRealVertexProgram(r300ContextPtr rmesa
)
1957 GLcontext
*ctx
= rmesa
->radeon
.glCtx
;
1958 struct r300_vertex_program
*prog
= (struct r300_vertex_program
*)CURRENT_VERTEX_SHADER(ctx
);
1960 int param_count
= 0;
1962 /* FIXME: r300SetupVertexProgramFragment */
1963 R300_STATECHANGE(rmesa
, vpp
);
1965 r300VertexProgUpdateParams(ctx
,
1966 (struct r300_vertex_program_cont
*)
1967 ctx
->VertexProgram
._Current
,
1968 (float *)&rmesa
->hw
.vpp
.
1969 cmd
[R300_VPP_PARAM_0
]);
1970 bump_vpu_count(rmesa
->hw
.vpp
.cmd
, param_count
);
1973 r300SetupVertexProgramFragment(rmesa
, R300_PVS_CODE_START
, &(prog
->program
));
1974 inst_count
= (prog
->program
.length
/ 4) - 1;
1976 r300VapCntl(rmesa
, bit_count(prog
->key
.InputsRead
),
1977 bit_count(prog
->key
.OutputsWritten
), prog
->num_temporaries
);
1979 R300_STATECHANGE(rmesa
, pvs
);
1980 rmesa
->hw
.pvs
.cmd
[R300_PVS_CNTL_1
] =
1981 (0 << R300_PVS_FIRST_INST_SHIFT
) |
1982 (inst_count
<< R300_PVS_XYZW_VALID_INST_SHIFT
) |
1983 (inst_count
<< R300_PVS_LAST_INST_SHIFT
);
1984 rmesa
->hw
.pvs
.cmd
[R300_PVS_CNTL_2
] =
1985 (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT
) |
1986 (param_count
<< R300_PVS_MAX_CONST_ADDR_SHIFT
);
1987 rmesa
->hw
.pvs
.cmd
[R300_PVS_CNTL_3
] =
1988 (inst_count
<< R300_PVS_LAST_VTX_SRC_INST_SHIFT
);
1991 static void r300SetupVertexProgram(r300ContextPtr rmesa
)
1993 GLcontext
*ctx
= rmesa
->radeon
.glCtx
;
1995 /* Reset state, in case we don't use something */
1996 ((drm_r300_cmd_header_t
*) rmesa
->hw
.vpp
.cmd
)->vpu
.count
= 0;
1997 ((drm_r300_cmd_header_t
*) rmesa
->hw
.vpi
.cmd
)->vpu
.count
= 0;
1998 ((drm_r300_cmd_header_t
*) rmesa
->hw
.vps
.cmd
)->vpu
.count
= 0;
2000 /* Not sure why this doesnt work...
2001 0x400 area might have something to do with pixel shaders as it appears right after pfs programming.
2002 0x406 is set to { 0.0, 0.0, 1.0, 0.0 } most of the time but should change with smooth points and in other rare cases. */
2003 //setup_vertex_shader_fragment(rmesa, 0x406, &unk4);
2004 if (hw_tcl_on
&& ((struct r300_vertex_program
*)CURRENT_VERTEX_SHADER(ctx
))->translated
) {
2005 r300SetupRealVertexProgram(rmesa
);
2007 /* FIXME: This needs to be replaced by vertex shader generation code. */
2008 r300SetupDefaultVertexProgram(rmesa
);
2014 * Enable/Disable states.
2016 * \note Mesa already filters redundant calls to this function.
2018 static void r300Enable(GLcontext
* ctx
, GLenum cap
, GLboolean state
)
2020 if (RADEON_DEBUG
& DEBUG_STATE
)
2021 fprintf(stderr
, "%s( %s = %s )\n", __FUNCTION__
,
2022 _mesa_lookup_enum_by_nr(cap
),
2023 state
? "GL_TRUE" : "GL_FALSE");
2032 r300SetFogState(ctx
, state
);
2035 r300SetAlphaState(ctx
);
2038 case GL_COLOR_LOGIC_OP
:
2039 r300SetBlendState(ctx
);
2041 case GL_CLIP_PLANE0
:
2042 case GL_CLIP_PLANE1
:
2043 case GL_CLIP_PLANE2
:
2044 case GL_CLIP_PLANE3
:
2045 case GL_CLIP_PLANE4
:
2046 case GL_CLIP_PLANE5
:
2047 r300SetClipPlaneState(ctx
, cap
, state
);
2050 r300SetDepthState(ctx
);
2052 case GL_STENCIL_TEST
:
2053 r300SetStencilState(ctx
, state
);
2056 r300UpdateCulling(ctx
);
2058 case GL_POLYGON_OFFSET_POINT
:
2059 case GL_POLYGON_OFFSET_LINE
:
2060 case GL_POLYGON_OFFSET_FILL
:
2061 r300SetPolygonOffsetState(ctx
, state
);
2064 radeonEnable(ctx
, cap
, state
);
2070 * Completely recalculates hardware state based on the Mesa state.
2072 static void r300ResetHwState(r300ContextPtr r300
)
2074 GLcontext
*ctx
= r300
->radeon
.glCtx
;
2077 if (!(r300
->radeon
.radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
))
2080 if (RADEON_DEBUG
& DEBUG_STATE
)
2081 fprintf(stderr
, "%s\n", __FUNCTION__
);
2083 r300UpdateWindow(ctx
);
2086 ctx
->Color
.ColorMask
[RCOMP
],
2087 ctx
->Color
.ColorMask
[GCOMP
],
2088 ctx
->Color
.ColorMask
[BCOMP
], ctx
->Color
.ColorMask
[ACOMP
]);
2090 r300Enable(ctx
, GL_DEPTH_TEST
, ctx
->Depth
.Test
);
2091 r300DepthMask(ctx
, ctx
->Depth
.Mask
);
2092 r300DepthFunc(ctx
, ctx
->Depth
.Func
);
2095 r300Enable(ctx
, GL_STENCIL_TEST
, ctx
->Stencil
.Enabled
);
2096 r300StencilMaskSeparate(ctx
, 0, ctx
->Stencil
.WriteMask
[0]);
2097 r300StencilFuncSeparate(ctx
, 0, ctx
->Stencil
.Function
[0],
2098 ctx
->Stencil
.Ref
[0], ctx
->Stencil
.ValueMask
[0]);
2099 r300StencilOpSeparate(ctx
, 0, ctx
->Stencil
.FailFunc
[0],
2100 ctx
->Stencil
.ZFailFunc
[0],
2101 ctx
->Stencil
.ZPassFunc
[0]);
2103 r300UpdateCulling(ctx
);
2105 r300UpdateTextureState(ctx
);
2107 r300SetBlendState(ctx
);
2109 r300AlphaFunc(ctx
, ctx
->Color
.AlphaFunc
, ctx
->Color
.AlphaRef
);
2110 r300Enable(ctx
, GL_ALPHA_TEST
, ctx
->Color
.AlphaEnabled
);
2112 r300
->hw
.vte
.cmd
[1] = R300_VPORT_X_SCALE_ENA
2113 | R300_VPORT_X_OFFSET_ENA
2114 | R300_VPORT_Y_SCALE_ENA
2115 | R300_VPORT_Y_OFFSET_ENA
2116 | R300_VPORT_Z_SCALE_ENA
2117 | R300_VPORT_Z_OFFSET_ENA
| R300_VTX_W0_FMT
;
2118 r300
->hw
.vte
.cmd
[2] = 0x00000008;
2120 r300
->hw
.vap_vf_max_vtx_indx
.cmd
[1] = 0x00FFFFFF;
2121 r300
->hw
.vap_vf_max_vtx_indx
.cmd
[2] = 0x00000000;
2123 #ifdef MESA_LITTLE_ENDIAN
2124 r300
->hw
.vap_cntl_status
.cmd
[1] = R300_VC_NO_SWAP
;
2126 r300
->hw
.vap_cntl_status
.cmd
[1] = R300_VC_32BIT_SWAP
;
2129 /* disable VAP/TCL on non-TCL capable chips */
2131 r300
->hw
.vap_cntl_status
.cmd
[1] |= R300_VAP_TCL_BYPASS
;
2133 r300
->hw
.vap_psc_sgn_norm_cntl
.cmd
[1] = 0xAAAAAAAA;
2135 /* XXX: Other families? */
2137 r300
->hw
.vap_clip_cntl
.cmd
[1] = R300_PS_UCP_MODE_DIST_COP
;
2139 r300
->hw
.vap_clip
.cmd
[1] = r300PackFloat32(1.0); /* X */
2140 r300
->hw
.vap_clip
.cmd
[2] = r300PackFloat32(1.0); /* X */
2141 r300
->hw
.vap_clip
.cmd
[3] = r300PackFloat32(1.0); /* Y */
2142 r300
->hw
.vap_clip
.cmd
[4] = r300PackFloat32(1.0); /* Y */
2144 switch (r300
->radeon
.radeonScreen
->chip_family
) {
2145 case CHIP_FAMILY_R300
:
2146 r300
->hw
.vap_pvs_vtx_timeout_reg
.cmd
[1] = R300_2288_R300
;
2149 r300
->hw
.vap_pvs_vtx_timeout_reg
.cmd
[1] = R300_2288_RV350
;
2154 r300
->hw
.gb_enable
.cmd
[1] = R300_GB_POINT_STUFF_ENABLE
2155 | R300_GB_LINE_STUFF_ENABLE
2156 | R300_GB_TRIANGLE_STUFF_ENABLE
;
2158 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_MSPOS_0
] = 0x66666666;
2159 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_MSPOS_1
] = 0x06666666;
2161 /* num pipes needs to be read back from the GB_PIPE_SELECT register
2162 * on r4xx/r5xx/rs4xx/rs6xx
2163 * should move this to the drm
2165 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_TILE_CONFIG
] =
2166 R300_GB_TILE_ENABLE
| R300_GB_TILE_SIZE_16
/*| R300_GB_SUBPIXEL_1_16*/;
2167 switch (r300
->radeon
.radeonScreen
->chip_family
) {
2168 case CHIP_FAMILY_R300
:
2169 case CHIP_FAMILY_R350
:
2170 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_TILE_CONFIG
] |=
2171 R300_GB_TILE_PIPE_COUNT_R300
;
2173 case CHIP_FAMILY_RV350
:
2174 case CHIP_FAMILY_RV515
:
2175 case CHIP_FAMILY_RV530
:
2176 case CHIP_FAMILY_RV410
:
2177 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_TILE_CONFIG
] |=
2178 R300_GB_TILE_PIPE_COUNT_RV300
;
2180 case CHIP_FAMILY_R420
:
2181 case CHIP_FAMILY_R520
:
2182 case CHIP_FAMILY_R580
:
2183 case CHIP_FAMILY_RV560
:
2184 case CHIP_FAMILY_RV570
:
2185 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_TILE_CONFIG
] |=
2186 R300_GB_TILE_PIPE_COUNT_R420
;
2189 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_TILE_CONFIG
] |=
2190 R300_GB_TILE_DISABLE
; /* TODO: This disables tiling totally. I guess it happened accidentially. */
2194 /* XXX: set to 0 when fog is disabled? */
2195 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_SELECT
] = R300_GB_FOG_SELECT_1_1_W
;
2197 /* XXX: Enable anti-aliasing? */
2198 r300
->hw
.gb_misc
.cmd
[R300_GB_MISC_AA_CONFIG
] = GB_AA_CONFIG_AA_DISABLE
;
2200 r300
->hw
.ga_point_s0
.cmd
[1] = r300PackFloat32(0.0);
2201 r300
->hw
.ga_point_s0
.cmd
[2] = r300PackFloat32(0.0);
2202 r300
->hw
.ga_point_s0
.cmd
[3] = r300PackFloat32(1.0);
2203 r300
->hw
.ga_point_s0
.cmd
[4] = r300PackFloat32(1.0);
2205 r300
->hw
.ga_triangle_stipple
.cmd
[1] = 0x00050005;
2207 r300PointSize(ctx
, 1.0);
2209 r300
->hw
.ga_point_minmax
.cmd
[1] = 0x18000006;
2210 r300
->hw
.ga_point_minmax
.cmd
[2] = 0x00020006;
2211 r300
->hw
.ga_point_minmax
.cmd
[3] = r300PackFloat32(1.0 / 192.0);
2213 r300LineWidth(ctx
, 1.0);
2215 r300
->hw
.ga_line_stipple
.cmd
[1] = 0;
2216 r300
->hw
.ga_line_stipple
.cmd
[2] = r300PackFloat32(0.0);
2217 r300
->hw
.ga_line_stipple
.cmd
[3] = r300PackFloat32(1.0);
2219 r300ShadeModel(ctx
, ctx
->Light
.ShadeModel
);
2221 r300PolygonMode(ctx
, GL_FRONT
, ctx
->Polygon
.FrontMode
);
2222 r300PolygonMode(ctx
, GL_BACK
, ctx
->Polygon
.BackMode
);
2223 r300
->hw
.zbias_cntl
.cmd
[1] = 0x00000000;
2225 r300PolygonOffset(ctx
, ctx
->Polygon
.OffsetFactor
,
2226 ctx
->Polygon
.OffsetUnits
);
2227 r300Enable(ctx
, GL_POLYGON_OFFSET_POINT
, ctx
->Polygon
.OffsetPoint
);
2228 r300Enable(ctx
, GL_POLYGON_OFFSET_LINE
, ctx
->Polygon
.OffsetLine
);
2229 r300Enable(ctx
, GL_POLYGON_OFFSET_FILL
, ctx
->Polygon
.OffsetFill
);
2231 r300
->hw
.su_depth_scale
.cmd
[1] = 0x4B7FFFFF;
2232 r300
->hw
.su_depth_scale
.cmd
[2] = 0x00000000;
2234 r300
->hw
.sc_hyperz
.cmd
[1] = 0x0000001C;
2235 r300
->hw
.sc_hyperz
.cmd
[2] = 0x2DA49525;
2237 r300
->hw
.sc_screendoor
.cmd
[1] = 0x00FFFFFF;
2239 r300
->hw
.us_out_fmt
.cmd
[1] = 0x00001B01;
2240 r300
->hw
.us_out_fmt
.cmd
[2] = 0x00001B0F;
2241 r300
->hw
.us_out_fmt
.cmd
[3] = 0x00001B0F;
2242 r300
->hw
.us_out_fmt
.cmd
[4] = 0x00001B0F;
2243 r300
->hw
.us_out_fmt
.cmd
[5] = 0x00000001;
2245 r300Enable(ctx
, GL_FOG
, ctx
->Fog
.Enabled
);
2246 r300Fogfv(ctx
, GL_FOG_MODE
, NULL
);
2247 r300Fogfv(ctx
, GL_FOG_DENSITY
, &ctx
->Fog
.Density
);
2248 r300Fogfv(ctx
, GL_FOG_START
, &ctx
->Fog
.Start
);
2249 r300Fogfv(ctx
, GL_FOG_END
, &ctx
->Fog
.End
);
2250 r300Fogfv(ctx
, GL_FOG_COLOR
, ctx
->Fog
.Color
);
2251 r300Fogfv(ctx
, GL_FOG_COORDINATE_SOURCE_EXT
, NULL
);
2253 r300
->hw
.fg_depth_src
.cmd
[1] = 0;
2255 r300
->hw
.rb3d_cctl
.cmd
[1] = 0;
2257 r300BlendColor(ctx
, ctx
->Color
.BlendColor
);
2259 /* Again, r300ClearBuffer uses this */
2260 r300
->hw
.cb
.cmd
[R300_CB_OFFSET
] =
2261 r300
->radeon
.state
.color
.drawOffset
+
2262 r300
->radeon
.radeonScreen
->fbLocation
;
2263 r300
->hw
.cb
.cmd
[R300_CB_PITCH
] = r300
->radeon
.state
.color
.drawPitch
;
2265 if (r300
->radeon
.radeonScreen
->cpp
== 4)
2266 r300
->hw
.cb
.cmd
[R300_CB_PITCH
] |= R300_COLOR_FORMAT_ARGB8888
;
2268 r300
->hw
.cb
.cmd
[R300_CB_PITCH
] |= R300_COLOR_FORMAT_RGB565
;
2270 if (r300
->radeon
.sarea
->tiling_enabled
)
2271 r300
->hw
.cb
.cmd
[R300_CB_PITCH
] |= R300_COLOR_TILE_ENABLE
;
2273 r300
->hw
.rb3d_dither_ctl
.cmd
[1] = 0;
2274 r300
->hw
.rb3d_dither_ctl
.cmd
[2] = 0;
2275 r300
->hw
.rb3d_dither_ctl
.cmd
[3] = 0;
2276 r300
->hw
.rb3d_dither_ctl
.cmd
[4] = 0;
2277 r300
->hw
.rb3d_dither_ctl
.cmd
[5] = 0;
2278 r300
->hw
.rb3d_dither_ctl
.cmd
[6] = 0;
2279 r300
->hw
.rb3d_dither_ctl
.cmd
[7] = 0;
2280 r300
->hw
.rb3d_dither_ctl
.cmd
[8] = 0;
2281 r300
->hw
.rb3d_dither_ctl
.cmd
[9] = 0;
2283 r300
->hw
.rb3d_aaresolve_ctl
.cmd
[1] = 0;
2285 r300
->hw
.rb3d_discard_src_pixel_lte_threshold
.cmd
[1] = 0x00000000;
2286 r300
->hw
.rb3d_discard_src_pixel_lte_threshold
.cmd
[2] = 0xffffffff;
2288 r300
->hw
.zb
.cmd
[R300_ZB_OFFSET
] =
2289 r300
->radeon
.radeonScreen
->depthOffset
+
2290 r300
->radeon
.radeonScreen
->fbLocation
;
2291 r300
->hw
.zb
.cmd
[R300_ZB_PITCH
] = r300
->radeon
.radeonScreen
->depthPitch
;
2293 if (r300
->radeon
.sarea
->tiling_enabled
) {
2294 /* XXX: Turn off when clearing buffers ? */
2295 r300
->hw
.zb
.cmd
[R300_ZB_PITCH
] |= R300_DEPTHMACROTILE_ENABLE
;
2297 if (ctx
->Visual
.depthBits
== 24)
2298 r300
->hw
.zb
.cmd
[R300_ZB_PITCH
] |=
2299 R300_DEPTHMICROTILE_TILED
;
2302 r300
->hw
.zb_depthclearvalue
.cmd
[1] = 0;
2304 r300
->hw
.unk4F30
.cmd
[1] = 0;
2305 r300
->hw
.unk4F30
.cmd
[2] = 0;
2307 r300
->hw
.zb_hiz_offset
.cmd
[1] = 0;
2309 r300
->hw
.zb_hiz_pitch
.cmd
[1] = 0;
2312 r300
->hw
.vps
.cmd
[R300_VPS_ZERO_0
] = 0;
2313 r300
->hw
.vps
.cmd
[R300_VPS_ZERO_1
] = 0;
2314 r300
->hw
.vps
.cmd
[R300_VPS_POINTSIZE
] = r300PackFloat32(1.0);
2315 r300
->hw
.vps
.cmd
[R300_VPS_ZERO_3
] = 0;
2318 r300
->hw
.all_dirty
= GL_TRUE
;
2321 void r300UpdateShaders(r300ContextPtr rmesa
)
2324 struct r300_vertex_program
*vp
;
2327 ctx
= rmesa
->radeon
.glCtx
;
2329 if (rmesa
->NewGLState
&& hw_tcl_on
) {
2330 rmesa
->NewGLState
= 0;
2332 for (i
= _TNL_FIRST_MAT
; i
<= _TNL_LAST_MAT
; i
++) {
2333 rmesa
->temp_attrib
[i
] =
2334 TNL_CONTEXT(ctx
)->vb
.AttribPtr
[i
];
2335 TNL_CONTEXT(ctx
)->vb
.AttribPtr
[i
] =
2336 &rmesa
->dummy_attrib
[i
];
2339 _tnl_UpdateFixedFunctionProgram(ctx
);
2341 for (i
= _TNL_FIRST_MAT
; i
<= _TNL_LAST_MAT
; i
++) {
2342 TNL_CONTEXT(ctx
)->vb
.AttribPtr
[i
] =
2343 rmesa
->temp_attrib
[i
];
2346 r300SelectVertexShader(rmesa
);
2347 vp
= (struct r300_vertex_program
*)
2348 CURRENT_VERTEX_SHADER(ctx
);
2349 /*if (vp->translated == GL_FALSE)
2350 r300TranslateVertexShader(vp); */
2351 if (vp
->translated
== GL_FALSE
) {
2352 fprintf(stderr
, "Failing back to sw-tcl\n");
2353 hw_tcl_on
= future_hw_tcl_on
= 0;
2354 r300ResetHwState(rmesa
);
2356 r300UpdateStateParameters(ctx
, _NEW_PROGRAM
);
2360 r300UpdateStateParameters(ctx
, _NEW_PROGRAM
);
2363 static void r300SetupPixelShader(r300ContextPtr rmesa
)
2365 GLcontext
*ctx
= rmesa
->radeon
.glCtx
;
2366 struct r300_fragment_program
*fp
= (struct r300_fragment_program
*)
2367 (char *)ctx
->FragmentProgram
._Current
;
2370 if (!fp
) /* should only happenen once, just after context is created */
2373 r300TranslateFragmentShader(rmesa
, fp
);
2374 if (!fp
->translated
) {
2375 fprintf(stderr
, "%s: No valid fragment shader, exiting\n",
2380 R300_STATECHANGE(rmesa
, fpi
[0]);
2381 rmesa
->hw
.fpi
[0].cmd
[R300_FPI_CMD_0
] = cmdpacket0(R300_US_ALU_RGB_INST_0
, fp
->alu_end
+ 1);
2382 for (i
= 0; i
<= fp
->alu_end
; i
++) {
2383 rmesa
->hw
.fpi
[0].cmd
[R300_FPI_INSTR_0
+ i
] = fp
->alu
.inst
[i
].inst0
;
2386 R300_STATECHANGE(rmesa
, fpi
[1]);
2387 rmesa
->hw
.fpi
[1].cmd
[R300_FPI_CMD_0
] = cmdpacket0(R300_US_ALU_RGB_ADDR_0
, fp
->alu_end
+ 1);
2388 for (i
= 0; i
<= fp
->alu_end
; i
++) {
2389 rmesa
->hw
.fpi
[1].cmd
[R300_FPI_INSTR_0
+ i
] = fp
->alu
.inst
[i
].inst1
;
2392 R300_STATECHANGE(rmesa
, fpi
[2]);
2393 rmesa
->hw
.fpi
[2].cmd
[R300_FPI_CMD_0
] = cmdpacket0(R300_US_ALU_ALPHA_INST_0
, fp
->alu_end
+ 1);
2394 for (i
= 0; i
<= fp
->alu_end
; i
++) {
2395 rmesa
->hw
.fpi
[2].cmd
[R300_FPI_INSTR_0
+ i
] = fp
->alu
.inst
[i
].inst2
;
2398 R300_STATECHANGE(rmesa
, fpi
[3]);
2399 rmesa
->hw
.fpi
[3].cmd
[R300_FPI_CMD_0
] = cmdpacket0(R300_US_ALU_ALPHA_ADDR_0
, fp
->alu_end
+ 1);
2400 for (i
= 0; i
<= fp
->alu_end
; i
++) {
2401 rmesa
->hw
.fpi
[3].cmd
[R300_FPI_INSTR_0
+ i
] = fp
->alu
.inst
[i
].inst3
;
2404 R300_STATECHANGE(rmesa
, fp
);
2405 rmesa
->hw
.fp
.cmd
[R300_FP_CNTL0
] = fp
->cur_node
| (fp
->first_node_has_tex
<< 3);
2406 rmesa
->hw
.fp
.cmd
[R300_FP_CNTL1
] = fp
->max_temp_idx
;
2407 rmesa
->hw
.fp
.cmd
[R300_FP_CNTL2
] =
2408 (fp
->alu_offset
<< R300_PFS_CNTL_ALU_OFFSET_SHIFT
) |
2409 (fp
->alu_end
<< R300_PFS_CNTL_ALU_END_SHIFT
) |
2410 (fp
->tex_offset
<< R300_PFS_CNTL_TEX_OFFSET_SHIFT
) |
2411 (fp
->tex_end
<< R300_PFS_CNTL_TEX_END_SHIFT
);
2412 /* I just want to say, the way these nodes are stored.. weird.. */
2413 for (i
= 0, k
= (4 - (fp
->cur_node
+ 1)); i
< 4; i
++, k
++) {
2414 if (i
< (fp
->cur_node
+ 1)) {
2415 rmesa
->hw
.fp
.cmd
[R300_FP_NODE0
+ k
] =
2416 (fp
->node
[i
].alu_offset
<< R300_ALU_START_SHIFT
) |
2417 (fp
->node
[i
].alu_end
<< R300_ALU_SIZE_SHIFT
) |
2418 (fp
->node
[i
].tex_offset
<< R300_TEX_START_SHIFT
) |
2419 (fp
->node
[i
].tex_end
<< R300_TEX_SIZE_SHIFT
) |
2422 rmesa
->hw
.fp
.cmd
[R300_FP_NODE0
+ (3 - i
)] = 0;
2426 R300_STATECHANGE(rmesa
, fpp
);
2427 rmesa
->hw
.fpp
.cmd
[R300_FPP_CMD_0
] = cmdpacket0(R300_PFS_PARAM_0_X
, fp
->const_nr
* 4);
2428 for (i
= 0; i
< fp
->const_nr
; i
++) {
2429 rmesa
->hw
.fpp
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 0] = r300PackFloat24(fp
->constant
[i
][0]);
2430 rmesa
->hw
.fpp
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 1] = r300PackFloat24(fp
->constant
[i
][1]);
2431 rmesa
->hw
.fpp
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 2] = r300PackFloat24(fp
->constant
[i
][2]);
2432 rmesa
->hw
.fpp
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 3] = r300PackFloat24(fp
->constant
[i
][3]);
2436 #define bump_r500fp_count(ptr, new_count) do{\
2437 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
2438 int _nc=(new_count)/6; \
2439 assert(_nc < 256); \
2440 if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
2443 #define bump_r500fp_const_count(ptr, new_count) do{\
2444 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
2445 int _nc=(new_count)/4; \
2446 assert(_nc < 256); \
2447 if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
2450 static void r500SetupPixelShader(r300ContextPtr rmesa
)
2452 GLcontext
*ctx
= rmesa
->radeon
.glCtx
;
2453 struct r500_fragment_program
*fp
= (struct r500_fragment_program
*)
2454 (char *)ctx
->FragmentProgram
._Current
;
2457 if (!fp
) /* should only happenen once, just after context is created */
2460 r500TranslateFragmentShader(rmesa
, fp
);
2461 if (!fp
->translated
) {
2462 fprintf(stderr
, "%s: No valid fragment shader, exiting\n",
2467 R300_STATECHANGE(rmesa
, fp
);
2468 rmesa
->hw
.fp
.cmd
[R500_FP_PIXSIZE
] = fp
->max_temp_idx
;
2470 R300_STATECHANGE(rmesa
, r500fp
);
2471 /* Emit our shader... */
2472 for (i
= 0; i
< fp
->cs
->nrslots
; i
++) {
2473 rmesa
->hw
.r500fp
.cmd
[i
*6+1] = fp
->inst
[i
].inst0
;
2474 rmesa
->hw
.r500fp
.cmd
[i
*6+2] = fp
->inst
[i
].inst1
;
2475 rmesa
->hw
.r500fp
.cmd
[i
*6+3] = fp
->inst
[i
].inst2
;
2476 rmesa
->hw
.r500fp
.cmd
[i
*6+4] = fp
->inst
[i
].inst3
;
2477 rmesa
->hw
.r500fp
.cmd
[i
*6+5] = fp
->inst
[i
].inst4
;
2478 rmesa
->hw
.r500fp
.cmd
[i
*6+6] = fp
->inst
[i
].inst5
;
2481 bump_r500fp_count(rmesa
->hw
.r500fp
.cmd
, fp
->cs
->nrslots
* 6);
2484 R300_STATECHANGE(rmesa
, r500fp_const
);
2485 for (i
= 0; i
< fp
->const_nr
; i
++) {
2486 rmesa
->hw
.r500fp_const
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 0] = r300PackFloat32(fp
->constant
[i
][0]);
2487 rmesa
->hw
.r500fp_const
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 1] = r300PackFloat32(fp
->constant
[i
][1]);
2488 rmesa
->hw
.r500fp_const
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 2] = r300PackFloat32(fp
->constant
[i
][2]);
2489 rmesa
->hw
.r500fp_const
.cmd
[R300_FPP_PARAM_0
+ 4 * i
+ 3] = r300PackFloat32(fp
->constant
[i
][3]);
2491 bump_r500fp_const_count(rmesa
->hw
.r500fp_const
.cmd
, fp
->const_nr
* 4);
2495 void r300UpdateShaderStates(r300ContextPtr rmesa
)
2498 ctx
= rmesa
->radeon
.glCtx
;
2500 r300UpdateTextureState(ctx
);
2502 if (rmesa
->radeon
.radeonScreen
->chip_family
>= CHIP_FAMILY_RV515
)
2503 r500SetupPixelShader(rmesa
);
2505 r300SetupPixelShader(rmesa
);
2506 r300SetupTextures(ctx
);
2508 if (rmesa
->radeon
.radeonScreen
->chip_family
>= CHIP_FAMILY_RV515
)
2509 r500SetupRSUnit(ctx
);
2511 r300SetupRSUnit(ctx
);
2513 if ((rmesa
->radeon
.radeonScreen
->chip_flags
& RADEON_CHIPSET_TCL
))
2514 r300SetupVertexProgram(rmesa
);
2519 * Called by Mesa after an internal state update.
2521 static void r300InvalidateState(GLcontext
* ctx
, GLuint new_state
)
2523 r300ContextPtr r300
= R300_CONTEXT(ctx
);
2525 _swrast_InvalidateState(ctx
, new_state
);
2526 _swsetup_InvalidateState(ctx
, new_state
);
2527 _vbo_InvalidateState(ctx
, new_state
);
2528 _tnl_InvalidateState(ctx
, new_state
);
2529 _ae_invalidate_state(ctx
, new_state
);
2531 if (new_state
& (_NEW_BUFFERS
| _NEW_COLOR
| _NEW_PIXEL
)) {
2532 r300UpdateDrawBuffer(ctx
);
2535 r300UpdateStateParameters(ctx
, new_state
);
2537 r300
->NewGLState
|= new_state
;
2541 * Calculate initial hardware state and register state functions.
2542 * Assumes that the command buffer and state atoms have been
2543 * initialized already.
2545 void r300InitState(r300ContextPtr r300
)
2547 GLcontext
*ctx
= r300
->radeon
.glCtx
;
2550 radeonInitState(&r300
->radeon
);
2552 switch (ctx
->Visual
.depthBits
) {
2554 r300
->state
.depth
.scale
= 1.0 / (GLfloat
) 0xffff;
2555 depth_fmt
= R300_DEPTHFORMAT_16BIT_INT_Z
;
2556 r300
->state
.stencil
.clear
= 0x00000000;
2559 r300
->state
.depth
.scale
= 1.0 / (GLfloat
) 0xffffff;
2560 depth_fmt
= R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL
;
2561 r300
->state
.stencil
.clear
= 0x00ff0000;
2564 fprintf(stderr
, "Error: Unsupported depth %d... exiting\n",
2565 ctx
->Visual
.depthBits
);
2569 /* Only have hw stencil when depth buffer is 24 bits deep */
2570 r300
->state
.stencil
.hw_stencil
= (ctx
->Visual
.stencilBits
> 0 &&
2571 ctx
->Visual
.depthBits
== 24);
2573 memset(&(r300
->state
.texture
), 0, sizeof(r300
->state
.texture
));
2575 r300ResetHwState(r300
);
2578 static void r300RenderMode(GLcontext
* ctx
, GLenum mode
)
2580 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
2585 void r300UpdateClipPlanes( GLcontext
*ctx
)
2587 r300ContextPtr rmesa
= R300_CONTEXT(ctx
);
2590 for (p
= 0; p
< ctx
->Const
.MaxClipPlanes
; p
++) {
2591 if (ctx
->Transform
.ClipPlanesEnabled
& (1 << p
)) {
2592 GLint
*ip
= (GLint
*)ctx
->Transform
._ClipUserPlane
[p
];
2594 R300_STATECHANGE( rmesa
, vpucp
[p
] );
2595 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_X
] = ip
[0];
2596 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_Y
] = ip
[1];
2597 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_Z
] = ip
[2];
2598 rmesa
->hw
.vpucp
[p
].cmd
[R300_VPUCP_W
] = ip
[3];
2604 * Initialize driver's state callback functions
2606 void r300InitStateFuncs(struct dd_function_table
*functions
)
2608 radeonInitStateFuncs(functions
);
2610 functions
->UpdateState
= r300InvalidateState
;
2611 functions
->AlphaFunc
= r300AlphaFunc
;
2612 functions
->BlendColor
= r300BlendColor
;
2613 functions
->BlendEquationSeparate
= r300BlendEquationSeparate
;
2614 functions
->BlendFuncSeparate
= r300BlendFuncSeparate
;
2615 functions
->Enable
= r300Enable
;
2616 functions
->ColorMask
= r300ColorMask
;
2617 functions
->DepthFunc
= r300DepthFunc
;
2618 functions
->DepthMask
= r300DepthMask
;
2619 functions
->CullFace
= r300CullFace
;
2620 functions
->Fogfv
= r300Fogfv
;
2621 functions
->FrontFace
= r300FrontFace
;
2622 functions
->ShadeModel
= r300ShadeModel
;
2624 /* Stencil related */
2625 functions
->ClearStencil
= r300ClearStencil
;
2626 functions
->StencilFuncSeparate
= r300StencilFuncSeparate
;
2627 functions
->StencilMaskSeparate
= r300StencilMaskSeparate
;
2628 functions
->StencilOpSeparate
= r300StencilOpSeparate
;
2630 /* Viewport related */
2631 functions
->Viewport
= r300Viewport
;
2632 functions
->DepthRange
= r300DepthRange
;
2633 functions
->PointSize
= r300PointSize
;
2634 functions
->LineWidth
= r300LineWidth
;
2636 functions
->PolygonOffset
= r300PolygonOffset
;
2637 functions
->PolygonMode
= r300PolygonMode
;
2639 functions
->RenderMode
= r300RenderMode
;
2641 functions
->ClipPlane
= r300ClipPlane
;