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radeon/r200/r300: fix warnings
[mesa.git] / src / mesa / drivers / dri / r300 / r300_state.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002.
3 Copyright (C) 2004 Nicolai Haehnle.
4 All Rights Reserved.
5
6 The Weather Channel (TM) funded Tungsten Graphics to develop the
7 initial release of the Radeon 8500 driver under the XFree86 license.
8 This notice must be preserved.
9
10 Permission is hereby granted, free of charge, to any person obtaining
11 a copy of this software and associated documentation files (the
12 "Software"), to deal in the Software without restriction, including
13 without limitation the rights to use, copy, modify, merge, publish,
14 distribute, sublicense, and/or sell copies of the Software, and to
15 permit persons to whom the Software is furnished to do so, subject to
16 the following conditions:
17
18 The above copyright notice and this permission notice (including the
19 next paragraph) shall be included in all copies or substantial
20 portions of the Software.
21
22 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
23 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
24 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
25 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
26 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
27 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
28 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
29
30 **************************************************************************/
31
32 /**
33 * \file
34 *
35 * \author Nicolai Haehnle <prefect_@gmx.net>
36 */
37
38 #include "main/glheader.h"
39 #include "main/state.h"
40 #include "main/imports.h"
41 #include "main/enums.h"
42 #include "main/macros.h"
43 #include "main/context.h"
44 #include "main/dd.h"
45 #include "main/framebuffer.h"
46 #include "main/simple_list.h"
47 #include "main/api_arrayelt.h"
48 #include "main/texformat.h"
49
50 #include "swrast/swrast.h"
51 #include "swrast_setup/swrast_setup.h"
52 #include "shader/prog_parameter.h"
53 #include "shader/prog_statevars.h"
54 #include "vbo/vbo.h"
55 #include "tnl/tnl.h"
56
57 #include "r300_context.h"
58 #include "r300_ioctl.h"
59 #include "r300_state.h"
60 #include "r300_reg.h"
61 #include "r300_emit.h"
62 #include "r300_fragprog.h"
63 #include "r300_tex.h"
64
65 #include "drirenderbuffer.h"
66
67 extern int future_hw_tcl_on;
68 extern void _tnl_UpdateFixedFunctionProgram(GLcontext * ctx);
69
70 static void r300BlendColor(GLcontext * ctx, const GLfloat cf[4])
71 {
72 r300ContextPtr rmesa = R300_CONTEXT(ctx);
73
74 R300_STATECHANGE(rmesa, blend_color);
75
76 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
77 GLuint r = IROUND(cf[0]*1023.0f);
78 GLuint g = IROUND(cf[1]*1023.0f);
79 GLuint b = IROUND(cf[2]*1023.0f);
80 GLuint a = IROUND(cf[3]*1023.0f);
81
82 rmesa->hw.blend_color.cmd[1] = r | (a << 16);
83 rmesa->hw.blend_color.cmd[2] = b | (g << 16);
84 } else {
85 GLubyte color[4];
86 CLAMPED_FLOAT_TO_UBYTE(color[0], cf[0]);
87 CLAMPED_FLOAT_TO_UBYTE(color[1], cf[1]);
88 CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]);
89 CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]);
90
91 rmesa->hw.blend_color.cmd[1] = PACK_COLOR_8888(color[3], color[0],
92 color[1], color[2]);
93 }
94 }
95
96 /**
97 * Calculate the hardware blend factor setting. This same function is used
98 * for source and destination of both alpha and RGB.
99 *
100 * \returns
101 * The hardware register value for the specified blend factor. This value
102 * will need to be shifted into the correct position for either source or
103 * destination factor.
104 *
105 * \todo
106 * Since the two cases where source and destination are handled differently
107 * are essentially error cases, they should never happen. Determine if these
108 * cases can be removed.
109 */
110 static int blend_factor(GLenum factor, GLboolean is_src)
111 {
112 switch (factor) {
113 case GL_ZERO:
114 return R300_BLEND_GL_ZERO;
115 break;
116 case GL_ONE:
117 return R300_BLEND_GL_ONE;
118 break;
119 case GL_DST_COLOR:
120 return R300_BLEND_GL_DST_COLOR;
121 break;
122 case GL_ONE_MINUS_DST_COLOR:
123 return R300_BLEND_GL_ONE_MINUS_DST_COLOR;
124 break;
125 case GL_SRC_COLOR:
126 return R300_BLEND_GL_SRC_COLOR;
127 break;
128 case GL_ONE_MINUS_SRC_COLOR:
129 return R300_BLEND_GL_ONE_MINUS_SRC_COLOR;
130 break;
131 case GL_SRC_ALPHA:
132 return R300_BLEND_GL_SRC_ALPHA;
133 break;
134 case GL_ONE_MINUS_SRC_ALPHA:
135 return R300_BLEND_GL_ONE_MINUS_SRC_ALPHA;
136 break;
137 case GL_DST_ALPHA:
138 return R300_BLEND_GL_DST_ALPHA;
139 break;
140 case GL_ONE_MINUS_DST_ALPHA:
141 return R300_BLEND_GL_ONE_MINUS_DST_ALPHA;
142 break;
143 case GL_SRC_ALPHA_SATURATE:
144 return (is_src) ? R300_BLEND_GL_SRC_ALPHA_SATURATE :
145 R300_BLEND_GL_ZERO;
146 break;
147 case GL_CONSTANT_COLOR:
148 return R300_BLEND_GL_CONST_COLOR;
149 break;
150 case GL_ONE_MINUS_CONSTANT_COLOR:
151 return R300_BLEND_GL_ONE_MINUS_CONST_COLOR;
152 break;
153 case GL_CONSTANT_ALPHA:
154 return R300_BLEND_GL_CONST_ALPHA;
155 break;
156 case GL_ONE_MINUS_CONSTANT_ALPHA:
157 return R300_BLEND_GL_ONE_MINUS_CONST_ALPHA;
158 break;
159 default:
160 fprintf(stderr, "unknown blend factor %x\n", factor);
161 return (is_src) ? R300_BLEND_GL_ONE : R300_BLEND_GL_ZERO;
162 break;
163 }
164 }
165
166 /**
167 * Sets both the blend equation and the blend function.
168 * This is done in a single
169 * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
170 * change the interpretation of the blend function.
171 * Also, make sure that blend function and blend equation are set to their
172 * default value if color blending is not enabled, since at least blend
173 * equations GL_MIN and GL_FUNC_REVERSE_SUBTRACT will cause wrong results
174 * otherwise for unknown reasons.
175 */
176
177 /* helper function */
178 static void r300SetBlendCntl(r300ContextPtr r300, int func, int eqn,
179 int cbits, int funcA, int eqnA)
180 {
181 GLuint new_ablend, new_cblend;
182
183 #if 0
184 fprintf(stderr,
185 "eqnA=%08x funcA=%08x eqn=%08x func=%08x cbits=%08x\n",
186 eqnA, funcA, eqn, func, cbits);
187 #endif
188 new_ablend = eqnA | funcA;
189 new_cblend = eqn | func;
190
191 /* Some blend factor combinations don't seem to work when the
192 * BLEND_NO_SEPARATE bit is set.
193 *
194 * Especially problematic candidates are the ONE_MINUS_* flags,
195 * but I can't see a real pattern.
196 */
197 #if 0
198 if (new_ablend == new_cblend) {
199 new_cblend |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0;
200 }
201 #endif
202 new_cblend |= cbits;
203
204 if ((new_ablend != r300->hw.bld.cmd[R300_BLD_ABLEND]) ||
205 (new_cblend != r300->hw.bld.cmd[R300_BLD_CBLEND])) {
206 R300_STATECHANGE(r300, bld);
207 r300->hw.bld.cmd[R300_BLD_ABLEND] = new_ablend;
208 r300->hw.bld.cmd[R300_BLD_CBLEND] = new_cblend;
209 }
210 }
211
212 static void r300SetBlendState(GLcontext * ctx)
213 {
214 r300ContextPtr r300 = R300_CONTEXT(ctx);
215 int func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
216 (R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
217 int eqn = R300_COMB_FCN_ADD_CLAMP;
218 int funcA = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
219 (R300_BLEND_GL_ZERO << R300_DST_BLEND_SHIFT);
220 int eqnA = R300_COMB_FCN_ADD_CLAMP;
221
222 if (RGBA_LOGICOP_ENABLED(ctx) || !ctx->Color.BlendEnabled) {
223 r300SetBlendCntl(r300, func, eqn, 0, func, eqn);
224 return;
225 }
226
227 func =
228 (blend_factor(ctx->Color.BlendSrcRGB, GL_TRUE) <<
229 R300_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstRGB,
230 GL_FALSE) <<
231 R300_DST_BLEND_SHIFT);
232
233 switch (ctx->Color.BlendEquationRGB) {
234 case GL_FUNC_ADD:
235 eqn = R300_COMB_FCN_ADD_CLAMP;
236 break;
237
238 case GL_FUNC_SUBTRACT:
239 eqn = R300_COMB_FCN_SUB_CLAMP;
240 break;
241
242 case GL_FUNC_REVERSE_SUBTRACT:
243 eqn = R300_COMB_FCN_RSUB_CLAMP;
244 break;
245
246 case GL_MIN:
247 eqn = R300_COMB_FCN_MIN;
248 func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
249 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
250 break;
251
252 case GL_MAX:
253 eqn = R300_COMB_FCN_MAX;
254 func = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
255 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
256 break;
257
258 default:
259 fprintf(stderr,
260 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
261 __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB);
262 return;
263 }
264
265 funcA =
266 (blend_factor(ctx->Color.BlendSrcA, GL_TRUE) <<
267 R300_SRC_BLEND_SHIFT) | (blend_factor(ctx->Color.BlendDstA,
268 GL_FALSE) <<
269 R300_DST_BLEND_SHIFT);
270
271 switch (ctx->Color.BlendEquationA) {
272 case GL_FUNC_ADD:
273 eqnA = R300_COMB_FCN_ADD_CLAMP;
274 break;
275
276 case GL_FUNC_SUBTRACT:
277 eqnA = R300_COMB_FCN_SUB_CLAMP;
278 break;
279
280 case GL_FUNC_REVERSE_SUBTRACT:
281 eqnA = R300_COMB_FCN_RSUB_CLAMP;
282 break;
283
284 case GL_MIN:
285 eqnA = R300_COMB_FCN_MIN;
286 funcA = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
287 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
288 break;
289
290 case GL_MAX:
291 eqnA = R300_COMB_FCN_MAX;
292 funcA = (R300_BLEND_GL_ONE << R300_SRC_BLEND_SHIFT) |
293 (R300_BLEND_GL_ONE << R300_DST_BLEND_SHIFT);
294 break;
295
296 default:
297 fprintf(stderr,
298 "[%s:%u] Invalid A blend equation (0x%04x).\n",
299 __FUNCTION__, __LINE__, ctx->Color.BlendEquationA);
300 return;
301 }
302
303 r300SetBlendCntl(r300,
304 func, eqn,
305 (R300_SEPARATE_ALPHA_ENABLE |
306 R300_READ_ENABLE |
307 R300_ALPHA_BLEND_ENABLE), funcA, eqnA);
308 }
309
310 static void r300BlendEquationSeparate(GLcontext * ctx,
311 GLenum modeRGB, GLenum modeA)
312 {
313 r300SetBlendState(ctx);
314 }
315
316 static void r300BlendFuncSeparate(GLcontext * ctx,
317 GLenum sfactorRGB, GLenum dfactorRGB,
318 GLenum sfactorA, GLenum dfactorA)
319 {
320 r300SetBlendState(ctx);
321 }
322
323 /**
324 * Translate LogicOp enums into hardware representation.
325 * Both use a very logical bit-wise layout, but unfortunately the order
326 * of bits is reversed.
327 */
328 static GLuint translate_logicop(GLenum logicop)
329 {
330 GLuint bits = logicop - GL_CLEAR;
331 bits = ((bits & 1) << 3) | ((bits & 2) << 1) | ((bits & 4) >> 1) | ((bits & 8) >> 3);
332 return bits << R300_RB3D_ROPCNTL_ROP_SHIFT;
333 }
334
335 /**
336 * Used internally to update the r300->hw hardware state to match the
337 * current OpenGL state.
338 */
339 static void r300SetLogicOpState(GLcontext *ctx)
340 {
341 r300ContextPtr r300 = R300_CONTEXT(ctx);
342 R300_STATECHANGE(r300, rop);
343 if (RGBA_LOGICOP_ENABLED(ctx)) {
344 r300->hw.rop.cmd[1] = R300_RB3D_ROPCNTL_ROP_ENABLE |
345 translate_logicop(ctx->Color.LogicOp);
346 } else {
347 r300->hw.rop.cmd[1] = 0;
348 }
349 }
350
351 /**
352 * Called by Mesa when an application program changes the LogicOp state
353 * via glLogicOp.
354 */
355 static void r300LogicOpcode(GLcontext *ctx, GLenum logicop)
356 {
357 if (RGBA_LOGICOP_ENABLED(ctx))
358 r300SetLogicOpState(ctx);
359 }
360
361 static void r300ClipPlane( GLcontext *ctx, GLenum plane, const GLfloat *eq )
362 {
363 r300ContextPtr rmesa = R300_CONTEXT(ctx);
364 GLint p;
365 GLint *ip;
366
367 /* no VAP UCP on non-TCL chipsets */
368 if (!(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
369 return;
370
371 p = (GLint) plane - (GLint) GL_CLIP_PLANE0;
372 ip = (GLint *)ctx->Transform._ClipUserPlane[p];
373
374 R300_STATECHANGE( rmesa, vpucp[p] );
375 rmesa->hw.vpucp[p].cmd[R300_VPUCP_X] = ip[0];
376 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Y] = ip[1];
377 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Z] = ip[2];
378 rmesa->hw.vpucp[p].cmd[R300_VPUCP_W] = ip[3];
379 }
380
381 static void r300SetClipPlaneState(GLcontext * ctx, GLenum cap, GLboolean state)
382 {
383 r300ContextPtr r300 = R300_CONTEXT(ctx);
384 GLuint p;
385
386 /* no VAP UCP on non-TCL chipsets */
387 if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
388 return;
389
390 p = cap - GL_CLIP_PLANE0;
391 R300_STATECHANGE(r300, vap_clip_cntl);
392 if (state) {
393 r300->hw.vap_clip_cntl.cmd[1] |= (R300_VAP_UCP_ENABLE_0 << p);
394 r300ClipPlane(ctx, cap, NULL);
395 } else {
396 r300->hw.vap_clip_cntl.cmd[1] &= ~(R300_VAP_UCP_ENABLE_0 << p);
397 }
398 }
399
400 /**
401 * Update our tracked culling state based on Mesa's state.
402 */
403 static void r300UpdateCulling(GLcontext * ctx)
404 {
405 r300ContextPtr r300 = R300_CONTEXT(ctx);
406 uint32_t val = 0;
407
408 if (ctx->Polygon.CullFlag) {
409 switch (ctx->Polygon.CullFaceMode) {
410 case GL_FRONT:
411 val = R300_CULL_FRONT;
412 break;
413 case GL_BACK:
414 val = R300_CULL_BACK;
415 break;
416 case GL_FRONT_AND_BACK:
417 val = R300_CULL_FRONT | R300_CULL_BACK;
418 break;
419 default:
420 break;
421 }
422 }
423
424 switch (ctx->Polygon.FrontFace) {
425 case GL_CW:
426 val |= R300_FRONT_FACE_CW;
427 break;
428 case GL_CCW:
429 val |= R300_FRONT_FACE_CCW;
430 break;
431 default:
432 break;
433 }
434
435 R300_STATECHANGE(r300, cul);
436 r300->hw.cul.cmd[R300_CUL_CULL] = val;
437 }
438
439 static void r300SetPolygonOffsetState(GLcontext * ctx, GLboolean state)
440 {
441 r300ContextPtr r300 = R300_CONTEXT(ctx);
442
443 R300_STATECHANGE(r300, occlusion_cntl);
444 if (state) {
445 r300->hw.occlusion_cntl.cmd[1] |= (3 << 0);
446 } else {
447 r300->hw.occlusion_cntl.cmd[1] &= ~(3 << 0);
448 }
449 }
450
451 static GLboolean current_fragment_program_writes_depth(GLcontext* ctx)
452 {
453 r300ContextPtr r300 = R300_CONTEXT(ctx);
454
455 if (r300->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV515) {
456 struct r300_fragment_program *fp = (struct r300_fragment_program *)
457 (char *)ctx->FragmentProgram._Current;
458 return (fp && fp->WritesDepth);
459 } else {
460 struct r500_fragment_program* fp =
461 (struct r500_fragment_program*)(char*)
462 ctx->FragmentProgram._Current;
463 return (fp && fp->writes_depth);
464 }
465 }
466
467 static void r300SetEarlyZState(GLcontext * ctx)
468 {
469 r300ContextPtr r300 = R300_CONTEXT(ctx);
470 GLuint topZ = R300_ZTOP_ENABLE;
471
472 if (ctx->Color.AlphaEnabled && ctx->Color.AlphaFunc != GL_ALWAYS)
473 topZ = R300_ZTOP_DISABLE;
474 if (current_fragment_program_writes_depth(ctx))
475 topZ = R300_ZTOP_DISABLE;
476
477 if (topZ != r300->hw.zstencil_format.cmd[2]) {
478 /* Note: This completely reemits the stencil format.
479 * I have not tested whether this is strictly necessary,
480 * or if emitting a write to ZB_ZTOP is enough.
481 */
482 R300_STATECHANGE(r300, zstencil_format);
483 r300->hw.zstencil_format.cmd[2] = topZ;
484 }
485 }
486
487 static void r300SetAlphaState(GLcontext * ctx)
488 {
489 r300ContextPtr r300 = R300_CONTEXT(ctx);
490 GLubyte refByte;
491 uint32_t pp_misc = 0x0;
492 GLboolean really_enabled = ctx->Color.AlphaEnabled;
493
494 CLAMPED_FLOAT_TO_UBYTE(refByte, ctx->Color.AlphaRef);
495
496 switch (ctx->Color.AlphaFunc) {
497 case GL_NEVER:
498 pp_misc |= R300_FG_ALPHA_FUNC_NEVER;
499 break;
500 case GL_LESS:
501 pp_misc |= R300_FG_ALPHA_FUNC_LESS;
502 break;
503 case GL_EQUAL:
504 pp_misc |= R300_FG_ALPHA_FUNC_EQUAL;
505 break;
506 case GL_LEQUAL:
507 pp_misc |= R300_FG_ALPHA_FUNC_LE;
508 break;
509 case GL_GREATER:
510 pp_misc |= R300_FG_ALPHA_FUNC_GREATER;
511 break;
512 case GL_NOTEQUAL:
513 pp_misc |= R300_FG_ALPHA_FUNC_NOTEQUAL;
514 break;
515 case GL_GEQUAL:
516 pp_misc |= R300_FG_ALPHA_FUNC_GE;
517 break;
518 case GL_ALWAYS:
519 /*pp_misc |= FG_ALPHA_FUNC_ALWAYS; */
520 really_enabled = GL_FALSE;
521 break;
522 }
523
524 if (really_enabled) {
525 pp_misc |= R300_FG_ALPHA_FUNC_ENABLE;
526 pp_misc |= R500_FG_ALPHA_FUNC_8BIT;
527 pp_misc |= (refByte & R300_FG_ALPHA_FUNC_VAL_MASK);
528 } else {
529 pp_misc = 0x0;
530 }
531
532 R300_STATECHANGE(r300, at);
533 r300->hw.at.cmd[R300_AT_ALPHA_TEST] = pp_misc;
534 r300->hw.at.cmd[R300_AT_UNKNOWN] = 0;
535
536 r300SetEarlyZState(ctx);
537 }
538
539 static void r300AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
540 {
541 (void)func;
542 (void)ref;
543 r300SetAlphaState(ctx);
544 }
545
546 static int translate_func(int func)
547 {
548 switch (func) {
549 case GL_NEVER:
550 return R300_ZS_NEVER;
551 case GL_LESS:
552 return R300_ZS_LESS;
553 case GL_EQUAL:
554 return R300_ZS_EQUAL;
555 case GL_LEQUAL:
556 return R300_ZS_LEQUAL;
557 case GL_GREATER:
558 return R300_ZS_GREATER;
559 case GL_NOTEQUAL:
560 return R300_ZS_NOTEQUAL;
561 case GL_GEQUAL:
562 return R300_ZS_GEQUAL;
563 case GL_ALWAYS:
564 return R300_ZS_ALWAYS;
565 }
566 return 0;
567 }
568
569 static void r300SetDepthState(GLcontext * ctx)
570 {
571 r300ContextPtr r300 = R300_CONTEXT(ctx);
572
573 R300_STATECHANGE(r300, zs);
574 r300->hw.zs.cmd[R300_ZS_CNTL_0] &= R300_STENCIL_ENABLE|R300_STENCIL_FRONT_BACK;
575 r300->hw.zs.cmd[R300_ZS_CNTL_1] &= ~(R300_ZS_MASK << R300_Z_FUNC_SHIFT);
576
577 if (ctx->Depth.Test) {
578 r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_Z_ENABLE;
579 if (ctx->Depth.Mask)
580 r300->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_Z_WRITE_ENABLE;
581 r300->hw.zs.cmd[R300_ZS_CNTL_1] |=
582 translate_func(ctx->Depth.Func) << R300_Z_FUNC_SHIFT;
583 }
584
585 r300SetEarlyZState(ctx);
586 }
587
588 static void r300SetStencilState(GLcontext * ctx, GLboolean state)
589 {
590 r300ContextPtr r300 = R300_CONTEXT(ctx);
591 GLboolean hw_stencil = GL_FALSE;
592 if (ctx->DrawBuffer) {
593 struct radeon_renderbuffer *rrbStencil
594 = radeon_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
595 hw_stencil = (rrbStencil && rrbStencil->bo);
596 }
597
598 if (hw_stencil) {
599 R300_STATECHANGE(r300, zs);
600 if (state) {
601 r300->hw.zs.cmd[R300_ZS_CNTL_0] |=
602 R300_STENCIL_ENABLE;
603 } else {
604 r300->hw.zs.cmd[R300_ZS_CNTL_0] &=
605 ~R300_STENCIL_ENABLE;
606 }
607 } else {
608 #if R200_MERGED
609 FALLBACK(&r300->radeon, RADEON_FALLBACK_STENCIL, state);
610 #endif
611 }
612 }
613
614 static void r300UpdatePolygonMode(GLcontext * ctx)
615 {
616 r300ContextPtr r300 = R300_CONTEXT(ctx);
617 uint32_t hw_mode = R300_GA_POLY_MODE_DISABLE;
618
619 /* Only do something if a polygon mode is wanted, default is GL_FILL */
620 if (ctx->Polygon.FrontMode != GL_FILL ||
621 ctx->Polygon.BackMode != GL_FILL) {
622 GLenum f, b;
623
624 /* Handle GL_CW (clock wise and GL_CCW (counter clock wise)
625 * correctly by selecting the correct front and back face
626 */
627 if (ctx->Polygon.FrontFace == GL_CCW) {
628 f = ctx->Polygon.FrontMode;
629 b = ctx->Polygon.BackMode;
630 } else {
631 f = ctx->Polygon.BackMode;
632 b = ctx->Polygon.FrontMode;
633 }
634
635 /* Enable polygon mode */
636 hw_mode |= R300_GA_POLY_MODE_DUAL;
637
638 switch (f) {
639 case GL_LINE:
640 hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_LINE;
641 break;
642 case GL_POINT:
643 hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_POINT;
644 break;
645 case GL_FILL:
646 hw_mode |= R300_GA_POLY_MODE_FRONT_PTYPE_TRI;
647 break;
648 }
649
650 switch (b) {
651 case GL_LINE:
652 hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_LINE;
653 break;
654 case GL_POINT:
655 hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_POINT;
656 break;
657 case GL_FILL:
658 hw_mode |= R300_GA_POLY_MODE_BACK_PTYPE_TRI;
659 break;
660 }
661 }
662
663 if (r300->hw.polygon_mode.cmd[1] != hw_mode) {
664 R300_STATECHANGE(r300, polygon_mode);
665 r300->hw.polygon_mode.cmd[1] = hw_mode;
666 }
667
668 r300->hw.polygon_mode.cmd[2] = 0x00000001;
669 r300->hw.polygon_mode.cmd[3] = 0x00000000;
670 }
671
672 /**
673 * Change the culling mode.
674 *
675 * \note Mesa already filters redundant calls to this function.
676 */
677 static void r300CullFace(GLcontext * ctx, GLenum mode)
678 {
679 (void)mode;
680
681 r300UpdateCulling(ctx);
682 }
683
684 /**
685 * Change the polygon orientation.
686 *
687 * \note Mesa already filters redundant calls to this function.
688 */
689 static void r300FrontFace(GLcontext * ctx, GLenum mode)
690 {
691 (void)mode;
692
693 r300UpdateCulling(ctx);
694 r300UpdatePolygonMode(ctx);
695 }
696
697 /**
698 * Change the depth testing function.
699 *
700 * \note Mesa already filters redundant calls to this function.
701 */
702 static void r300DepthFunc(GLcontext * ctx, GLenum func)
703 {
704 (void)func;
705 r300SetDepthState(ctx);
706 }
707
708 /**
709 * Enable/Disable depth writing.
710 *
711 * \note Mesa already filters redundant calls to this function.
712 */
713 static void r300DepthMask(GLcontext * ctx, GLboolean mask)
714 {
715 (void)mask;
716 r300SetDepthState(ctx);
717 }
718
719 /**
720 * Handle glColorMask()
721 */
722 static void r300ColorMask(GLcontext * ctx,
723 GLboolean r, GLboolean g, GLboolean b, GLboolean a)
724 {
725 r300ContextPtr r300 = R300_CONTEXT(ctx);
726 int mask = (r ? RB3D_COLOR_CHANNEL_MASK_RED_MASK0 : 0) |
727 (g ? RB3D_COLOR_CHANNEL_MASK_GREEN_MASK0 : 0) |
728 (b ? RB3D_COLOR_CHANNEL_MASK_BLUE_MASK0 : 0) |
729 (a ? RB3D_COLOR_CHANNEL_MASK_ALPHA_MASK0 : 0);
730
731 if (mask != r300->hw.cmk.cmd[R300_CMK_COLORMASK]) {
732 R300_STATECHANGE(r300, cmk);
733 r300->hw.cmk.cmd[R300_CMK_COLORMASK] = mask;
734 }
735 }
736
737 /* =============================================================
738 * Point state
739 */
740 static void r300PointSize(GLcontext * ctx, GLfloat size)
741 {
742 r300ContextPtr r300 = R300_CONTEXT(ctx);
743 /* same size limits for AA, non-AA points */
744 size = CLAMP(size, ctx->Const.MinPointSize, ctx->Const.MaxPointSize);
745
746 R300_STATECHANGE(r300, ps);
747 r300->hw.ps.cmd[R300_PS_POINTSIZE] =
748 ((int)(size * 6) << R300_POINTSIZE_X_SHIFT) |
749 ((int)(size * 6) << R300_POINTSIZE_Y_SHIFT);
750 }
751
752 static void r300PointParameter(GLcontext * ctx, GLenum pname, const GLfloat * param)
753 {
754 r300ContextPtr r300 = R300_CONTEXT(ctx);
755
756 switch (pname) {
757 case GL_POINT_SIZE_MIN:
758 R300_STATECHANGE(r300, ga_point_minmax);
759 r300->hw.ga_point_minmax.cmd[1] &= ~R300_GA_POINT_MINMAX_MIN_MASK;
760 r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MinSize * 6.0);
761 break;
762 case GL_POINT_SIZE_MAX:
763 R300_STATECHANGE(r300, ga_point_minmax);
764 r300->hw.ga_point_minmax.cmd[1] &= ~R300_GA_POINT_MINMAX_MAX_MASK;
765 r300->hw.ga_point_minmax.cmd[1] |= (GLuint)(ctx->Point.MaxSize * 6.0)
766 << R300_GA_POINT_MINMAX_MAX_SHIFT;
767 break;
768 case GL_POINT_DISTANCE_ATTENUATION:
769 break;
770 case GL_POINT_FADE_THRESHOLD_SIZE:
771 break;
772 default:
773 break;
774 }
775 }
776
777 /* =============================================================
778 * Line state
779 */
780 static void r300LineWidth(GLcontext * ctx, GLfloat widthf)
781 {
782 r300ContextPtr r300 = R300_CONTEXT(ctx);
783
784 widthf = CLAMP(widthf,
785 ctx->Const.MinPointSize,
786 ctx->Const.MaxPointSize);
787 R300_STATECHANGE(r300, lcntl);
788 r300->hw.lcntl.cmd[1] =
789 R300_LINE_CNT_HO | R300_LINE_CNT_VE | (int)(widthf * 6.0);
790 }
791
792 static void r300PolygonMode(GLcontext * ctx, GLenum face, GLenum mode)
793 {
794 (void)face;
795 (void)mode;
796
797 r300UpdatePolygonMode(ctx);
798 }
799
800 /* =============================================================
801 * Stencil
802 */
803
804 static int translate_stencil_op(int op)
805 {
806 switch (op) {
807 case GL_KEEP:
808 return R300_ZS_KEEP;
809 case GL_ZERO:
810 return R300_ZS_ZERO;
811 case GL_REPLACE:
812 return R300_ZS_REPLACE;
813 case GL_INCR:
814 return R300_ZS_INCR;
815 case GL_DECR:
816 return R300_ZS_DECR;
817 case GL_INCR_WRAP_EXT:
818 return R300_ZS_INCR_WRAP;
819 case GL_DECR_WRAP_EXT:
820 return R300_ZS_DECR_WRAP;
821 case GL_INVERT:
822 return R300_ZS_INVERT;
823 default:
824 WARN_ONCE("Do not know how to translate stencil op");
825 return R300_ZS_KEEP;
826 }
827 return 0;
828 }
829
830 static void r300ShadeModel(GLcontext * ctx, GLenum mode)
831 {
832 r300ContextPtr rmesa = R300_CONTEXT(ctx);
833
834 R300_STATECHANGE(rmesa, shade);
835 rmesa->hw.shade.cmd[1] = 0x00000002;
836 switch (mode) {
837 case GL_FLAT:
838 rmesa->hw.shade.cmd[2] = R300_RE_SHADE_MODEL_FLAT;
839 break;
840 case GL_SMOOTH:
841 rmesa->hw.shade.cmd[2] = R300_RE_SHADE_MODEL_SMOOTH;
842 break;
843 default:
844 return;
845 }
846 rmesa->hw.shade.cmd[3] = 0x00000000;
847 rmesa->hw.shade.cmd[4] = 0x00000000;
848 }
849
850 static void r300StencilFuncSeparate(GLcontext * ctx, GLenum face,
851 GLenum func, GLint ref, GLuint mask)
852 {
853 r300ContextPtr rmesa = R300_CONTEXT(ctx);
854 GLuint refmask =
855 ((ctx->Stencil.Ref[0] & 0xff) << R300_STENCILREF_SHIFT)
856 | ((ctx->Stencil.ValueMask[0] & 0xff) << R300_STENCILMASK_SHIFT);
857 const unsigned back = ctx->Stencil._BackFace;
858 GLuint flag;
859
860 R300_STATECHANGE(rmesa, zs);
861 rmesa->hw.zs.cmd[R300_ZS_CNTL_0] |= R300_STENCIL_FRONT_BACK;
862 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &= ~((R300_ZS_MASK <<
863 R300_S_FRONT_FUNC_SHIFT)
864 | (R300_ZS_MASK <<
865 R300_S_BACK_FUNC_SHIFT));
866
867 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &=
868 ~((R300_STENCILREF_MASK << R300_STENCILREF_SHIFT) |
869 (R300_STENCILREF_MASK << R300_STENCILMASK_SHIFT));
870
871 flag = translate_func(ctx->Stencil.Function[0]);
872 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
873 (flag << R300_S_FRONT_FUNC_SHIFT);
874
875 flag = translate_func(ctx->Stencil.Function[back]);
876
877 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
878 (flag << R300_S_BACK_FUNC_SHIFT);
879 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |= refmask;
880 }
881
882 static void r300StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
883 {
884 r300ContextPtr rmesa = R300_CONTEXT(ctx);
885
886 R300_STATECHANGE(rmesa, zs);
887 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] &=
888 ~(R300_STENCILREF_MASK <<
889 R300_STENCILWRITEMASK_SHIFT);
890 rmesa->hw.zs.cmd[R300_ZS_CNTL_2] |=
891 (ctx->Stencil.
892 WriteMask[0] & R300_STENCILREF_MASK) <<
893 R300_STENCILWRITEMASK_SHIFT;
894 }
895
896 static void r300StencilOpSeparate(GLcontext * ctx, GLenum face,
897 GLenum fail, GLenum zfail, GLenum zpass)
898 {
899 r300ContextPtr rmesa = R300_CONTEXT(ctx);
900 const unsigned back = ctx->Stencil._BackFace;
901
902 R300_STATECHANGE(rmesa, zs);
903 /* It is easier to mask what's left.. */
904 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] &=
905 (R300_ZS_MASK << R300_Z_FUNC_SHIFT) |
906 (R300_ZS_MASK << R300_S_FRONT_FUNC_SHIFT) |
907 (R300_ZS_MASK << R300_S_BACK_FUNC_SHIFT);
908
909 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
910 (translate_stencil_op(ctx->Stencil.FailFunc[0]) <<
911 R300_S_FRONT_SFAIL_OP_SHIFT)
912 | (translate_stencil_op(ctx->Stencil.ZFailFunc[0]) <<
913 R300_S_FRONT_ZFAIL_OP_SHIFT)
914 | (translate_stencil_op(ctx->Stencil.ZPassFunc[0]) <<
915 R300_S_FRONT_ZPASS_OP_SHIFT);
916
917 rmesa->hw.zs.cmd[R300_ZS_CNTL_1] |=
918 (translate_stencil_op(ctx->Stencil.FailFunc[back]) <<
919 R300_S_BACK_SFAIL_OP_SHIFT)
920 | (translate_stencil_op(ctx->Stencil.ZFailFunc[back]) <<
921 R300_S_BACK_ZFAIL_OP_SHIFT)
922 | (translate_stencil_op(ctx->Stencil.ZPassFunc[back]) <<
923 R300_S_BACK_ZPASS_OP_SHIFT);
924 }
925
926 /* =============================================================
927 * Window position and viewport transformation
928 */
929
930 /*
931 * To correctly position primitives:
932 */
933 #define SUBPIXEL_X 0.125
934 #define SUBPIXEL_Y 0.125
935
936 static void r300UpdateWindow(GLcontext * ctx)
937 {
938 r300ContextPtr rmesa = R300_CONTEXT(ctx);
939 __DRIdrawablePrivate *dPriv = rmesa->radeon.dri.drawable;
940 GLfloat xoffset = dPriv ? (GLfloat) dPriv->x : 0;
941 GLfloat yoffset = dPriv ? (GLfloat) dPriv->y + dPriv->h : 0;
942 const GLfloat *v = ctx->Viewport._WindowMap.m;
943 const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
944 const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0);
945 GLfloat y_scale, y_bias;
946
947 if (render_to_fbo) {
948 y_scale = 1.0;
949 y_bias = 0;
950 } else {
951 y_scale = -1.0;
952 y_bias = yoffset;
953 }
954
955 GLfloat sx = v[MAT_SX];
956 GLfloat tx = v[MAT_TX] + xoffset + SUBPIXEL_X;
957 GLfloat sy = v[MAT_SY] * y_scale;
958 GLfloat ty = (v[MAT_TY] * y_scale) + y_bias + SUBPIXEL_Y;
959 GLfloat sz = v[MAT_SZ] * depthScale;
960 GLfloat tz = v[MAT_TZ] * depthScale;
961
962 R300_STATECHANGE(rmesa, vpt);
963
964 rmesa->hw.vpt.cmd[R300_VPT_XSCALE] = r300PackFloat32(sx);
965 rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx);
966 rmesa->hw.vpt.cmd[R300_VPT_YSCALE] = r300PackFloat32(sy);
967 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty);
968 rmesa->hw.vpt.cmd[R300_VPT_ZSCALE] = r300PackFloat32(sz);
969 rmesa->hw.vpt.cmd[R300_VPT_ZOFFSET] = r300PackFloat32(tz);
970 }
971
972 static void r300Viewport(GLcontext * ctx, GLint x, GLint y,
973 GLsizei width, GLsizei height)
974 {
975 /* Don't pipeline viewport changes, conflict with window offset
976 * setting below. Could apply deltas to rescue pipelined viewport
977 * values, or keep the originals hanging around.
978 */
979 r300UpdateWindow(ctx);
980
981 radeon_viewport(ctx, x, y, width, height);
982 }
983
984 static void r300DepthRange(GLcontext * ctx, GLclampd nearval, GLclampd farval)
985 {
986 r300UpdateWindow(ctx);
987 }
988
989 void r300UpdateViewportOffset(GLcontext * ctx)
990 {
991 r300ContextPtr rmesa = R300_CONTEXT(ctx);
992 __DRIdrawablePrivate *dPriv = ((radeonContextPtr) rmesa)->dri.drawable;
993 GLfloat xoffset = (GLfloat) dPriv->x;
994 GLfloat yoffset = (GLfloat) dPriv->y + dPriv->h;
995 const GLfloat *v = ctx->Viewport._WindowMap.m;
996
997 GLfloat tx = v[MAT_TX] + xoffset + SUBPIXEL_X;
998 GLfloat ty = (-v[MAT_TY]) + yoffset + SUBPIXEL_Y;
999
1000 if (rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] != r300PackFloat32(tx) ||
1001 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] != r300PackFloat32(ty)) {
1002 /* Note: this should also modify whatever data the context reset
1003 * code uses...
1004 */
1005 R300_STATECHANGE(rmesa, vpt);
1006 rmesa->hw.vpt.cmd[R300_VPT_XOFFSET] = r300PackFloat32(tx);
1007 rmesa->hw.vpt.cmd[R300_VPT_YOFFSET] = r300PackFloat32(ty);
1008
1009 }
1010
1011 radeonUpdateScissor(ctx);
1012 }
1013
1014 static void
1015 r300FetchStateParameter(GLcontext * ctx,
1016 const gl_state_index state[STATE_LENGTH],
1017 GLfloat * value)
1018 {
1019 r300ContextPtr r300 = R300_CONTEXT(ctx);
1020
1021 switch (state[0]) {
1022 case STATE_INTERNAL:
1023 switch (state[1]) {
1024 case STATE_R300_WINDOW_DIMENSION:
1025 value[0] = r300->radeon.dri.drawable->w * 0.5f; /* width*0.5 */
1026 value[1] = r300->radeon.dri.drawable->h * 0.5f; /* height*0.5 */
1027 value[2] = 0.5F; /* for moving range [-1 1] -> [0 1] */
1028 value[3] = 1.0F; /* not used */
1029 break;
1030
1031 case STATE_R300_TEXRECT_FACTOR:{
1032 struct gl_texture_object *t =
1033 ctx->Texture.Unit[state[2]].CurrentTex[TEXTURE_RECT_INDEX];
1034
1035 if (t && t->Image[0][t->BaseLevel]) {
1036 struct gl_texture_image *image =
1037 t->Image[0][t->BaseLevel];
1038 value[0] = 1.0 / image->Width2;
1039 value[1] = 1.0 / image->Height2;
1040 } else {
1041 value[0] = 1.0;
1042 value[1] = 1.0;
1043 }
1044 value[2] = 1.0;
1045 value[3] = 1.0;
1046 break;
1047 }
1048
1049 default:
1050 break;
1051 }
1052 break;
1053
1054 default:
1055 break;
1056 }
1057 }
1058
1059 /**
1060 * Update R300's own internal state parameters.
1061 * For now just STATE_R300_WINDOW_DIMENSION
1062 */
1063 void r300UpdateStateParameters(GLcontext * ctx, GLuint new_state)
1064 {
1065 struct r300_fragment_program *fp;
1066 struct gl_program_parameter_list *paramList;
1067 GLuint i;
1068
1069 if (!(new_state & (_NEW_BUFFERS | _NEW_PROGRAM)))
1070 return;
1071
1072 fp = (struct r300_fragment_program *)ctx->FragmentProgram._Current;
1073 if (!fp)
1074 return;
1075
1076 paramList = fp->mesa_program.Base.Parameters;
1077
1078 if (!paramList)
1079 return;
1080
1081 for (i = 0; i < paramList->NumParameters; i++) {
1082 if (paramList->Parameters[i].Type == PROGRAM_STATE_VAR) {
1083 r300FetchStateParameter(ctx,
1084 paramList->Parameters[i].
1085 StateIndexes,
1086 paramList->ParameterValues[i]);
1087 }
1088 }
1089 }
1090
1091 /* =============================================================
1092 * Polygon state
1093 */
1094 static void r300PolygonOffset(GLcontext * ctx, GLfloat factor, GLfloat units)
1095 {
1096 r300ContextPtr rmesa = R300_CONTEXT(ctx);
1097 GLfloat constant = units;
1098
1099 switch (ctx->Visual.depthBits) {
1100 case 16:
1101 constant *= 4.0;
1102 break;
1103 case 24:
1104 constant *= 2.0;
1105 break;
1106 }
1107
1108 factor *= 12.0;
1109
1110 /* fprintf(stderr, "%s f:%f u:%f\n", __FUNCTION__, factor, constant); */
1111
1112 R300_STATECHANGE(rmesa, zbs);
1113 rmesa->hw.zbs.cmd[R300_ZBS_T_FACTOR] = r300PackFloat32(factor);
1114 rmesa->hw.zbs.cmd[R300_ZBS_T_CONSTANT] = r300PackFloat32(constant);
1115 rmesa->hw.zbs.cmd[R300_ZBS_W_FACTOR] = r300PackFloat32(factor);
1116 rmesa->hw.zbs.cmd[R300_ZBS_W_CONSTANT] = r300PackFloat32(constant);
1117 }
1118
1119 /* Routing and texture-related */
1120
1121 /* r300 doesnt handle GL_CLAMP and GL_MIRROR_CLAMP_EXT correctly when filter is NEAREST.
1122 * Since texwrap produces same results for GL_CLAMP and GL_CLAMP_TO_EDGE we use them instead.
1123 * We need to recalculate wrap modes whenever filter mode is changed because someone might do:
1124 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_NEAREST);
1125 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_WRAP_S, GL_CLAMP);
1126 * glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR);
1127 * Since r300 completely ignores R300_TX_CLAMP when either min or mag is nearest it cant handle
1128 * combinations where only one of them is nearest.
1129 */
1130 static unsigned long gen_fixed_filter(unsigned long f)
1131 {
1132 unsigned long mag, min, needs_fixing = 0;
1133 //return f;
1134
1135 /* We ignore MIRROR bit so we dont have to do everything twice */
1136 if ((f & ((7 - 1) << R300_TX_WRAP_S_SHIFT)) ==
1137 (R300_TX_CLAMP << R300_TX_WRAP_S_SHIFT)) {
1138 needs_fixing |= 1;
1139 }
1140 if ((f & ((7 - 1) << R300_TX_WRAP_T_SHIFT)) ==
1141 (R300_TX_CLAMP << R300_TX_WRAP_T_SHIFT)) {
1142 needs_fixing |= 2;
1143 }
1144 if ((f & ((7 - 1) << R300_TX_WRAP_R_SHIFT)) ==
1145 (R300_TX_CLAMP << R300_TX_WRAP_R_SHIFT)) {
1146 needs_fixing |= 4;
1147 }
1148
1149 if (!needs_fixing)
1150 return f;
1151
1152 mag = f & R300_TX_MAG_FILTER_MASK;
1153 min = f & (R300_TX_MIN_FILTER_MASK|R300_TX_MIN_FILTER_MIP_MASK);
1154
1155 /* TODO: Check for anisto filters too */
1156 if ((mag != R300_TX_MAG_FILTER_NEAREST)
1157 && (min != R300_TX_MIN_FILTER_NEAREST))
1158 return f;
1159
1160 /* r300 cant handle these modes hence we force nearest to linear */
1161 if ((mag == R300_TX_MAG_FILTER_NEAREST)
1162 && (min != R300_TX_MIN_FILTER_NEAREST)) {
1163 f &= ~R300_TX_MAG_FILTER_NEAREST;
1164 f |= R300_TX_MAG_FILTER_LINEAR;
1165 return f;
1166 }
1167
1168 if ((min == R300_TX_MIN_FILTER_NEAREST)
1169 && (mag != R300_TX_MAG_FILTER_NEAREST)) {
1170 f &= ~R300_TX_MIN_FILTER_NEAREST;
1171 f |= R300_TX_MIN_FILTER_LINEAR;
1172 return f;
1173 }
1174
1175 /* Both are nearest */
1176 if (needs_fixing & 1) {
1177 f &= ~((7 - 1) << R300_TX_WRAP_S_SHIFT);
1178 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_S_SHIFT;
1179 }
1180 if (needs_fixing & 2) {
1181 f &= ~((7 - 1) << R300_TX_WRAP_T_SHIFT);
1182 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_T_SHIFT;
1183 }
1184 if (needs_fixing & 4) {
1185 f &= ~((7 - 1) << R300_TX_WRAP_R_SHIFT);
1186 f |= R300_TX_CLAMP_TO_EDGE << R300_TX_WRAP_R_SHIFT;
1187 }
1188 return f;
1189 }
1190
1191 static void r300SetupFragmentShaderTextures(GLcontext *ctx, int *tmu_mappings)
1192 {
1193 r300ContextPtr r300 = R300_CONTEXT(ctx);
1194 int i;
1195 struct r300_fragment_program *fp = (struct r300_fragment_program *)
1196 (char *)ctx->FragmentProgram._Current;
1197 struct r300_fragment_program_code *code = &fp->code;
1198
1199 R300_STATECHANGE(r300, fpt);
1200
1201 for (i = 0; i < code->tex.length; i++) {
1202 int unit;
1203 int opcode;
1204 unsigned long val;
1205
1206 unit = code->tex.inst[i] >> R300_TEX_ID_SHIFT;
1207 unit &= 15;
1208
1209 val = code->tex.inst[i];
1210 val &= ~R300_TEX_ID_MASK;
1211
1212 opcode =
1213 (val & R300_TEX_INST_MASK) >> R300_TEX_INST_SHIFT;
1214 if (opcode == R300_TEX_OP_KIL) {
1215 r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
1216 } else {
1217 if (tmu_mappings[unit] >= 0) {
1218 val |=
1219 tmu_mappings[unit] <<
1220 R300_TEX_ID_SHIFT;
1221 r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
1222 } else {
1223 // We get here when the corresponding texture image is incomplete
1224 // (e.g. incomplete mipmaps etc.)
1225 r300->hw.fpt.cmd[R300_FPT_INSTR_0 + i] = val;
1226 }
1227 }
1228 }
1229
1230 r300->hw.fpt.cmd[R300_FPT_CMD_0] =
1231 cmdpacket0(r300->radeon.radeonScreen,
1232 R300_US_TEX_INST_0, code->tex.length);
1233 }
1234
1235 static void r500SetupFragmentShaderTextures(GLcontext *ctx, int *tmu_mappings)
1236 {
1237 int i;
1238 struct r500_fragment_program *fp = (struct r500_fragment_program *)
1239 (char *)ctx->FragmentProgram._Current;
1240 struct r500_fragment_program_code *code = &fp->code;
1241
1242 /* find all the texture instructions and relocate the texture units */
1243 for (i = 0; i < code->inst_end + 1; i++) {
1244 if ((code->inst[i].inst0 & 0x3) == R500_INST_TYPE_TEX) {
1245 uint32_t val;
1246 int unit, opcode, new_unit;
1247
1248 val = code->inst[i].inst1;
1249
1250 unit = (val >> 16) & 0xf;
1251
1252 val &= ~(0xf << 16);
1253
1254 opcode = val & (0x7 << 22);
1255 if (opcode == R500_TEX_INST_TEXKILL) {
1256 new_unit = 0;
1257 } else {
1258 if (tmu_mappings[unit] >= 0) {
1259 new_unit = tmu_mappings[unit];
1260 } else {
1261 new_unit = 0;
1262 }
1263 }
1264 val |= R500_TEX_ID(new_unit);
1265 code->inst[i].inst1 = val;
1266 }
1267 }
1268 }
1269
1270 static GLuint translate_lod_bias(GLfloat bias)
1271 {
1272 GLint b = (int)(bias*32);
1273 if (b >= (1 << 9))
1274 b = (1 << 9)-1;
1275 else if (b < -(1 << 9))
1276 b = -(1 << 9);
1277 return (((GLuint)b) << R300_LOD_BIAS_SHIFT) & R300_LOD_BIAS_MASK;
1278 }
1279
1280 static void r300SetupTextures(GLcontext * ctx)
1281 {
1282 int i, mtu;
1283 struct radeon_tex_obj *t;
1284 r300ContextPtr r300 = R300_CONTEXT(ctx);
1285 int hw_tmu = 0;
1286 int last_hw_tmu = -1; /* -1 translates into no setup costs for fields */
1287 int tmu_mappings[R300_MAX_TEXTURE_UNITS] = { -1, };
1288 struct r300_fragment_program *fp = (struct r300_fragment_program *)
1289 (char *)ctx->FragmentProgram._Current;
1290
1291 R300_STATECHANGE(r300, txe);
1292 R300_STATECHANGE(r300, tex.filter);
1293 R300_STATECHANGE(r300, tex.filter_1);
1294 R300_STATECHANGE(r300, tex.size);
1295 R300_STATECHANGE(r300, tex.format);
1296 R300_STATECHANGE(r300, tex.pitch);
1297 R300_STATECHANGE(r300, tex.offset);
1298 R300_STATECHANGE(r300, tex.chroma_key);
1299 R300_STATECHANGE(r300, tex.border_color);
1300
1301 r300->hw.txe.cmd[R300_TXE_ENABLE] = 0x0;
1302
1303 mtu = r300->radeon.glCtx->Const.MaxTextureUnits;
1304 if (RADEON_DEBUG & DEBUG_STATE)
1305 fprintf(stderr, "mtu=%d\n", mtu);
1306
1307 if (mtu > R300_MAX_TEXTURE_UNITS) {
1308 fprintf(stderr,
1309 "Aiiee ! mtu=%d is greater than R300_MAX_TEXTURE_UNITS=%d\n",
1310 mtu, R300_MAX_TEXTURE_UNITS);
1311 _mesa_exit(-1);
1312 }
1313
1314 /* We cannot let disabled tmu offsets pass DRM */
1315 for (i = 0; i < mtu; i++) {
1316 if (ctx->Texture.Unit[i]._ReallyEnabled) {
1317 tmu_mappings[i] = hw_tmu;
1318
1319 t = radeon_tex_obj(ctx->Texture.Unit[i]._Current);
1320 if (!t)
1321 continue;
1322
1323 if ((t->pp_txformat & 0xffffff00) == 0xffffff00) {
1324 WARN_ONCE
1325 ("unknown texture format (entry %x) encountered. Help me !\n",
1326 t->pp_txformat & 0xff);
1327 }
1328
1329 if (RADEON_DEBUG & DEBUG_STATE)
1330 fprintf(stderr,
1331 "Activating texture unit %d\n", i);
1332
1333 r300->hw.txe.cmd[R300_TXE_ENABLE] |= (1 << hw_tmu);
1334
1335 r300->hw.tex.filter.cmd[R300_TEX_VALUE_0 +
1336 hw_tmu] =
1337 gen_fixed_filter(t->pp_txfilter) | (hw_tmu << 28);
1338 /* Note: There is a LOD bias per texture unit and a LOD bias
1339 * per texture object. We add them here to get the correct behaviour.
1340 * (The per-texture object LOD bias was introduced in OpenGL 1.4
1341 * and is not present in the EXT_texture_object extension).
1342 */
1343 r300->hw.tex.filter_1.cmd[R300_TEX_VALUE_0 + hw_tmu] =
1344 t->pp_txfilter_1 |
1345 translate_lod_bias(ctx->Texture.Unit[i].LodBias + t->base.LodBias);
1346 r300->hw.tex.size.cmd[R300_TEX_VALUE_0 + hw_tmu] =
1347 t->pp_txsize;
1348 r300->hw.tex.format.cmd[R300_TEX_VALUE_0 +
1349 hw_tmu] = t->pp_txformat;
1350 r300->hw.tex.pitch.cmd[R300_TEX_VALUE_0 + hw_tmu] =
1351 t->pp_txpitch;
1352 r300->hw.textures[hw_tmu] = t;
1353
1354 if (t->tile_bits & R300_TXO_MACRO_TILE) {
1355 WARN_ONCE("macro tiling enabled!\n");
1356 }
1357
1358 if (t->tile_bits & R300_TXO_MICRO_TILE) {
1359 WARN_ONCE("micro tiling enabled!\n");
1360 }
1361
1362 r300->hw.tex.chroma_key.cmd[R300_TEX_VALUE_0 +
1363 hw_tmu] = 0x0;
1364 r300->hw.tex.border_color.cmd[R300_TEX_VALUE_0 +
1365 hw_tmu] =
1366 t->pp_border_color;
1367
1368 last_hw_tmu = hw_tmu;
1369
1370 hw_tmu++;
1371 }
1372 }
1373
1374 r300->hw.tex.filter.cmd[R300_TEX_CMD_0] =
1375 cmdpacket0(r300->radeon.radeonScreen, R300_TX_FILTER0_0, last_hw_tmu + 1);
1376 r300->hw.tex.filter_1.cmd[R300_TEX_CMD_0] =
1377 cmdpacket0(r300->radeon.radeonScreen, R300_TX_FILTER1_0, last_hw_tmu + 1);
1378 r300->hw.tex.size.cmd[R300_TEX_CMD_0] =
1379 cmdpacket0(r300->radeon.radeonScreen, R300_TX_SIZE_0, last_hw_tmu + 1);
1380 r300->hw.tex.format.cmd[R300_TEX_CMD_0] =
1381 cmdpacket0(r300->radeon.radeonScreen, R300_TX_FORMAT_0, last_hw_tmu + 1);
1382 r300->hw.tex.pitch.cmd[R300_TEX_CMD_0] =
1383 cmdpacket0(r300->radeon.radeonScreen, R300_TX_FORMAT2_0, last_hw_tmu + 1);
1384 r300->hw.tex.offset.cmd[R300_TEX_CMD_0] =
1385 cmdpacket0(r300->radeon.radeonScreen, R300_TX_OFFSET_0, last_hw_tmu + 1);
1386 r300->hw.tex.chroma_key.cmd[R300_TEX_CMD_0] =
1387 cmdpacket0(r300->radeon.radeonScreen, R300_TX_CHROMA_KEY_0, last_hw_tmu + 1);
1388 r300->hw.tex.border_color.cmd[R300_TEX_CMD_0] =
1389 cmdpacket0(r300->radeon.radeonScreen, R300_TX_BORDER_COLOR_0, last_hw_tmu + 1);
1390
1391 if (!fp) /* should only happenen once, just after context is created */
1392 return;
1393
1394 if (r300->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV515) {
1395 if (fp->mesa_program.UsesKill && last_hw_tmu < 0) {
1396 // The KILL operation requires the first texture unit
1397 // to be enabled.
1398 r300->hw.txe.cmd[R300_TXE_ENABLE] |= 1;
1399 r300->hw.tex.filter.cmd[R300_TEX_VALUE_0] = 0;
1400 r300->hw.tex.filter.cmd[R300_TEX_CMD_0] =
1401 cmdpacket0(r300->radeon.radeonScreen, R300_TX_FILTER0_0, 1);
1402 }
1403 r300SetupFragmentShaderTextures(ctx, tmu_mappings);
1404 } else
1405 r500SetupFragmentShaderTextures(ctx, tmu_mappings);
1406
1407 if (RADEON_DEBUG & DEBUG_STATE)
1408 fprintf(stderr, "TX_ENABLE: %08x last_hw_tmu=%d\n",
1409 r300->hw.txe.cmd[R300_TXE_ENABLE], last_hw_tmu);
1410 }
1411
1412 union r300_outputs_written {
1413 GLuint vp_outputs; /* hw_tcl_on */
1414 DECLARE_RENDERINPUTS(index_bitset); /* !hw_tcl_on */
1415 };
1416
1417 #define R300_OUTPUTS_WRITTEN_TEST(ow, vp_result, tnl_attrib) \
1418 ((hw_tcl_on) ? (ow).vp_outputs & (1 << (vp_result)) : \
1419 RENDERINPUTS_TEST( (ow.index_bitset), (tnl_attrib) ))
1420
1421 static void r300SetupRSUnit(GLcontext * ctx)
1422 {
1423 r300ContextPtr r300 = R300_CONTEXT(ctx);
1424 TNLcontext *tnl = TNL_CONTEXT(ctx);
1425 struct vertex_buffer *VB = &tnl->vb;
1426 union r300_outputs_written OutputsWritten;
1427 GLuint InputsRead;
1428 int fp_reg, high_rr;
1429 int col_ip, tex_ip;
1430 int rs_tex_count = 0;
1431 int i, count, col_fmt;
1432
1433 if (hw_tcl_on)
1434 OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten;
1435 else
1436 RENDERINPUTS_COPY(OutputsWritten.index_bitset, r300->state.render_inputs_bitset);
1437
1438 if (ctx->FragmentProgram._Current)
1439 InputsRead = ctx->FragmentProgram._Current->Base.InputsRead;
1440 else {
1441 fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
1442 return; /* This should only ever happen once.. */
1443 }
1444
1445 R300_STATECHANGE(r300, ri);
1446 R300_STATECHANGE(r300, rc);
1447 R300_STATECHANGE(r300, rr);
1448
1449 fp_reg = col_ip = tex_ip = col_fmt = 0;
1450
1451 r300->hw.rc.cmd[1] = 0;
1452 r300->hw.rc.cmd[2] = 0;
1453 for (i=0; i<R300_RR_CMDSIZE-1; ++i)
1454 r300->hw.rr.cmd[R300_RR_INST_0 + i] = 0;
1455
1456 for (i=0; i<R300_RI_CMDSIZE-1; ++i)
1457 r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0;
1458
1459
1460 if (InputsRead & FRAG_BIT_COL0) {
1461 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
1462 count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
1463 if (count == 4)
1464 col_fmt = R300_RS_COL_FMT_RGBA;
1465 else if (count == 3)
1466 col_fmt = R300_RS_COL_FMT_RGB1;
1467 else
1468 col_fmt = R300_RS_COL_FMT_0001;
1469
1470 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R300_RS_COL_PTR(col_ip) | R300_RS_COL_FMT(col_fmt);
1471 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R300_RS_INST_COL_ID(col_ip) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_reg);
1472 InputsRead &= ~FRAG_BIT_COL0;
1473 ++col_ip;
1474 ++fp_reg;
1475 } else {
1476 WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
1477 }
1478 }
1479
1480 if (InputsRead & FRAG_BIT_COL1) {
1481 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
1482 count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size;
1483 if (count == 4)
1484 col_fmt = R300_RS_COL_FMT_RGBA;
1485 else if (count == 3)
1486 col_fmt = R300_RS_COL_FMT_RGB1;
1487 else
1488 col_fmt = R300_RS_COL_FMT_0001;
1489
1490 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R300_RS_COL_PTR(col_ip) | R300_RS_COL_FMT(col_fmt);
1491 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R300_RS_INST_COL_ID(col_ip) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(fp_reg);
1492 InputsRead &= ~FRAG_BIT_COL1;
1493 ++col_ip;
1494 ++fp_reg;
1495 } else {
1496 WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
1497 }
1498 }
1499
1500 for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
1501 if (! ( InputsRead & FRAG_BIT_TEX(i) ) )
1502 continue;
1503
1504 if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
1505 WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
1506 continue;
1507 }
1508
1509 int swiz;
1510
1511 /* with TCL we always seem to route 4 components */
1512 if (hw_tcl_on)
1513 count = 4;
1514 else
1515 count = VB->AttribPtr[_TNL_ATTRIB_TEX(i)]->size;
1516
1517 switch(count) {
1518 case 4: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3); break;
1519 case 3: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(R300_RS_SEL_K1); break;
1520 default:
1521 case 1:
1522 case 2: swiz = R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(R300_RS_SEL_K0) | R300_RS_SEL_Q(R300_RS_SEL_K1); break;
1523 };
1524
1525 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= swiz | R300_RS_TEX_PTR(rs_tex_count);
1526 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
1527 InputsRead &= ~(FRAG_BIT_TEX0 << i);
1528 rs_tex_count += count;
1529 ++tex_ip;
1530 ++fp_reg;
1531 }
1532
1533 if (InputsRead & FRAG_BIT_FOGC) {
1534 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_FOGC, _TNL_ATTRIB_FOG)) {
1535 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count);
1536 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
1537 InputsRead &= ~FRAG_BIT_FOGC;
1538 rs_tex_count += 4;
1539 ++tex_ip;
1540 ++fp_reg;
1541 } else {
1542 WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n");
1543 }
1544 }
1545
1546 if (InputsRead & FRAG_BIT_WPOS) {
1547 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= R300_RS_SEL_S(0) | R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3) | R300_RS_TEX_PTR(rs_tex_count);
1548 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R300_RS_INST_TEX_ID(tex_ip) | R300_RS_INST_TEX_CN_WRITE | R300_RS_INST_TEX_ADDR(fp_reg);
1549 InputsRead &= ~FRAG_BIT_WPOS;
1550 rs_tex_count += 4;
1551 ++tex_ip;
1552 ++fp_reg;
1553 }
1554 InputsRead &= ~FRAG_BIT_WPOS;
1555
1556 /* Setup default color if no color or tex was set */
1557 if (rs_tex_count == 0 && col_ip == 0) {
1558 r300->hw.rr.cmd[R300_RR_INST_0] = R300_RS_INST_COL_ID(0) | R300_RS_INST_COL_CN_WRITE | R300_RS_INST_COL_ADDR(0) | R300_RS_COL_FMT(R300_RS_COL_FMT_0001);
1559 ++col_ip;
1560 }
1561
1562 high_rr = (col_ip > tex_ip) ? col_ip : tex_ip;
1563 r300->hw.rc.cmd[1] |= (rs_tex_count << R300_IT_COUNT_SHIFT) | (col_ip << R300_IC_COUNT_SHIFT) | R300_HIRES_EN;
1564 r300->hw.rc.cmd[2] |= high_rr - 1;
1565
1566 r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R300_RS_INST_0, high_rr);
1567
1568 if (InputsRead)
1569 WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead);
1570 }
1571
1572 static void r500SetupRSUnit(GLcontext * ctx)
1573 {
1574 r300ContextPtr r300 = R300_CONTEXT(ctx);
1575 TNLcontext *tnl = TNL_CONTEXT(ctx);
1576 struct vertex_buffer *VB = &tnl->vb;
1577 union r300_outputs_written OutputsWritten;
1578 GLuint InputsRead;
1579 int fp_reg, high_rr;
1580 int col_ip, tex_ip;
1581 int rs_tex_count = 0;
1582 int i, count, col_fmt;
1583
1584 if (hw_tcl_on)
1585 OutputsWritten.vp_outputs = CURRENT_VERTEX_SHADER(ctx)->key.OutputsWritten;
1586 else
1587 RENDERINPUTS_COPY(OutputsWritten.index_bitset, r300->state.render_inputs_bitset);
1588
1589 if (ctx->FragmentProgram._Current)
1590 InputsRead = ctx->FragmentProgram._Current->Base.InputsRead;
1591 else {
1592 fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
1593 return; /* This should only ever happen once.. */
1594 }
1595
1596 R300_STATECHANGE(r300, ri);
1597 R300_STATECHANGE(r300, rc);
1598 R300_STATECHANGE(r300, rr);
1599
1600 fp_reg = col_ip = tex_ip = col_fmt = 0;
1601
1602 r300->hw.rc.cmd[1] = 0;
1603 r300->hw.rc.cmd[2] = 0;
1604 for (i=0; i<R300_RR_CMDSIZE-1; ++i)
1605 r300->hw.rr.cmd[R300_RR_INST_0 + i] = 0;
1606
1607 for (i=0; i<R500_RI_CMDSIZE-1; ++i)
1608 r300->hw.ri.cmd[R300_RI_INTERP_0 + i] = 0;
1609
1610
1611 if (InputsRead & FRAG_BIT_COL0) {
1612 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL0, _TNL_ATTRIB_COLOR0)) {
1613 count = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;
1614 if (count == 4)
1615 col_fmt = R300_RS_COL_FMT_RGBA;
1616 else if (count == 3)
1617 col_fmt = R300_RS_COL_FMT_RGB1;
1618 else
1619 col_fmt = R300_RS_COL_FMT_0001;
1620
1621 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R500_RS_COL_PTR(col_ip) | R500_RS_COL_FMT(col_fmt);
1622 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R500_RS_INST_COL_ID(col_ip) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_reg);
1623 InputsRead &= ~FRAG_BIT_COL0;
1624 ++col_ip;
1625 ++fp_reg;
1626 } else {
1627 WARN_ONCE("fragprog wants col0, vp doesn't provide it\n");
1628 }
1629 }
1630
1631 if (InputsRead & FRAG_BIT_COL1) {
1632 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_COL1, _TNL_ATTRIB_COLOR1)) {
1633 count = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->size;
1634 if (count == 4)
1635 col_fmt = R300_RS_COL_FMT_RGBA;
1636 else if (count == 3)
1637 col_fmt = R300_RS_COL_FMT_RGB1;
1638 else
1639 col_fmt = R300_RS_COL_FMT_0001;
1640
1641 r300->hw.ri.cmd[R300_RI_INTERP_0 + col_ip] = R500_RS_COL_PTR(col_ip) | R500_RS_COL_FMT(col_fmt);
1642 r300->hw.rr.cmd[R300_RR_INST_0 + col_ip] = R500_RS_INST_COL_ID(col_ip) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(fp_reg);
1643 InputsRead &= ~FRAG_BIT_COL1;
1644 ++col_ip;
1645 ++fp_reg;
1646 } else {
1647 WARN_ONCE("fragprog wants col1, vp doesn't provide it\n");
1648 }
1649 }
1650
1651
1652 for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
1653 if (! ( InputsRead & FRAG_BIT_TEX(i) ) )
1654 continue;
1655
1656 if (!R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_TEX0 + i, _TNL_ATTRIB_TEX(i))) {
1657 WARN_ONCE("fragprog wants coords for tex%d, vp doesn't provide them!\n", i);
1658 continue;
1659 }
1660
1661 int swiz = 0;
1662
1663 /* with TCL we always seem to route 4 components */
1664 if (hw_tcl_on)
1665 count = 4;
1666 else
1667 count = VB->AttribPtr[_TNL_ATTRIB_TEX(i)]->size;
1668
1669 if (count == 4) {
1670 swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
1671 swiz |= (rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT;
1672 swiz |= (rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT;
1673 swiz |= (rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT;
1674 } else if (count == 3) {
1675 swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
1676 swiz |= (rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT;
1677 swiz |= (rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT;
1678 swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
1679 } else if (count == 2) {
1680 swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
1681 swiz |= (rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT;
1682 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT;
1683 swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
1684 } else if (count == 1) {
1685 swiz |= (rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT;
1686 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT;
1687 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT;
1688 swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
1689 } else {
1690 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_S_SHIFT;
1691 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_T_SHIFT;
1692 swiz |= R500_RS_IP_PTR_K0 << R500_RS_IP_TEX_PTR_R_SHIFT;
1693 swiz |= R500_RS_IP_PTR_K1 << R500_RS_IP_TEX_PTR_Q_SHIFT;
1694 }
1695
1696 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= swiz;
1697 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
1698 InputsRead &= ~(FRAG_BIT_TEX0 << i);
1699 rs_tex_count += count;
1700 ++tex_ip;
1701 ++fp_reg;
1702 }
1703
1704 if (InputsRead & FRAG_BIT_FOGC) {
1705 if (R300_OUTPUTS_WRITTEN_TEST(OutputsWritten, VERT_RESULT_FOGC, _TNL_ATTRIB_FOG)) {
1706 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) |
1707 ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) |
1708 ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) |
1709 ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT);
1710
1711 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
1712 InputsRead &= ~FRAG_BIT_FOGC;
1713 rs_tex_count += 4;
1714 ++tex_ip;
1715 ++fp_reg;
1716 } else {
1717 WARN_ONCE("fragprog wants fogc, vp doesn't provide it\n");
1718 }
1719 }
1720
1721 if (InputsRead & FRAG_BIT_WPOS) {
1722 r300->hw.ri.cmd[R300_RI_INTERP_0 + tex_ip] |= ((rs_tex_count + 0) << R500_RS_IP_TEX_PTR_S_SHIFT) |
1723 ((rs_tex_count + 1) << R500_RS_IP_TEX_PTR_T_SHIFT) |
1724 ((rs_tex_count + 2) << R500_RS_IP_TEX_PTR_R_SHIFT) |
1725 ((rs_tex_count + 3) << R500_RS_IP_TEX_PTR_Q_SHIFT);
1726
1727 r300->hw.rr.cmd[R300_RR_INST_0 + tex_ip] |= R500_RS_INST_TEX_ID(tex_ip) | R500_RS_INST_TEX_CN_WRITE | R500_RS_INST_TEX_ADDR(fp_reg);
1728 InputsRead &= ~FRAG_BIT_WPOS;
1729 rs_tex_count += 4;
1730 ++tex_ip;
1731 ++fp_reg;
1732 }
1733
1734 /* Setup default color if no color or tex was set */
1735 if (rs_tex_count == 0 && col_ip == 0) {
1736 r300->hw.rr.cmd[R300_RR_INST_0] |= R500_RS_INST_COL_ID(0) | R500_RS_INST_COL_CN_WRITE | R500_RS_INST_COL_ADDR(0) | R500_RS_COL_FMT(R300_RS_COL_FMT_0001);
1737 ++col_ip;
1738 }
1739
1740 high_rr = (col_ip > tex_ip) ? col_ip : tex_ip;
1741 r300->hw.rc.cmd[1] |= (rs_tex_count << R300_IT_COUNT_SHIFT) | (col_ip << R300_IC_COUNT_SHIFT) | R300_HIRES_EN;
1742 r300->hw.rc.cmd[2] |= 0xC0 | (high_rr - 1);
1743
1744 r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(r300->radeon.radeonScreen, R500_RS_INST_0, high_rr);
1745
1746 if (InputsRead)
1747 WARN_ONCE("Don't know how to satisfy InputsRead=0x%08x\n", InputsRead);
1748 }
1749
1750
1751
1752
1753 #define bump_vpu_count(ptr, new_count) do{\
1754 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
1755 int _nc=(new_count)/4; \
1756 assert(_nc < 256); \
1757 if(_nc>_p->vpu.count)_p->vpu.count=_nc;\
1758 }while(0)
1759
1760 static INLINE void r300SetupVertexProgramFragment(r300ContextPtr r300, int dest, struct r300_vertex_shader_fragment *vsf)
1761 {
1762 int i;
1763
1764 if (vsf->length == 0)
1765 return;
1766
1767 if (vsf->length & 0x3) {
1768 fprintf(stderr, "VERTEX_SHADER_FRAGMENT must have length divisible by 4\n");
1769 _mesa_exit(-1);
1770 }
1771
1772 switch ((dest >> 8) & 0xf) {
1773 case 0:
1774 R300_STATECHANGE(r300, vpi);
1775 for (i = 0; i < vsf->length; i++)
1776 r300->hw.vpi.cmd[R300_VPI_INSTR_0 + i + 4 * (dest & 0xff)] = (vsf->body.d[i]);
1777 bump_vpu_count(r300->hw.vpi.cmd, vsf->length + 4 * (dest & 0xff));
1778 break;
1779
1780 case 2:
1781 R300_STATECHANGE(r300, vpp);
1782 for (i = 0; i < vsf->length; i++)
1783 r300->hw.vpp.cmd[R300_VPP_PARAM_0 + i + 4 * (dest & 0xff)] = (vsf->body.d[i]);
1784 bump_vpu_count(r300->hw.vpp.cmd, vsf->length + 4 * (dest & 0xff));
1785 break;
1786 case 4:
1787 R300_STATECHANGE(r300, vps);
1788 for (i = 0; i < vsf->length; i++)
1789 r300->hw.vps.cmd[1 + i + 4 * (dest & 0xff)] = (vsf->body.d[i]);
1790 bump_vpu_count(r300->hw.vps.cmd, vsf->length + 4 * (dest & 0xff));
1791 break;
1792 default:
1793 fprintf(stderr, "%s:%s don't know how to handle dest %04x\n", __FILE__, __FUNCTION__, dest);
1794 _mesa_exit(-1);
1795 }
1796 }
1797
1798 #define MIN3(a, b, c) ((a) < (b) ? MIN2(a, c) : MIN2(b, c))
1799
1800
1801 static void r300VapCntl(r300ContextPtr rmesa, GLuint input_count,
1802 GLuint output_count, GLuint temp_count)
1803 {
1804 int vtx_mem_size;
1805 int pvs_num_slots;
1806 int pvs_num_cntrls;
1807
1808 /* Flush PVS engine before changing PVS_NUM_SLOTS, PVS_NUM_CNTRLS.
1809 * See r500 docs 6.5.2 - done in emit */
1810
1811 /* avoid division by zero */
1812 if (input_count == 0) input_count = 1;
1813 if (output_count == 0) output_count = 1;
1814 if (temp_count == 0) temp_count = 1;
1815
1816 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
1817 vtx_mem_size = 128;
1818 else
1819 vtx_mem_size = 72;
1820
1821 pvs_num_slots = MIN3(10, vtx_mem_size/input_count, vtx_mem_size/output_count);
1822 pvs_num_cntrls = MIN2(6, vtx_mem_size/temp_count);
1823
1824 R300_STATECHANGE(rmesa, vap_cntl);
1825 if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
1826 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] =
1827 (pvs_num_slots << R300_PVS_NUM_SLOTS_SHIFT) |
1828 (pvs_num_cntrls << R300_PVS_NUM_CNTLRS_SHIFT) |
1829 (12 << R300_VF_MAX_VTX_NUM_SHIFT);
1830 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
1831 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= R500_TCL_STATE_OPTIMIZATION;
1832 } else
1833 /* not sure about non-tcl */
1834 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] = ((10 << R300_PVS_NUM_SLOTS_SHIFT) |
1835 (5 << R300_PVS_NUM_CNTLRS_SHIFT) |
1836 (5 << R300_VF_MAX_VTX_NUM_SHIFT));
1837
1838 if (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV515)
1839 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (2 << R300_PVS_NUM_FPUS_SHIFT);
1840 else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV530) ||
1841 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV560) ||
1842 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV570))
1843 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (5 << R300_PVS_NUM_FPUS_SHIFT);
1844 else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV410) ||
1845 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R420))
1846 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (6 << R300_PVS_NUM_FPUS_SHIFT);
1847 else if ((rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R520) ||
1848 (rmesa->radeon.radeonScreen->chip_family == CHIP_FAMILY_R580))
1849 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (8 << R300_PVS_NUM_FPUS_SHIFT);
1850 else
1851 rmesa->hw.vap_cntl.cmd[R300_VAP_CNTL_INSTR] |= (4 << R300_PVS_NUM_FPUS_SHIFT);
1852
1853 }
1854
1855 static void r300SetupDefaultVertexProgram(r300ContextPtr rmesa)
1856 {
1857 struct r300_vertex_shader_state *prog = &(rmesa->state.vertex_shader);
1858 GLuint o_reg = 0;
1859 GLuint i_reg = 0;
1860 int i;
1861 int inst_count = 0;
1862 int param_count = 0;
1863 int program_end = 0;
1864
1865 for (i = VERT_ATTRIB_POS; i < VERT_ATTRIB_MAX; i++) {
1866 if (rmesa->state.sw_tcl_inputs[i] != -1) {
1867 prog->program.body.i[program_end + 0] = PVS_OP_DST_OPERAND(VE_MULTIPLY, GL_FALSE, GL_FALSE, o_reg++, VSF_FLAG_ALL, PVS_DST_REG_OUT);
1868 prog->program.body.i[program_end + 1] = PVS_SRC_OPERAND(rmesa->state.sw_tcl_inputs[i], PVS_SRC_SELECT_X, PVS_SRC_SELECT_Y, PVS_SRC_SELECT_Z, PVS_SRC_SELECT_W, PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
1869 prog->program.body.i[program_end + 2] = PVS_SRC_OPERAND(rmesa->state.sw_tcl_inputs[i], PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
1870 prog->program.body.i[program_end + 3] = PVS_SRC_OPERAND(rmesa->state.sw_tcl_inputs[i], PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_SELECT_FORCE_1, PVS_SRC_REG_INPUT, VSF_FLAG_NONE);
1871 program_end += 4;
1872 i_reg++;
1873 }
1874 }
1875
1876 prog->program.length = program_end;
1877
1878 r300SetupVertexProgramFragment(rmesa, R300_PVS_CODE_START,
1879 &(prog->program));
1880 inst_count = (prog->program.length / 4) - 1;
1881
1882 r300VapCntl(rmesa, i_reg, o_reg, 0);
1883
1884 R300_STATECHANGE(rmesa, pvs);
1885 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1] =
1886 (0 << R300_PVS_FIRST_INST_SHIFT) |
1887 (inst_count << R300_PVS_XYZW_VALID_INST_SHIFT) |
1888 (inst_count << R300_PVS_LAST_INST_SHIFT);
1889 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] =
1890 (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) |
1891 (param_count << R300_PVS_MAX_CONST_ADDR_SHIFT);
1892 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3] =
1893 (inst_count << R300_PVS_LAST_VTX_SRC_INST_SHIFT);
1894 }
1895
1896 static int bit_count (int x)
1897 {
1898 x = ((x & 0xaaaaaaaaU) >> 1) + (x & 0x55555555U);
1899 x = ((x & 0xccccccccU) >> 2) + (x & 0x33333333U);
1900 x = (x >> 16) + (x & 0xffff);
1901 x = ((x & 0xf0f0) >> 4) + (x & 0x0f0f);
1902 return (x >> 8) + (x & 0x00ff);
1903 }
1904
1905 static void r300SetupRealVertexProgram(r300ContextPtr rmesa)
1906 {
1907 GLcontext *ctx = rmesa->radeon.glCtx;
1908 struct r300_vertex_program *prog = (struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx);
1909 int inst_count = 0;
1910 int param_count = 0;
1911
1912 /* FIXME: r300SetupVertexProgramFragment */
1913 R300_STATECHANGE(rmesa, vpp);
1914 param_count =
1915 r300VertexProgUpdateParams(ctx,
1916 (struct r300_vertex_program_cont *)
1917 ctx->VertexProgram._Current,
1918 (float *)&rmesa->hw.vpp.
1919 cmd[R300_VPP_PARAM_0]);
1920 bump_vpu_count(rmesa->hw.vpp.cmd, param_count);
1921 param_count /= 4;
1922
1923 r300SetupVertexProgramFragment(rmesa, R300_PVS_CODE_START, &(prog->program));
1924 inst_count = (prog->program.length / 4) - 1;
1925
1926 r300VapCntl(rmesa, bit_count(prog->key.InputsRead),
1927 bit_count(prog->key.OutputsWritten), prog->num_temporaries);
1928
1929 R300_STATECHANGE(rmesa, pvs);
1930 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1] =
1931 (0 << R300_PVS_FIRST_INST_SHIFT) |
1932 (inst_count << R300_PVS_XYZW_VALID_INST_SHIFT) |
1933 (inst_count << R300_PVS_LAST_INST_SHIFT);
1934 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] =
1935 (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) |
1936 (param_count << R300_PVS_MAX_CONST_ADDR_SHIFT);
1937 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3] =
1938 (inst_count << R300_PVS_LAST_VTX_SRC_INST_SHIFT);
1939 }
1940
1941
1942 static void r300SetupVertexProgram(r300ContextPtr rmesa)
1943 {
1944 GLcontext *ctx = rmesa->radeon.glCtx;
1945
1946 /* Reset state, in case we don't use something */
1947 ((drm_r300_cmd_header_t *) rmesa->hw.vpp.cmd)->vpu.count = 0;
1948 ((drm_r300_cmd_header_t *) rmesa->hw.vpi.cmd)->vpu.count = 0;
1949 ((drm_r300_cmd_header_t *) rmesa->hw.vps.cmd)->vpu.count = 0;
1950
1951 /* Not sure why this doesnt work...
1952 0x400 area might have something to do with pixel shaders as it appears right after pfs programming.
1953 0x406 is set to { 0.0, 0.0, 1.0, 0.0 } most of the time but should change with smooth points and in other rare cases. */
1954 //setup_vertex_shader_fragment(rmesa, 0x406, &unk4);
1955 if (hw_tcl_on && ((struct r300_vertex_program *)CURRENT_VERTEX_SHADER(ctx))->translated) {
1956 r300SetupRealVertexProgram(rmesa);
1957 } else {
1958 /* FIXME: This needs to be replaced by vertex shader generation code. */
1959 r300SetupDefaultVertexProgram(rmesa);
1960 }
1961
1962 }
1963
1964 /**
1965 * Enable/Disable states.
1966 *
1967 * \note Mesa already filters redundant calls to this function.
1968 */
1969 static void r300Enable(GLcontext * ctx, GLenum cap, GLboolean state)
1970 {
1971 r300ContextPtr rmesa = R300_CONTEXT(ctx);
1972 if (RADEON_DEBUG & DEBUG_STATE)
1973 fprintf(stderr, "%s( %s = %s )\n", __FUNCTION__,
1974 _mesa_lookup_enum_by_nr(cap),
1975 state ? "GL_TRUE" : "GL_FALSE");
1976
1977 switch (cap) {
1978 case GL_TEXTURE_1D:
1979 case GL_TEXTURE_2D:
1980 case GL_TEXTURE_3D:
1981 /* empty */
1982 break;
1983 case GL_FOG:
1984 /* empty */
1985 break;
1986 case GL_ALPHA_TEST:
1987 r300SetAlphaState(ctx);
1988 break;
1989 case GL_COLOR_LOGIC_OP:
1990 r300SetLogicOpState(ctx);
1991 /* fall-through, because logic op overrides blending */
1992 case GL_BLEND:
1993 r300SetBlendState(ctx);
1994 break;
1995 case GL_CLIP_PLANE0:
1996 case GL_CLIP_PLANE1:
1997 case GL_CLIP_PLANE2:
1998 case GL_CLIP_PLANE3:
1999 case GL_CLIP_PLANE4:
2000 case GL_CLIP_PLANE5:
2001 r300SetClipPlaneState(ctx, cap, state);
2002 break;
2003 case GL_DEPTH_TEST:
2004 r300SetDepthState(ctx);
2005 break;
2006 case GL_STENCIL_TEST:
2007 r300SetStencilState(ctx, state);
2008 break;
2009 case GL_CULL_FACE:
2010 r300UpdateCulling(ctx);
2011 break;
2012 case GL_POLYGON_OFFSET_POINT:
2013 case GL_POLYGON_OFFSET_LINE:
2014 case GL_POLYGON_OFFSET_FILL:
2015 r300SetPolygonOffsetState(ctx, state);
2016 break;
2017 case GL_SCISSOR_TEST:
2018 radeon_firevertices(&rmesa->radeon);
2019 rmesa->radeon.state.scissor.enabled = state;
2020 radeonUpdateScissor( ctx );
2021 break;
2022 default:
2023 break;
2024 }
2025 }
2026
2027 /**
2028 * Completely recalculates hardware state based on the Mesa state.
2029 */
2030 static void r300ResetHwState(r300ContextPtr r300)
2031 {
2032 GLcontext *ctx = r300->radeon.glCtx;
2033 int has_tcl = 1;
2034
2035 if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
2036 has_tcl = 0;
2037
2038 if (RADEON_DEBUG & DEBUG_STATE)
2039 fprintf(stderr, "%s\n", __FUNCTION__);
2040
2041 radeon_firevertices(&r300->radeon);
2042
2043 r300ColorMask(ctx,
2044 ctx->Color.ColorMask[RCOMP],
2045 ctx->Color.ColorMask[GCOMP],
2046 ctx->Color.ColorMask[BCOMP], ctx->Color.ColorMask[ACOMP]);
2047
2048 r300Enable(ctx, GL_DEPTH_TEST, ctx->Depth.Test);
2049 r300DepthMask(ctx, ctx->Depth.Mask);
2050 r300DepthFunc(ctx, ctx->Depth.Func);
2051
2052 /* stencil */
2053 r300Enable(ctx, GL_STENCIL_TEST, ctx->Stencil._Enabled);
2054 r300StencilMaskSeparate(ctx, 0, ctx->Stencil.WriteMask[0]);
2055 r300StencilFuncSeparate(ctx, 0, ctx->Stencil.Function[0],
2056 ctx->Stencil.Ref[0], ctx->Stencil.ValueMask[0]);
2057 r300StencilOpSeparate(ctx, 0, ctx->Stencil.FailFunc[0],
2058 ctx->Stencil.ZFailFunc[0],
2059 ctx->Stencil.ZPassFunc[0]);
2060
2061 r300UpdateCulling(ctx);
2062
2063 r300SetBlendState(ctx);
2064 r300SetLogicOpState(ctx);
2065
2066 r300AlphaFunc(ctx, ctx->Color.AlphaFunc, ctx->Color.AlphaRef);
2067 r300Enable(ctx, GL_ALPHA_TEST, ctx->Color.AlphaEnabled);
2068
2069 r300->hw.vte.cmd[1] = R300_VPORT_X_SCALE_ENA
2070 | R300_VPORT_X_OFFSET_ENA
2071 | R300_VPORT_Y_SCALE_ENA
2072 | R300_VPORT_Y_OFFSET_ENA
2073 | R300_VPORT_Z_SCALE_ENA
2074 | R300_VPORT_Z_OFFSET_ENA | R300_VTX_W0_FMT;
2075 r300->hw.vte.cmd[2] = 0x00000008;
2076
2077 r300->hw.vap_vf_max_vtx_indx.cmd[1] = 0x00FFFFFF;
2078 r300->hw.vap_vf_max_vtx_indx.cmd[2] = 0x00000000;
2079
2080 #ifdef MESA_LITTLE_ENDIAN
2081 r300->hw.vap_cntl_status.cmd[1] = R300_VC_NO_SWAP;
2082 #else
2083 r300->hw.vap_cntl_status.cmd[1] = R300_VC_32BIT_SWAP;
2084 #endif
2085
2086 /* disable VAP/TCL on non-TCL capable chips */
2087 if (!has_tcl)
2088 r300->hw.vap_cntl_status.cmd[1] |= R300_VAP_TCL_BYPASS;
2089
2090 r300->hw.vap_psc_sgn_norm_cntl.cmd[1] = 0xAAAAAAAA;
2091
2092 /* XXX: Other families? */
2093 if (has_tcl) {
2094 r300->hw.vap_clip_cntl.cmd[1] = R300_PS_UCP_MODE_DIST_COP;
2095
2096 r300->hw.vap_clip.cmd[1] = r300PackFloat32(1.0); /* X */
2097 r300->hw.vap_clip.cmd[2] = r300PackFloat32(1.0); /* X */
2098 r300->hw.vap_clip.cmd[3] = r300PackFloat32(1.0); /* Y */
2099 r300->hw.vap_clip.cmd[4] = r300PackFloat32(1.0); /* Y */
2100
2101 switch (r300->radeon.radeonScreen->chip_family) {
2102 case CHIP_FAMILY_R300:
2103 r300->hw.vap_pvs_vtx_timeout_reg.cmd[1] = R300_2288_R300;
2104 break;
2105 default:
2106 r300->hw.vap_pvs_vtx_timeout_reg.cmd[1] = R300_2288_RV350;
2107 break;
2108 }
2109 }
2110
2111 r300->hw.gb_enable.cmd[1] = R300_GB_POINT_STUFF_ENABLE
2112 | R300_GB_LINE_STUFF_ENABLE
2113 | R300_GB_TRIANGLE_STUFF_ENABLE;
2114
2115 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_0] = 0x66666666;
2116 r300->hw.gb_misc.cmd[R300_GB_MISC_MSPOS_1] = 0x06666666;
2117
2118 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] =
2119 R300_GB_TILE_ENABLE | R300_GB_TILE_SIZE_16 /*| R300_GB_SUBPIXEL_1_16*/;
2120 switch (r300->radeon.radeonScreen->num_gb_pipes) {
2121 case 1:
2122 default:
2123 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2124 R300_GB_TILE_PIPE_COUNT_RV300;
2125 break;
2126 case 2:
2127 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2128 R300_GB_TILE_PIPE_COUNT_R300;
2129 break;
2130 case 3:
2131 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2132 R300_GB_TILE_PIPE_COUNT_R420_3P;
2133 break;
2134 case 4:
2135 r300->hw.gb_misc.cmd[R300_GB_MISC_TILE_CONFIG] |=
2136 R300_GB_TILE_PIPE_COUNT_R420;
2137 break;
2138 }
2139
2140 /* XXX: Enable anti-aliasing? */
2141 r300->hw.gb_misc.cmd[R300_GB_MISC_AA_CONFIG] = GB_AA_CONFIG_AA_DISABLE;
2142 r300->hw.gb_misc.cmd[R300_GB_MISC_SELECT] = 0;
2143
2144 r300->hw.ga_point_s0.cmd[1] = r300PackFloat32(0.0);
2145 r300->hw.ga_point_s0.cmd[2] = r300PackFloat32(0.0);
2146 r300->hw.ga_point_s0.cmd[3] = r300PackFloat32(1.0);
2147 r300->hw.ga_point_s0.cmd[4] = r300PackFloat32(1.0);
2148
2149 r300->hw.ga_triangle_stipple.cmd[1] = 0x00050005;
2150
2151 r300PointSize(ctx, 1.0);
2152
2153 r300->hw.ga_point_minmax.cmd[1] = 0x18000006;
2154 r300->hw.ga_point_minmax.cmd[2] = 0x00020006;
2155 r300->hw.ga_point_minmax.cmd[3] = r300PackFloat32(1.0 / 192.0);
2156
2157 r300LineWidth(ctx, 1.0);
2158
2159 r300->hw.ga_line_stipple.cmd[1] = 0;
2160 r300->hw.ga_line_stipple.cmd[2] = r300PackFloat32(0.0);
2161 r300->hw.ga_line_stipple.cmd[3] = r300PackFloat32(1.0);
2162
2163 r300ShadeModel(ctx, ctx->Light.ShadeModel);
2164
2165 r300PolygonMode(ctx, GL_FRONT, ctx->Polygon.FrontMode);
2166 r300PolygonMode(ctx, GL_BACK, ctx->Polygon.BackMode);
2167 r300->hw.zbias_cntl.cmd[1] = 0x00000000;
2168
2169 r300PolygonOffset(ctx, ctx->Polygon.OffsetFactor,
2170 ctx->Polygon.OffsetUnits);
2171 r300Enable(ctx, GL_POLYGON_OFFSET_POINT, ctx->Polygon.OffsetPoint);
2172 r300Enable(ctx, GL_POLYGON_OFFSET_LINE, ctx->Polygon.OffsetLine);
2173 r300Enable(ctx, GL_POLYGON_OFFSET_FILL, ctx->Polygon.OffsetFill);
2174
2175 r300->hw.su_depth_scale.cmd[1] = 0x4B7FFFFF;
2176 r300->hw.su_depth_scale.cmd[2] = 0x00000000;
2177
2178 r300->hw.sc_hyperz.cmd[1] = 0x0000001C;
2179 r300->hw.sc_hyperz.cmd[2] = 0x2DA49525;
2180
2181 r300->hw.sc_screendoor.cmd[1] = 0x00FFFFFF;
2182
2183 r300->hw.us_out_fmt.cmd[1] = R500_OUT_FMT_C4_8 |
2184 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2185 r300->hw.us_out_fmt.cmd[2] = R500_OUT_FMT_UNUSED |
2186 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2187 r300->hw.us_out_fmt.cmd[3] = R500_OUT_FMT_UNUSED |
2188 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2189 r300->hw.us_out_fmt.cmd[4] = R500_OUT_FMT_UNUSED |
2190 R500_C0_SEL_B | R500_C1_SEL_G | R500_C2_SEL_R | R500_C3_SEL_A;
2191 r300->hw.us_out_fmt.cmd[5] = R300_W_FMT_W0 | R300_W_SRC_US;
2192
2193 /* disable fog unit */
2194 r300->hw.fogs.cmd[R300_FOGS_STATE] = 0;
2195 r300->hw.fg_depth_src.cmd[1] = R300_FG_DEPTH_SRC_SCAN;
2196
2197 r300->hw.rb3d_cctl.cmd[1] = 0;
2198
2199 r300BlendColor(ctx, ctx->Color.BlendColor);
2200
2201 r300->hw.rb3d_dither_ctl.cmd[1] = 0;
2202 r300->hw.rb3d_dither_ctl.cmd[2] = 0;
2203 r300->hw.rb3d_dither_ctl.cmd[3] = 0;
2204 r300->hw.rb3d_dither_ctl.cmd[4] = 0;
2205 r300->hw.rb3d_dither_ctl.cmd[5] = 0;
2206 r300->hw.rb3d_dither_ctl.cmd[6] = 0;
2207 r300->hw.rb3d_dither_ctl.cmd[7] = 0;
2208 r300->hw.rb3d_dither_ctl.cmd[8] = 0;
2209 r300->hw.rb3d_dither_ctl.cmd[9] = 0;
2210
2211 r300->hw.rb3d_aaresolve_ctl.cmd[1] = 0;
2212
2213 r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[1] = 0x00000000;
2214 r300->hw.rb3d_discard_src_pixel_lte_threshold.cmd[2] = 0xffffffff;
2215
2216 r300->hw.zb_depthclearvalue.cmd[1] = 0;
2217
2218 r300->hw.zstencil_format.cmd[2] = R300_ZTOP_DISABLE;
2219 r300->hw.zstencil_format.cmd[3] = 0x00000003;
2220 r300->hw.zstencil_format.cmd[4] = 0x00000000;
2221 r300SetEarlyZState(ctx);
2222
2223 r300->hw.unk4F30.cmd[1] = 0;
2224 r300->hw.unk4F30.cmd[2] = 0;
2225
2226 r300->hw.zb_hiz_offset.cmd[1] = 0;
2227
2228 r300->hw.zb_hiz_pitch.cmd[1] = 0;
2229
2230 r300VapCntl(r300, 0, 0, 0);
2231 if (has_tcl) {
2232 r300->hw.vps.cmd[R300_VPS_ZERO_0] = 0;
2233 r300->hw.vps.cmd[R300_VPS_ZERO_1] = 0;
2234 r300->hw.vps.cmd[R300_VPS_POINTSIZE] = r300PackFloat32(1.0);
2235 r300->hw.vps.cmd[R300_VPS_ZERO_3] = 0;
2236 }
2237
2238 r300->radeon.hw.all_dirty = GL_TRUE;
2239 }
2240
2241 void r300UpdateShaders(r300ContextPtr rmesa)
2242 {
2243 GLcontext *ctx;
2244 struct r300_vertex_program *vp;
2245 int i;
2246
2247 ctx = rmesa->radeon.glCtx;
2248
2249 if (rmesa->radeon.NewGLState && hw_tcl_on) {
2250 rmesa->radeon.NewGLState = 0;
2251
2252 for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) {
2253 rmesa->temp_attrib[i] =
2254 TNL_CONTEXT(ctx)->vb.AttribPtr[i];
2255 TNL_CONTEXT(ctx)->vb.AttribPtr[i] =
2256 &rmesa->dummy_attrib[i];
2257 }
2258
2259 _tnl_UpdateFixedFunctionProgram(ctx);
2260
2261 for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) {
2262 TNL_CONTEXT(ctx)->vb.AttribPtr[i] =
2263 rmesa->temp_attrib[i];
2264 }
2265
2266 r300SelectVertexShader(rmesa);
2267 vp = (struct r300_vertex_program *)
2268 CURRENT_VERTEX_SHADER(ctx);
2269 /*if (vp->translated == GL_FALSE)
2270 r300TranslateVertexShader(vp); */
2271 if (vp->translated == GL_FALSE) {
2272 fprintf(stderr, "Failing back to sw-tcl\n");
2273 hw_tcl_on = future_hw_tcl_on = 0;
2274 r300ResetHwState(rmesa);
2275
2276 r300UpdateStateParameters(ctx, _NEW_PROGRAM);
2277 return;
2278 }
2279 }
2280 r300UpdateStateParameters(ctx, _NEW_PROGRAM);
2281 }
2282
2283 static const GLfloat *get_fragmentprogram_constant(GLcontext *ctx,
2284 struct gl_program *program, struct prog_src_register srcreg)
2285 {
2286 static const GLfloat dummy[4] = { 0, 0, 0, 0 };
2287
2288 switch(srcreg.File) {
2289 case PROGRAM_LOCAL_PARAM:
2290 return program->LocalParams[srcreg.Index];
2291 case PROGRAM_ENV_PARAM:
2292 return ctx->FragmentProgram.Parameters[srcreg.Index];
2293 case PROGRAM_STATE_VAR:
2294 case PROGRAM_NAMED_PARAM:
2295 case PROGRAM_CONSTANT:
2296 return program->Parameters->ParameterValues[srcreg.Index];
2297 default:
2298 _mesa_problem(ctx, "get_fragmentprogram_constant: Unknown\n");
2299 return dummy;
2300 }
2301 }
2302
2303
2304 static void r300SetupPixelShader(r300ContextPtr rmesa)
2305 {
2306 GLcontext *ctx = rmesa->radeon.glCtx;
2307 struct r300_fragment_program *fp = (struct r300_fragment_program *)
2308 (char *)ctx->FragmentProgram._Current;
2309 struct r300_fragment_program_code *code;
2310 int i, k;
2311
2312 if (!fp) /* should only happenen once, just after context is created */
2313 return;
2314
2315 r300TranslateFragmentShader(rmesa, fp);
2316 if (!fp->translated) {
2317 fprintf(stderr, "%s: No valid fragment shader, exiting\n",
2318 __FUNCTION__);
2319 return;
2320 }
2321 code = &fp->code;
2322
2323 r300SetupTextures(ctx);
2324
2325 R300_STATECHANGE(rmesa, fpi[0]);
2326 R300_STATECHANGE(rmesa, fpi[1]);
2327 R300_STATECHANGE(rmesa, fpi[2]);
2328 R300_STATECHANGE(rmesa, fpi[3]);
2329 rmesa->hw.fpi[0].cmd[R300_FPI_CMD_0] = cmdpacket0(rmesa->radeon.radeonScreen, R300_US_ALU_RGB_INST_0, code->alu.length);
2330 rmesa->hw.fpi[1].cmd[R300_FPI_CMD_0] = cmdpacket0(rmesa->radeon.radeonScreen, R300_US_ALU_RGB_ADDR_0, code->alu.length);
2331 rmesa->hw.fpi[2].cmd[R300_FPI_CMD_0] = cmdpacket0(rmesa->radeon.radeonScreen, R300_US_ALU_ALPHA_INST_0, code->alu.length);
2332 rmesa->hw.fpi[3].cmd[R300_FPI_CMD_0] = cmdpacket0(rmesa->radeon.radeonScreen, R300_US_ALU_ALPHA_ADDR_0, code->alu.length);
2333 for (i = 0; i < code->alu.length; i++) {
2334 rmesa->hw.fpi[0].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst0;
2335 rmesa->hw.fpi[1].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst1;
2336 rmesa->hw.fpi[2].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst2;
2337 rmesa->hw.fpi[3].cmd[R300_FPI_INSTR_0 + i] = code->alu.inst[i].inst3;
2338 }
2339
2340 R300_STATECHANGE(rmesa, fp);
2341 rmesa->hw.fp.cmd[R300_FP_CNTL0] = code->cur_node | (code->first_node_has_tex << 3);
2342 rmesa->hw.fp.cmd[R300_FP_CNTL1] = code->max_temp_idx;
2343 rmesa->hw.fp.cmd[R300_FP_CNTL2] =
2344 (0 << R300_PFS_CNTL_ALU_OFFSET_SHIFT) |
2345 ((code->alu.length-1) << R300_PFS_CNTL_ALU_END_SHIFT) |
2346 (0 << R300_PFS_CNTL_TEX_OFFSET_SHIFT) |
2347 ((code->tex.length ? code->tex.length-1 : 0) << R300_PFS_CNTL_TEX_END_SHIFT);
2348 /* I just want to say, the way these nodes are stored.. weird.. */
2349 for (i = 0, k = (4 - (code->cur_node + 1)); i < 4; i++, k++) {
2350 if (i < (code->cur_node + 1)) {
2351 rmesa->hw.fp.cmd[R300_FP_NODE0 + k] =
2352 (code->node[i].alu_offset << R300_ALU_START_SHIFT) |
2353 (code->node[i].alu_end << R300_ALU_SIZE_SHIFT) |
2354 (code->node[i].tex_offset << R300_TEX_START_SHIFT) |
2355 (code->node[i].tex_end << R300_TEX_SIZE_SHIFT) |
2356 code->node[i].flags;
2357 } else {
2358 rmesa->hw.fp.cmd[R300_FP_NODE0 + (3 - i)] = 0;
2359 }
2360 }
2361
2362 R300_STATECHANGE(rmesa, fpp);
2363 rmesa->hw.fpp.cmd[R300_FPP_CMD_0] = cmdpacket0(rmesa->radeon.radeonScreen, R300_PFS_PARAM_0_X, code->const_nr * 4);
2364 for (i = 0; i < code->const_nr; i++) {
2365 const GLfloat *constant = get_fragmentprogram_constant(ctx,
2366 &fp->mesa_program.Base, code->constant[i]);
2367 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat24(constant[0]);
2368 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat24(constant[1]);
2369 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat24(constant[2]);
2370 rmesa->hw.fpp.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat24(constant[3]);
2371 }
2372 }
2373
2374 #define bump_r500fp_count(ptr, new_count) do{\
2375 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
2376 int _nc=(new_count)/6; \
2377 assert(_nc < 256); \
2378 if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
2379 } while(0)
2380
2381 #define bump_r500fp_const_count(ptr, new_count) do{\
2382 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr));\
2383 int _nc=(new_count)/4; \
2384 assert(_nc < 256); \
2385 if(_nc>_p->r500fp.count)_p->r500fp.count=_nc;\
2386 } while(0)
2387
2388 static void r500SetupPixelShader(r300ContextPtr rmesa)
2389 {
2390 GLcontext *ctx = rmesa->radeon.glCtx;
2391 struct r500_fragment_program *fp = (struct r500_fragment_program *)
2392 (char *)ctx->FragmentProgram._Current;
2393 int i;
2394 struct r500_fragment_program_code *code;
2395
2396 if (!fp) /* should only happenen once, just after context is created */
2397 return;
2398
2399 ((drm_r300_cmd_header_t *) rmesa->hw.r500fp.cmd)->r500fp.count = 0;
2400 ((drm_r300_cmd_header_t *) rmesa->hw.r500fp_const.cmd)->r500fp.count = 0;
2401
2402 r500TranslateFragmentShader(rmesa, fp);
2403 if (!fp->translated) {
2404 fprintf(stderr, "%s: No valid fragment shader, exiting\n",
2405 __FUNCTION__);
2406 return;
2407 }
2408 code = &fp->code;
2409
2410 r300SetupTextures(ctx);
2411
2412 R300_STATECHANGE(rmesa, fp);
2413 rmesa->hw.fp.cmd[R500_FP_PIXSIZE] = code->max_temp_idx;
2414
2415 rmesa->hw.fp.cmd[R500_FP_CODE_ADDR] =
2416 R500_US_CODE_START_ADDR(code->inst_offset) |
2417 R500_US_CODE_END_ADDR(code->inst_end);
2418 rmesa->hw.fp.cmd[R500_FP_CODE_RANGE] =
2419 R500_US_CODE_RANGE_ADDR(code->inst_offset) |
2420 R500_US_CODE_RANGE_SIZE(code->inst_end);
2421 rmesa->hw.fp.cmd[R500_FP_CODE_OFFSET] =
2422 R500_US_CODE_OFFSET_ADDR(0); /* FIXME when we add flow control */
2423
2424 R300_STATECHANGE(rmesa, r500fp);
2425 /* Emit our shader... */
2426 for (i = 0; i < code->inst_end+1; i++) {
2427 rmesa->hw.r500fp.cmd[i*6+1] = code->inst[i].inst0;
2428 rmesa->hw.r500fp.cmd[i*6+2] = code->inst[i].inst1;
2429 rmesa->hw.r500fp.cmd[i*6+3] = code->inst[i].inst2;
2430 rmesa->hw.r500fp.cmd[i*6+4] = code->inst[i].inst3;
2431 rmesa->hw.r500fp.cmd[i*6+5] = code->inst[i].inst4;
2432 rmesa->hw.r500fp.cmd[i*6+6] = code->inst[i].inst5;
2433 }
2434
2435 bump_r500fp_count(rmesa->hw.r500fp.cmd, (code->inst_end + 1) * 6);
2436
2437 R300_STATECHANGE(rmesa, r500fp_const);
2438 for (i = 0; i < code->const_nr; i++) {
2439 const GLfloat *constant = get_fragmentprogram_constant(ctx,
2440 &fp->mesa_program.Base, code->constant[i]);
2441 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 0] = r300PackFloat32(constant[0]);
2442 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 1] = r300PackFloat32(constant[1]);
2443 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 2] = r300PackFloat32(constant[2]);
2444 rmesa->hw.r500fp_const.cmd[R300_FPP_PARAM_0 + 4 * i + 3] = r300PackFloat32(constant[3]);
2445 }
2446 bump_r500fp_const_count(rmesa->hw.r500fp_const.cmd, code->const_nr * 4);
2447
2448 }
2449
2450 void r300UpdateShaderStates(r300ContextPtr rmesa)
2451 {
2452 GLcontext *ctx;
2453 ctx = rmesa->radeon.glCtx;
2454
2455 r300SetEarlyZState(ctx);
2456
2457 /* w_fmt value is set to get best performance
2458 * see p.130 R5xx 3D acceleration guide v1.3 */
2459 GLuint w_fmt, fgdepthsrc;
2460 if (current_fragment_program_writes_depth(ctx)) {
2461 fgdepthsrc = R300_FG_DEPTH_SRC_SHADER;
2462 w_fmt = R300_W_FMT_W24 | R300_W_SRC_US;
2463 } else {
2464 fgdepthsrc = R300_FG_DEPTH_SRC_SCAN;
2465 w_fmt = R300_W_FMT_W0 | R300_W_SRC_US;
2466 }
2467
2468 if (w_fmt != rmesa->hw.us_out_fmt.cmd[5]) {
2469 R300_STATECHANGE(rmesa, us_out_fmt);
2470 rmesa->hw.us_out_fmt.cmd[5] = w_fmt;
2471 }
2472
2473 if (fgdepthsrc != rmesa->hw.fg_depth_src.cmd[1]) {
2474 R300_STATECHANGE(rmesa, fg_depth_src);
2475 rmesa->hw.fg_depth_src.cmd[1] = fgdepthsrc;
2476 }
2477
2478 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
2479 r500SetupPixelShader(rmesa);
2480 else
2481 r300SetupPixelShader(rmesa);
2482
2483 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515)
2484 r500SetupRSUnit(ctx);
2485 else
2486 r300SetupRSUnit(ctx);
2487
2488 if ((rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
2489 r300SetupVertexProgram(rmesa);
2490
2491 }
2492
2493 /**
2494 * Called by Mesa after an internal state update.
2495 */
2496 static void r300InvalidateState(GLcontext * ctx, GLuint new_state)
2497 {
2498 r300ContextPtr r300 = R300_CONTEXT(ctx);
2499
2500 _swrast_InvalidateState(ctx, new_state);
2501 _swsetup_InvalidateState(ctx, new_state);
2502 _vbo_InvalidateState(ctx, new_state);
2503 _tnl_InvalidateState(ctx, new_state);
2504 _ae_invalidate_state(ctx, new_state);
2505
2506 if (new_state & (_NEW_BUFFERS | _NEW_COLOR | _NEW_PIXEL)) {
2507 _mesa_update_framebuffer(ctx);
2508 /* this updates the DrawBuffer's Width/Height if it's a FBO */
2509 _mesa_update_draw_buffer_bounds(ctx);
2510
2511 R300_STATECHANGE(r300, cb);
2512 }
2513
2514 r300UpdateStateParameters(ctx, new_state);
2515
2516 r300->radeon.NewGLState |= new_state;
2517 }
2518
2519 /**
2520 * Calculate initial hardware state and register state functions.
2521 * Assumes that the command buffer and state atoms have been
2522 * initialized already.
2523 */
2524 void r300InitState(r300ContextPtr r300)
2525 {
2526 memset(&(r300->state.texture), 0, sizeof(r300->state.texture));
2527
2528 r300ResetHwState(r300);
2529 }
2530
2531 static void r300RenderMode(GLcontext * ctx, GLenum mode)
2532 {
2533 r300ContextPtr rmesa = R300_CONTEXT(ctx);
2534 (void)rmesa;
2535 (void)mode;
2536 }
2537
2538 void r300UpdateClipPlanes( GLcontext *ctx )
2539 {
2540 r300ContextPtr rmesa = R300_CONTEXT(ctx);
2541 GLuint p;
2542
2543 for (p = 0; p < ctx->Const.MaxClipPlanes; p++) {
2544 if (ctx->Transform.ClipPlanesEnabled & (1 << p)) {
2545 GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p];
2546
2547 R300_STATECHANGE( rmesa, vpucp[p] );
2548 rmesa->hw.vpucp[p].cmd[R300_VPUCP_X] = ip[0];
2549 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Y] = ip[1];
2550 rmesa->hw.vpucp[p].cmd[R300_VPUCP_Z] = ip[2];
2551 rmesa->hw.vpucp[p].cmd[R300_VPUCP_W] = ip[3];
2552 }
2553 }
2554 }
2555
2556 /**
2557 * Initialize driver's state callback functions
2558 */
2559 void r300InitStateFuncs(struct dd_function_table *functions)
2560 {
2561
2562 functions->UpdateState = r300InvalidateState;
2563 functions->AlphaFunc = r300AlphaFunc;
2564 functions->BlendColor = r300BlendColor;
2565 functions->BlendEquationSeparate = r300BlendEquationSeparate;
2566 functions->BlendFuncSeparate = r300BlendFuncSeparate;
2567 functions->Enable = r300Enable;
2568 functions->ColorMask = r300ColorMask;
2569 functions->DepthFunc = r300DepthFunc;
2570 functions->DepthMask = r300DepthMask;
2571 functions->CullFace = r300CullFace;
2572 functions->FrontFace = r300FrontFace;
2573 functions->ShadeModel = r300ShadeModel;
2574 functions->LogicOpcode = r300LogicOpcode;
2575
2576 /* ARB_point_parameters */
2577 functions->PointParameterfv = r300PointParameter;
2578
2579 /* Stencil related */
2580 functions->StencilFuncSeparate = r300StencilFuncSeparate;
2581 functions->StencilMaskSeparate = r300StencilMaskSeparate;
2582 functions->StencilOpSeparate = r300StencilOpSeparate;
2583
2584 /* Viewport related */
2585 functions->Viewport = r300Viewport;
2586 functions->DepthRange = r300DepthRange;
2587 functions->PointSize = r300PointSize;
2588 functions->LineWidth = r300LineWidth;
2589
2590 functions->PolygonOffset = r300PolygonOffset;
2591 functions->PolygonMode = r300PolygonMode;
2592
2593 functions->RenderMode = r300RenderMode;
2594
2595 functions->ClipPlane = r300ClipPlane;
2596 functions->Scissor = radeonScissor;
2597
2598 functions->DrawBuffer = radeonDrawBuffer;
2599 functions->ReadBuffer = radeonReadBuffer;
2600 }