68b90d310631a7bef414b2383ccd0a76c49a5b2b
[mesa.git] / src / mesa / drivers / dri / r300 / r300_texstate.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file
32 *
33 * \author Keith Whitwell <keith@tungstengraphics.com>
34 *
35 * \todo Enable R300 texture tiling code?
36 */
37
38 #include "main/glheader.h"
39 #include "main/imports.h"
40 #include "main/context.h"
41 #include "main/macros.h"
42 #include "main/teximage.h"
43 #include "main/texobj.h"
44 #include "main/enums.h"
45 #include "main/simple_list.h"
46
47 #include "r300_context.h"
48 #include "r300_state.h"
49 #include "radeon_mipmap_tree.h"
50 #include "r300_tex.h"
51 #include "r300_reg.h"
52
53 /*
54 * Note that the _REV formats are the same as the non-REV formats. This is
55 * because the REV and non-REV formats are identical as a byte string, but
56 * differ when accessed as 16-bit or 32-bit words depending on the endianness of
57 * the host. Since the textures are transferred to the R300 as a byte string
58 * (i.e. without any byte-swapping), the R300 sees the REV and non-REV formats
59 * identically. -- paulus
60 */
61
62 static uint32_t translateTexFormat(gl_format mesaFormat)
63 {
64 switch (mesaFormat)
65 {
66 #ifdef MESA_LITTLE_ENDIAN
67 case MESA_FORMAT_RGBA8888:
68 return R300_EASY_TX_FORMAT(Y, Z, W, X, W8Z8Y8X8);
69 case MESA_FORMAT_RGBA8888_REV:
70 return R300_EASY_TX_FORMAT(Z, Y, X, W, W8Z8Y8X8);
71 case MESA_FORMAT_ARGB8888:
72 return R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8);
73 case MESA_FORMAT_ARGB8888_REV:
74 return R300_EASY_TX_FORMAT(W, Z, Y, X, W8Z8Y8X8);
75 #else
76 case MESA_FORMAT_RGBA8888:
77 return R300_EASY_TX_FORMAT(Z, Y, X, W, W8Z8Y8X8);
78 case MESA_FORMAT_RGBA8888_REV:
79 return R300_EASY_TX_FORMAT(Y, Z, W, X, W8Z8Y8X8);
80 case MESA_FORMAT_ARGB8888:
81 return R300_EASY_TX_FORMAT(W, Z, Y, X, W8Z8Y8X8);
82 case MESA_FORMAT_ARGB8888_REV:
83 return R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8);
84 #endif
85 case MESA_FORMAT_XRGB8888:
86 return R300_EASY_TX_FORMAT(X, Y, Z, ONE, W8Z8Y8X8);
87 case MESA_FORMAT_RGB888:
88 return R300_EASY_TX_FORMAT(X, Y, Z, ONE, W8Z8Y8X8);
89 case MESA_FORMAT_RGB565:
90 return R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z5Y6X5);
91 case MESA_FORMAT_RGB565_REV:
92 return R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z5Y6X5);
93 case MESA_FORMAT_ARGB4444:
94 return R300_EASY_TX_FORMAT(X, Y, Z, W, W4Z4Y4X4);
95 case MESA_FORMAT_ARGB4444_REV:
96 return R300_EASY_TX_FORMAT(X, Y, Z, W, W4Z4Y4X4);
97 case MESA_FORMAT_ARGB1555:
98 return R300_EASY_TX_FORMAT(X, Y, Z, W, W1Z5Y5X5);
99 case MESA_FORMAT_ARGB1555_REV:
100 return R300_EASY_TX_FORMAT(X, Y, Z, W, W1Z5Y5X5);
101 case MESA_FORMAT_AL88:
102 return R300_EASY_TX_FORMAT(X, X, X, Y, Y8X8);
103 case MESA_FORMAT_AL88_REV:
104 return R300_EASY_TX_FORMAT(X, X, X, Y, Y8X8);
105 case MESA_FORMAT_RGB332:
106 return R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z3Y3X2);
107 case MESA_FORMAT_A8:
108 return R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, X8);
109 case MESA_FORMAT_L8:
110 return R300_EASY_TX_FORMAT(X, X, X, ONE, X8);
111 case MESA_FORMAT_I8:
112 return R300_EASY_TX_FORMAT(X, X, X, X, X8);
113 case MESA_FORMAT_CI8:
114 return R300_EASY_TX_FORMAT(X, X, X, X, X8);
115 case MESA_FORMAT_YCBCR:
116 return R300_EASY_TX_FORMAT(X, Y, Z, ONE, G8R8_G8B8) | R300_TX_FORMAT_YUV_MODE;
117 case MESA_FORMAT_YCBCR_REV:
118 return R300_EASY_TX_FORMAT(X, Y, Z, ONE, G8R8_G8B8) | R300_TX_FORMAT_YUV_MODE;
119 case MESA_FORMAT_RGB_DXT1:
120 return R300_EASY_TX_FORMAT(X, Y, Z, ONE, DXT1);
121 case MESA_FORMAT_RGBA_DXT1:
122 return R300_EASY_TX_FORMAT(X, Y, Z, W, DXT1);
123 case MESA_FORMAT_RGBA_DXT3:
124 return R300_EASY_TX_FORMAT(X, Y, Z, W, DXT3);
125 case MESA_FORMAT_RGBA_DXT5:
126 return R300_EASY_TX_FORMAT(Y, Z, W, X, DXT5);
127 case MESA_FORMAT_RGBA_FLOAT32:
128 return R300_EASY_TX_FORMAT(Z, Y, X, W, FL_R32G32B32A32);
129 case MESA_FORMAT_RGBA_FLOAT16:
130 return R300_EASY_TX_FORMAT(Z, Y, X, W, FL_R16G16B16A16);
131 case MESA_FORMAT_ALPHA_FLOAT32:
132 return R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, FL_I32);
133 case MESA_FORMAT_ALPHA_FLOAT16:
134 return R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, FL_I16);
135 case MESA_FORMAT_LUMINANCE_FLOAT32:
136 return R300_EASY_TX_FORMAT(X, X, X, ONE, FL_I32);
137 case MESA_FORMAT_LUMINANCE_FLOAT16:
138 return R300_EASY_TX_FORMAT(X, X, X, ONE, FL_I16);
139 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32:
140 return R300_EASY_TX_FORMAT(X, X, X, Y, FL_I32A32);
141 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16:
142 return R300_EASY_TX_FORMAT(X, X, X, Y, FL_I16A16);
143 case MESA_FORMAT_INTENSITY_FLOAT32:
144 return R300_EASY_TX_FORMAT(X, X, X, X, FL_I32);
145 case MESA_FORMAT_INTENSITY_FLOAT16:
146 return R300_EASY_TX_FORMAT(X, X, X, X, FL_I16);
147 case MESA_FORMAT_Z16:
148 return R300_EASY_TX_FORMAT(X, X, X, X, X16);
149 case MESA_FORMAT_Z24_S8:
150 return R300_EASY_TX_FORMAT(X, X, X, X, X24_Y8);
151 case MESA_FORMAT_S8_Z24:
152 return R300_EASY_TX_FORMAT(Y, Y, Y, Y, X24_Y8);
153 case MESA_FORMAT_Z32:
154 return R300_EASY_TX_FORMAT(X, X, X, X, X32);
155 /* EXT_texture_sRGB */
156 case MESA_FORMAT_SRGBA8:
157 return R300_EASY_TX_FORMAT(Y, Z, W, X, W8Z8Y8X8) | R300_TX_FORMAT_GAMMA;
158 case MESA_FORMAT_SLA8:
159 return R300_EASY_TX_FORMAT(X, X, X, Y, Y8X8) | R300_TX_FORMAT_GAMMA;
160 case MESA_FORMAT_SL8:
161 return R300_EASY_TX_FORMAT(X, X, X, ONE, X8) | R300_TX_FORMAT_GAMMA;
162 case MESA_FORMAT_SRGB_DXT1:
163 return R300_EASY_TX_FORMAT(X, Y, Z, ONE, DXT1) | R300_TX_FORMAT_GAMMA;
164 case MESA_FORMAT_SRGBA_DXT1:
165 return R300_EASY_TX_FORMAT(X, Y, Z, W, DXT1) | R300_TX_FORMAT_GAMMA;
166 case MESA_FORMAT_SRGBA_DXT3:
167 return R300_EASY_TX_FORMAT(X, Y, Z, W, DXT3) | R300_TX_FORMAT_GAMMA;
168 case MESA_FORMAT_SRGBA_DXT5:
169 return R300_EASY_TX_FORMAT(Y, Z, W, X, DXT5) | R300_TX_FORMAT_GAMMA;
170 default:
171 fprintf(stderr, "%s: Invalid format %s", __FUNCTION__, _mesa_get_format_name(mesaFormat));
172 assert(0);
173 return 0;
174 }
175 };
176
177 void r300SetDepthTexMode(struct gl_texture_object *tObj)
178 {
179 static const GLuint formats[3][3] = {
180 {
181 R300_EASY_TX_FORMAT(X, X, X, ONE, X16),
182 R300_EASY_TX_FORMAT(X, X, X, X, X16),
183 R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, X16),
184 },
185 {
186 R300_EASY_TX_FORMAT(X, X, X, ONE, X24_Y8),
187 R300_EASY_TX_FORMAT(X, X, X, X, X24_Y8),
188 R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, X24_Y8),
189 },
190 {
191 R300_EASY_TX_FORMAT(X, X, X, ONE, X32),
192 R300_EASY_TX_FORMAT(X, X, X, X, X32),
193 R300_EASY_TX_FORMAT(ZERO, ZERO, ZERO, X, X32),
194 },
195 };
196 const GLuint *format;
197 radeonTexObjPtr t;
198
199 if (!tObj)
200 return;
201
202 t = radeon_tex_obj(tObj);
203
204 switch (tObj->Image[0][tObj->BaseLevel]->TexFormat) {
205 case MESA_FORMAT_Z16:
206 format = formats[0];
207 break;
208 case MESA_FORMAT_S8_Z24:
209 format = formats[1];
210 break;
211 case MESA_FORMAT_Z32:
212 format = formats[2];
213 break;
214 default:
215 /* Error...which should have already been caught by higher
216 * levels of Mesa.
217 */
218 ASSERT(0);
219 return;
220 }
221
222 switch (tObj->DepthMode) {
223 case GL_LUMINANCE:
224 t->pp_txformat = format[0];
225 break;
226 case GL_INTENSITY:
227 t->pp_txformat = format[1];
228 break;
229 case GL_ALPHA:
230 t->pp_txformat = format[2];
231 break;
232 default:
233 /* Error...which should have already been caught by higher
234 * levels of Mesa.
235 */
236 ASSERT(0);
237 return;
238 }
239 }
240
241
242 /**
243 * Compute the cached hardware register values for the given texture object.
244 *
245 * \param rmesa Context pointer
246 * \param t the r300 texture object
247 */
248 static void setup_hardware_state(r300ContextPtr rmesa, radeonTexObj *t)
249 {
250 const struct gl_texture_image *firstImage;
251 firstImage = t->base.Image[0][t->minLod];
252
253 if (!t->image_override) {
254 if (firstImage->_BaseFormat == GL_DEPTH_COMPONENT) {
255 r300SetDepthTexMode(&t->base);
256 } else {
257 t->pp_txformat = translateTexFormat(firstImage->TexFormat);
258 }
259 }
260
261 if (t->image_override && t->bo)
262 return;
263
264 t->pp_txsize = (((R300_TX_WIDTHMASK_MASK & ((firstImage->Width - 1) << R300_TX_WIDTHMASK_SHIFT)))
265 | ((R300_TX_HEIGHTMASK_MASK & ((firstImage->Height - 1) << R300_TX_HEIGHTMASK_SHIFT)))
266 | ((R300_TX_DEPTHMASK_MASK & ((firstImage->DepthLog2) << R300_TX_DEPTHMASK_SHIFT)))
267 | ((R300_TX_MAX_MIP_LEVEL_MASK & ((t->maxLod - t->minLod) << R300_TX_MAX_MIP_LEVEL_SHIFT))));
268
269 t->tile_bits = 0;
270
271 if (t->base.Target == GL_TEXTURE_CUBE_MAP)
272 t->pp_txformat |= R300_TX_FORMAT_CUBIC_MAP;
273 if (t->base.Target == GL_TEXTURE_3D)
274 t->pp_txformat |= R300_TX_FORMAT_3D;
275
276
277 if (t->base.Target == GL_TEXTURE_RECTANGLE_NV) {
278 unsigned int align = (64 / _mesa_get_format_bytes(firstImage->TexFormat)) - 1;
279 t->pp_txsize |= R300_TX_SIZE_TXPITCH_EN;
280 if (!t->image_override)
281 t->pp_txpitch = ((firstImage->Width + align) & ~align) - 1;
282 }
283
284 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
285 if (firstImage->Width > 2048)
286 t->pp_txpitch |= R500_TXWIDTH_BIT11;
287 else
288 t->pp_txpitch &= ~R500_TXWIDTH_BIT11;
289 if (firstImage->Height > 2048)
290 t->pp_txpitch |= R500_TXHEIGHT_BIT11;
291 else
292 t->pp_txpitch &= ~R500_TXHEIGHT_BIT11;
293 }
294 }
295
296 /**
297 * Ensure the given texture is ready for rendering.
298 *
299 * Mostly this means populating the texture object's mipmap tree.
300 */
301 static GLboolean r300_validate_texture(GLcontext * ctx, struct gl_texture_object *texObj)
302 {
303 r300ContextPtr rmesa = R300_CONTEXT(ctx);
304 radeonTexObj *t = radeon_tex_obj(texObj);
305
306 if (!radeon_validate_texture_miptree(ctx, texObj))
307 return GL_FALSE;
308
309 /* Configure the hardware registers (more precisely, the cached version
310 * of the hardware registers). */
311 setup_hardware_state(rmesa, t);
312
313 t->validated = GL_TRUE;
314 return GL_TRUE;
315 }
316
317 /**
318 * Ensure all enabled and complete textures are uploaded along with any buffers being used.
319 */
320 GLboolean r300ValidateBuffers(GLcontext * ctx)
321 {
322 r300ContextPtr rmesa = R300_CONTEXT(ctx);
323 struct radeon_renderbuffer *rrb;
324 int i;
325 int ret;
326
327 radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs);
328
329 rrb = radeon_get_colorbuffer(&rmesa->radeon);
330 /* color buffer */
331 if (rrb && rrb->bo) {
332 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
333 rrb->bo, 0,
334 RADEON_GEM_DOMAIN_VRAM);
335 }
336
337 /* depth buffer */
338 rrb = radeon_get_depthbuffer(&rmesa->radeon);
339 if (rrb && rrb->bo) {
340 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
341 rrb->bo, 0,
342 RADEON_GEM_DOMAIN_VRAM);
343 }
344
345 for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) {
346 radeonTexObj *t;
347
348 if (!ctx->Texture.Unit[i]._ReallyEnabled)
349 continue;
350
351 if (!r300_validate_texture(ctx, ctx->Texture.Unit[i]._Current)) {
352 _mesa_warning(ctx,
353 "failed to validate texture for unit %d.\n",
354 i);
355 }
356 t = radeon_tex_obj(ctx->Texture.Unit[i]._Current);
357 if (t->image_override && t->bo)
358 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
359 t->bo,
360 RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
361 else if (t->mt->bo)
362 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
363 t->mt->bo,
364 RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
365 }
366
367 ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs, first_elem(&rmesa->radeon.dma.reserved)->bo, RADEON_GEM_DOMAIN_GTT, 0);
368 if (ret)
369 return GL_FALSE;
370 return GL_TRUE;
371 }
372
373 void r300SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
374 unsigned long long offset, GLint depth, GLuint pitch)
375 {
376 r300ContextPtr rmesa = pDRICtx->driverPrivate;
377 struct gl_texture_object *tObj =
378 _mesa_lookup_texture(rmesa->radeon.glCtx, texname);
379 radeonTexObjPtr t = radeon_tex_obj(tObj);
380 uint32_t pitch_val;
381
382 if (!tObj)
383 return;
384
385 t->image_override = GL_TRUE;
386
387 if (!offset)
388 return;
389
390 t->bo = NULL;
391 t->override_offset = offset;
392 t->pp_txpitch &= (1 << 13) -1;
393 pitch_val = pitch;
394
395 switch (depth) {
396 case 32:
397 t->pp_txformat = R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8);
398 pitch_val /= 4;
399 break;
400 case 24:
401 default:
402 t->pp_txformat = R300_EASY_TX_FORMAT(X, Y, Z, ONE, W8Z8Y8X8);
403 pitch_val /= 4;
404 break;
405 case 16:
406 t->pp_txformat = R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z5Y6X5);
407 pitch_val /= 2;
408 break;
409 }
410 pitch_val--;
411
412 t->pp_txpitch |= pitch_val;
413 }
414
415 void r300SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_format, __DRIdrawable *dPriv)
416 {
417 struct gl_texture_unit *texUnit;
418 struct gl_texture_object *texObj;
419 struct gl_texture_image *texImage;
420 struct radeon_renderbuffer *rb;
421 radeon_texture_image *rImage;
422 radeonContextPtr radeon;
423 r300ContextPtr rmesa;
424 struct radeon_framebuffer *rfb;
425 radeonTexObjPtr t;
426 uint32_t pitch_val;
427 uint32_t internalFormat, type, format;
428
429 type = GL_BGRA;
430 format = GL_UNSIGNED_BYTE;
431 internalFormat = (glx_texture_format == GLX_TEXTURE_FORMAT_RGB_EXT ? 3 : 4);
432
433 radeon = pDRICtx->driverPrivate;
434 rmesa = pDRICtx->driverPrivate;
435
436 rfb = dPriv->driverPrivate;
437 texUnit = &radeon->glCtx->Texture.Unit[radeon->glCtx->Texture.CurrentUnit];
438 texObj = _mesa_select_tex_object(radeon->glCtx, texUnit, target);
439 texImage = _mesa_get_tex_image(radeon->glCtx, texObj, target, 0);
440
441 rImage = get_radeon_texture_image(texImage);
442 t = radeon_tex_obj(texObj);
443 if (t == NULL) {
444 return;
445 }
446
447 radeon_update_renderbuffers(pDRICtx, dPriv, GL_TRUE);
448 rb = rfb->color_rb[0];
449 if (rb->bo == NULL) {
450 /* Failed to BO for the buffer */
451 return;
452 }
453
454 _mesa_lock_texture(radeon->glCtx, texObj);
455 if (t->bo) {
456 radeon_bo_unref(t->bo);
457 t->bo = NULL;
458 }
459 if (rImage->bo) {
460 radeon_bo_unref(rImage->bo);
461 rImage->bo = NULL;
462 }
463
464 radeon_miptree_unreference(&t->mt);
465 radeon_miptree_unreference(&rImage->mt);
466
467 _mesa_init_teximage_fields(radeon->glCtx, target, texImage,
468 rb->base.Width, rb->base.Height, 1, 0, rb->cpp);
469 texImage->RowStride = rb->pitch / rb->cpp;
470 rImage->bo = rb->bo;
471 radeon_bo_ref(rImage->bo);
472 t->bo = rb->bo;
473 radeon_bo_ref(t->bo);
474 t->tile_bits = 0;
475 t->image_override = GL_TRUE;
476 t->override_offset = 0;
477 t->pp_txpitch &= (1 << 13) -1;
478 pitch_val = rb->pitch;
479 switch (rb->cpp) {
480 case 4:
481 if (glx_texture_format == GLX_TEXTURE_FORMAT_RGB_EXT)
482 t->pp_txformat = R300_EASY_TX_FORMAT(X, Y, Z, ONE, W8Z8Y8X8);
483 else
484 t->pp_txformat = R300_EASY_TX_FORMAT(X, Y, Z, W, W8Z8Y8X8);
485 pitch_val /= 4;
486 break;
487 case 3:
488 default:
489 t->pp_txformat = R300_EASY_TX_FORMAT(X, Y, Z, ONE, W8Z8Y8X8);
490 pitch_val /= 4;
491 break;
492 case 2:
493 t->pp_txformat = R300_EASY_TX_FORMAT(X, Y, Z, ONE, Z5Y6X5);
494 pitch_val /= 2;
495 break;
496 }
497 pitch_val--;
498 t->pp_txsize = (((R300_TX_WIDTHMASK_MASK & ((rb->base.Width - 1) << R300_TX_WIDTHMASK_SHIFT)))
499 | ((R300_TX_HEIGHTMASK_MASK & ((rb->base.Height - 1) << R300_TX_HEIGHTMASK_SHIFT))));
500 t->pp_txsize |= R300_TX_SIZE_TXPITCH_EN;
501 t->pp_txpitch |= pitch_val;
502
503 if (rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {
504 if (rb->base.Width > 2048)
505 t->pp_txpitch |= R500_TXWIDTH_BIT11;
506 else
507 t->pp_txpitch &= ~R500_TXWIDTH_BIT11;
508 if (rb->base.Height > 2048)
509 t->pp_txpitch |= R500_TXHEIGHT_BIT11;
510 else
511 t->pp_txpitch &= ~R500_TXHEIGHT_BIT11;
512 }
513 t->validated = GL_TRUE;
514 _mesa_unlock_texture(radeon->glCtx, texObj);
515 return;
516 }
517
518 void r300SetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv)
519 {
520 r300SetTexBuffer2(pDRICtx, target, GLX_TEXTURE_FORMAT_RGBA_EXT, dPriv);
521 }