Merge commit 'origin/perrtblend'
[mesa.git] / src / mesa / drivers / dri / r300 / r300_vertprog.c
1 /**************************************************************************
2
3 Copyright (C) 2005 Aapo Tahkola <aet@rasterburn.org>
4 Copyright (C) 2008 Oliver McFadden <z3ro.geek@gmail.com>
5
6 All Rights Reserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining a
9 copy of this software and associated documentation files (the "Software"),
10 to deal in the Software without restriction, including without limitation
11 on the rights to use, copy, modify, merge, publish, distribute, sub
12 license, and/or sell copies of the Software, and to permit persons to whom
13 the Software is furnished to do so, subject to the following conditions:
14
15 The above copyright notice and this permission notice (including the next
16 paragraph) shall be included in all copies or substantial portions of the
17 Software.
18
19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
22 THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
23 DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24 OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
25 USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27 **************************************************************************/
28
29 /* Radeon R5xx Acceleration, Revision 1.2 */
30
31 #include "main/glheader.h"
32 #include "main/macros.h"
33 #include "main/enums.h"
34 #include "shader/program.h"
35 #include "shader/programopt.h"
36 #include "shader/prog_instruction.h"
37 #include "shader/prog_parameter.h"
38 #include "shader/prog_print.h"
39 #include "shader/prog_statevars.h"
40 #include "tnl/tnl.h"
41
42 #include "compiler/radeon_compiler.h"
43 #include "radeon_mesa_to_rc.h"
44 #include "r300_context.h"
45 #include "r300_fragprog_common.h"
46 #include "r300_state.h"
47
48 /**
49 * Write parameter array for the given vertex program into dst.
50 * Return the total number of components written.
51 */
52 static int r300VertexProgUpdateParams(GLcontext * ctx, struct r300_vertex_program *vp, float *dst)
53 {
54 int i;
55
56 if (vp->Base->IsNVProgram) {
57 _mesa_load_tracked_matrices(ctx);
58 } else {
59 if (vp->Base->Base.Parameters) {
60 _mesa_load_state_parameters(ctx, vp->Base->Base.Parameters);
61 }
62 }
63
64 for(i = 0; i < vp->code.constants.Count; ++i) {
65 const float * src = 0;
66 const struct rc_constant * constant = &vp->code.constants.Constants[i];
67
68 switch(constant->Type) {
69 case RC_CONSTANT_EXTERNAL:
70 if (vp->Base->IsNVProgram) {
71 src = ctx->VertexProgram.Parameters[constant->u.External];
72 } else {
73 src = vp->Base->Base.Parameters->ParameterValues[constant->u.External];
74 }
75 break;
76
77 case RC_CONSTANT_IMMEDIATE:
78 src = constant->u.Immediate;
79 break;
80 }
81
82 dst[4*i] = src[0];
83 dst[4*i + 1] = src[1];
84 dst[4*i + 2] = src[2];
85 dst[4*i + 3] = src[3];
86 }
87
88 return 4 * vp->code.constants.Count;
89 }
90
91 static GLbitfield compute_required_outputs(struct gl_vertex_program * vp, GLbitfield fpreads)
92 {
93 GLbitfield outputs = 0;
94 int i;
95
96 #define ADD_OUTPUT(fp_attr, vp_result) \
97 do { \
98 if (fpreads & (1 << (fp_attr))) \
99 outputs |= (1 << (vp_result)); \
100 } while (0)
101
102 ADD_OUTPUT(FRAG_ATTRIB_COL0, VERT_RESULT_COL0);
103 ADD_OUTPUT(FRAG_ATTRIB_COL1, VERT_RESULT_COL1);
104
105 for (i = 0; i <= 7; ++i) {
106 ADD_OUTPUT(FRAG_ATTRIB_TEX0 + i, VERT_RESULT_TEX0 + i);
107 }
108
109 #undef ADD_OUTPUT
110
111 if ((fpreads & (1 << FRAG_ATTRIB_COL0)) &&
112 (vp->Base.OutputsWritten & (1 << VERT_RESULT_BFC0)))
113 outputs |= 1 << VERT_RESULT_BFC0;
114 if ((fpreads & (1 << FRAG_ATTRIB_COL1)) &&
115 (vp->Base.OutputsWritten & (1 << VERT_RESULT_BFC1)))
116 outputs |= 1 << VERT_RESULT_BFC1;
117
118 outputs |= 1 << VERT_RESULT_HPOS;
119 if (vp->Base.OutputsWritten & (1 << VERT_RESULT_PSIZ))
120 outputs |= 1 << VERT_RESULT_PSIZ;
121
122 return outputs;
123 }
124
125
126 static void t_inputs_outputs(struct r300_vertex_program_compiler * c)
127 {
128 int i;
129 int cur_reg;
130 GLuint OutputsWritten, InputsRead;
131
132 OutputsWritten = c->Base.Program.OutputsWritten;
133 InputsRead = c->Base.Program.InputsRead;
134
135 cur_reg = -1;
136 for (i = 0; i < VERT_ATTRIB_MAX; i++) {
137 if (InputsRead & (1 << i))
138 c->code->inputs[i] = ++cur_reg;
139 else
140 c->code->inputs[i] = -1;
141 }
142
143 cur_reg = 0;
144 for (i = 0; i < VERT_RESULT_MAX; i++)
145 c->code->outputs[i] = -1;
146
147 assert(OutputsWritten & (1 << VERT_RESULT_HPOS));
148
149 if (OutputsWritten & (1 << VERT_RESULT_HPOS)) {
150 c->code->outputs[VERT_RESULT_HPOS] = cur_reg++;
151 }
152
153 if (OutputsWritten & (1 << VERT_RESULT_PSIZ)) {
154 c->code->outputs[VERT_RESULT_PSIZ] = cur_reg++;
155 }
156
157 /* If we're writing back facing colors we need to send
158 * four colors to make front/back face colors selection work.
159 * If the vertex program doesn't write all 4 colors, lets
160 * pretend it does by skipping output index reg so the colors
161 * get written into appropriate output vectors.
162 */
163 if (OutputsWritten & (1 << VERT_RESULT_COL0)) {
164 c->code->outputs[VERT_RESULT_COL0] = cur_reg++;
165 } else if (OutputsWritten & (1 << VERT_RESULT_BFC0) ||
166 OutputsWritten & (1 << VERT_RESULT_BFC1)) {
167 cur_reg++;
168 }
169
170 if (OutputsWritten & (1 << VERT_RESULT_COL1)) {
171 c->code->outputs[VERT_RESULT_COL1] = cur_reg++;
172 } else if (OutputsWritten & (1 << VERT_RESULT_BFC0) ||
173 OutputsWritten & (1 << VERT_RESULT_BFC1)) {
174 cur_reg++;
175 }
176
177 if (OutputsWritten & (1 << VERT_RESULT_BFC0)) {
178 c->code->outputs[VERT_RESULT_BFC0] = cur_reg++;
179 } else if (OutputsWritten & (1 << VERT_RESULT_BFC1)) {
180 cur_reg++;
181 }
182
183 if (OutputsWritten & (1 << VERT_RESULT_BFC1)) {
184 c->code->outputs[VERT_RESULT_BFC1] = cur_reg++;
185 } else if (OutputsWritten & (1 << VERT_RESULT_BFC0)) {
186 cur_reg++;
187 }
188
189 for (i = VERT_RESULT_TEX0; i <= VERT_RESULT_TEX7; i++) {
190 if (OutputsWritten & (1 << i)) {
191 c->code->outputs[i] = cur_reg++;
192 }
193 }
194
195 if (OutputsWritten & (1 << VERT_RESULT_FOGC)) {
196 c->code->outputs[VERT_RESULT_FOGC] = cur_reg++;
197 }
198 }
199
200 /**
201 * The NV_vertex_program spec mandates that all registers be
202 * initialized to zero. We do this here unconditionally.
203 *
204 * \note We rely on dead-code elimination in the compiler.
205 */
206 static void initialize_NV_registers(struct radeon_compiler * compiler)
207 {
208 unsigned int reg;
209 struct rc_instruction * inst;
210
211 for(reg = 0; reg < 12; ++reg) {
212 inst = rc_insert_new_instruction(compiler, &compiler->Program.Instructions);
213 inst->U.I.Opcode = RC_OPCODE_MOV;
214 inst->U.I.DstReg.File = RC_FILE_TEMPORARY;
215 inst->U.I.DstReg.Index = reg;
216 inst->U.I.SrcReg[0].File = RC_FILE_NONE;
217 inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_0000;
218 }
219
220 inst = rc_insert_new_instruction(compiler, &compiler->Program.Instructions);
221 inst->U.I.Opcode = RC_OPCODE_ARL;
222 inst->U.I.DstReg.File = RC_FILE_ADDRESS;
223 inst->U.I.DstReg.Index = 0;
224 inst->U.I.DstReg.WriteMask = WRITEMASK_X;
225 inst->U.I.SrcReg[0].File = RC_FILE_NONE;
226 inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_0000;
227 }
228
229 static struct r300_vertex_program *build_program(GLcontext *ctx,
230 struct r300_vertex_program_key *wanted_key,
231 const struct gl_vertex_program *mesa_vp)
232 {
233 struct r300_vertex_program *vp;
234 struct r300_vertex_program_compiler compiler;
235
236 vp = _mesa_calloc(sizeof(*vp));
237 vp->Base = (struct gl_vertex_program *) _mesa_clone_program(ctx, &mesa_vp->Base);
238 _mesa_memcpy(&vp->key, wanted_key, sizeof(vp->key));
239
240 rc_init(&compiler.Base);
241 compiler.Base.Debug = (RADEON_DEBUG & RADEON_VERTS) ? GL_TRUE : GL_FALSE;
242
243 compiler.code = &vp->code;
244 compiler.RequiredOutputs = compute_required_outputs(vp->Base, vp->key.FpReads);
245 compiler.SetHwInputOutput = &t_inputs_outputs;
246
247 if (compiler.Base.Debug) {
248 fprintf(stderr, "Initial vertex program:\n");
249 _mesa_print_program(&vp->Base->Base);
250 fflush(stderr);
251 }
252
253 if (mesa_vp->IsPositionInvariant) {
254 _mesa_insert_mvp_code(ctx, vp->Base);
255 }
256
257 radeon_mesa_to_rc_program(&compiler.Base, &vp->Base->Base);
258
259 if (mesa_vp->IsNVProgram)
260 initialize_NV_registers(&compiler.Base);
261
262 rc_move_output(&compiler.Base, VERT_RESULT_PSIZ, VERT_RESULT_PSIZ, WRITEMASK_X);
263
264 if (vp->key.WPosAttr != FRAG_ATTRIB_MAX) {
265 rc_copy_output(&compiler.Base,
266 VERT_RESULT_HPOS,
267 vp->key.WPosAttr - FRAG_ATTRIB_TEX0 + VERT_RESULT_TEX0);
268 }
269
270 if (vp->key.FogAttr != FRAG_ATTRIB_MAX) {
271 rc_move_output(&compiler.Base,
272 VERT_RESULT_FOGC,
273 vp->key.FogAttr - FRAG_ATTRIB_TEX0 + VERT_RESULT_TEX0, WRITEMASK_X);
274 }
275
276 r3xx_compile_vertex_program(&compiler);
277
278 if (vp->code.constants.Count > ctx->Const.VertexProgram.MaxParameters) {
279 rc_error(&compiler.Base, "Program exceeds constant buffer size limit\n");
280 }
281
282 vp->error = compiler.Base.Error;
283
284 vp->Base->Base.InputsRead = vp->code.InputsRead;
285 vp->Base->Base.OutputsWritten = vp->code.OutputsWritten;
286
287 rc_destroy(&compiler.Base);
288
289 return vp;
290 }
291
292 struct r300_vertex_program * r300SelectAndTranslateVertexShader(GLcontext *ctx)
293 {
294 r300ContextPtr r300 = R300_CONTEXT(ctx);
295 struct r300_vertex_program_key wanted_key = { 0 };
296 struct r300_vertex_program_cont *vpc;
297 struct r300_vertex_program *vp;
298
299 vpc = (struct r300_vertex_program_cont *)ctx->VertexProgram._Current;
300
301 if (!r300->selected_fp) {
302 /* This can happen when GetProgramiv is called to check
303 * whether the program runs natively.
304 *
305 * To be honest, this is not a very good solution,
306 * but solving the problem of reporting good values
307 * for those queries is tough anyway considering that
308 * we recompile vertex programs based on the precise
309 * fragment program that is in use.
310 */
311 r300SelectAndTranslateFragmentShader(ctx);
312 }
313
314 wanted_key.FpReads = r300->selected_fp->InputsRead;
315 wanted_key.FogAttr = r300->selected_fp->fog_attr;
316 wanted_key.WPosAttr = r300->selected_fp->wpos_attr;
317
318 for (vp = vpc->progs; vp; vp = vp->next) {
319 if (_mesa_memcmp(&vp->key, &wanted_key, sizeof(wanted_key))
320 == 0) {
321 return r300->selected_vp = vp;
322 }
323 }
324
325 vp = build_program(ctx, &wanted_key, &vpc->mesa_program);
326 vp->next = vpc->progs;
327 vpc->progs = vp;
328
329 return r300->selected_vp = vp;
330 }
331
332 #define bump_vpu_count(ptr, new_count) do { \
333 drm_r300_cmd_header_t* _p=((drm_r300_cmd_header_t*)(ptr)); \
334 int _nc=(new_count)/4; \
335 if(_nc>_p->vpu.count)_p->vpu.count=_nc; \
336 } while(0)
337
338 static void r300EmitVertexProgram(r300ContextPtr r300, int dest, struct r300_vertex_program_code *code)
339 {
340 int i;
341
342 assert((code->length > 0) && (code->length % 4 == 0));
343
344 R300_STATECHANGE( r300, vap_flush );
345
346 switch ((dest >> 8) & 0xf) {
347 case 0:
348 R300_STATECHANGE(r300, vpi);
349 for (i = 0; i < code->length; i++)
350 r300->hw.vpi.cmd[R300_VPI_INSTR_0 + i + 4 * (dest & 0xff)] = (code->body.d[i]);
351 bump_vpu_count(r300->hw.vpi.cmd, code->length + 4 * (dest & 0xff));
352 break;
353 case 2:
354 R300_STATECHANGE(r300, vpp);
355 for (i = 0; i < code->length; i++)
356 r300->hw.vpp.cmd[R300_VPP_PARAM_0 + i + 4 * (dest & 0xff)] = (code->body.d[i]);
357 bump_vpu_count(r300->hw.vpp.cmd, code->length + 4 * (dest & 0xff));
358 break;
359 case 4:
360 R300_STATECHANGE(r300, vps);
361 for (i = 0; i < code->length; i++)
362 r300->hw.vps.cmd[1 + i + 4 * (dest & 0xff)] = (code->body.d[i]);
363 bump_vpu_count(r300->hw.vps.cmd, code->length + 4 * (dest & 0xff));
364 break;
365 default:
366 fprintf(stderr, "%s:%s don't know how to handle dest %04x\n", __FILE__, __FUNCTION__, dest);
367 exit(-1);
368 }
369 }
370
371 void r300SetupVertexProgram(r300ContextPtr rmesa)
372 {
373 GLcontext *ctx = rmesa->radeon.glCtx;
374 struct r300_vertex_program *prog = rmesa->selected_vp;
375 int inst_count = 0;
376 int param_count = 0;
377
378 /* Reset state, in case we don't use something */
379 ((drm_r300_cmd_header_t *) rmesa->hw.vpp.cmd)->vpu.count = 0;
380 ((drm_r300_cmd_header_t *) rmesa->hw.vpi.cmd)->vpu.count = 0;
381 ((drm_r300_cmd_header_t *) rmesa->hw.vps.cmd)->vpu.count = 0;
382
383 R300_STATECHANGE(rmesa, vap_flush);
384 R300_STATECHANGE(rmesa, vpp);
385 param_count = r300VertexProgUpdateParams(ctx, prog, (float *)&rmesa->hw.vpp.cmd[R300_VPP_PARAM_0]);
386 bump_vpu_count(rmesa->hw.vpp.cmd, param_count);
387 param_count /= 4;
388
389 r300EmitVertexProgram(rmesa, R300_PVS_CODE_START, &(prog->code));
390 inst_count = (prog->code.length / 4) - 1;
391
392 r300VapCntl(rmesa, _mesa_bitcount(prog->code.InputsRead),
393 _mesa_bitcount(prog->code.OutputsWritten), prog->code.num_temporaries);
394
395 R300_STATECHANGE(rmesa, pvs);
396 rmesa->hw.pvs.cmd[R300_PVS_CNTL_1] = (0 << R300_PVS_FIRST_INST_SHIFT) | (inst_count << R300_PVS_XYZW_VALID_INST_SHIFT) |
397 (inst_count << R300_PVS_LAST_INST_SHIFT);
398
399 rmesa->hw.pvs.cmd[R300_PVS_CNTL_2] = (0 << R300_PVS_CONST_BASE_OFFSET_SHIFT) | (param_count << R300_PVS_MAX_CONST_ADDR_SHIFT);
400 rmesa->hw.pvs.cmd[R300_PVS_CNTL_3] = (inst_count << R300_PVS_LAST_VTX_SRC_INST_SHIFT);
401 }