Merge branch 'master' of git+ssh://znh@git.freedesktop.org/git/mesa/mesa into 965...
[mesa.git] / src / mesa / drivers / dri / r300 / r300_vertprog.h
1 #ifndef __R300_VERTPROG_H_
2 #define __R300_VERTPROG_H_
3
4 #include "r300_reg.h"
5
6 struct r300_vertprog_instruction {
7 GLuint opcode;
8 GLuint src[3];
9 };
10
11 #define VSF_FLAG_X 1
12 #define VSF_FLAG_Y 2
13 #define VSF_FLAG_Z 4
14 #define VSF_FLAG_W 8
15 #define VSF_FLAG_XYZ (VSF_FLAG_X | VSF_FLAG_Y | VSF_FLAG_Z)
16 #define VSF_FLAG_ALL 0xf
17 #define VSF_FLAG_NONE 0
18
19 #define VSF_OUT_CLASS_TMP 0
20 #define VSF_OUT_CLASS_ADDR 1
21 #define VSF_OUT_CLASS_RESULT 2
22
23 /* first DWORD of an instruction */
24
25 /* possible operations:
26 DOT, MUL, ADD, MAD, FRC, MAX, MIN, SGE, SLT, EXP, LOG, LIT, POW, RCP, RSQ, EX2,
27 LG2, MAD_2 */
28
29 #define MAKE_VSF_OP(op, out_reg_index, out_reg_fields, class) \
30 ((op) \
31 | ((out_reg_index) << R300_VPI_OUT_REG_INDEX_SHIFT) \
32 | ((out_reg_fields) << 20) \
33 | ( (class) << 8 ) )
34
35 #define EASY_VSF_OP(op, out_reg_index, out_reg_fields, class) \
36 MAKE_VSF_OP(R300_VPI_OUT_OP_##op, out_reg_index, VSF_FLAG_##out_reg_fields, VSF_OUT_CLASS_##class) \
37
38 /* according to Nikolai, the subsequent 3 DWORDs are sources, use same define for each */
39
40 #define VSF_IN_CLASS_TMP 0
41 #define VSF_IN_CLASS_ATTR 1
42 #define VSF_IN_CLASS_PARAM 2
43 #define VSF_IN_CLASS_NONE 9
44
45 #define VSF_IN_COMPONENT_X 0
46 #define VSF_IN_COMPONENT_Y 1
47 #define VSF_IN_COMPONENT_Z 2
48 #define VSF_IN_COMPONENT_W 3
49 #define VSF_IN_COMPONENT_ZERO 4
50 #define VSF_IN_COMPONENT_ONE 5
51
52 #define MAKE_VSF_SOURCE(in_reg_index, comp_x, comp_y, comp_z, comp_w, class, negate) \
53 ( ((in_reg_index)<<R300_VPI_IN_REG_INDEX_SHIFT) \
54 | ((comp_x)<<R300_VPI_IN_X_SHIFT) \
55 | ((comp_y)<<R300_VPI_IN_Y_SHIFT) \
56 | ((comp_z)<<R300_VPI_IN_Z_SHIFT) \
57 | ((comp_w)<<R300_VPI_IN_W_SHIFT) \
58 | ((negate)<<25) | ((class)))
59
60 #define EASY_VSF_SOURCE(in_reg_index, comp_x, comp_y, comp_z, comp_w, class, negate) \
61 MAKE_VSF_SOURCE(in_reg_index, \
62 VSF_IN_COMPONENT_##comp_x, \
63 VSF_IN_COMPONENT_##comp_y, \
64 VSF_IN_COMPONENT_##comp_z, \
65 VSF_IN_COMPONENT_##comp_w, \
66 VSF_IN_CLASS_##class, VSF_FLAG_##negate)
67
68 /* special sources: */
69
70 /* (1.0,1.0,1.0,1.0) vector (ATTR, plain ) */
71 #define VSF_ATTR_UNITY(reg) EASY_VSF_SOURCE(reg, ONE, ONE, ONE, ONE, ATTR, NONE)
72 #define VSF_UNITY(reg) EASY_VSF_SOURCE(reg, ONE, ONE, ONE, ONE, NONE, NONE)
73
74 /* contents of unmodified register */
75 #define VSF_REG(reg) EASY_VSF_SOURCE(reg, X, Y, Z, W, ATTR, NONE)
76
77 /* contents of unmodified parameter */
78 #define VSF_PARAM(reg) EASY_VSF_SOURCE(reg, X, Y, Z, W, PARAM, NONE)
79
80 /* contents of unmodified temporary register */
81 #define VSF_TMP(reg) EASY_VSF_SOURCE(reg, X, Y, Z, W, TMP, NONE)
82
83 /* components of ATTR register */
84 #define VSF_ATTR_X(reg) EASY_VSF_SOURCE(reg, X, X, X, X, ATTR, NONE)
85 #define VSF_ATTR_Y(reg) EASY_VSF_SOURCE(reg, Y, Y, Y, Y, ATTR, NONE)
86 #define VSF_ATTR_Z(reg) EASY_VSF_SOURCE(reg, Z, Z, Z, Z, ATTR, NONE)
87 #define VSF_ATTR_W(reg) EASY_VSF_SOURCE(reg, W, W, W, W, ATTR, NONE)
88
89 #endif