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[mesa.git] / src / mesa / drivers / dri / r300 / r500_fragprog.c
1 /*
2 * Copyright (C) 2005 Ben Skeggs.
3 *
4 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
5 * Adaptation and modification for ATI/AMD Radeon R500 GPU chipsets.
6 *
7 * All Rights Reserved.
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining
10 * a copy of this software and associated documentation files (the
11 * "Software"), to deal in the Software without restriction, including
12 * without limitation the rights to use, copy, modify, merge, publish,
13 * distribute, sublicense, and/or sell copies of the Software, and to
14 * permit persons to whom the Software is furnished to do so, subject to
15 * the following conditions:
16 *
17 * The above copyright notice and this permission notice (including the
18 * next paragraph) shall be included in all copies or substantial
19 * portions of the Software.
20 *
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 *
29 */
30
31 /**
32 * \file
33 *
34 * \author Ben Skeggs <darktama@iinet.net.au>
35 *
36 * \author Jerome Glisse <j.glisse@gmail.com>
37 *
38 * \author Corbin Simpson <MostAwesomeDude@gmail.com>
39 *
40 * \todo Depth write, WPOS/FOGC inputs
41 *
42 * \todo FogOption
43 *
44 * \todo Verify results of opcodes for accuracy, I've only checked them in
45 * specific cases.
46 */
47
48 #include "glheader.h"
49 #include "macros.h"
50 #include "enums.h"
51 #include "shader/prog_instruction.h"
52 #include "shader/prog_parameter.h"
53 #include "shader/prog_print.h"
54
55 #include "r300_context.h"
56 #include "r500_fragprog.h"
57 #include "r300_reg.h"
58 #include "r300_state.h"
59
60 /*
61 * Useful macros and values
62 */
63 #define ERROR(fmt, args...) do { \
64 fprintf(stderr, "%s::%s(): " fmt "\n", \
65 __FILE__, __FUNCTION__, ##args); \
66 fp->error = GL_TRUE; \
67 } while(0)
68
69 #define COMPILE_STATE struct r300_pfs_compile_state *cs = fp->cs
70
71 #define R500_US_NUM_TEMP_REGS 128
72 #define R500_US_NUM_CONST_REGS 256
73
74 /* "Register" flags */
75 #define REG_CONSTANT (1 << 8)
76 #define REG_SRC_REL (1 << 9)
77 #define REG_DEST_REL (1 << 7)
78
79 /* Swizzle tools */
80 #define R500_SWIZZLE_ZERO 4
81 #define R500_SWIZZLE_HALF 5
82 #define R500_SWIZZLE_ONE 6
83 #define R500_SWIZ_RGB_ZERO ((4 << 0) | (4 << 3) | (4 << 6))
84 #define R500_SWIZ_RGB_ONE ((6 << 0) | (6 << 3) | (6 << 6))
85 #define R500_SWIZ_RGB_RGB ((0 << 0) | (1 << 3) | (2 << 6))
86 #define R500_SWIZ_MOD_NEG 1
87 #define R500_SWIZ_MOD_ABS 2
88 #define R500_SWIZ_MOD_NEG_ABS 3
89 /* Swizzles for inst2 */
90 #define MAKE_SWIZ_TEX_STRQ(x) (x << 8)
91 #define MAKE_SWIZ_TEX_RGBA(x) (x << 24)
92 /* Swizzles for inst3 */
93 #define MAKE_SWIZ_RGB_A(x) (x << 2)
94 #define MAKE_SWIZ_RGB_B(x) (x << 15)
95 /* Swizzles for inst4 */
96 #define MAKE_SWIZ_ALPHA_A(x) (x << 14)
97 #define MAKE_SWIZ_ALPHA_B(x) (x << 21)
98 /* Swizzle for inst5 */
99 #define MAKE_SWIZ_RGBA_C(x) (x << 14)
100 #define MAKE_SWIZ_ALPHA_C(x) (x << 27)
101
102 /* Writemasks */
103 #define R500_WRITEMASK_ARGB 0xF
104
105 /* 1/(2pi), needed for quick modulus in trig insts
106 * Thanks to glisse for pointing out how to do it! */
107 static const GLfloat RCP_2PI[] = {0.15915494309189535,
108 0.15915494309189535,
109 0.15915494309189535,
110 0.15915494309189535};
111
112 static void dump_program(struct r500_fragment_program *fp);
113
114 static inline GLuint make_rgb_swizzle(struct prog_src_register src) {
115 GLuint swiz = 0x0;
116 GLuint temp;
117 /* This could be optimized, but it should be plenty fast already. */
118 int i;
119 for (i = 0; i < 3; i++) {
120 temp = GET_SWZ(src.Swizzle, i);
121 /* Fix SWIZZLE_ONE */
122 if (temp == 5) temp++;
123 swiz |= temp << i*3;
124 }
125 if (src.NegateBase)
126 swiz |= (R500_SWIZ_MOD_NEG << 9);
127 return swiz;
128 }
129
130 static inline GLuint make_alpha_swizzle(struct prog_src_register src) {
131 GLuint swiz = GET_SWZ(src.Swizzle, 3);
132
133 if (swiz == 5) swiz++;
134
135 if (src.NegateBase)
136 swiz |= (R500_SWIZ_MOD_NEG << 3);
137
138 return swiz;
139 }
140
141 static inline GLuint make_sop_swizzle(struct prog_src_register src) {
142 GLuint swiz = GET_SWZ(src.Swizzle, 0);
143
144 if (swiz == 5) swiz++;
145 return swiz;
146 }
147
148 static inline GLuint make_strq_swizzle(struct prog_src_register src) {
149 GLuint swiz = 0x0, temp = 0x0;
150 int i;
151 for (i = 0; i < 4; i++) {
152 temp = GET_SWZ(src.Swizzle, i) & 0x3;
153 swiz |= temp << i*2;
154 }
155 return swiz;
156 }
157
158 static int get_temp(struct r500_fragment_program *fp, int slot) {
159
160 COMPILE_STATE;
161
162 int r = cs->temp_in_use + 1 + slot;
163
164 if (r > R500_US_NUM_TEMP_REGS) {
165 ERROR("Too many temporary registers requested, can't compile!\n");
166 }
167
168 return r;
169 }
170
171 /* Borrowed verbatim from r300_fragprog since it hasn't changed. */
172 static GLuint emit_const4fv(struct r500_fragment_program *fp,
173 const GLfloat * cp)
174 {
175 GLuint reg = 0x0;
176 int index;
177
178 for (index = 0; index < fp->const_nr; ++index) {
179 if (fp->constant[index] == cp)
180 break;
181 }
182
183 if (index >= fp->const_nr) {
184 if (index >= R500_US_NUM_CONST_REGS) {
185 ERROR("Out of hw constants!\n");
186 return reg;
187 }
188
189 fp->const_nr++;
190 fp->constant[index] = cp;
191 }
192
193 reg = index | REG_CONSTANT;
194 return reg;
195 }
196
197 static GLuint make_src(struct r500_fragment_program *fp, struct prog_src_register src) {
198 COMPILE_STATE;
199 GLuint reg;
200 switch (src.File) {
201 case PROGRAM_TEMPORARY:
202 reg = src.Index + fp->temp_reg_offset;
203 break;
204 case PROGRAM_INPUT:
205 reg = cs->inputs[src.Index].reg;
206 break;
207 case PROGRAM_LOCAL_PARAM:
208 reg = emit_const4fv(fp,
209 fp->mesa_program.Base.LocalParams[src.
210 Index]);
211 break;
212 case PROGRAM_ENV_PARAM:
213 reg = emit_const4fv(fp,
214 fp->ctx->FragmentProgram.Parameters[src.
215 Index]);
216 break;
217 case PROGRAM_STATE_VAR:
218 case PROGRAM_NAMED_PARAM:
219 case PROGRAM_CONSTANT:
220 reg = emit_const4fv(fp, fp->mesa_program.Base.Parameters->
221 ParameterValues[src.Index]);
222 break;
223 default:
224 ERROR("Can't handle src.File %x\n", src.File);
225 reg = 0x0;
226 break;
227 }
228 return reg;
229 }
230
231 static GLuint make_dest(struct r500_fragment_program *fp, struct prog_dst_register dest) {
232 GLuint reg;
233 switch (dest.File) {
234 case PROGRAM_TEMPORARY:
235 reg = dest.Index + fp->temp_reg_offset;
236 break;
237 case PROGRAM_OUTPUT:
238 /* Eventually we may need to handle multiple
239 * rendering targets... */
240 reg = dest.Index;
241 break;
242 default:
243 ERROR("Can't handle dest.File %x\n", dest.File);
244 reg = 0x0;
245 break;
246 }
247 return reg;
248 }
249
250 static void emit_tex(struct r500_fragment_program *fp,
251 struct prog_instruction *fpi, int dest, int counter)
252 {
253 int hwsrc, hwdest;
254 GLuint mask;
255
256 mask = fpi->DstReg.WriteMask << 11;
257 hwsrc = make_src(fp, fpi->SrcReg[0]);
258
259 if (fpi->DstReg.File == PROGRAM_OUTPUT) {
260 hwdest = get_temp(fp, 0);
261 } else {
262 hwdest = dest;
263 }
264
265 fp->inst[counter].inst0 = R500_INST_TYPE_TEX | mask
266 | R500_INST_TEX_SEM_WAIT;
267
268 fp->inst[counter].inst1 = R500_TEX_ID(fpi->TexSrcUnit)
269 | R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED;
270
271 if (fpi->TexSrcTarget == TEXTURE_RECT_INDEX)
272 fp->inst[counter].inst1 |= R500_TEX_UNSCALED;
273
274 switch (fpi->Opcode) {
275 case OPCODE_KIL:
276 fp->inst[counter].inst1 |= R500_TEX_INST_TEXKILL;
277 break;
278 case OPCODE_TEX:
279 fp->inst[counter].inst1 |= R500_TEX_INST_LD;
280 break;
281 case OPCODE_TXB:
282 fp->inst[counter].inst1 |= R500_TEX_INST_LODBIAS;
283 break;
284 case OPCODE_TXP:
285 fp->inst[counter].inst1 |= R500_TEX_INST_PROJ;
286 break;
287 default:
288 ERROR("emit_tex can't handle opcode %x\n", fpi->Opcode);
289 }
290
291 fp->inst[counter].inst2 = R500_TEX_SRC_ADDR(hwsrc)
292 | MAKE_SWIZ_TEX_STRQ(make_strq_swizzle(fpi->SrcReg[0]))
293 /* | R500_TEX_SRC_S_SWIZ_R | R500_TEX_SRC_T_SWIZ_G
294 | R500_TEX_SRC_R_SWIZ_B | R500_TEX_SRC_Q_SWIZ_A */
295 | R500_TEX_DST_ADDR(hwdest)
296 | R500_TEX_DST_R_SWIZ_R | R500_TEX_DST_G_SWIZ_G
297 | R500_TEX_DST_B_SWIZ_B | R500_TEX_DST_A_SWIZ_A;
298
299 fp->inst[counter].inst3 = 0x0;
300 fp->inst[counter].inst4 = 0x0;
301 fp->inst[counter].inst5 = 0x0;
302
303 if (fpi->DstReg.File == PROGRAM_OUTPUT) {
304 counter++;
305 fp->inst[counter].inst0 = R500_INST_TYPE_OUT
306 | R500_INST_TEX_SEM_WAIT | (mask << 4);
307 fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0));
308 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0));
309 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
310 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB)
311 | R500_ALU_RGB_SEL_B_SRC0
312 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB)
313 | R500_ALU_RGB_OMOD_DISABLE;
314 fp->inst[counter].inst4 = R500_ALPHA_OP_CMP
315 | R500_ALPHA_ADDRD(dest)
316 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_ALPHA_SWIZ_A_A)
317 | R500_ALPHA_SEL_B_SRC0 | MAKE_SWIZ_ALPHA_B(R500_ALPHA_SWIZ_A_A)
318 | R500_ALPHA_OMOD_DISABLE;
319 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_CMP
320 | R500_ALU_RGBA_ADDRD(dest)
321 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
322 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
323 }
324 }
325
326 static void emit_alu(struct r500_fragment_program *fp, int counter, struct prog_instruction *fpi) {
327 if (fpi->DstReg.File == PROGRAM_OUTPUT) {
328 fp->inst[counter].inst0 = R500_INST_TYPE_OUT;
329
330 if (fpi->DstReg.Index == FRAG_RESULT_COLR)
331 fp->inst[counter].inst0 |= (fpi->DstReg.WriteMask << 15);
332
333 if (fpi->DstReg.Index == FRAG_RESULT_DEPR)
334 fp->inst[counter].inst4 = R500_ALPHA_W_OMASK;
335 } else {
336 fp->inst[counter].inst0 = R500_INST_TYPE_ALU
337 /* pixel_mask */
338 | (fpi->DstReg.WriteMask << 11);
339 }
340
341 fp->inst[counter].inst0 |= R500_INST_TEX_SEM_WAIT;
342
343 /* Ideally, we shouldn't have to explicitly clear memory here! */
344 fp->inst[counter].inst1 = 0x0;
345 fp->inst[counter].inst2 = 0x0;
346 fp->inst[counter].inst3 = 0x0;
347 fp->inst[counter].inst5 = 0x0;
348 }
349
350 static void emit_mov(struct r500_fragment_program *fp, int counter, struct prog_src_register src, GLuint dest) {
351 /* The r3xx shader uses MAD to implement MOV. We are using CMP, since
352 * it is technically more accurate and recommended by ATI/AMD. */
353 GLuint src_reg = make_src(fp, src);
354 fp->inst[counter].inst1 = R500_RGB_ADDR0(src_reg);
355 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src_reg);
356 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
357 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(src))
358 | R500_ALU_RGB_SEL_B_SRC0
359 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(src))
360 | R500_ALU_RGB_OMOD_DISABLE;
361 fp->inst[counter].inst4 |= R500_ALPHA_OP_CMP
362 | R500_ALPHA_ADDRD(dest)
363 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(src))
364 | R500_ALPHA_SEL_B_SRC0 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(src))
365 | R500_ALPHA_OMOD_DISABLE;
366 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_CMP
367 | R500_ALU_RGBA_ADDRD(dest)
368 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
369 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
370 }
371
372 static void emit_mad(struct r500_fragment_program *fp, int counter, struct prog_instruction *fpi, int one, int two, int three) {
373 /* Note: This code was all Corbin's. Corbin is a rather hackish coder.
374 * If you can make it pretty or fast, please do so! */
375 emit_alu(fp, counter, fpi);
376 /* Common MAD stuff */
377 fp->inst[counter].inst4 |= R500_ALPHA_OP_MAD
378 | R500_ALPHA_ADDRD(make_dest(fp, fpi->DstReg));
379 fp->inst[counter].inst5 |= R500_ALU_RGBA_OP_MAD
380 | R500_ALU_RGBA_ADDRD(make_dest(fp, fpi->DstReg));
381 switch (one) {
382 case 0:
383 case 1:
384 case 2:
385 fp->inst[counter].inst1 |= R500_RGB_ADDR0(make_src(fp, fpi->SrcReg[one]));
386 fp->inst[counter].inst2 |= R500_ALPHA_ADDR0(make_src(fp, fpi->SrcReg[one]));
387 fp->inst[counter].inst3 |= R500_ALU_RGB_SEL_A_SRC0
388 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[one]));
389 fp->inst[counter].inst4 |= R500_ALPHA_SEL_A_SRC0
390 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[one]));
391 break;
392 case R500_SWIZZLE_ZERO:
393 fp->inst[counter].inst3 |= MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ZERO);
394 fp->inst[counter].inst4 |= MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ZERO);
395 break;
396 case R500_SWIZZLE_ONE:
397 fp->inst[counter].inst3 |= MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ONE);
398 fp->inst[counter].inst4 |= MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE);
399 break;
400 default:
401 ERROR("Bad src index in emit_mad: %d\n", one);
402 break;
403 }
404 switch (two) {
405 case 0:
406 case 1:
407 case 2:
408 fp->inst[counter].inst1 |= R500_RGB_ADDR1(make_src(fp, fpi->SrcReg[two]));
409 fp->inst[counter].inst2 |= R500_ALPHA_ADDR1(make_src(fp, fpi->SrcReg[two]));
410 fp->inst[counter].inst3 |= R500_ALU_RGB_SEL_B_SRC1
411 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[two]));
412 fp->inst[counter].inst4 |= R500_ALPHA_SEL_B_SRC1
413 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[two]));
414 break;
415 case R500_SWIZZLE_ZERO:
416 fp->inst[counter].inst3 |= MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ZERO);
417 fp->inst[counter].inst4 |= MAKE_SWIZ_ALPHA_B(R500_SWIZZLE_ZERO);
418 break;
419 case R500_SWIZZLE_ONE:
420 fp->inst[counter].inst3 |= MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ONE);
421 fp->inst[counter].inst4 |= MAKE_SWIZ_ALPHA_B(R500_SWIZZLE_ONE);
422 break;
423 default:
424 ERROR("Bad src index in emit_mad: %d\n", two);
425 break;
426 }
427 switch (three) {
428 case 0:
429 case 1:
430 case 2:
431 fp->inst[counter].inst1 |= R500_RGB_ADDR2(make_src(fp, fpi->SrcReg[three]));
432 fp->inst[counter].inst2 |= R500_ALPHA_ADDR2(make_src(fp, fpi->SrcReg[three]));
433 fp->inst[counter].inst5 |= R500_ALU_RGBA_SEL_C_SRC2
434 | MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi->SrcReg[three]))
435 | R500_ALU_RGBA_ALPHA_SEL_C_SRC2
436 | MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi->SrcReg[three]));
437 break;
438 case R500_SWIZZLE_ZERO:
439 fp->inst[counter].inst5 |= MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
440 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
441 break;
442 case R500_SWIZZLE_ONE:
443 fp->inst[counter].inst5 |= MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ONE)
444 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ONE);
445 break;
446 default:
447 ERROR("Bad src index in emit_mad: %d\n", three);
448 break;
449 }
450 }
451
452 static GLboolean parse_program(struct r500_fragment_program *fp)
453 {
454 struct gl_fragment_program *mp = &fp->mesa_program;
455 const struct prog_instruction *inst = mp->Base.Instructions;
456 struct prog_instruction *fpi;
457 GLuint src[3], dest = 0;
458 int temp_swiz, counter = 0;
459
460 if (!inst || inst[0].Opcode == OPCODE_END) {
461 ERROR("The program is empty!\n");
462 return GL_FALSE;
463 }
464
465 for (fpi = mp->Base.Instructions; fpi->Opcode != OPCODE_END; fpi++) {
466
467 if (fpi->Opcode != OPCODE_KIL) {
468 dest = make_dest(fp, fpi->DstReg);
469 }
470
471 switch (fpi->Opcode) {
472 case OPCODE_ABS:
473 emit_alu(fp, counter, fpi);
474 emit_mov(fp, counter, fpi->SrcReg[0], dest);
475 fp->inst[counter].inst3 |= R500_ALU_RGB_MOD_A_ABS
476 | R500_ALU_RGB_MOD_B_ABS;
477 fp->inst[counter].inst4 |= R500_ALPHA_MOD_A_ABS
478 | R500_ALPHA_MOD_B_ABS;
479 break;
480 case OPCODE_ADD:
481 /* Variation on MAD: 1*src0+src1 */
482 emit_mad(fp, counter, fpi, R500_SWIZZLE_ONE, 0, 1);
483 break;
484 case OPCODE_CMP:
485 /* This inst's selects need to be swapped as follows:
486 * 0 -> C ; 1 -> B ; 2 -> A */
487 src[0] = make_src(fp, fpi->SrcReg[0]);
488 src[1] = make_src(fp, fpi->SrcReg[1]);
489 src[2] = make_src(fp, fpi->SrcReg[2]);
490 emit_alu(fp, counter, fpi);
491 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[2])
492 | R500_RGB_ADDR1(src[1]) | R500_RGB_ADDR2(src[0]);
493 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[2])
494 | R500_ALPHA_ADDR1(src[1]) | R500_ALPHA_ADDR2(src[0]);
495 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
496 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[2]))
497 | R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
498 fp->inst[counter].inst4 |= R500_ALPHA_OP_CMP
499 | R500_ALPHA_ADDRD(dest)
500 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[2]))
501 | R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
502 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_CMP
503 | R500_ALU_RGBA_ADDRD(dest)
504 | R500_ALU_RGBA_SEL_C_SRC2
505 | MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi->SrcReg[0]))
506 | R500_ALU_RGBA_ALPHA_SEL_C_SRC2
507 | MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi->SrcReg[0]));
508 break;
509 case OPCODE_COS:
510 src[0] = make_src(fp, fpi->SrcReg[0]);
511 src[1] = emit_const4fv(fp, RCP_2PI);
512 fp->inst[counter].inst0 = R500_INST_TYPE_ALU | R500_INST_TEX_SEM_WAIT
513 | (R500_WRITEMASK_ARGB << 11);
514 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
515 | R500_RGB_ADDR1(src[1]);
516 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
517 | R500_ALPHA_ADDR1(src[1]);
518 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
519 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB)
520 | R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB);
521 fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
522 | R500_ALPHA_ADDRD(get_temp(fp, 0))
523 | R500_ALPHA_SEL_A_SRC0 | R500_ALPHA_SWIZ_A_A
524 | R500_ALPHA_SEL_B_SRC1 | R500_ALPHA_SWIZ_B_A;
525 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
526 | R500_ALU_RGBA_ADDRD(get_temp(fp, 0))
527 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
528 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
529 counter++;
530 fp->inst[counter].inst0 = R500_INST_TYPE_ALU | (R500_WRITEMASK_ARGB << 11);
531 fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0));
532 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0));
533 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
534 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB);
535 fp->inst[counter].inst4 = R500_ALPHA_OP_FRC
536 | R500_ALPHA_ADDRD(get_temp(fp, 1))
537 | R500_ALPHA_SEL_A_SRC0 | R500_ALPHA_SWIZ_A_A;
538 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_FRC
539 | R500_ALU_RGBA_ADDRD(get_temp(fp, 1));
540 counter++;
541 emit_alu(fp, counter, fpi);
542 fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 1));
543 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 1));
544 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0;
545 fp->inst[counter].inst4 |= R500_ALPHA_OP_COS
546 | R500_ALPHA_ADDRD(dest)
547 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi->SrcReg[0]));
548 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_SOP
549 | R500_ALU_RGBA_ADDRD(dest);
550 break;
551 case OPCODE_DP3:
552 src[0] = make_src(fp, fpi->SrcReg[0]);
553 src[1] = make_src(fp, fpi->SrcReg[1]);
554 emit_alu(fp, counter, fpi);
555 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
556 | R500_RGB_ADDR1(src[1]);
557 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
558 | R500_ALPHA_ADDR1(src[1]);
559 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
560 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
561 | R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
562 fp->inst[counter].inst4 |= R500_ALPHA_OP_DP
563 | R500_ALPHA_ADDRD(dest)
564 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
565 | R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
566 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_DP3
567 | R500_ALU_RGBA_ADDRD(dest);
568 break;
569 case OPCODE_DP4:
570 src[0] = make_src(fp, fpi->SrcReg[0]);
571 src[1] = make_src(fp, fpi->SrcReg[1]);
572 /* Based on DP3 */
573 emit_alu(fp, counter, fpi);
574 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
575 | R500_RGB_ADDR1(src[1]);
576 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
577 | R500_ALPHA_ADDR1(src[1]);
578 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
579 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
580 | R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
581 fp->inst[counter].inst4 |= R500_ALPHA_OP_DP
582 | R500_ALPHA_ADDRD(dest)
583 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
584 | R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
585 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_DP4
586 | R500_ALU_RGBA_ADDRD(dest);
587 break;
588 case OPCODE_DPH:
589 src[0] = make_src(fp, fpi->SrcReg[0]);
590 src[1] = make_src(fp, fpi->SrcReg[1]);
591 /* Based on DP3 */
592 emit_alu(fp, counter, fpi);
593 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
594 | R500_RGB_ADDR1(src[1]);
595 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
596 | R500_ALPHA_ADDR1(src[1]);
597 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
598 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
599 | R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
600 fp->inst[counter].inst4 |= R500_ALPHA_OP_DP
601 | R500_ALPHA_ADDRD(dest)
602 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE)
603 | R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
604 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_DP4
605 | R500_ALU_RGBA_ADDRD(dest);
606 break;
607 case OPCODE_DST:
608 src[0] = make_src(fp, fpi->SrcReg[0]);
609 src[1] = make_src(fp, fpi->SrcReg[1]);
610 /* [1, src0.y*src1.y, src0.z, src1.w]
611 * So basically MUL with lotsa swizzling. */
612 emit_alu(fp, counter, fpi);
613 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
614 | R500_RGB_ADDR1(src[1]);
615 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
616 | R500_ALPHA_ADDR1(src[1]);
617 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
618 | R500_ALU_RGB_SEL_B_SRC1;
619 /* Select [1, y, z, 1] */
620 temp_swiz = (make_rgb_swizzle(fpi->SrcReg[0]) & ~0x7) | R500_SWIZZLE_ONE;
621 fp->inst[counter].inst3 |= MAKE_SWIZ_RGB_A(temp_swiz);
622 /* Select [1, y, 1, w] */
623 temp_swiz = (make_rgb_swizzle(fpi->SrcReg[0]) & ~0x1c7) | R500_SWIZZLE_ONE | (R500_SWIZZLE_ONE << 6);
624 fp->inst[counter].inst3 |= MAKE_SWIZ_RGB_B(temp_swiz);
625 fp->inst[counter].inst4 |= R500_ALPHA_OP_MAD
626 | R500_ALPHA_ADDRD(dest)
627 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE)
628 | R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
629 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
630 | R500_ALU_RGBA_ADDRD(dest)
631 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
632 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
633 break;
634 case OPCODE_EX2:
635 src[0] = make_src(fp, fpi->SrcReg[0]);
636 emit_alu(fp, counter, fpi);
637 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]);
638 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]);
639 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
640 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]));
641 fp->inst[counter].inst4 |= R500_ALPHA_OP_EX2
642 | R500_ALPHA_ADDRD(dest)
643 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi->SrcReg[0]));
644 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_SOP
645 | R500_ALU_RGBA_ADDRD(dest);
646 break;
647 case OPCODE_FRC:
648 src[0] = make_src(fp, fpi->SrcReg[0]);
649 emit_alu(fp, counter, fpi);
650 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]);
651 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]);
652 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
653 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]));
654 fp->inst[counter].inst4 |= R500_ALPHA_OP_FRC
655 | R500_ALPHA_ADDRD(dest)
656 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]));
657 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_FRC
658 | R500_ALU_RGBA_ADDRD(dest);
659 break;
660 case OPCODE_LG2:
661 src[0] = make_src(fp, fpi->SrcReg[0]);
662 emit_alu(fp, counter, fpi);
663 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]);
664 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]);
665 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
666 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]));
667 fp->inst[counter].inst4 |= R500_ALPHA_OP_LN2
668 | R500_ALPHA_ADDRD(dest)
669 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi->SrcReg[0]));
670 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_SOP
671 | R500_ALU_RGBA_ADDRD(dest);
672 break;
673 case OPCODE_LRP:
674 /* src0 * src1 + INV(src0) * src2
675 * 1) MUL src0, src1, temp
676 * 2) PRE 1-src0; MAD srcp, src2, temp */
677 src[0] = make_src(fp, fpi->SrcReg[0]);
678 src[1] = make_src(fp, fpi->SrcReg[1]);
679 src[2] = make_src(fp, fpi->SrcReg[2]);
680 fp->inst[counter].inst0 = R500_INST_TYPE_ALU | R500_INST_TEX_SEM_WAIT
681 | R500_INST_NOP | (R500_WRITEMASK_ARGB << 11);
682 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
683 | R500_RGB_ADDR1(src[1]);
684 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
685 | R500_ALPHA_ADDR1(src[1]);
686 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
687 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
688 | R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
689 fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
690 | R500_ALPHA_ADDRD(get_temp(fp, 0))
691 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
692 | R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
693 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
694 | R500_ALU_RGBA_ADDRD(get_temp(fp, 0))
695 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
696 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
697 counter++;
698 emit_alu(fp, counter, fpi);
699 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
700 | R500_RGB_ADDR1(src[2])
701 | R500_RGB_ADDR2(get_temp(fp, 0))
702 | R500_RGB_SRCP_OP_1_MINUS_RGB0;
703 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
704 | R500_ALPHA_ADDR1(src[2])
705 | R500_ALPHA_ADDR2(get_temp(fp, 0))
706 | R500_ALPHA_SRCP_OP_1_MINUS_A0;
707 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRCP
708 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
709 | R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB);
710 fp->inst[counter].inst4 |= R500_ALPHA_OP_MAD
711 | R500_ALPHA_ADDRD(dest)
712 | R500_ALPHA_SEL_A_SRCP | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
713 | R500_ALPHA_SEL_B_SRC1 | R500_ALPHA_SWIZ_B_A;
714 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
715 | R500_ALU_RGBA_ADDRD(dest)
716 | R500_ALU_RGBA_SEL_C_SRC2 | MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi->SrcReg[2]))
717 | R500_ALU_RGBA_ALPHA_SEL_C_SRC2
718 | MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi->SrcReg[2]));
719 break;
720 case OPCODE_MAD:
721 emit_mad(fp, counter, fpi, 0, 1, 2);
722 break;
723 case OPCODE_MAX:
724 src[0] = make_src(fp, fpi->SrcReg[0]);
725 src[1] = make_src(fp, fpi->SrcReg[1]);
726 emit_alu(fp, counter, fpi);
727 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]) | R500_RGB_ADDR1(src[1]);
728 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]) | R500_ALPHA_ADDR1(src[1]);
729 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
730 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
731 | R500_ALU_RGB_SEL_B_SRC1
732 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
733 fp->inst[counter].inst4 |= R500_ALPHA_OP_MAX
734 | R500_ALPHA_ADDRD(dest)
735 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
736 | R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
737 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAX
738 | R500_ALU_RGBA_ADDRD(dest);
739 break;
740 case OPCODE_MIN:
741 src[0] = make_src(fp, fpi->SrcReg[0]);
742 src[1] = make_src(fp, fpi->SrcReg[1]);
743 emit_alu(fp, counter, fpi);
744 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]) | R500_RGB_ADDR1(src[1]);
745 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]) | R500_ALPHA_ADDR1(src[1]);
746 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
747 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
748 | R500_ALU_RGB_SEL_B_SRC1
749 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
750 fp->inst[counter].inst4 |= R500_ALPHA_OP_MIN
751 | R500_ALPHA_ADDRD(dest)
752 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
753 | R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
754 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MIN
755 | R500_ALU_RGBA_ADDRD(dest);
756 break;
757 case OPCODE_MOV:
758 emit_alu(fp, counter, fpi);
759 emit_mov(fp, counter, fpi->SrcReg[0], dest);
760 break;
761 case OPCODE_MUL:
762 /* Variation on MAD: src0*src1+0 */
763 emit_mad(fp, counter, fpi, 0, 1, R500_SWIZZLE_ZERO);
764 break;
765 case OPCODE_POW:
766 /* POW(a,b) = EX2(LN2(a)*b) */
767 src[0] = make_src(fp, fpi->SrcReg[0]);
768 src[1] = make_src(fp, fpi->SrcReg[1]);
769 fp->inst[counter].inst0 = R500_INST_TYPE_ALU | R500_INST_TEX_SEM_WAIT
770 | (R500_WRITEMASK_ARGB << 11);
771 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]);
772 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]);
773 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
774 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]));
775 fp->inst[counter].inst4 = R500_ALPHA_OP_LN2
776 | R500_ALPHA_ADDRD(get_temp(fp, 0))
777 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi->SrcReg[0]));
778 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_SOP
779 | R500_ALU_RGBA_ADDRD(get_temp(fp, 0));
780 counter++;
781 fp->inst[counter].inst0 = R500_INST_TYPE_ALU | (R500_WRITEMASK_ARGB << 11);
782 fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0))
783 | R500_RGB_ADDR1(src[1]);
784 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0))
785 | R500_ALPHA_ADDR1(src[1]);
786 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
787 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]))
788 | R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[1]));
789 fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
790 | R500_ALPHA_ADDRD(get_temp(fp, 1))
791 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi->SrcReg[0]))
792 | R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[1]));
793 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
794 | R500_ALU_RGBA_ADDRD(get_temp(fp, 1))
795 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
796 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
797 counter++;
798 emit_alu(fp, counter, fpi);
799 fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 1));
800 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 1));
801 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
802 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]));
803 fp->inst[counter].inst4 |= R500_ALPHA_OP_EX2
804 | R500_ALPHA_ADDRD(dest)
805 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi->SrcReg[0]));
806 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_SOP
807 | R500_ALU_RGBA_ADDRD(dest);
808 break;
809 case OPCODE_RCP:
810 src[0] = make_src(fp, fpi->SrcReg[0]);
811 emit_alu(fp, counter, fpi);
812 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]);
813 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]);
814 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
815 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]));
816 fp->inst[counter].inst4 |= R500_ALPHA_OP_RCP
817 | R500_ALPHA_ADDRD(dest)
818 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi->SrcReg[0]));
819 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_SOP
820 | R500_ALU_RGBA_ADDRD(dest);
821 break;
822 case OPCODE_RSQ:
823 src[0] = make_src(fp, fpi->SrcReg[0]);
824 emit_alu(fp, counter, fpi);
825 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0]);
826 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0]);
827 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
828 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]));
829 fp->inst[counter].inst4 |= R500_ALPHA_OP_RSQ
830 | R500_ALPHA_ADDRD(dest)
831 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi->SrcReg[0]));
832 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_SOP
833 | R500_ALU_RGBA_ADDRD(dest);
834 break;
835 case OPCODE_SCS:
836 src[0] = make_src(fp, fpi->SrcReg[0]);
837 src[1] = emit_const4fv(fp, RCP_2PI);
838 fp->inst[counter].inst0 = R500_INST_TYPE_ALU | R500_INST_TEX_SEM_WAIT
839 | (R500_WRITEMASK_ARGB << 11);
840 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
841 | R500_RGB_ADDR1(src[1]);
842 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
843 | R500_ALPHA_ADDR1(src[1]);
844 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
845 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB)
846 | R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB);
847 fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
848 | R500_ALPHA_ADDRD(get_temp(fp, 0))
849 | R500_ALPHA_SEL_A_SRC0 | R500_ALPHA_SWIZ_A_A
850 | R500_ALPHA_SEL_B_SRC1 | R500_ALPHA_SWIZ_B_A;
851 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
852 | R500_ALU_RGBA_ADDRD(get_temp(fp, 0))
853 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
854 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
855 counter++;
856 fp->inst[counter].inst0 = R500_INST_TYPE_ALU | (R500_WRITEMASK_ARGB << 11);
857 fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0));
858 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0));
859 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
860 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB);
861 fp->inst[counter].inst4 = R500_ALPHA_OP_FRC
862 | R500_ALPHA_ADDRD(get_temp(fp, 1))
863 | R500_ALPHA_SEL_A_SRC0 | R500_ALPHA_SWIZ_A_A;
864 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_FRC
865 | R500_ALU_RGBA_ADDRD(get_temp(fp, 1));
866 counter++;
867 /* Do a cosine, then a sine, masking out the channels we want to protect. */
868 /* Cosine only goes in R (x) channel. */
869 fpi->DstReg.WriteMask = 0x1;
870 emit_alu(fp, counter, fpi);
871 fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 1));
872 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 1));
873 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
874 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]));
875 fp->inst[counter].inst4 |= R500_ALPHA_OP_COS
876 | R500_ALPHA_ADDRD(dest)
877 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi->SrcReg[0]));
878 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_SOP
879 | R500_ALU_RGBA_ADDRD(dest);
880 counter++;
881 /* Sine only goes in G (y) channel. */
882 fpi->DstReg.WriteMask = 0x2;
883 emit_alu(fp, counter, fpi);
884 fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 1));
885 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 1));
886 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
887 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi->SrcReg[0]));
888 fp->inst[counter].inst4 |= R500_ALPHA_OP_SIN
889 | R500_ALPHA_ADDRD(dest)
890 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi->SrcReg[0]));
891 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_SOP
892 | R500_ALU_RGBA_ADDRD(dest);
893 break;
894 case OPCODE_SGE:
895 src[0] = make_src(fp, fpi->SrcReg[0]);
896 src[1] = make_src(fp, fpi->SrcReg[1]);
897 fp->inst[counter].inst0 = R500_INST_TYPE_ALU | R500_INST_TEX_SEM_WAIT
898 | (R500_WRITEMASK_ARGB << 11);
899 fp->inst[counter].inst1 = R500_RGB_ADDR1(src[0])
900 | R500_RGB_ADDR2(src[1]);
901 fp->inst[counter].inst2 = R500_ALPHA_ADDR1(src[0])
902 | R500_ALPHA_ADDR2(src[1]);
903 fp->inst[counter].inst3 = /* 1 */
904 MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ONE)
905 | R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[0]));
906 fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
907 | R500_ALPHA_ADDRD(get_temp(fp, 0))
908 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE)
909 | R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[0]));
910 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
911 | R500_ALU_RGBA_ADDRD(get_temp(fp, 0))
912 | R500_ALU_RGBA_SEL_C_SRC2
913 | MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi->SrcReg[1]))
914 | R500_ALU_RGBA_MOD_C_NEG
915 | R500_ALU_RGBA_ALPHA_SEL_C_SRC2
916 | MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi->SrcReg[1]))
917 | R500_ALU_RGBA_ALPHA_MOD_C_NEG;
918 counter++;
919 /* This inst's selects need to be swapped as follows:
920 * 0 -> C ; 1 -> B ; 2 -> A */
921 emit_alu(fp, counter, fpi);
922 fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0));
923 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0));
924 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
925 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ONE)
926 | R500_ALU_RGB_SEL_B_SRC0
927 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ZERO);
928 fp->inst[counter].inst4 |= R500_ALPHA_OP_CMP
929 | R500_ALPHA_ADDRD(dest)
930 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE)
931 | R500_ALPHA_SEL_B_SRC0 | MAKE_SWIZ_ALPHA_B(R500_SWIZZLE_ZERO);
932 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_CMP
933 | R500_ALU_RGBA_ADDRD(dest)
934 | R500_ALU_RGBA_SEL_C_SRC0
935 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_RGB)
936 | R500_ALU_RGBA_ALPHA_SEL_C_SRC0
937 | R500_ALU_RGBA_A_SWIZ_A;
938 break;
939 case OPCODE_SIN:
940 src[0] = make_src(fp, fpi->SrcReg[0]);
941 src[1] = emit_const4fv(fp, RCP_2PI);
942 fp->inst[counter].inst0 = R500_INST_TYPE_ALU | R500_INST_TEX_SEM_WAIT
943 | (R500_WRITEMASK_ARGB << 11);
944 fp->inst[counter].inst1 = R500_RGB_ADDR0(src[0])
945 | R500_RGB_ADDR1(src[1]);
946 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(src[0])
947 | R500_ALPHA_ADDR1(src[1]);
948 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
949 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB)
950 | R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB);
951 fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
952 | R500_ALPHA_ADDRD(get_temp(fp, 0))
953 | R500_ALPHA_SEL_A_SRC0 | R500_ALPHA_SWIZ_A_A
954 | R500_ALPHA_SEL_B_SRC1 | R500_ALPHA_SWIZ_B_A;
955 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
956 | R500_ALU_RGBA_ADDRD(get_temp(fp, 0))
957 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO)
958 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO);
959 counter++;
960 fp->inst[counter].inst0 = R500_INST_TYPE_ALU | (R500_WRITEMASK_ARGB << 11);
961 fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0));
962 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0));
963 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
964 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB);
965 fp->inst[counter].inst4 = R500_ALPHA_OP_FRC
966 | R500_ALPHA_ADDRD(get_temp(fp, 1))
967 | R500_ALPHA_SEL_A_SRC0 | R500_ALPHA_SWIZ_A_A;
968 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_FRC
969 | R500_ALU_RGBA_ADDRD(get_temp(fp, 1));
970 counter++;
971 emit_alu(fp, counter, fpi);
972 fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 1));
973 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 1));
974 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0;
975 fp->inst[counter].inst4 |= R500_ALPHA_OP_SIN
976 | R500_ALPHA_ADDRD(dest)
977 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi->SrcReg[0]));
978 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_SOP
979 | R500_ALU_RGBA_ADDRD(dest);
980 break;
981 case OPCODE_SLT:
982 src[0] = make_src(fp, fpi->SrcReg[0]);
983 src[1] = make_src(fp, fpi->SrcReg[1]);
984 fp->inst[counter].inst0 = R500_INST_TYPE_ALU | R500_INST_TEX_SEM_WAIT
985 | (R500_WRITEMASK_ARGB << 11);
986 fp->inst[counter].inst1 = R500_RGB_ADDR1(src[0])
987 | R500_RGB_ADDR2(src[1]);
988 fp->inst[counter].inst2 = R500_ALPHA_ADDR1(src[0])
989 | R500_ALPHA_ADDR2(src[1]);
990 fp->inst[counter].inst3 = /* 1 */
991 MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ONE)
992 | R500_ALU_RGB_SEL_B_SRC1 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi->SrcReg[0]));
993 fp->inst[counter].inst4 = R500_ALPHA_OP_MAD
994 | R500_ALPHA_ADDRD(get_temp(fp, 0))
995 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE)
996 | R500_ALPHA_SEL_B_SRC1 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi->SrcReg[0]));
997 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_MAD
998 | R500_ALU_RGBA_ADDRD(get_temp(fp, 0))
999 | R500_ALU_RGBA_SEL_C_SRC2
1000 | MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi->SrcReg[1]))
1001 | R500_ALU_RGBA_MOD_C_NEG
1002 | R500_ALU_RGBA_ALPHA_SEL_C_SRC2
1003 | MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi->SrcReg[1]))
1004 | R500_ALU_RGBA_ALPHA_MOD_C_NEG;
1005 counter++;
1006 /* This inst's selects need to be swapped as follows:
1007 * 0 -> C ; 1 -> B ; 2 -> A */
1008 emit_alu(fp, counter, fpi);
1009 fp->inst[counter].inst1 = R500_RGB_ADDR0(get_temp(fp, 0));
1010 fp->inst[counter].inst2 = R500_ALPHA_ADDR0(get_temp(fp, 0));
1011 fp->inst[counter].inst3 = R500_ALU_RGB_SEL_A_SRC0
1012 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ZERO)
1013 | R500_ALU_RGB_SEL_B_SRC0
1014 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ONE);
1015 fp->inst[counter].inst4 |= R500_ALPHA_OP_CMP
1016 | R500_ALPHA_ADDRD(dest)
1017 | R500_ALPHA_SEL_A_SRC0 | MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ZERO)
1018 | R500_ALPHA_SEL_B_SRC0 | MAKE_SWIZ_ALPHA_B(R500_SWIZZLE_ONE);
1019 fp->inst[counter].inst5 = R500_ALU_RGBA_OP_CMP
1020 | R500_ALU_RGBA_ADDRD(dest)
1021 | R500_ALU_RGBA_SEL_C_SRC0
1022 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_RGB)
1023 | R500_ALU_RGBA_ALPHA_SEL_C_SRC0
1024 | R500_ALU_RGBA_A_SWIZ_A;
1025 break;
1026 case OPCODE_SUB:
1027 /* Variation on MAD: 1*src0-src1 */
1028 fpi->SrcReg[1].NegateBase = 0xF; /* NEG_XYZW */
1029 emit_mad(fp, counter, fpi, R500_SWIZZLE_ONE, 0, 1);
1030 break;
1031 case OPCODE_SWZ:
1032 /* TODO: The rarer negation masks! */
1033 emit_alu(fp, counter, fpi);
1034 emit_mov(fp, counter, fpi->SrcReg[0], dest);
1035 break;
1036 case OPCODE_KIL:
1037 case OPCODE_TEX:
1038 case OPCODE_TXB:
1039 case OPCODE_TXP:
1040 emit_tex(fp, fpi, dest, counter);
1041 if (fpi->DstReg.File == PROGRAM_OUTPUT)
1042 counter++;
1043 break;
1044 default:
1045 ERROR("unknown fpi->Opcode %s\n", _mesa_opcode_string(fpi->Opcode));
1046 break;
1047 }
1048
1049 /* Finishing touches */
1050 if (fpi->SaturateMode == SATURATE_ZERO_ONE) {
1051 fp->inst[counter].inst0 |= R500_INST_RGB_CLAMP | R500_INST_ALPHA_CLAMP;
1052 }
1053
1054 counter++;
1055
1056 if (fp->error)
1057 return GL_FALSE;
1058
1059 }
1060
1061 /* Finish him! (If it's an ALU/OUT instruction...) */
1062 if ((fp->inst[counter-1].inst0 & 0x3) == 1) {
1063 fp->inst[counter-1].inst0 |= R500_INST_LAST;
1064 } else {
1065 /* We still need to put an output inst, right? */
1066 WARN_ONCE("Final FP instruction is not an OUT.\n");
1067 }
1068
1069 fp->cs->nrslots = counter;
1070
1071 fp->max_temp_idx++;
1072
1073 return GL_TRUE;
1074 }
1075
1076 static void init_program(r300ContextPtr r300, struct r500_fragment_program *fp)
1077 {
1078 struct r300_pfs_compile_state *cs = NULL;
1079 struct gl_fragment_program *mp = &fp->mesa_program;
1080 struct prog_instruction *fpi;
1081 GLuint InputsRead = mp->Base.InputsRead;
1082 GLuint temps_used = 0;
1083 int i, j;
1084
1085 /* New compile, reset tracking data */
1086 fp->optimization =
1087 driQueryOptioni(&r300->radeon.optionCache, "fp_optimization");
1088 fp->translated = GL_FALSE;
1089 fp->error = GL_FALSE;
1090 fp->cs = cs = &(R300_CONTEXT(fp->ctx)->state.pfs_compile);
1091 fp->cur_node = 0;
1092 fp->first_node_has_tex = 0;
1093 fp->const_nr = 0;
1094 /* Size of pixel stack, plus 1. */
1095 fp->max_temp_idx = 1;
1096 /* Temp register offset. */
1097 fp->temp_reg_offset = 0;
1098 fp->node[0].alu_end = -1;
1099 fp->node[0].tex_end = -1;
1100
1101 _mesa_memset(cs, 0, sizeof(*fp->cs));
1102 for (i = 0; i < PFS_MAX_ALU_INST; i++) {
1103 for (j = 0; j < 3; j++) {
1104 cs->slot[i].vsrc[j] = SRC_CONST;
1105 cs->slot[i].ssrc[j] = SRC_CONST;
1106 }
1107 }
1108
1109 /* Work out what temps the Mesa inputs correspond to, this must match
1110 * what setup_rs_unit does, which shouldn't be a problem as rs_unit
1111 * configures itself based on the fragprog's InputsRead
1112 *
1113 * NOTE: this depends on get_hw_temp() allocating registers in order,
1114 * starting from register 0, so we're just going to do that instead.
1115 */
1116
1117 /* Texcoords come first */
1118 for (i = 0; i < fp->ctx->Const.MaxTextureUnits; i++) {
1119 if (InputsRead & (FRAG_BIT_TEX0 << i)) {
1120 cs->inputs[FRAG_ATTRIB_TEX0 + i].refcount = 0;
1121 cs->inputs[FRAG_ATTRIB_TEX0 + i].reg =
1122 fp->temp_reg_offset;
1123 fp->temp_reg_offset++;
1124 }
1125 }
1126 InputsRead &= ~FRAG_BITS_TEX_ANY;
1127
1128 /* fragment position treated as a texcoord */
1129 if (InputsRead & FRAG_BIT_WPOS) {
1130 cs->inputs[FRAG_ATTRIB_WPOS].refcount = 0;
1131 cs->inputs[FRAG_ATTRIB_WPOS].reg =
1132 fp->temp_reg_offset;
1133 fp->temp_reg_offset++;
1134 }
1135 InputsRead &= ~FRAG_BIT_WPOS;
1136
1137 /* Then primary colour */
1138 if (InputsRead & FRAG_BIT_COL0) {
1139 cs->inputs[FRAG_ATTRIB_COL0].refcount = 0;
1140 cs->inputs[FRAG_ATTRIB_COL0].reg =
1141 fp->temp_reg_offset;
1142 fp->temp_reg_offset++;
1143 }
1144 InputsRead &= ~FRAG_BIT_COL0;
1145
1146 /* Secondary color */
1147 if (InputsRead & FRAG_BIT_COL1) {
1148 cs->inputs[FRAG_ATTRIB_COL1].refcount = 0;
1149 cs->inputs[FRAG_ATTRIB_COL1].reg =
1150 fp->temp_reg_offset;
1151 fp->temp_reg_offset++;
1152 }
1153 InputsRead &= ~FRAG_BIT_COL1;
1154
1155 /* Anything else */
1156 if (InputsRead) {
1157 WARN_ONCE("Don't know how to handle inputs 0x%x\n", InputsRead);
1158 /* force read from hwreg 0 for now */
1159 for (i = 0; i < 32; i++)
1160 if (InputsRead & (1 << i))
1161 cs->inputs[i].reg = 0;
1162 }
1163
1164 if (!mp->Base.Instructions) {
1165 ERROR("No instructions found in program, going to go die now.\n");
1166 return;
1167 }
1168
1169 for (fpi = mp->Base.Instructions; fpi->Opcode != OPCODE_END; fpi++) {
1170 for (i = 0; i < 3; i++) {
1171 if (fpi->SrcReg[i].File == PROGRAM_TEMPORARY) {
1172 if (fpi->SrcReg[i].Index > temps_used)
1173 temps_used = fpi->SrcReg[i].Index;
1174 }
1175 }
1176 }
1177
1178 cs->temp_in_use = temps_used;
1179
1180 fp->max_temp_idx = fp->temp_reg_offset + cs->temp_in_use + 1;
1181 }
1182
1183 static void update_params(struct r500_fragment_program *fp)
1184 {
1185 struct gl_fragment_program *mp = &fp->mesa_program;
1186
1187 /* Ask Mesa nicely to fill in ParameterValues for us */
1188 if (mp->Base.Parameters)
1189 _mesa_load_state_parameters(fp->ctx, mp->Base.Parameters);
1190 }
1191
1192 static void dumb_shader(struct r500_fragment_program *fp)
1193 {
1194 fp->inst[0].inst0 = R500_INST_TYPE_TEX
1195 | R500_INST_TEX_SEM_WAIT
1196 | R500_INST_RGB_WMASK_R
1197 | R500_INST_RGB_WMASK_G
1198 | R500_INST_RGB_WMASK_B
1199 | R500_INST_ALPHA_WMASK
1200 | R500_INST_RGB_CLAMP
1201 | R500_INST_ALPHA_CLAMP;
1202 fp->inst[0].inst1 = R500_TEX_ID(0)
1203 | R500_TEX_INST_LD
1204 | R500_TEX_SEM_ACQUIRE
1205 | R500_TEX_IGNORE_UNCOVERED;
1206 fp->inst[0].inst2 = R500_TEX_SRC_ADDR(0)
1207 | R500_TEX_SRC_S_SWIZ_R
1208 | R500_TEX_SRC_T_SWIZ_G
1209 | R500_TEX_DST_ADDR(0)
1210 | R500_TEX_DST_R_SWIZ_R
1211 | R500_TEX_DST_G_SWIZ_G
1212 | R500_TEX_DST_B_SWIZ_B
1213 | R500_TEX_DST_A_SWIZ_A;
1214 fp->inst[0].inst3 = R500_DX_ADDR(0)
1215 | R500_DX_S_SWIZ_R
1216 | R500_DX_T_SWIZ_R
1217 | R500_DX_R_SWIZ_R
1218 | R500_DX_Q_SWIZ_R
1219 | R500_DY_ADDR(0)
1220 | R500_DY_S_SWIZ_R
1221 | R500_DY_T_SWIZ_R
1222 | R500_DY_R_SWIZ_R
1223 | R500_DY_Q_SWIZ_R;
1224 fp->inst[0].inst4 = 0x0;
1225 fp->inst[0].inst5 = 0x0;
1226
1227 fp->inst[1].inst0 = R500_INST_TYPE_OUT |
1228 R500_INST_TEX_SEM_WAIT |
1229 R500_INST_LAST |
1230 R500_INST_RGB_OMASK_R |
1231 R500_INST_RGB_OMASK_G |
1232 R500_INST_RGB_OMASK_B |
1233 R500_INST_ALPHA_OMASK;
1234 fp->inst[1].inst1 = R500_RGB_ADDR0(0) |
1235 R500_RGB_ADDR1(0) |
1236 R500_RGB_ADDR1_CONST |
1237 R500_RGB_ADDR2(0) |
1238 R500_RGB_ADDR2_CONST |
1239 R500_RGB_SRCP_OP_1_MINUS_2RGB0;
1240 fp->inst[1].inst2 = R500_ALPHA_ADDR0(0) |
1241 R500_ALPHA_ADDR1(0) |
1242 R500_ALPHA_ADDR1_CONST |
1243 R500_ALPHA_ADDR2(0) |
1244 R500_ALPHA_ADDR2_CONST |
1245 R500_ALPHA_SRCP_OP_1_MINUS_2A0;
1246 fp->inst[1].inst3 = R500_ALU_RGB_SEL_A_SRC0 |
1247 R500_ALU_RGB_R_SWIZ_A_R |
1248 R500_ALU_RGB_G_SWIZ_A_G |
1249 R500_ALU_RGB_B_SWIZ_A_B |
1250 R500_ALU_RGB_SEL_B_SRC0 |
1251 R500_ALU_RGB_R_SWIZ_B_1 |
1252 R500_ALU_RGB_B_SWIZ_B_1 |
1253 R500_ALU_RGB_G_SWIZ_B_1;
1254 fp->inst[1].inst4 = R500_ALPHA_OP_MAD |
1255 R500_ALPHA_SWIZ_A_A |
1256 R500_ALPHA_SWIZ_B_1;
1257 fp->inst[1].inst5 = R500_ALU_RGBA_OP_MAD |
1258 R500_ALU_RGBA_R_SWIZ_0 |
1259 R500_ALU_RGBA_G_SWIZ_0 |
1260 R500_ALU_RGBA_B_SWIZ_0 |
1261 R500_ALU_RGBA_A_SWIZ_0;
1262
1263 fp->cs->nrslots = 2;
1264 fp->translated = GL_TRUE;
1265 }
1266
1267 void r500TranslateFragmentShader(r300ContextPtr r300,
1268 struct r500_fragment_program *fp)
1269 {
1270
1271 struct r300_pfs_compile_state *cs = NULL;
1272
1273 if (!fp->translated) {
1274
1275 init_program(r300, fp);
1276 cs = fp->cs;
1277
1278 if (parse_program(fp) == GL_FALSE) {
1279 ERROR("Huh. Couldn't parse program. There should be additional errors explaining why.\nUsing dumb shader...\n");
1280 dumb_shader(fp);
1281 fp->inst_offset = 0;
1282 fp->inst_end = cs->nrslots - 1;
1283 return;
1284 }
1285 fp->inst_offset = 0;
1286 fp->inst_end = cs->nrslots - 1;
1287
1288 fp->translated = GL_TRUE;
1289 if (RADEON_DEBUG & DEBUG_PIXEL) {
1290 fprintf(stderr, "Mesa program:\n");
1291 fprintf(stderr, "-------------\n");
1292 _mesa_print_program(&fp->mesa_program.Base);
1293 fflush(stdout);
1294 dump_program(fp);
1295 }
1296
1297
1298 r300UpdateStateParameters(fp->ctx, _NEW_PROGRAM);
1299 }
1300
1301 update_params(fp);
1302
1303 }
1304
1305 static char *toswiz(int swiz_val) {
1306 switch(swiz_val) {
1307 case 0: return "R";
1308 case 1: return "G";
1309 case 2: return "B";
1310 case 3: return "A";
1311 case 4: return "0";
1312 case 5: return "1/2";
1313 case 6: return "1";
1314 case 7: return "U";
1315 }
1316 return NULL;
1317 }
1318
1319 static char *toop(int op_val)
1320 {
1321 char *str;
1322 switch (op_val) {
1323 case 0: str = "MAD"; break;
1324 case 1: str = "DP3"; break;
1325 case 2: str = "DP4"; break;
1326 case 3: str = "D2A"; break;
1327 case 4: str = "MIN"; break;
1328 case 5: str = "MAX"; break;
1329 case 6: str = "Reserved"; break;
1330 case 7: str = "CND"; break;
1331 case 8: str = "CMP"; break;
1332 case 9: str = "FRC"; break;
1333 case 10: str = "SOP"; break;
1334 case 11: str = "MDH"; break;
1335 case 12: str = "MDV"; break;
1336 }
1337 return str;
1338 }
1339
1340 static char *to_alpha_op(int op_val)
1341 {
1342 char *str = NULL;
1343 switch (op_val) {
1344 case 0: str = "MAD"; break;
1345 case 1: str = "DP"; break;
1346 case 2: str = "MIN"; break;
1347 case 3: str = "MAX"; break;
1348 case 4: str = "Reserved"; break;
1349 case 5: str = "CND"; break;
1350 case 6: str = "CMP"; break;
1351 case 7: str = "FRC"; break;
1352 case 8: str = "EX2"; break;
1353 case 9: str = "LN2"; break;
1354 case 10: str = "RCP"; break;
1355 case 11: str = "RSQ"; break;
1356 case 12: str = "SIN"; break;
1357 case 13: str = "COS"; break;
1358 case 14: str = "MDH"; break;
1359 case 15: str = "MDV"; break;
1360 }
1361 return str;
1362 }
1363
1364 static char *to_mask(int val)
1365 {
1366 char *str = NULL;
1367 switch(val) {
1368 case 0: str = "NONE"; break;
1369 case 1: str = "R"; break;
1370 case 2: str = "G"; break;
1371 case 3: str = "RG"; break;
1372 case 4: str = "B"; break;
1373 case 5: str = "RB"; break;
1374 case 6: str = "GB"; break;
1375 case 7: str = "RGB"; break;
1376 case 8: str = "A"; break;
1377 case 9: str = "AR"; break;
1378 case 10: str = "AG"; break;
1379 case 11: str = "ARG"; break;
1380 case 12: str = "AB"; break;
1381 case 13: str = "ARB"; break;
1382 case 14: str = "AGB"; break;
1383 case 15: str = "ARGB"; break;
1384 }
1385 return str;
1386 }
1387
1388 static char *to_texop(int val)
1389 {
1390 switch(val) {
1391 case 0: return "NOP";
1392 case 1: return "LD";
1393 case 2: return "TEXKILL";
1394 case 3: return "PROJ";
1395 case 4: return "LODBIAS";
1396 case 5: return "LOD";
1397 case 6: return "DXDY";
1398 }
1399 return NULL;
1400 }
1401
1402 static void dump_program(struct r500_fragment_program *fp)
1403 {
1404 int pc = 0;
1405 int n;
1406 uint32_t inst;
1407 uint32_t inst0;
1408 char *str = NULL;
1409
1410 for (n = 0; n < fp->inst_end+1; n++) {
1411 inst0 = inst = fp->inst[n].inst0;
1412 fprintf(stderr,"%d\t0:CMN_INST 0x%08x:", n, inst);
1413 switch(inst & 0x3) {
1414 case R500_INST_TYPE_ALU: str = "ALU"; break;
1415 case R500_INST_TYPE_OUT: str = "OUT"; break;
1416 case R500_INST_TYPE_FC: str = "FC"; break;
1417 case R500_INST_TYPE_TEX: str = "TEX"; break;
1418 };
1419 fprintf(stderr,"%s %s %s %s %s ", str,
1420 inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "",
1421 inst & R500_INST_LAST ? "LAST" : "",
1422 inst & R500_INST_NOP ? "NOP" : "",
1423 inst & R500_INST_ALU_WAIT ? "ALU WAIT" : "");
1424 fprintf(stderr,"wmask: %s omask: %s\n", to_mask((inst >> 11) & 0xf),
1425 to_mask((inst >> 15) & 0xf));
1426
1427 switch(inst0 & 0x3) {
1428 case 0:
1429 case 1:
1430 fprintf(stderr,"\t1:RGB_ADDR 0x%08x:", fp->inst[n].inst1);
1431 inst = fp->inst[n].inst1;
1432
1433 fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
1434 inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
1435 (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
1436 (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
1437 (inst >> 30));
1438
1439 fprintf(stderr,"\t2:ALPHA_ADDR 0x%08x:", fp->inst[n].inst2);
1440 inst = fp->inst[n].inst2;
1441 fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
1442 inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
1443 (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
1444 (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
1445 (inst >> 30));
1446 fprintf(stderr,"\t3 RGB_INST: 0x%08x:", fp->inst[n].inst3);
1447 inst = fp->inst[n].inst3;
1448 fprintf(stderr,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d\n",
1449 (inst) & 0x3, toswiz((inst >> 2) & 0x7), toswiz((inst >> 5) & 0x7), toswiz((inst >> 8) & 0x7),
1450 (inst >> 11) & 0x3,
1451 (inst >> 13) & 0x3, toswiz((inst >> 15) & 0x7), toswiz((inst >> 18) & 0x7), toswiz((inst >> 21) & 0x7),
1452 (inst >> 24) & 0x3);
1453
1454
1455 fprintf(stderr,"\t4 ALPHA_INST:0x%08x:", fp->inst[n].inst4);
1456 inst = fp->inst[n].inst4;
1457 fprintf(stderr,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d w:%d\n", to_alpha_op(inst & 0xf),
1458 (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
1459 (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), (inst >> 17) & 0x3,
1460 (inst >> 19) & 0x3, toswiz((inst >> 21) & 0x7), (inst >> 24) & 0x3,
1461 (inst >> 31) & 0x1);
1462
1463 fprintf(stderr,"\t5 RGBA_INST: 0x%08x:", fp->inst[n].inst5);
1464 inst = fp->inst[n].inst5;
1465 fprintf(stderr,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst & 0xf),
1466 (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
1467 (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), toswiz((inst >> 17) & 0x7), toswiz((inst >> 20) & 0x7),
1468 (inst >> 23) & 0x3,
1469 (inst >> 25) & 0x3, toswiz((inst >> 27) & 0x7), (inst >> 30) & 0x3);
1470 break;
1471 case 2:
1472 break;
1473 case 3:
1474 inst = fp->inst[n].inst1;
1475 fprintf(stderr,"\t1:TEX_INST: 0x%08x: id: %d op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf,
1476 to_texop((inst >> 22) & 0x7), (inst & (1<<25)) ? "ACQ" : "",
1477 (inst & (1<<26)) ? "IGNUNC" : "", (inst & (1<<27)) ? "UNSCALED" : "SCALED");
1478 inst = fp->inst[n].inst2;
1479 fprintf(stderr,"\t2:TEX_ADDR: 0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst,
1480 inst & 127, inst & (1<<7) ? "(rel)" : "",
1481 toswiz((inst >> 8) & 0x3), toswiz((inst >> 10) & 0x3),
1482 toswiz((inst >> 12) & 0x3), toswiz((inst >> 14) & 0x3),
1483 (inst >> 16) & 127, inst & (1<<23) ? "(rel)" : "",
1484 toswiz((inst >> 24) & 0x3), toswiz((inst >> 26) & 0x3),
1485 toswiz((inst >> 28) & 0x3), toswiz((inst >> 30) & 0x3));
1486
1487 fprintf(stderr,"\t3:TEX_DXDY: 0x%08x\n", fp->inst[n].inst3);
1488 break;
1489 }
1490 fprintf(stderr,"\n");
1491 }
1492
1493 }