src/mesa/drivers/dri/r300/r500_fragprog.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sublicense, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial
  16  * portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  */
  27
  28 #include "r500_fragprog.h"
  29
  30 static void reset_srcreg(struct prog_src_register* reg)
  31 {
  32         _mesa_bzero(reg, sizeof(*reg));
  33         reg->Swizzle = SWIZZLE_NOOP;
  34 }
  35
  36 static struct prog_src_register shadow_ambient(struct gl_program *program, int tmu)
  37 {
  38         gl_state_index fail_value_tokens[STATE_LENGTH] = {
  39                 STATE_INTERNAL, STATE_SHADOW_AMBIENT, 0, 0, 0
  40         };
  41         struct prog_src_register reg = { 0, };
  42
  43         fail_value_tokens[2] = tmu;
  44         reg.File = PROGRAM_STATE_VAR;
  45         reg.Index = _mesa_add_state_reference(program->Parameters, fail_value_tokens);
  46         reg.Swizzle = SWIZZLE_WWWW;
  47         return reg;
  48 }
  49
  50 /**
  51  * Transform TEX, TXP, TXB, and KIL instructions in the following way:
  52  *  - premultiply texture coordinates for RECT
  53  *  - extract operand swizzles
  54  *  - introduce a temporary register when write masks are needed
  55  *
  56  */
  57 GLboolean r500_transform_TEX(
  58         struct radeon_transform_context *t,
  59         struct prog_instruction* orig_inst, void* data)
  60 {
  61         struct r300_fragment_program_compiler *compiler =
  62                 (struct r300_fragment_program_compiler*)data;
  63         struct prog_instruction inst = *orig_inst;
  64         struct prog_instruction* tgt;
  65         GLboolean destredirect = GL_FALSE;
  66
  67         if (inst.Opcode != OPCODE_TEX &&
  68             inst.Opcode != OPCODE_TXB &&
  69             inst.Opcode != OPCODE_TXP &&
  70             inst.Opcode != OPCODE_KIL)
  71                 return GL_FALSE;
  72
  73         /* ARB_shadow & EXT_shadow_funcs */
  74         if (inst.Opcode != OPCODE_KIL &&
  75             t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
  76                 GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
  77
  78                 if (comparefunc == GL_NEVER || comparefunc == GL_ALWAYS) {
  79                         tgt = radeonAppendInstructions(t->Program, 1);
  80
  81                         tgt->Opcode = OPCODE_MOV;
  82                         tgt->DstReg = inst.DstReg;
  83                         if (comparefunc == GL_ALWAYS) {
  84                                 tgt->SrcReg[0].File = PROGRAM_BUILTIN;
  85                                 tgt->SrcReg[0].Swizzle = SWIZZLE_1111;
  86                         } else {
  87                                 tgt->SrcReg[0] = shadow_ambient(t->Program, inst.TexSrcUnit);
  88                         }
  89                         return GL_TRUE;
  90                 }
  91
  92                 inst.DstReg.File = PROGRAM_TEMPORARY;
  93                 inst.DstReg.Index = radeonFindFreeTemporary(t);
  94                 inst.DstReg.WriteMask = WRITEMASK_XYZW;
  95         } else if (inst.Opcode != OPCODE_KIL && inst.DstReg.File != PROGRAM_TEMPORARY) {
  96                 int tempreg = radeonFindFreeTemporary(t);
  97
  98                 inst.DstReg.File = PROGRAM_TEMPORARY;
  99                 inst.DstReg.Index = tempreg;
 100                 inst.DstReg.WriteMask = WRITEMASK_XYZW;
 101                 destredirect = GL_TRUE;
 102         }
 103
 104         if (inst.SrcReg[0].File != PROGRAM_TEMPORARY && inst.SrcReg[0].File != PROGRAM_INPUT) {
 105                 int tmpreg = radeonFindFreeTemporary(t);
 106                 tgt = radeonAppendInstructions(t->Program, 1);
 107                 tgt->Opcode = OPCODE_MOV;
 108                 tgt->DstReg.File = PROGRAM_TEMPORARY;
 109                 tgt->DstReg.Index = tmpreg;
 110                 tgt->SrcReg[0] = inst.SrcReg[0];
 111
 112                 reset_srcreg(&inst.SrcReg[0]);
 113                 inst.SrcReg[0].File = PROGRAM_TEMPORARY;
 114                 inst.SrcReg[0].Index = tmpreg;
 115         }
 116
 117         tgt = radeonAppendInstructions(t->Program, 1);
 118         _mesa_copy_instructions(tgt, &inst, 1);
 119
 120         if (inst.Opcode != OPCODE_KIL &&
 121             t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
 122                 GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
 123                 GLuint depthmode = compiler->fp->state.unit[inst.TexSrcUnit].depth_texture_mode;
 124                 int rcptemp = radeonFindFreeTemporary(t);
 125                 int pass, fail;
 126
 127                 tgt = radeonAppendInstructions(t->Program, 3);
 128
 129                 tgt[0].Opcode = OPCODE_RCP;
 130                 tgt[0].DstReg.File = PROGRAM_TEMPORARY;
 131                 tgt[0].DstReg.Index = rcptemp;
 132                 tgt[0].DstReg.WriteMask = WRITEMASK_W;
 133                 tgt[0].SrcReg[0] = inst.SrcReg[0];
 134                 tgt[0].SrcReg[0].Swizzle = SWIZZLE_WWWW;
 135
 136                 tgt[1].Opcode = OPCODE_MAD;
 137                 tgt[1].DstReg = inst.DstReg;
 138                 tgt[1].DstReg.WriteMask = orig_inst->DstReg.WriteMask;
 139                 tgt[1].SrcReg[0] = inst.SrcReg[0];
 140                 tgt[1].SrcReg[0].Swizzle = SWIZZLE_ZZZZ;
 141                 tgt[1].SrcReg[1].File = PROGRAM_TEMPORARY;
 142                 tgt[1].SrcReg[1].Index = rcptemp;
 143                 tgt[1].SrcReg[1].Swizzle = SWIZZLE_WWWW;
 144                 tgt[1].SrcReg[2].File = PROGRAM_TEMPORARY;
 145                 tgt[1].SrcReg[2].Index = inst.DstReg.Index;
 146                 if (depthmode == 0) /* GL_LUMINANCE */
 147                         tgt[1].SrcReg[2].Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z);
 148                 else if (depthmode == 2) /* GL_ALPHA */
 149                         tgt[1].SrcReg[2].Swizzle = SWIZZLE_WWWW;
 150
 151                 /* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
 152                  *   r  < tex  <=>      -tex+r < 0
 153                  *   r >= tex  <=> not (-tex+r < 0 */
 154                 if (comparefunc == GL_LESS || comparefunc == GL_GEQUAL)
 155                         tgt[1].SrcReg[2].Negate = tgt[0].SrcReg[2].Negate ^ NEGATE_XYZW;
 156                 else
 157                         tgt[1].SrcReg[0].Negate = tgt[0].SrcReg[0].Negate ^ NEGATE_XYZW;
 158
 159                 tgt[2].Opcode = OPCODE_CMP;
 160                 tgt[2].DstReg = orig_inst->DstReg;
 161                 tgt[2].SrcReg[0].File = PROGRAM_TEMPORARY;
 162                 tgt[2].SrcReg[0].Index = tgt[1].DstReg.Index;
 163
 164                 if (comparefunc == GL_LESS || comparefunc == GL_GREATER) {
 165                         pass = 1;
 166                         fail = 2;
 167                 } else {
 168                         pass = 2;
 169                         fail = 1;
 170                 }
 171
 172                 tgt[2].SrcReg[pass].File = PROGRAM_BUILTIN;
 173                 tgt[2].SrcReg[pass].Swizzle = SWIZZLE_1111;
 174                 tgt[2].SrcReg[fail] = shadow_ambient(t->Program, inst.TexSrcUnit);
 175         } else if (destredirect) {
 176                 tgt = radeonAppendInstructions(t->Program, 1);
 177
 178                 tgt->Opcode = OPCODE_MOV;
 179                 tgt->DstReg = orig_inst->DstReg;
 180                 tgt->SrcReg[0].File = PROGRAM_TEMPORARY;
 181                 tgt->SrcReg[0].Index = inst.DstReg.Index;
 182         }
 183
 184         return GL_TRUE;
 185 }
 186
 187 GLboolean r500FPIsNativeSwizzle(GLuint opcode, struct prog_src_register reg)
 188 {
 189         GLuint relevant;
 190         int i;
 191
 192         if (opcode == OPCODE_TEX ||
 193             opcode == OPCODE_TXB ||
 194             opcode == OPCODE_TXP ||
 195             opcode == OPCODE_KIL) {
 196                 if (reg.Abs)
 197                         return GL_FALSE;
 198
 199                 if (opcode == OPCODE_KIL && (reg.Swizzle != SWIZZLE_NOOP || reg.Negate != NEGATE_NONE))
 200                         return GL_FALSE;
 201
 202                 if (reg.Negate)
 203                         reg.Negate ^= NEGATE_XYZW;
 204
 205                 for(i = 0; i < 4; ++i) {
 206                         GLuint swz = GET_SWZ(reg.Swizzle, i);
 207                         if (swz == SWIZZLE_NIL) {
 208                                 reg.Negate &= ~(1 << i);
 209                                 continue;
 210                         }
 211                         if (swz >= 4)
 212                                 return GL_FALSE;
 213                 }
 214
 215                 if (reg.Negate)
 216                         return GL_FALSE;
 217
 218                 return GL_TRUE;
 219         } else if (opcode == OPCODE_DDX || opcode == OPCODE_DDY) {
 220                 /* DDX/MDH and DDY/MDV explicitly ignore incoming swizzles;
 221                  * if it doesn't fit perfectly into a .xyzw case... */
 222                 if (reg.Swizzle == SWIZZLE_NOOP && !reg.Abs && !reg.Negate)
 223                         return GL_TRUE;
 224
 225                 return GL_FALSE;
 226         } else {
 227                 /* ALU instructions support almost everything */
 228                 if (reg.Abs)
 229                         return GL_TRUE;
 230
 231                 relevant = 0;
 232                 for(i = 0; i < 3; ++i) {
 233                         GLuint swz = GET_SWZ(reg.Swizzle, i);
 234                         if (swz != SWIZZLE_NIL && swz != SWIZZLE_ZERO)
 235                                 relevant |= 1 << i;
 236                 }
 237                 if ((reg.Negate & relevant) && ((reg.Negate & relevant) != relevant))
 238                         return GL_FALSE;
 239
 240                 return GL_TRUE;
 241         }
 242 }
 243
 244 /**
 245  * Implement a MOV with a potentially non-native swizzle.
 246  *
 247  * The only thing we *cannot* do in an ALU instruction is per-component
 248  * negation. Therefore, we split the MOV into two instructions when necessary.
 249  */
 250 void r500FPBuildSwizzle(struct nqssadce_state *s, struct prog_dst_register dst, struct prog_src_register src)
 251 {
 252         struct prog_instruction *inst;
 253         GLuint negatebase[2] = { 0, 0 };
 254         int i;
 255
 256         for(i = 0; i < 4; ++i) {
 257                 GLuint swz = GET_SWZ(src.Swizzle, i);
 258                 if (swz == SWIZZLE_NIL)
 259                         continue;
 260                 negatebase[GET_BIT(src.Negate, i)] |= 1 << i;
 261         }
 262
 263         _mesa_insert_instructions(s->Program, s->IP, (negatebase[0] ? 1 : 0) + (negatebase[1] ? 1 : 0));
 264         inst = s->Program->Instructions + s->IP;
 265
 266         for(i = 0; i <= 1; ++i) {
 267                 if (!negatebase[i])
 268                         continue;
 269
 270                 inst->Opcode = OPCODE_MOV;
 271                 inst->DstReg = dst;
 272                 inst->DstReg.WriteMask = negatebase[i];
 273                 inst->SrcReg[0] = src;
 274                 inst->SrcReg[0].Negate = (i == 0) ? NEGATE_NONE : NEGATE_XYZW;
 275                 inst++;
 276                 s->IP++;
 277         }
 278 }
 279
 280
 281 static char *toswiz(int swiz_val) {
 282   switch(swiz_val) {
 283   case 0: return "R";
 284   case 1: return "G";
 285   case 2: return "B";
 286   case 3: return "A";
 287   case 4: return "0";
 288   case 5: return "1/2";
 289   case 6: return "1";
 290   case 7: return "U";
 291   }
 292   return NULL;
 293 }
 294
 295 static char *toop(int op_val)
 296 {
 297   char *str = NULL;
 298   switch (op_val) {
 299   case 0: str = "MAD"; break;
 300   case 1: str = "DP3"; break;
 301   case 2: str = "DP4"; break;
 302   case 3: str = "D2A"; break;
 303   case 4: str = "MIN"; break;
 304   case 5: str = "MAX"; break;
 305   case 6: str = "Reserved"; break;
 306   case 7: str = "CND"; break;
 307   case 8: str = "CMP"; break;
 308   case 9: str = "FRC"; break;
 309   case 10: str = "SOP"; break;
 310   case 11: str = "MDH"; break;
 311   case 12: str = "MDV"; break;
 312   }
 313   return str;
 314 }
 315
 316 static char *to_alpha_op(int op_val)
 317 {
 318   char *str = NULL;
 319   switch (op_val) {
 320   case 0: str = "MAD"; break;
 321   case 1: str = "DP"; break;
 322   case 2: str = "MIN"; break;
 323   case 3: str = "MAX"; break;
 324   case 4: str = "Reserved"; break;
 325   case 5: str = "CND"; break;
 326   case 6: str = "CMP"; break;
 327   case 7: str = "FRC"; break;
 328   case 8: str = "EX2"; break;
 329   case 9: str = "LN2"; break;
 330   case 10: str = "RCP"; break;
 331   case 11: str = "RSQ"; break;
 332   case 12: str = "SIN"; break;
 333   case 13: str = "COS"; break;
 334   case 14: str = "MDH"; break;
 335   case 15: str = "MDV"; break;
 336   }
 337   return str;
 338 }
 339
 340 static char *to_mask(int val)
 341 {
 342   char *str = NULL;
 343   switch(val) {
 344   case 0: str = "NONE"; break;
 345   case 1: str = "R"; break;
 346   case 2: str = "G"; break;
 347   case 3: str = "RG"; break;
 348   case 4: str = "B"; break;
 349   case 5: str = "RB"; break;
 350   case 6: str = "GB"; break;
 351   case 7: str = "RGB"; break;
 352   case 8: str = "A"; break;
 353   case 9: str = "AR"; break;
 354   case 10: str = "AG"; break;
 355   case 11: str = "ARG"; break;
 356   case 12: str = "AB"; break;
 357   case 13: str = "ARB"; break;
 358   case 14: str = "AGB"; break;
 359   case 15: str = "ARGB"; break;
 360   }
 361   return str;
 362 }
 363
 364 static char *to_texop(int val)
 365 {
 366   switch(val) {
 367   case 0: return "NOP";
 368   case 1: return "LD";
 369   case 2: return "TEXKILL";
 370   case 3: return "PROJ";
 371   case 4: return "LODBIAS";
 372   case 5: return "LOD";
 373   case 6: return "DXDY";
 374   }
 375   return NULL;
 376 }
 377
 378 void r500FragmentProgramDump(union rX00_fragment_program_code *c)
 379 {
 380   struct r500_fragment_program_code *code = &c->r500;
 381   fprintf(stderr, "R500 Fragment Program:\n--------\n");
 382
 383   int n;
 384   uint32_t inst;
 385   uint32_t inst0;
 386   char *str = NULL;
 387
 388   if (code->const_nr) {
 389     fprintf(stderr, "--------\nConstants:\n");
 390     for (n = 0; n < code->const_nr; n++) {
 391       fprintf(stderr, "Constant %d: %i[%i]\n", n,
 392         code->constant[n].File, code->constant[n].Index);
 393     }
 394     fprintf(stderr, "--------\n");
 395   }
 396
 397   for (n = 0; n < code->inst_end+1; n++) {
 398     inst0 = inst = code->inst[n].inst0;
 399     fprintf(stderr,"%d\t0:CMN_INST   0x%08x:", n, inst);
 400     switch(inst & 0x3) {
 401     case R500_INST_TYPE_ALU: str = "ALU"; break;
 402     case R500_INST_TYPE_OUT: str = "OUT"; break;
 403     case R500_INST_TYPE_FC: str = "FC"; break;
 404     case R500_INST_TYPE_TEX: str = "TEX"; break;
 405     };
 406     fprintf(stderr,"%s %s %s %s %s ", str,
 407             inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "",
 408             inst & R500_INST_LAST ? "LAST" : "",
 409             inst & R500_INST_NOP ? "NOP" : "",
 410             inst & R500_INST_ALU_WAIT ? "ALU WAIT" : "");
 411     fprintf(stderr,"wmask: %s omask: %s\n", to_mask((inst >> 11) & 0xf),
 412             to_mask((inst >> 15) & 0xf));
 413
 414     switch(inst0 & 0x3) {
 415     case 0:
 416     case 1:
 417       fprintf(stderr,"\t1:RGB_ADDR   0x%08x:", code->inst[n].inst1);
 418       inst = code->inst[n].inst1;
 419
 420       fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
 421               inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
 422               (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
 423               (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
 424               (inst >> 30));
 425
 426       fprintf(stderr,"\t2:ALPHA_ADDR 0x%08x:", code->inst[n].inst2);
 427       inst = code->inst[n].inst2;
 428       fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
 429               inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
 430               (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
 431               (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
 432               (inst >> 30));
 433       fprintf(stderr,"\t3 RGB_INST:  0x%08x:", code->inst[n].inst3);
 434       inst = code->inst[n].inst3;
 435       fprintf(stderr,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d\n",
 436               (inst) & 0x3, toswiz((inst >> 2) & 0x7), toswiz((inst >> 5) & 0x7), toswiz((inst >> 8) & 0x7),
 437               (inst >> 11) & 0x3,
 438               (inst >> 13) & 0x3, toswiz((inst >> 15) & 0x7), toswiz((inst >> 18) & 0x7), toswiz((inst >> 21) & 0x7),
 439               (inst >> 24) & 0x3);
 440
 441
 442       fprintf(stderr,"\t4 ALPHA_INST:0x%08x:", code->inst[n].inst4);
 443       inst = code->inst[n].inst4;
 444       fprintf(stderr,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d w:%d\n", to_alpha_op(inst & 0xf),
 445               (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
 446               (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), (inst >> 17) & 0x3,
 447               (inst >> 19) & 0x3, toswiz((inst >> 21) & 0x7), (inst >> 24) & 0x3,
 448               (inst >> 31) & 0x1);
 449
 450       fprintf(stderr,"\t5 RGBA_INST: 0x%08x:", code->inst[n].inst5);
 451       inst = code->inst[n].inst5;
 452       fprintf(stderr,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst & 0xf),
 453               (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
 454               (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), toswiz((inst >> 17) & 0x7), toswiz((inst >> 20) & 0x7),
 455               (inst >> 23) & 0x3,
 456               (inst >> 25) & 0x3, toswiz((inst >> 27) & 0x7), (inst >> 30) & 0x3);
 457       break;
 458     case 2:
 459       break;
 460     case 3:
 461       inst = code->inst[n].inst1;
 462       fprintf(stderr,"\t1:TEX_INST:  0x%08x: id: %d op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf,
 463               to_texop((inst >> 22) & 0x7), (inst & (1<<25)) ? "ACQ" : "",
 464               (inst & (1<<26)) ? "IGNUNC" : "", (inst & (1<<27)) ? "UNSCALED" : "SCALED");
 465       inst = code->inst[n].inst2;
 466       fprintf(stderr,"\t2:TEX_ADDR:  0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst,
 467               inst & 127, inst & (1<<7) ? "(rel)" : "",
 468               toswiz((inst >> 8) & 0x3), toswiz((inst >> 10) & 0x3),
 469               toswiz((inst >> 12) & 0x3), toswiz((inst >> 14) & 0x3),
 470               (inst >> 16) & 127, inst & (1<<23) ? "(rel)" : "",
 471               toswiz((inst >> 24) & 0x3), toswiz((inst >> 26) & 0x3),
 472               toswiz((inst >> 28) & 0x3), toswiz((inst >> 30) & 0x3));
 473
 474       fprintf(stderr,"\t3:TEX_DXDY:  0x%08x\n", code->inst[n].inst3);
 475       break;
 476     }
 477     fprintf(stderr,"\n");
 478   }
 479
 480 }