2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 #include "r500_fragprog.h"
30 static void reset_srcreg(struct prog_src_register
* reg
)
32 _mesa_bzero(reg
, sizeof(*reg
));
33 reg
->Swizzle
= SWIZZLE_NOOP
;
37 * Transform TEX, TXP, TXB, and KIL instructions in the following way:
38 * - premultiply texture coordinates for RECT
39 * - extract operand swizzles
40 * - introduce a temporary register when write masks are needed
43 static GLboolean
transform_TEX(
44 struct radeon_program_transform_context
* context
,
45 struct prog_instruction
* orig_inst
, void* data
)
47 struct r500_fragment_program_compiler
*compiler
=
48 (struct r500_fragment_program_compiler
*)data
;
49 struct prog_instruction inst
= *orig_inst
;
50 struct prog_instruction
* tgt
;
51 GLboolean destredirect
= GL_FALSE
;
53 if (inst
.Opcode
!= OPCODE_TEX
&&
54 inst
.Opcode
!= OPCODE_TXB
&&
55 inst
.Opcode
!= OPCODE_TXP
&&
56 inst
.Opcode
!= OPCODE_KIL
)
59 /* ARB_shadow & EXT_shadow_funcs */
60 if (inst
.Opcode
!= OPCODE_KIL
&&
61 compiler
->fp
->mesa_program
.Base
.ShadowSamplers
& (1 << inst
.TexSrcUnit
)) {
62 GLuint comparefunc
= GL_NEVER
+ compiler
->fp
->state
.unit
[inst
.TexSrcUnit
].texture_compare_func
;
64 if (comparefunc
== GL_NEVER
|| comparefunc
== GL_ALWAYS
) {
65 tgt
= radeonClauseInsertInstructions(context
->compiler
, context
->dest
,
66 context
->dest
->NumInstructions
, 1);
68 tgt
->Opcode
= OPCODE_MOV
;
69 tgt
->DstReg
.File
= inst
.DstReg
.File
;
70 tgt
->DstReg
.Index
= inst
.DstReg
.Index
;
71 tgt
->DstReg
.WriteMask
= inst
.DstReg
.WriteMask
;
72 tgt
->SrcReg
[0].File
= PROGRAM_BUILTIN
;
73 tgt
->SrcReg
[0].Swizzle
= comparefunc
== GL_ALWAYS
? SWIZZLE_1111
: SWIZZLE_0000
;
77 inst
.DstReg
.File
= PROGRAM_TEMPORARY
;
78 inst
.DstReg
.Index
= radeonCompilerAllocateTemporary(context
->compiler
);
79 inst
.DstReg
.WriteMask
= WRITEMASK_XYZW
;
82 tgt
= radeonClauseInsertInstructions(context
->compiler
, context
->dest
,
83 context
->dest
->NumInstructions
, 1);
84 _mesa_copy_instructions(tgt
, &inst
, 1);
86 if (inst
.Opcode
!= OPCODE_KIL
&&
87 compiler
->fp
->mesa_program
.Base
.ShadowSamplers
& (1 << inst
.TexSrcUnit
)) {
88 GLuint comparefunc
= GL_NEVER
+ compiler
->fp
->state
.unit
[inst
.TexSrcUnit
].texture_compare_func
;
89 GLuint depthmode
= compiler
->fp
->state
.unit
[inst
.TexSrcUnit
].depth_texture_mode
;
91 tgt
= radeonClauseInsertInstructions(context
->compiler
, context
->dest
,
92 context
->dest
->NumInstructions
, 2);
94 tgt
[0].Opcode
= OPCODE_MAD
;
95 tgt
[0].DstReg
= inst
.DstReg
;
96 tgt
[0].DstReg
.WriteMask
= orig_inst
->DstReg
.WriteMask
;
97 tgt
[0].SrcReg
[0].File
= PROGRAM_TEMPORARY
;
98 tgt
[0].SrcReg
[0].Index
= inst
.DstReg
.Index
;
99 if (depthmode
== 0) /* GL_LUMINANCE */
100 tgt
[0].SrcReg
[0].Swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
);
101 else if (depthmode
== 2) /* GL_ALPHA */
102 tgt
[0].SrcReg
[0].Swizzle
= SWIZZLE_WWWW
;
103 tgt
[0].SrcReg
[1].File
= PROGRAM_BUILTIN
;
104 tgt
[0].SrcReg
[1].Swizzle
= SWIZZLE_1111
;
105 tgt
[0].SrcReg
[2] = inst
.SrcReg
[0];
106 tgt
[0].SrcReg
[2].Swizzle
= SWIZZLE_ZZZZ
;
108 /* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
109 * r < tex <=> -tex+r < 0
110 * r >= tex <=> not (-tex+r < 0 */
111 if (comparefunc
== GL_LESS
|| comparefunc
== GL_GEQUAL
)
112 tgt
[0].SrcReg
[0].NegateBase
= tgt
[0].SrcReg
[0].NegateBase
^ NEGATE_XYZW
;
114 tgt
[0].SrcReg
[2].NegateBase
= tgt
[0].SrcReg
[2].NegateBase
^ NEGATE_XYZW
;
116 tgt
[1].Opcode
= OPCODE_CMP
;
117 tgt
[1].DstReg
= orig_inst
->DstReg
;
118 tgt
[1].SrcReg
[0].File
= PROGRAM_TEMPORARY
;
119 tgt
[1].SrcReg
[0].Index
= tgt
[0].DstReg
.Index
;
120 tgt
[1].SrcReg
[1].File
= PROGRAM_BUILTIN
;
121 tgt
[1].SrcReg
[2].File
= PROGRAM_BUILTIN
;
123 if (comparefunc
== GL_LESS
|| comparefunc
== GL_GREATER
) {
124 tgt
[1].SrcReg
[1].Swizzle
= SWIZZLE_1111
;
125 tgt
[1].SrcReg
[2].Swizzle
= SWIZZLE_0000
;
127 tgt
[1].SrcReg
[1].Swizzle
= SWIZZLE_0000
;
128 tgt
[1].SrcReg
[2].Swizzle
= SWIZZLE_1111
;
130 } else if (destredirect
) {
131 tgt
= radeonClauseInsertInstructions(context
->compiler
, context
->dest
,
132 context
->dest
->NumInstructions
, 1);
134 tgt
->Opcode
= OPCODE_MAD
;
135 tgt
->DstReg
= orig_inst
->DstReg
;
136 tgt
->SrcReg
[0].File
= PROGRAM_TEMPORARY
;
137 tgt
->SrcReg
[0].Index
= inst
.DstReg
.Index
;
138 tgt
->SrcReg
[1].File
= PROGRAM_BUILTIN
;
139 tgt
->SrcReg
[1].Swizzle
= SWIZZLE_1111
;
140 tgt
->SrcReg
[2].File
= PROGRAM_BUILTIN
;
141 tgt
->SrcReg
[2].Swizzle
= SWIZZLE_0000
;
148 static void update_params(r300ContextPtr r300
, struct r500_fragment_program
*fp
)
150 struct gl_fragment_program
*mp
= &fp
->mesa_program
;
152 /* Ask Mesa nicely to fill in ParameterValues for us */
153 if (mp
->Base
.Parameters
)
154 _mesa_load_state_parameters(r300
->radeon
.glCtx
, mp
->Base
.Parameters
);
159 * Transform the program to support fragment.position.
161 * Introduce a small fragment at the start of the program that will be
162 * the only code that directly reads the FRAG_ATTRIB_WPOS input.
163 * All other code pieces that reference that input will be rewritten
164 * to read from a newly allocated temporary.
166 * \todo if/when r5xx supports the radeon_program architecture, this is a
167 * likely candidate for code sharing.
169 static void insert_WPOS_trailer(struct r500_fragment_program_compiler
*compiler
)
171 GLuint InputsRead
= compiler
->fp
->mesa_program
.Base
.InputsRead
;
173 if (!(InputsRead
& FRAG_BIT_WPOS
))
176 static gl_state_index tokens
[STATE_LENGTH
] = {
177 STATE_INTERNAL
, STATE_R300_WINDOW_DIMENSION
, 0, 0, 0
179 struct prog_instruction
*fpi
;
182 GLuint tempregi
= radeonCompilerAllocateTemporary(&compiler
->compiler
);
184 fpi
= radeonClauseInsertInstructions(&compiler
->compiler
, &compiler
->compiler
.Clauses
[0], 0, 3);
186 /* perspective divide */
187 fpi
[i
].Opcode
= OPCODE_RCP
;
189 fpi
[i
].DstReg
.File
= PROGRAM_TEMPORARY
;
190 fpi
[i
].DstReg
.Index
= tempregi
;
191 fpi
[i
].DstReg
.WriteMask
= WRITEMASK_W
;
192 fpi
[i
].DstReg
.CondMask
= COND_TR
;
194 fpi
[i
].SrcReg
[0].File
= PROGRAM_INPUT
;
195 fpi
[i
].SrcReg
[0].Index
= FRAG_ATTRIB_WPOS
;
196 fpi
[i
].SrcReg
[0].Swizzle
= SWIZZLE_WWWW
;
199 fpi
[i
].Opcode
= OPCODE_MUL
;
201 fpi
[i
].DstReg
.File
= PROGRAM_TEMPORARY
;
202 fpi
[i
].DstReg
.Index
= tempregi
;
203 fpi
[i
].DstReg
.WriteMask
= WRITEMASK_XYZ
;
204 fpi
[i
].DstReg
.CondMask
= COND_TR
;
206 fpi
[i
].SrcReg
[0].File
= PROGRAM_INPUT
;
207 fpi
[i
].SrcReg
[0].Index
= FRAG_ATTRIB_WPOS
;
208 fpi
[i
].SrcReg
[0].Swizzle
= SWIZZLE_XYZW
;
210 fpi
[i
].SrcReg
[1].File
= PROGRAM_TEMPORARY
;
211 fpi
[i
].SrcReg
[1].Index
= tempregi
;
212 fpi
[i
].SrcReg
[1].Swizzle
= SWIZZLE_WWWW
;
215 /* viewport transformation */
216 window_index
= _mesa_add_state_reference(compiler
->fp
->mesa_program
.Base
.Parameters
, tokens
);
218 fpi
[i
].Opcode
= OPCODE_MAD
;
220 fpi
[i
].DstReg
.File
= PROGRAM_TEMPORARY
;
221 fpi
[i
].DstReg
.Index
= tempregi
;
222 fpi
[i
].DstReg
.WriteMask
= WRITEMASK_XYZ
;
223 fpi
[i
].DstReg
.CondMask
= COND_TR
;
225 fpi
[i
].SrcReg
[0].File
= PROGRAM_TEMPORARY
;
226 fpi
[i
].SrcReg
[0].Index
= tempregi
;
227 fpi
[i
].SrcReg
[0].Swizzle
=
228 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_ZERO
);
230 fpi
[i
].SrcReg
[1].File
= PROGRAM_STATE_VAR
;
231 fpi
[i
].SrcReg
[1].Index
= window_index
;
232 fpi
[i
].SrcReg
[1].Swizzle
=
233 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_ZERO
);
235 fpi
[i
].SrcReg
[2].File
= PROGRAM_STATE_VAR
;
236 fpi
[i
].SrcReg
[2].Index
= window_index
;
237 fpi
[i
].SrcReg
[2].Swizzle
=
238 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_ZERO
);
241 for (; i
< compiler
->compiler
.Clauses
[0].NumInstructions
; ++i
) {
243 for (reg
= 0; reg
< 3; reg
++) {
244 if (fpi
[i
].SrcReg
[reg
].File
== PROGRAM_INPUT
&&
245 fpi
[i
].SrcReg
[reg
].Index
== FRAG_ATTRIB_WPOS
) {
246 fpi
[i
].SrcReg
[reg
].File
= PROGRAM_TEMPORARY
;
247 fpi
[i
].SrcReg
[reg
].Index
= tempregi
;
254 static GLuint
build_dtm(GLuint depthmode
)
258 case GL_LUMINANCE
: return 0;
259 case GL_INTENSITY
: return 1;
260 case GL_ALPHA
: return 2;
264 static GLuint
build_func(GLuint comparefunc
)
266 return comparefunc
- GL_NEVER
;
271 * Collect all external state that is relevant for compiling the given
274 static void build_state(
276 struct r500_fragment_program
*fp
,
277 struct r500_fragment_program_external_state
*state
)
281 _mesa_bzero(state
, sizeof(*state
));
283 for(unit
= 0; unit
< 16; ++unit
) {
284 if (fp
->mesa_program
.Base
.ShadowSamplers
& (1 << unit
)) {
285 struct gl_texture_object
* tex
= r300
->radeon
.glCtx
->Texture
.Unit
[unit
]._Current
;
287 state
->unit
[unit
].depth_texture_mode
= build_dtm(tex
->DepthMode
);
288 state
->unit
[unit
].texture_compare_func
= build_func(tex
->CompareFunc
);
293 static void dump_program(struct r500_fragment_program_code
*code
);
295 void r500TranslateFragmentShader(r300ContextPtr r300
,
296 struct r500_fragment_program
*fp
)
298 struct r500_fragment_program_external_state state
;
300 build_state(r300
, fp
, &state
);
301 if (_mesa_memcmp(&fp
->state
, &state
, sizeof(state
))) {
302 /* TODO: cache compiled programs */
303 fp
->translated
= GL_FALSE
;
304 _mesa_memcpy(&fp
->state
, &state
, sizeof(state
));
307 if (!fp
->translated
) {
308 struct r500_fragment_program_compiler compiler
;
310 compiler
.r300
= r300
;
312 compiler
.code
= &fp
->code
;
314 radeonCompilerInit(&compiler
.compiler
, r300
->radeon
.glCtx
, &fp
->mesa_program
.Base
);
316 insert_WPOS_trailer(&compiler
);
318 struct radeon_program_transformation transformations
[1] = {
319 { &transform_TEX
, &compiler
}
321 radeonClauseLocalTransform(&compiler
.compiler
,
322 &compiler
.compiler
.Clauses
[0],
325 if (RADEON_DEBUG
& DEBUG_PIXEL
) {
326 _mesa_printf("Compiler state after transformations:\n");
327 radeonCompilerDump(&compiler
.compiler
);
330 fp
->translated
= r500FragmentProgramEmit(&compiler
);
332 radeonCompilerCleanup(&compiler
.compiler
);
334 r300UpdateStateParameters(r300
->radeon
.glCtx
, _NEW_PROGRAM
);
336 if (RADEON_DEBUG
& DEBUG_PIXEL
) {
337 fprintf(stderr
, "Mesa program:\n");
338 fprintf(stderr
, "-------------\n");
339 _mesa_print_program(&fp
->mesa_program
.Base
);
342 dump_program(&fp
->code
);
347 update_params(r300
, fp
);
351 static char *toswiz(int swiz_val
) {
358 case 5: return "1/2";
365 static char *toop(int op_val
)
369 case 0: str
= "MAD"; break;
370 case 1: str
= "DP3"; break;
371 case 2: str
= "DP4"; break;
372 case 3: str
= "D2A"; break;
373 case 4: str
= "MIN"; break;
374 case 5: str
= "MAX"; break;
375 case 6: str
= "Reserved"; break;
376 case 7: str
= "CND"; break;
377 case 8: str
= "CMP"; break;
378 case 9: str
= "FRC"; break;
379 case 10: str
= "SOP"; break;
380 case 11: str
= "MDH"; break;
381 case 12: str
= "MDV"; break;
386 static char *to_alpha_op(int op_val
)
390 case 0: str
= "MAD"; break;
391 case 1: str
= "DP"; break;
392 case 2: str
= "MIN"; break;
393 case 3: str
= "MAX"; break;
394 case 4: str
= "Reserved"; break;
395 case 5: str
= "CND"; break;
396 case 6: str
= "CMP"; break;
397 case 7: str
= "FRC"; break;
398 case 8: str
= "EX2"; break;
399 case 9: str
= "LN2"; break;
400 case 10: str
= "RCP"; break;
401 case 11: str
= "RSQ"; break;
402 case 12: str
= "SIN"; break;
403 case 13: str
= "COS"; break;
404 case 14: str
= "MDH"; break;
405 case 15: str
= "MDV"; break;
410 static char *to_mask(int val
)
414 case 0: str
= "NONE"; break;
415 case 1: str
= "R"; break;
416 case 2: str
= "G"; break;
417 case 3: str
= "RG"; break;
418 case 4: str
= "B"; break;
419 case 5: str
= "RB"; break;
420 case 6: str
= "GB"; break;
421 case 7: str
= "RGB"; break;
422 case 8: str
= "A"; break;
423 case 9: str
= "AR"; break;
424 case 10: str
= "AG"; break;
425 case 11: str
= "ARG"; break;
426 case 12: str
= "AB"; break;
427 case 13: str
= "ARB"; break;
428 case 14: str
= "AGB"; break;
429 case 15: str
= "ARGB"; break;
434 static char *to_texop(int val
)
437 case 0: return "NOP";
439 case 2: return "TEXKILL";
440 case 3: return "PROJ";
441 case 4: return "LODBIAS";
442 case 5: return "LOD";
443 case 6: return "DXDY";
448 static void dump_program(struct r500_fragment_program_code
*code
)
451 fprintf(stderr
, "R500 Fragment Program:\n--------\n");
458 if (code
->const_nr
) {
459 fprintf(stderr
, "--------\nConstants:\n");
460 for (n
= 0; n
< code
->const_nr
; n
++) {
461 fprintf(stderr
, "Constant %d: %f %f\n\t %f %f\n", n
,
462 code
->constant
[n
][0], code
->constant
[n
][1], code
->constant
[n
][2],
463 code
->constant
[n
][3]);
465 fprintf(stderr
, "--------\n");
468 for (n
= 0; n
< code
->inst_end
+1; n
++) {
469 inst0
= inst
= code
->inst
[n
].inst0
;
470 fprintf(stderr
,"%d\t0:CMN_INST 0x%08x:", n
, inst
);
472 case R500_INST_TYPE_ALU
: str
= "ALU"; break;
473 case R500_INST_TYPE_OUT
: str
= "OUT"; break;
474 case R500_INST_TYPE_FC
: str
= "FC"; break;
475 case R500_INST_TYPE_TEX
: str
= "TEX"; break;
477 fprintf(stderr
,"%s %s %s %s %s ", str
,
478 inst
& R500_INST_TEX_SEM_WAIT
? "TEX_WAIT" : "",
479 inst
& R500_INST_LAST
? "LAST" : "",
480 inst
& R500_INST_NOP
? "NOP" : "",
481 inst
& R500_INST_ALU_WAIT
? "ALU WAIT" : "");
482 fprintf(stderr
,"wmask: %s omask: %s\n", to_mask((inst
>> 11) & 0xf),
483 to_mask((inst
>> 15) & 0xf));
485 switch(inst0
& 0x3) {
488 fprintf(stderr
,"\t1:RGB_ADDR 0x%08x:", code
->inst
[n
].inst1
);
489 inst
= code
->inst
[n
].inst1
;
491 fprintf(stderr
,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
492 inst
& 0xff, (inst
& (1<<8)) ? 'c' : 't',
493 (inst
>> 10) & 0xff, (inst
& (1<<18)) ? 'c' : 't',
494 (inst
>> 20) & 0xff, (inst
& (1<<28)) ? 'c' : 't',
497 fprintf(stderr
,"\t2:ALPHA_ADDR 0x%08x:", code
->inst
[n
].inst2
);
498 inst
= code
->inst
[n
].inst2
;
499 fprintf(stderr
,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
500 inst
& 0xff, (inst
& (1<<8)) ? 'c' : 't',
501 (inst
>> 10) & 0xff, (inst
& (1<<18)) ? 'c' : 't',
502 (inst
>> 20) & 0xff, (inst
& (1<<28)) ? 'c' : 't',
504 fprintf(stderr
,"\t3 RGB_INST: 0x%08x:", code
->inst
[n
].inst3
);
505 inst
= code
->inst
[n
].inst3
;
506 fprintf(stderr
,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d\n",
507 (inst
) & 0x3, toswiz((inst
>> 2) & 0x7), toswiz((inst
>> 5) & 0x7), toswiz((inst
>> 8) & 0x7),
509 (inst
>> 13) & 0x3, toswiz((inst
>> 15) & 0x7), toswiz((inst
>> 18) & 0x7), toswiz((inst
>> 21) & 0x7),
513 fprintf(stderr
,"\t4 ALPHA_INST:0x%08x:", code
->inst
[n
].inst4
);
514 inst
= code
->inst
[n
].inst4
;
515 fprintf(stderr
,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d w:%d\n", to_alpha_op(inst
& 0xf),
516 (inst
>> 4) & 0x7f, inst
& (1<<11) ? "(rel)":"",
517 (inst
>> 12) & 0x3, toswiz((inst
>> 14) & 0x7), (inst
>> 17) & 0x3,
518 (inst
>> 19) & 0x3, toswiz((inst
>> 21) & 0x7), (inst
>> 24) & 0x3,
521 fprintf(stderr
,"\t5 RGBA_INST: 0x%08x:", code
->inst
[n
].inst5
);
522 inst
= code
->inst
[n
].inst5
;
523 fprintf(stderr
,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst
& 0xf),
524 (inst
>> 4) & 0x7f, inst
& (1<<11) ? "(rel)":"",
525 (inst
>> 12) & 0x3, toswiz((inst
>> 14) & 0x7), toswiz((inst
>> 17) & 0x7), toswiz((inst
>> 20) & 0x7),
527 (inst
>> 25) & 0x3, toswiz((inst
>> 27) & 0x7), (inst
>> 30) & 0x3);
532 inst
= code
->inst
[n
].inst1
;
533 fprintf(stderr
,"\t1:TEX_INST: 0x%08x: id: %d op:%s, %s, %s %s\n", inst
, (inst
>> 16) & 0xf,
534 to_texop((inst
>> 22) & 0x7), (inst
& (1<<25)) ? "ACQ" : "",
535 (inst
& (1<<26)) ? "IGNUNC" : "", (inst
& (1<<27)) ? "UNSCALED" : "SCALED");
536 inst
= code
->inst
[n
].inst2
;
537 fprintf(stderr
,"\t2:TEX_ADDR: 0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst
,
538 inst
& 127, inst
& (1<<7) ? "(rel)" : "",
539 toswiz((inst
>> 8) & 0x3), toswiz((inst
>> 10) & 0x3),
540 toswiz((inst
>> 12) & 0x3), toswiz((inst
>> 14) & 0x3),
541 (inst
>> 16) & 127, inst
& (1<<23) ? "(rel)" : "",
542 toswiz((inst
>> 24) & 0x3), toswiz((inst
>> 26) & 0x3),
543 toswiz((inst
>> 28) & 0x3), toswiz((inst
>> 30) & 0x3));
545 fprintf(stderr
,"\t3:TEX_DXDY: 0x%08x\n", code
->inst
[n
].inst3
);
548 fprintf(stderr
,"\n");