src/mesa/drivers/dri/r300/r500_fragprog.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sublicense, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial
  16  * portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  */
  27
  28 #include "r500_fragprog.h"
  29
  30 #include "radeon_nqssadce.h"
  31 #include "radeon_program_alu.h"
  32
  33
  34 static struct prog_src_register shadow_ambient(struct gl_program *program, int tmu)
  35 {
  36         gl_state_index fail_value_tokens[STATE_LENGTH] = {
  37                 STATE_INTERNAL, STATE_SHADOW_AMBIENT, 0, 0, 0
  38         };
  39         struct prog_src_register reg = { 0, };
  40
  41         fail_value_tokens[2] = tmu;
  42         reg.File = PROGRAM_STATE_VAR;
  43         reg.Index = _mesa_add_state_reference(program->Parameters, fail_value_tokens);
  44         reg.Swizzle = SWIZZLE_WWWW;
  45         return reg;
  46 }
  47
  48 /**
  49  * Transform TEX, TXP, TXB, and KIL instructions in the following way:
  50  *  - premultiply texture coordinates for RECT
  51  *  - extract operand swizzles
  52  *  - introduce a temporary register when write masks are needed
  53  *
  54  */
  55 static GLboolean transform_TEX(
  56         struct radeon_transform_context *t,
  57         struct prog_instruction* orig_inst, void* data)
  58 {
  59         struct r500_fragment_program_compiler *compiler =
  60                 (struct r500_fragment_program_compiler*)data;
  61         struct prog_instruction inst = *orig_inst;
  62         struct prog_instruction* tgt;
  63         GLboolean destredirect = GL_FALSE;
  64
  65         if (inst.Opcode != OPCODE_TEX &&
  66             inst.Opcode != OPCODE_TXB &&
  67             inst.Opcode != OPCODE_TXP &&
  68             inst.Opcode != OPCODE_KIL)
  69                 return GL_FALSE;
  70
  71         /* ARB_shadow & EXT_shadow_funcs */
  72         if (inst.Opcode != OPCODE_KIL &&
  73             t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
  74                 GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
  75
  76                 if (comparefunc == GL_NEVER || comparefunc == GL_ALWAYS) {
  77                         tgt = radeonAppendInstructions(t->Program, 1);
  78
  79                         tgt->Opcode = OPCODE_MOV;
  80                         tgt->DstReg = inst.DstReg;
  81                         if (comparefunc == GL_ALWAYS) {
  82                                 tgt->SrcReg[0].File = PROGRAM_BUILTIN;
  83                                 tgt->SrcReg[0].Swizzle = SWIZZLE_1111;
  84                         } else {
  85                                 tgt->SrcReg[0] = shadow_ambient(t->Program, inst.TexSrcUnit);
  86                         }
  87                         return GL_TRUE;
  88                 }
  89
  90                 inst.DstReg.File = PROGRAM_TEMPORARY;
  91                 inst.DstReg.Index = radeonFindFreeTemporary(t);
  92                 inst.DstReg.WriteMask = WRITEMASK_XYZW;
  93         } else if (inst.Opcode != OPCODE_KIL && inst.DstReg.File != PROGRAM_TEMPORARY) {
  94                 int tempreg = radeonFindFreeTemporary(t);
  95
  96                 inst.DstReg.File = PROGRAM_TEMPORARY;
  97                 inst.DstReg.Index = tempreg;
  98                 inst.DstReg.WriteMask = WRITEMASK_XYZW;
  99                 destredirect = GL_TRUE;
 100         }
 101
 102         tgt = radeonAppendInstructions(t->Program, 1);
 103         _mesa_copy_instructions(tgt, &inst, 1);
 104
 105         if (inst.Opcode != OPCODE_KIL &&
 106             t->Program->ShadowSamplers & (1 << inst.TexSrcUnit)) {
 107                 GLuint comparefunc = GL_NEVER + compiler->fp->state.unit[inst.TexSrcUnit].texture_compare_func;
 108                 GLuint depthmode = compiler->fp->state.unit[inst.TexSrcUnit].depth_texture_mode;
 109                 int rcptemp = radeonFindFreeTemporary(t);
 110                 int pass, fail;
 111
 112                 tgt = radeonAppendInstructions(t->Program, 3);
 113
 114                 tgt[0].Opcode = OPCODE_RCP;
 115                 tgt[0].DstReg.File = PROGRAM_TEMPORARY;
 116                 tgt[0].DstReg.Index = rcptemp;
 117                 tgt[0].DstReg.WriteMask = WRITEMASK_W;
 118                 tgt[0].SrcReg[0] = inst.SrcReg[0];
 119                 tgt[0].SrcReg[0].Swizzle = SWIZZLE_WWWW;
 120
 121                 tgt[1].Opcode = OPCODE_MAD;
 122                 tgt[1].DstReg = inst.DstReg;
 123                 tgt[1].DstReg.WriteMask = orig_inst->DstReg.WriteMask;
 124                 tgt[1].SrcReg[0] = inst.SrcReg[0];
 125                 tgt[1].SrcReg[0].Swizzle = SWIZZLE_ZZZZ;
 126                 tgt[1].SrcReg[1].File = PROGRAM_TEMPORARY;
 127                 tgt[1].SrcReg[1].Index = rcptemp;
 128                 tgt[1].SrcReg[1].Swizzle = SWIZZLE_WWWW;
 129                 tgt[1].SrcReg[2].File = PROGRAM_TEMPORARY;
 130                 tgt[1].SrcReg[2].Index = inst.DstReg.Index;
 131                 if (depthmode == 0) /* GL_LUMINANCE */
 132                         tgt[1].SrcReg[2].Swizzle = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z);
 133                 else if (depthmode == 2) /* GL_ALPHA */
 134                         tgt[1].SrcReg[2].Swizzle = SWIZZLE_WWWW;
 135
 136                 /* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
 137                  *   r  < tex  <=>      -tex+r < 0
 138                  *   r >= tex  <=> not (-tex+r < 0 */
 139                 if (comparefunc == GL_LESS || comparefunc == GL_GEQUAL)
 140                         tgt[1].SrcReg[2].NegateBase = tgt[0].SrcReg[2].NegateBase ^ NEGATE_XYZW;
 141                 else
 142                         tgt[1].SrcReg[0].NegateBase = tgt[0].SrcReg[0].NegateBase ^ NEGATE_XYZW;
 143
 144                 tgt[2].Opcode = OPCODE_CMP;
 145                 tgt[2].DstReg = orig_inst->DstReg;
 146                 tgt[2].SrcReg[0].File = PROGRAM_TEMPORARY;
 147                 tgt[2].SrcReg[0].Index = tgt[1].DstReg.Index;
 148
 149                 if (comparefunc == GL_LESS || comparefunc == GL_GREATER) {
 150                         pass = 1;
 151                         fail = 2;
 152                 } else {
 153                         pass = 2;
 154                         fail = 1;
 155                 }
 156
 157                 tgt[2].SrcReg[pass].File = PROGRAM_BUILTIN;
 158                 tgt[2].SrcReg[pass].Swizzle = SWIZZLE_1111;
 159                 tgt[2].SrcReg[fail] = shadow_ambient(t->Program, inst.TexSrcUnit);
 160         } else if (destredirect) {
 161                 tgt = radeonAppendInstructions(t->Program, 1);
 162
 163                 tgt->Opcode = OPCODE_MOV;
 164                 tgt->DstReg = orig_inst->DstReg;
 165                 tgt->SrcReg[0].File = PROGRAM_TEMPORARY;
 166                 tgt->SrcReg[0].Index = inst.DstReg.Index;
 167         }
 168
 169         return GL_TRUE;
 170 }
 171
 172
 173 static void update_params(r300ContextPtr r300, struct r500_fragment_program *fp)
 174 {
 175         struct gl_fragment_program *mp = &fp->mesa_program;
 176
 177         /* Ask Mesa nicely to fill in ParameterValues for us */
 178         if (mp->Base.Parameters)
 179                 _mesa_load_state_parameters(r300->radeon.glCtx, mp->Base.Parameters);
 180 }
 181
 182
 183 /**
 184  * Transform the program to support fragment.position.
 185  *
 186  * Introduce a small fragment at the start of the program that will be
 187  * the only code that directly reads the FRAG_ATTRIB_WPOS input.
 188  * All other code pieces that reference that input will be rewritten
 189  * to read from a newly allocated temporary.
 190  *
 191  * \todo if/when r5xx supports the radeon_program architecture, this is a
 192  * likely candidate for code sharing.
 193  */
 194 static void insert_WPOS_trailer(struct r500_fragment_program_compiler *compiler)
 195 {
 196         GLuint InputsRead = compiler->fp->mesa_program.Base.InputsRead;
 197
 198         if (!(InputsRead & FRAG_BIT_WPOS))
 199                 return;
 200
 201         static gl_state_index tokens[STATE_LENGTH] = {
 202                 STATE_INTERNAL, STATE_R300_WINDOW_DIMENSION, 0, 0, 0
 203         };
 204         struct prog_instruction *fpi;
 205         GLuint window_index;
 206         int i = 0;
 207         GLuint tempregi = _mesa_find_free_register(compiler->program, PROGRAM_TEMPORARY);
 208
 209         _mesa_insert_instructions(compiler->program, 0, 3);
 210         fpi = compiler->program->Instructions;
 211
 212         /* perspective divide */
 213         fpi[i].Opcode = OPCODE_RCP;
 214
 215         fpi[i].DstReg.File = PROGRAM_TEMPORARY;
 216         fpi[i].DstReg.Index = tempregi;
 217         fpi[i].DstReg.WriteMask = WRITEMASK_W;
 218         fpi[i].DstReg.CondMask = COND_TR;
 219
 220         fpi[i].SrcReg[0].File = PROGRAM_INPUT;
 221         fpi[i].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
 222         fpi[i].SrcReg[0].Swizzle = SWIZZLE_WWWW;
 223         i++;
 224
 225         fpi[i].Opcode = OPCODE_MUL;
 226
 227         fpi[i].DstReg.File = PROGRAM_TEMPORARY;
 228         fpi[i].DstReg.Index = tempregi;
 229         fpi[i].DstReg.WriteMask = WRITEMASK_XYZ;
 230         fpi[i].DstReg.CondMask = COND_TR;
 231
 232         fpi[i].SrcReg[0].File = PROGRAM_INPUT;
 233         fpi[i].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
 234         fpi[i].SrcReg[0].Swizzle = SWIZZLE_XYZW;
 235
 236         fpi[i].SrcReg[1].File = PROGRAM_TEMPORARY;
 237         fpi[i].SrcReg[1].Index = tempregi;
 238         fpi[i].SrcReg[1].Swizzle = SWIZZLE_WWWW;
 239         i++;
 240
 241         /* viewport transformation */
 242         window_index = _mesa_add_state_reference(compiler->program->Parameters, tokens);
 243
 244         fpi[i].Opcode = OPCODE_MAD;
 245
 246         fpi[i].DstReg.File = PROGRAM_TEMPORARY;
 247         fpi[i].DstReg.Index = tempregi;
 248         fpi[i].DstReg.WriteMask = WRITEMASK_XYZ;
 249         fpi[i].DstReg.CondMask = COND_TR;
 250
 251         fpi[i].SrcReg[0].File = PROGRAM_TEMPORARY;
 252         fpi[i].SrcReg[0].Index = tempregi;
 253         fpi[i].SrcReg[0].Swizzle =
 254             MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
 255
 256         fpi[i].SrcReg[1].File = PROGRAM_STATE_VAR;
 257         fpi[i].SrcReg[1].Index = window_index;
 258         fpi[i].SrcReg[1].Swizzle =
 259             MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
 260
 261         fpi[i].SrcReg[2].File = PROGRAM_STATE_VAR;
 262         fpi[i].SrcReg[2].Index = window_index;
 263         fpi[i].SrcReg[2].Swizzle =
 264             MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ZERO);
 265         i++;
 266
 267         for (; i < compiler->program->NumInstructions; ++i) {
 268                 int reg;
 269                 for (reg = 0; reg < 3; reg++) {
 270                         if (fpi[i].SrcReg[reg].File == PROGRAM_INPUT &&
 271                             fpi[i].SrcReg[reg].Index == FRAG_ATTRIB_WPOS) {
 272                                 fpi[i].SrcReg[reg].File = PROGRAM_TEMPORARY;
 273                                 fpi[i].SrcReg[reg].Index = tempregi;
 274                         }
 275                 }
 276         }
 277 }
 278
 279
 280 static void nqssadce_init(struct nqssadce_state* s)
 281 {
 282         s->Outputs[FRAG_RESULT_COLR].Sourced = WRITEMASK_XYZW;
 283         s->Outputs[FRAG_RESULT_DEPR].Sourced = WRITEMASK_W;
 284 }
 285
 286 static GLboolean is_native_swizzle(GLuint opcode, struct prog_src_register reg)
 287 {
 288         GLuint relevant;
 289         int i;
 290
 291         if (opcode == OPCODE_TEX ||
 292             opcode == OPCODE_TXB ||
 293             opcode == OPCODE_TXP ||
 294             opcode == OPCODE_KIL) {
 295                 if (reg.Abs)
 296                         return GL_FALSE;
 297
 298                 if (reg.NegateAbs)
 299                         reg.NegateBase ^= 15;
 300
 301                 if (opcode == OPCODE_KIL) {
 302                         if (reg.Swizzle != SWIZZLE_NOOP)
 303                                 return GL_FALSE;
 304                 } else {
 305                         for(i = 0; i < 4; ++i) {
 306                                 GLuint swz = GET_SWZ(reg.Swizzle, i);
 307                                 if (swz == SWIZZLE_NIL) {
 308                                         reg.NegateBase &= ~(1 << i);
 309                                         continue;
 310                                 }
 311                                 if (swz >= 4)
 312                                         return GL_FALSE;
 313                         }
 314                 }
 315
 316                 if (reg.NegateBase)
 317                         return GL_FALSE;
 318
 319                 return GL_TRUE;
 320         } else if (opcode == OPCODE_DDX || opcode == OPCODE_DDY) {
 321                 /* DDX/MDH and DDY/MDV explicitly ignore incoming swizzles;
 322                  * if it doesn't fit perfectly into a .xyzw case... */
 323                 if (reg.Swizzle == SWIZZLE_NOOP && !reg.Abs
 324                                 && !reg.NegateBase && !reg.NegateAbs)
 325                         return GL_TRUE;
 326
 327                 return GL_FALSE;
 328         } else {
 329                 /* ALU instructions support almost everything */
 330                 if (reg.Abs)
 331                         return GL_TRUE;
 332
 333                 relevant = 0;
 334                 for(i = 0; i < 3; ++i) {
 335                         GLuint swz = GET_SWZ(reg.Swizzle, i);
 336                         if (swz != SWIZZLE_NIL && swz != SWIZZLE_ZERO)
 337                                 relevant |= 1 << i;
 338                 }
 339                 if ((reg.NegateBase & relevant) && ((reg.NegateBase & relevant) != relevant))
 340                         return GL_FALSE;
 341
 342                 return GL_TRUE;
 343         }
 344 }
 345
 346 /**
 347  * Implement a MOV with a potentially non-native swizzle.
 348  *
 349  * The only thing we *cannot* do in an ALU instruction is per-component
 350  * negation. Therefore, we split the MOV into two instructions when necessary.
 351  */
 352 static void nqssadce_build_swizzle(struct nqssadce_state *s,
 353         struct prog_dst_register dst, struct prog_src_register src)
 354 {
 355         struct prog_instruction *inst;
 356         GLuint negatebase[2] = { 0, 0 };
 357         int i;
 358
 359         for(i = 0; i < 4; ++i) {
 360                 GLuint swz = GET_SWZ(src.Swizzle, i);
 361                 if (swz == SWIZZLE_NIL)
 362                         continue;
 363                 negatebase[GET_BIT(src.NegateBase, i)] |= 1 << i;
 364         }
 365
 366         _mesa_insert_instructions(s->Program, s->IP, (negatebase[0] ? 1 : 0) + (negatebase[1] ? 1 : 0));
 367         inst = s->Program->Instructions + s->IP;
 368
 369         for(i = 0; i <= 1; ++i) {
 370                 if (!negatebase[i])
 371                         continue;
 372
 373                 inst->Opcode = OPCODE_MOV;
 374                 inst->DstReg = dst;
 375                 inst->DstReg.WriteMask = negatebase[i];
 376                 inst->SrcReg[0] = src;
 377                 inst++;
 378                 s->IP++;
 379         }
 380 }
 381
 382 static GLuint build_dtm(GLuint depthmode)
 383 {
 384         switch(depthmode) {
 385         default:
 386         case GL_LUMINANCE: return 0;
 387         case GL_INTENSITY: return 1;
 388         case GL_ALPHA: return 2;
 389         }
 390 }
 391
 392 static GLuint build_func(GLuint comparefunc)
 393 {
 394         return comparefunc - GL_NEVER;
 395 }
 396
 397
 398 /**
 399  * Collect all external state that is relevant for compiling the given
 400  * fragment program.
 401  */
 402 static void build_state(
 403         r300ContextPtr r300,
 404         struct r500_fragment_program *fp,
 405         struct r500_fragment_program_external_state *state)
 406 {
 407         int unit;
 408
 409         _mesa_bzero(state, sizeof(*state));
 410
 411         for(unit = 0; unit < 16; ++unit) {
 412                 if (fp->mesa_program.Base.ShadowSamplers & (1 << unit)) {
 413                         struct gl_texture_object* tex = r300->radeon.glCtx->Texture.Unit[unit]._Current;
 414
 415                         state->unit[unit].depth_texture_mode = build_dtm(tex->DepthMode);
 416                         state->unit[unit].texture_compare_func = build_func(tex->CompareFunc);
 417                 }
 418         }
 419 }
 420
 421 static void dump_program(struct r500_fragment_program_code *code);
 422
 423 void r500TranslateFragmentShader(r300ContextPtr r300,
 424                                  struct r500_fragment_program *fp)
 425 {
 426         struct r500_fragment_program_external_state state;
 427
 428         build_state(r300, fp, &state);
 429         if (_mesa_memcmp(&fp->state, &state, sizeof(state))) {
 430                 /* TODO: cache compiled programs */
 431                 fp->translated = GL_FALSE;
 432                 _mesa_memcpy(&fp->state, &state, sizeof(state));
 433         }
 434
 435         if (!fp->translated) {
 436                 struct r500_fragment_program_compiler compiler;
 437
 438                 compiler.r300 = r300;
 439                 compiler.fp = fp;
 440                 compiler.code = &fp->code;
 441                 compiler.program = _mesa_clone_program(r300->radeon.glCtx, &fp->mesa_program.Base);
 442
 443                 if (RADEON_DEBUG & DEBUG_PIXEL) {
 444                         _mesa_printf("Compiler: Initial program:\n");
 445                         _mesa_print_program(compiler.program);
 446                 }
 447
 448                 insert_WPOS_trailer(&compiler);
 449
 450                 struct radeon_program_transformation transformations[] = {
 451                         { &transform_TEX, &compiler },
 452                         { &radeonTransformALU, 0 },
 453                         { &radeonTransformDeriv, 0 },
 454                         { &radeonTransformTrigScale, 0 }
 455                 };
 456                 radeonLocalTransform(r300->radeon.glCtx, compiler.program,
 457                         4, transformations);
 458
 459                 if (RADEON_DEBUG & DEBUG_PIXEL) {
 460                         _mesa_printf("Compiler: after native rewrite:\n");
 461                         _mesa_print_program(compiler.program);
 462                 }
 463
 464                 struct radeon_nqssadce_descr nqssadce = {
 465                         .Init = &nqssadce_init,
 466                         .IsNativeSwizzle = &is_native_swizzle,
 467                         .BuildSwizzle = &nqssadce_build_swizzle,
 468                         .RewriteDepthOut = GL_TRUE
 469                 };
 470                 radeonNqssaDce(r300->radeon.glCtx, compiler.program, &nqssadce);
 471
 472                 if (RADEON_DEBUG & DEBUG_PIXEL) {
 473                         _mesa_printf("Compiler: after NqSSA-DCE:\n");
 474                         _mesa_print_program(compiler.program);
 475                 }
 476
 477                 fp->translated = r500FragmentProgramEmit(&compiler);
 478
 479                 /* Subtle: Rescue any parameters that have been added during transformations */
 480                 _mesa_free_parameter_list(fp->mesa_program.Base.Parameters);
 481                 fp->mesa_program.Base.Parameters = compiler.program->Parameters;
 482                 compiler.program->Parameters = 0;
 483
 484                 _mesa_reference_program(r300->radeon.glCtx, &compiler.program, 0);
 485
 486                 r300UpdateStateParameters(r300->radeon.glCtx, _NEW_PROGRAM);
 487
 488                 if (RADEON_DEBUG & DEBUG_PIXEL) {
 489                         if (fp->translated) {
 490                                 _mesa_printf("Machine-readable code:\n");
 491                                 dump_program(&fp->code);
 492                         }
 493                 }
 494
 495         }
 496
 497         update_params(r300, fp);
 498
 499 }
 500
 501 static char *toswiz(int swiz_val) {
 502   switch(swiz_val) {
 503   case 0: return "R";
 504   case 1: return "G";
 505   case 2: return "B";
 506   case 3: return "A";
 507   case 4: return "0";
 508   case 5: return "1/2";
 509   case 6: return "1";
 510   case 7: return "U";
 511   }
 512   return NULL;
 513 }
 514
 515 static char *toop(int op_val)
 516 {
 517   char *str = NULL;
 518   switch (op_val) {
 519   case 0: str = "MAD"; break;
 520   case 1: str = "DP3"; break;
 521   case 2: str = "DP4"; break;
 522   case 3: str = "D2A"; break;
 523   case 4: str = "MIN"; break;
 524   case 5: str = "MAX"; break;
 525   case 6: str = "Reserved"; break;
 526   case 7: str = "CND"; break;
 527   case 8: str = "CMP"; break;
 528   case 9: str = "FRC"; break;
 529   case 10: str = "SOP"; break;
 530   case 11: str = "MDH"; break;
 531   case 12: str = "MDV"; break;
 532   }
 533   return str;
 534 }
 535
 536 static char *to_alpha_op(int op_val)
 537 {
 538   char *str = NULL;
 539   switch (op_val) {
 540   case 0: str = "MAD"; break;
 541   case 1: str = "DP"; break;
 542   case 2: str = "MIN"; break;
 543   case 3: str = "MAX"; break;
 544   case 4: str = "Reserved"; break;
 545   case 5: str = "CND"; break;
 546   case 6: str = "CMP"; break;
 547   case 7: str = "FRC"; break;
 548   case 8: str = "EX2"; break;
 549   case 9: str = "LN2"; break;
 550   case 10: str = "RCP"; break;
 551   case 11: str = "RSQ"; break;
 552   case 12: str = "SIN"; break;
 553   case 13: str = "COS"; break;
 554   case 14: str = "MDH"; break;
 555   case 15: str = "MDV"; break;
 556   }
 557   return str;
 558 }
 559
 560 static char *to_mask(int val)
 561 {
 562   char *str = NULL;
 563   switch(val) {
 564   case 0: str = "NONE"; break;
 565   case 1: str = "R"; break;
 566   case 2: str = "G"; break;
 567   case 3: str = "RG"; break;
 568   case 4: str = "B"; break;
 569   case 5: str = "RB"; break;
 570   case 6: str = "GB"; break;
 571   case 7: str = "RGB"; break;
 572   case 8: str = "A"; break;
 573   case 9: str = "AR"; break;
 574   case 10: str = "AG"; break;
 575   case 11: str = "ARG"; break;
 576   case 12: str = "AB"; break;
 577   case 13: str = "ARB"; break;
 578   case 14: str = "AGB"; break;
 579   case 15: str = "ARGB"; break;
 580   }
 581   return str;
 582 }
 583
 584 static char *to_texop(int val)
 585 {
 586   switch(val) {
 587   case 0: return "NOP";
 588   case 1: return "LD";
 589   case 2: return "TEXKILL";
 590   case 3: return "PROJ";
 591   case 4: return "LODBIAS";
 592   case 5: return "LOD";
 593   case 6: return "DXDY";
 594   }
 595   return NULL;
 596 }
 597
 598 static void dump_program(struct r500_fragment_program_code *code)
 599 {
 600
 601   fprintf(stderr, "R500 Fragment Program:\n--------\n");
 602
 603   int n;
 604   uint32_t inst;
 605   uint32_t inst0;
 606   char *str = NULL;
 607
 608   if (code->const_nr) {
 609     fprintf(stderr, "--------\nConstants:\n");
 610     for (n = 0; n < code->const_nr; n++) {
 611       fprintf(stderr, "Constant %d: %i[%i]\n", n,
 612         code->constant[n].File, code->constant[n].Index);
 613     }
 614     fprintf(stderr, "--------\n");
 615   }
 616
 617   for (n = 0; n < code->inst_end+1; n++) {
 618     inst0 = inst = code->inst[n].inst0;
 619     fprintf(stderr,"%d\t0:CMN_INST   0x%08x:", n, inst);
 620     switch(inst & 0x3) {
 621     case R500_INST_TYPE_ALU: str = "ALU"; break;
 622     case R500_INST_TYPE_OUT: str = "OUT"; break;
 623     case R500_INST_TYPE_FC: str = "FC"; break;
 624     case R500_INST_TYPE_TEX: str = "TEX"; break;
 625     };
 626     fprintf(stderr,"%s %s %s %s %s ", str,
 627             inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "",
 628             inst & R500_INST_LAST ? "LAST" : "",
 629             inst & R500_INST_NOP ? "NOP" : "",
 630             inst & R500_INST_ALU_WAIT ? "ALU WAIT" : "");
 631     fprintf(stderr,"wmask: %s omask: %s\n", to_mask((inst >> 11) & 0xf),
 632             to_mask((inst >> 15) & 0xf));
 633
 634     switch(inst0 & 0x3) {
 635     case 0:
 636     case 1:
 637       fprintf(stderr,"\t1:RGB_ADDR   0x%08x:", code->inst[n].inst1);
 638       inst = code->inst[n].inst1;
 639
 640       fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
 641               inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
 642               (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
 643               (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
 644               (inst >> 30));
 645
 646       fprintf(stderr,"\t2:ALPHA_ADDR 0x%08x:", code->inst[n].inst2);
 647       inst = code->inst[n].inst2;
 648       fprintf(stderr,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
 649               inst & 0xff, (inst & (1<<8)) ? 'c' : 't',
 650               (inst >> 10) & 0xff, (inst & (1<<18)) ? 'c' : 't',
 651               (inst >> 20) & 0xff, (inst & (1<<28)) ? 'c' : 't',
 652               (inst >> 30));
 653       fprintf(stderr,"\t3 RGB_INST:  0x%08x:", code->inst[n].inst3);
 654       inst = code->inst[n].inst3;
 655       fprintf(stderr,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d\n",
 656               (inst) & 0x3, toswiz((inst >> 2) & 0x7), toswiz((inst >> 5) & 0x7), toswiz((inst >> 8) & 0x7),
 657               (inst >> 11) & 0x3,
 658               (inst >> 13) & 0x3, toswiz((inst >> 15) & 0x7), toswiz((inst >> 18) & 0x7), toswiz((inst >> 21) & 0x7),
 659               (inst >> 24) & 0x3);
 660
 661
 662       fprintf(stderr,"\t4 ALPHA_INST:0x%08x:", code->inst[n].inst4);
 663       inst = code->inst[n].inst4;
 664       fprintf(stderr,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d w:%d\n", to_alpha_op(inst & 0xf),
 665               (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
 666               (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), (inst >> 17) & 0x3,
 667               (inst >> 19) & 0x3, toswiz((inst >> 21) & 0x7), (inst >> 24) & 0x3,
 668               (inst >> 31) & 0x1);
 669
 670       fprintf(stderr,"\t5 RGBA_INST: 0x%08x:", code->inst[n].inst5);
 671       inst = code->inst[n].inst5;
 672       fprintf(stderr,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst & 0xf),
 673               (inst >> 4) & 0x7f, inst & (1<<11) ? "(rel)":"",
 674               (inst >> 12) & 0x3, toswiz((inst >> 14) & 0x7), toswiz((inst >> 17) & 0x7), toswiz((inst >> 20) & 0x7),
 675               (inst >> 23) & 0x3,
 676               (inst >> 25) & 0x3, toswiz((inst >> 27) & 0x7), (inst >> 30) & 0x3);
 677       break;
 678     case 2:
 679       break;
 680     case 3:
 681       inst = code->inst[n].inst1;
 682       fprintf(stderr,"\t1:TEX_INST:  0x%08x: id: %d op:%s, %s, %s %s\n", inst, (inst >> 16) & 0xf,
 683               to_texop((inst >> 22) & 0x7), (inst & (1<<25)) ? "ACQ" : "",
 684               (inst & (1<<26)) ? "IGNUNC" : "", (inst & (1<<27)) ? "UNSCALED" : "SCALED");
 685       inst = code->inst[n].inst2;
 686       fprintf(stderr,"\t2:TEX_ADDR:  0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst,
 687               inst & 127, inst & (1<<7) ? "(rel)" : "",
 688               toswiz((inst >> 8) & 0x3), toswiz((inst >> 10) & 0x3),
 689               toswiz((inst >> 12) & 0x3), toswiz((inst >> 14) & 0x3),
 690               (inst >> 16) & 127, inst & (1<<23) ? "(rel)" : "",
 691               toswiz((inst >> 24) & 0x3), toswiz((inst >> 26) & 0x3),
 692               toswiz((inst >> 28) & 0x3), toswiz((inst >> 30) & 0x3));
 693
 694       fprintf(stderr,"\t3:TEX_DXDY:  0x%08x\n", code->inst[n].inst3);
 695       break;
 696     }
 697     fprintf(stderr,"\n");
 698   }
 699
 700 }