2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 #include "r500_fragprog.h"
30 static void reset_srcreg(struct prog_src_register
* reg
)
32 _mesa_bzero(reg
, sizeof(*reg
));
33 reg
->Swizzle
= SWIZZLE_NOOP
;
36 static struct prog_src_register
shadow_ambient(struct gl_program
*program
, int tmu
)
38 gl_state_index fail_value_tokens
[STATE_LENGTH
] = {
39 STATE_INTERNAL
, STATE_SHADOW_AMBIENT
, 0, 0, 0
41 struct prog_src_register reg
= { 0, };
43 fail_value_tokens
[2] = tmu
;
44 reg
.File
= PROGRAM_STATE_VAR
;
45 reg
.Index
= _mesa_add_state_reference(program
->Parameters
, fail_value_tokens
);
46 reg
.Swizzle
= SWIZZLE_WWWW
;
51 * Transform TEX, TXP, TXB, and KIL instructions in the following way:
52 * - premultiply texture coordinates for RECT
53 * - extract operand swizzles
54 * - introduce a temporary register when write masks are needed
57 GLboolean
r500_transform_TEX(
58 struct radeon_transform_context
*t
,
59 struct prog_instruction
* orig_inst
, void* data
)
61 struct r300_fragment_program_compiler
*compiler
=
62 (struct r300_fragment_program_compiler
*)data
;
63 struct prog_instruction inst
= *orig_inst
;
64 struct prog_instruction
* tgt
;
65 GLboolean destredirect
= GL_FALSE
;
67 if (inst
.Opcode
!= OPCODE_TEX
&&
68 inst
.Opcode
!= OPCODE_TXB
&&
69 inst
.Opcode
!= OPCODE_TXP
&&
70 inst
.Opcode
!= OPCODE_KIL
)
73 /* ARB_shadow & EXT_shadow_funcs */
74 if (inst
.Opcode
!= OPCODE_KIL
&&
75 t
->Program
->ShadowSamplers
& (1 << inst
.TexSrcUnit
)) {
76 GLuint comparefunc
= GL_NEVER
+ compiler
->fp
->state
.unit
[inst
.TexSrcUnit
].texture_compare_func
;
78 if (comparefunc
== GL_NEVER
|| comparefunc
== GL_ALWAYS
) {
79 tgt
= radeonAppendInstructions(t
->Program
, 1);
81 tgt
->Opcode
= OPCODE_MOV
;
82 tgt
->DstReg
= inst
.DstReg
;
83 if (comparefunc
== GL_ALWAYS
) {
84 tgt
->SrcReg
[0].File
= PROGRAM_BUILTIN
;
85 tgt
->SrcReg
[0].Swizzle
= SWIZZLE_1111
;
87 tgt
->SrcReg
[0] = shadow_ambient(t
->Program
, inst
.TexSrcUnit
);
92 inst
.DstReg
.File
= PROGRAM_TEMPORARY
;
93 inst
.DstReg
.Index
= radeonFindFreeTemporary(t
);
94 inst
.DstReg
.WriteMask
= WRITEMASK_XYZW
;
95 } else if (inst
.Opcode
!= OPCODE_KIL
&& inst
.DstReg
.File
!= PROGRAM_TEMPORARY
) {
96 int tempreg
= radeonFindFreeTemporary(t
);
98 inst
.DstReg
.File
= PROGRAM_TEMPORARY
;
99 inst
.DstReg
.Index
= tempreg
;
100 inst
.DstReg
.WriteMask
= WRITEMASK_XYZW
;
101 destredirect
= GL_TRUE
;
104 if (inst
.SrcReg
[0].File
!= PROGRAM_TEMPORARY
&& inst
.SrcReg
[0].File
!= PROGRAM_INPUT
) {
105 int tmpreg
= radeonFindFreeTemporary(t
);
106 tgt
= radeonAppendInstructions(t
->Program
, 1);
107 tgt
->Opcode
= OPCODE_MOV
;
108 tgt
->DstReg
.File
= PROGRAM_TEMPORARY
;
109 tgt
->DstReg
.Index
= tmpreg
;
110 tgt
->SrcReg
[0] = inst
.SrcReg
[0];
112 reset_srcreg(&inst
.SrcReg
[0]);
113 inst
.SrcReg
[0].File
= PROGRAM_TEMPORARY
;
114 inst
.SrcReg
[0].Index
= tmpreg
;
117 tgt
= radeonAppendInstructions(t
->Program
, 1);
118 _mesa_copy_instructions(tgt
, &inst
, 1);
120 if (inst
.Opcode
!= OPCODE_KIL
&&
121 t
->Program
->ShadowSamplers
& (1 << inst
.TexSrcUnit
)) {
122 GLuint comparefunc
= GL_NEVER
+ compiler
->fp
->state
.unit
[inst
.TexSrcUnit
].texture_compare_func
;
123 GLuint depthmode
= compiler
->fp
->state
.unit
[inst
.TexSrcUnit
].depth_texture_mode
;
124 int rcptemp
= radeonFindFreeTemporary(t
);
127 tgt
= radeonAppendInstructions(t
->Program
, 3);
129 tgt
[0].Opcode
= OPCODE_RCP
;
130 tgt
[0].DstReg
.File
= PROGRAM_TEMPORARY
;
131 tgt
[0].DstReg
.Index
= rcptemp
;
132 tgt
[0].DstReg
.WriteMask
= WRITEMASK_W
;
133 tgt
[0].SrcReg
[0] = inst
.SrcReg
[0];
134 tgt
[0].SrcReg
[0].Swizzle
= SWIZZLE_WWWW
;
136 tgt
[1].Opcode
= OPCODE_MAD
;
137 tgt
[1].DstReg
= inst
.DstReg
;
138 tgt
[1].DstReg
.WriteMask
= orig_inst
->DstReg
.WriteMask
;
139 tgt
[1].SrcReg
[0] = inst
.SrcReg
[0];
140 tgt
[1].SrcReg
[0].Swizzle
= SWIZZLE_ZZZZ
;
141 tgt
[1].SrcReg
[1].File
= PROGRAM_TEMPORARY
;
142 tgt
[1].SrcReg
[1].Index
= rcptemp
;
143 tgt
[1].SrcReg
[1].Swizzle
= SWIZZLE_WWWW
;
144 tgt
[1].SrcReg
[2].File
= PROGRAM_TEMPORARY
;
145 tgt
[1].SrcReg
[2].Index
= inst
.DstReg
.Index
;
146 if (depthmode
== 0) /* GL_LUMINANCE */
147 tgt
[1].SrcReg
[2].Swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
);
148 else if (depthmode
== 2) /* GL_ALPHA */
149 tgt
[1].SrcReg
[2].Swizzle
= SWIZZLE_WWWW
;
151 /* Recall that SrcReg[0] is tex, SrcReg[2] is r and:
152 * r < tex <=> -tex+r < 0
153 * r >= tex <=> not (-tex+r < 0 */
154 if (comparefunc
== GL_LESS
|| comparefunc
== GL_GEQUAL
)
155 tgt
[1].SrcReg
[2].NegateBase
= tgt
[0].SrcReg
[2].NegateBase
^ NEGATE_XYZW
;
157 tgt
[1].SrcReg
[0].NegateBase
= tgt
[0].SrcReg
[0].NegateBase
^ NEGATE_XYZW
;
159 tgt
[2].Opcode
= OPCODE_CMP
;
160 tgt
[2].DstReg
= orig_inst
->DstReg
;
161 tgt
[2].SrcReg
[0].File
= PROGRAM_TEMPORARY
;
162 tgt
[2].SrcReg
[0].Index
= tgt
[1].DstReg
.Index
;
164 if (comparefunc
== GL_LESS
|| comparefunc
== GL_GREATER
) {
172 tgt
[2].SrcReg
[pass
].File
= PROGRAM_BUILTIN
;
173 tgt
[2].SrcReg
[pass
].Swizzle
= SWIZZLE_1111
;
174 tgt
[2].SrcReg
[fail
] = shadow_ambient(t
->Program
, inst
.TexSrcUnit
);
175 } else if (destredirect
) {
176 tgt
= radeonAppendInstructions(t
->Program
, 1);
178 tgt
->Opcode
= OPCODE_MOV
;
179 tgt
->DstReg
= orig_inst
->DstReg
;
180 tgt
->SrcReg
[0].File
= PROGRAM_TEMPORARY
;
181 tgt
->SrcReg
[0].Index
= inst
.DstReg
.Index
;
187 GLboolean
r500FPIsNativeSwizzle(GLuint opcode
, struct prog_src_register reg
)
192 if (opcode
== OPCODE_TEX
||
193 opcode
== OPCODE_TXB
||
194 opcode
== OPCODE_TXP
||
195 opcode
== OPCODE_KIL
) {
200 reg
.NegateBase
^= 15;
202 if (opcode
== OPCODE_KIL
) {
203 if (reg
.Swizzle
!= SWIZZLE_NOOP
)
206 for(i
= 0; i
< 4; ++i
) {
207 GLuint swz
= GET_SWZ(reg
.Swizzle
, i
);
208 if (swz
== SWIZZLE_NIL
) {
209 reg
.NegateBase
&= ~(1 << i
);
221 } else if (opcode
== OPCODE_DDX
|| opcode
== OPCODE_DDY
) {
222 /* DDX/MDH and DDY/MDV explicitly ignore incoming swizzles;
223 * if it doesn't fit perfectly into a .xyzw case... */
224 if (reg
.Swizzle
== SWIZZLE_NOOP
&& !reg
.Abs
225 && !reg
.NegateBase
&& !reg
.NegateAbs
)
230 /* ALU instructions support almost everything */
235 for(i
= 0; i
< 3; ++i
) {
236 GLuint swz
= GET_SWZ(reg
.Swizzle
, i
);
237 if (swz
!= SWIZZLE_NIL
&& swz
!= SWIZZLE_ZERO
)
240 if ((reg
.NegateBase
& relevant
) && ((reg
.NegateBase
& relevant
) != relevant
))
248 * Implement a MOV with a potentially non-native swizzle.
250 * The only thing we *cannot* do in an ALU instruction is per-component
251 * negation. Therefore, we split the MOV into two instructions when necessary.
253 void r500FPBuildSwizzle(struct nqssadce_state
*s
, struct prog_dst_register dst
, struct prog_src_register src
)
255 struct prog_instruction
*inst
;
256 GLuint negatebase
[2] = { 0, 0 };
259 for(i
= 0; i
< 4; ++i
) {
260 GLuint swz
= GET_SWZ(src
.Swizzle
, i
);
261 if (swz
== SWIZZLE_NIL
)
263 negatebase
[GET_BIT(src
.NegateBase
, i
)] |= 1 << i
;
266 _mesa_insert_instructions(s
->Program
, s
->IP
, (negatebase
[0] ? 1 : 0) + (negatebase
[1] ? 1 : 0));
267 inst
= s
->Program
->Instructions
+ s
->IP
;
269 for(i
= 0; i
<= 1; ++i
) {
273 inst
->Opcode
= OPCODE_MOV
;
275 inst
->DstReg
.WriteMask
= negatebase
[i
];
276 inst
->SrcReg
[0] = src
;
283 static char *toswiz(int swiz_val
) {
290 case 5: return "1/2";
297 static char *toop(int op_val
)
301 case 0: str
= "MAD"; break;
302 case 1: str
= "DP3"; break;
303 case 2: str
= "DP4"; break;
304 case 3: str
= "D2A"; break;
305 case 4: str
= "MIN"; break;
306 case 5: str
= "MAX"; break;
307 case 6: str
= "Reserved"; break;
308 case 7: str
= "CND"; break;
309 case 8: str
= "CMP"; break;
310 case 9: str
= "FRC"; break;
311 case 10: str
= "SOP"; break;
312 case 11: str
= "MDH"; break;
313 case 12: str
= "MDV"; break;
318 static char *to_alpha_op(int op_val
)
322 case 0: str
= "MAD"; break;
323 case 1: str
= "DP"; break;
324 case 2: str
= "MIN"; break;
325 case 3: str
= "MAX"; break;
326 case 4: str
= "Reserved"; break;
327 case 5: str
= "CND"; break;
328 case 6: str
= "CMP"; break;
329 case 7: str
= "FRC"; break;
330 case 8: str
= "EX2"; break;
331 case 9: str
= "LN2"; break;
332 case 10: str
= "RCP"; break;
333 case 11: str
= "RSQ"; break;
334 case 12: str
= "SIN"; break;
335 case 13: str
= "COS"; break;
336 case 14: str
= "MDH"; break;
337 case 15: str
= "MDV"; break;
342 static char *to_mask(int val
)
346 case 0: str
= "NONE"; break;
347 case 1: str
= "R"; break;
348 case 2: str
= "G"; break;
349 case 3: str
= "RG"; break;
350 case 4: str
= "B"; break;
351 case 5: str
= "RB"; break;
352 case 6: str
= "GB"; break;
353 case 7: str
= "RGB"; break;
354 case 8: str
= "A"; break;
355 case 9: str
= "AR"; break;
356 case 10: str
= "AG"; break;
357 case 11: str
= "ARG"; break;
358 case 12: str
= "AB"; break;
359 case 13: str
= "ARB"; break;
360 case 14: str
= "AGB"; break;
361 case 15: str
= "ARGB"; break;
366 static char *to_texop(int val
)
369 case 0: return "NOP";
371 case 2: return "TEXKILL";
372 case 3: return "PROJ";
373 case 4: return "LODBIAS";
374 case 5: return "LOD";
375 case 6: return "DXDY";
380 void r500FragmentProgramDump(union rX00_fragment_program_code
*c
)
382 struct r500_fragment_program_code
*code
= &c
->r500
;
383 fprintf(stderr
, "R500 Fragment Program:\n--------\n");
390 if (code
->const_nr
) {
391 fprintf(stderr
, "--------\nConstants:\n");
392 for (n
= 0; n
< code
->const_nr
; n
++) {
393 fprintf(stderr
, "Constant %d: %i[%i]\n", n
,
394 code
->constant
[n
].File
, code
->constant
[n
].Index
);
396 fprintf(stderr
, "--------\n");
399 for (n
= 0; n
< code
->inst_end
+1; n
++) {
400 inst0
= inst
= code
->inst
[n
].inst0
;
401 fprintf(stderr
,"%d\t0:CMN_INST 0x%08x:", n
, inst
);
403 case R500_INST_TYPE_ALU
: str
= "ALU"; break;
404 case R500_INST_TYPE_OUT
: str
= "OUT"; break;
405 case R500_INST_TYPE_FC
: str
= "FC"; break;
406 case R500_INST_TYPE_TEX
: str
= "TEX"; break;
408 fprintf(stderr
,"%s %s %s %s %s ", str
,
409 inst
& R500_INST_TEX_SEM_WAIT
? "TEX_WAIT" : "",
410 inst
& R500_INST_LAST
? "LAST" : "",
411 inst
& R500_INST_NOP
? "NOP" : "",
412 inst
& R500_INST_ALU_WAIT
? "ALU WAIT" : "");
413 fprintf(stderr
,"wmask: %s omask: %s\n", to_mask((inst
>> 11) & 0xf),
414 to_mask((inst
>> 15) & 0xf));
416 switch(inst0
& 0x3) {
419 fprintf(stderr
,"\t1:RGB_ADDR 0x%08x:", code
->inst
[n
].inst1
);
420 inst
= code
->inst
[n
].inst1
;
422 fprintf(stderr
,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
423 inst
& 0xff, (inst
& (1<<8)) ? 'c' : 't',
424 (inst
>> 10) & 0xff, (inst
& (1<<18)) ? 'c' : 't',
425 (inst
>> 20) & 0xff, (inst
& (1<<28)) ? 'c' : 't',
428 fprintf(stderr
,"\t2:ALPHA_ADDR 0x%08x:", code
->inst
[n
].inst2
);
429 inst
= code
->inst
[n
].inst2
;
430 fprintf(stderr
,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
431 inst
& 0xff, (inst
& (1<<8)) ? 'c' : 't',
432 (inst
>> 10) & 0xff, (inst
& (1<<18)) ? 'c' : 't',
433 (inst
>> 20) & 0xff, (inst
& (1<<28)) ? 'c' : 't',
435 fprintf(stderr
,"\t3 RGB_INST: 0x%08x:", code
->inst
[n
].inst3
);
436 inst
= code
->inst
[n
].inst3
;
437 fprintf(stderr
,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d\n",
438 (inst
) & 0x3, toswiz((inst
>> 2) & 0x7), toswiz((inst
>> 5) & 0x7), toswiz((inst
>> 8) & 0x7),
440 (inst
>> 13) & 0x3, toswiz((inst
>> 15) & 0x7), toswiz((inst
>> 18) & 0x7), toswiz((inst
>> 21) & 0x7),
444 fprintf(stderr
,"\t4 ALPHA_INST:0x%08x:", code
->inst
[n
].inst4
);
445 inst
= code
->inst
[n
].inst4
;
446 fprintf(stderr
,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d w:%d\n", to_alpha_op(inst
& 0xf),
447 (inst
>> 4) & 0x7f, inst
& (1<<11) ? "(rel)":"",
448 (inst
>> 12) & 0x3, toswiz((inst
>> 14) & 0x7), (inst
>> 17) & 0x3,
449 (inst
>> 19) & 0x3, toswiz((inst
>> 21) & 0x7), (inst
>> 24) & 0x3,
452 fprintf(stderr
,"\t5 RGBA_INST: 0x%08x:", code
->inst
[n
].inst5
);
453 inst
= code
->inst
[n
].inst5
;
454 fprintf(stderr
,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst
& 0xf),
455 (inst
>> 4) & 0x7f, inst
& (1<<11) ? "(rel)":"",
456 (inst
>> 12) & 0x3, toswiz((inst
>> 14) & 0x7), toswiz((inst
>> 17) & 0x7), toswiz((inst
>> 20) & 0x7),
458 (inst
>> 25) & 0x3, toswiz((inst
>> 27) & 0x7), (inst
>> 30) & 0x3);
463 inst
= code
->inst
[n
].inst1
;
464 fprintf(stderr
,"\t1:TEX_INST: 0x%08x: id: %d op:%s, %s, %s %s\n", inst
, (inst
>> 16) & 0xf,
465 to_texop((inst
>> 22) & 0x7), (inst
& (1<<25)) ? "ACQ" : "",
466 (inst
& (1<<26)) ? "IGNUNC" : "", (inst
& (1<<27)) ? "UNSCALED" : "SCALED");
467 inst
= code
->inst
[n
].inst2
;
468 fprintf(stderr
,"\t2:TEX_ADDR: 0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst
,
469 inst
& 127, inst
& (1<<7) ? "(rel)" : "",
470 toswiz((inst
>> 8) & 0x3), toswiz((inst
>> 10) & 0x3),
471 toswiz((inst
>> 12) & 0x3), toswiz((inst
>> 14) & 0x3),
472 (inst
>> 16) & 127, inst
& (1<<23) ? "(rel)" : "",
473 toswiz((inst
>> 24) & 0x3), toswiz((inst
>> 26) & 0x3),
474 toswiz((inst
>> 28) & 0x3), toswiz((inst
>> 30) & 0x3));
476 fprintf(stderr
,"\t3:TEX_DXDY: 0x%08x\n", code
->inst
[n
].inst3
);
479 fprintf(stderr
,"\n");