2 * Copyright (C) 2005 Ben Skeggs.
4 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
5 * Adaptation and modification for ATI/AMD Radeon R500 GPU chipsets.
9 * Permission is hereby granted, free of charge, to any person obtaining
10 * a copy of this software and associated documentation files (the
11 * "Software"), to deal in the Software without restriction, including
12 * without limitation the rights to use, copy, modify, merge, publish,
13 * distribute, sublicense, and/or sell copies of the Software, and to
14 * permit persons to whom the Software is furnished to do so, subject to
15 * the following conditions:
17 * The above copyright notice and this permission notice (including the
18 * next paragraph) shall be included in all copies or substantial
19 * portions of the Software.
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
22 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
23 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
25 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
26 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
27 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
34 * \author Ben Skeggs <darktama@iinet.net.au>
36 * \author Jerome Glisse <j.glisse@gmail.com>
38 * \author Corbin Simpson <MostAwesomeDude@gmail.com>
40 * \todo Depth write, WPOS/FOGC inputs
44 * \todo Verify results of opcodes for accuracy, I've only checked them in
51 #include "shader/prog_instruction.h"
52 #include "shader/prog_parameter.h"
53 #include "shader/prog_print.h"
55 #include "r300_context.h"
56 #include "r500_fragprog.h"
58 #include "r300_state.h"
61 * Useful macros and values
63 #define ERROR(fmt, args...) do { \
64 fprintf(stderr, "%s::%s(): " fmt "\n", \
65 __FILE__, __FUNCTION__, ##args); \
66 fp->error = GL_TRUE; \
69 #define COMPILE_STATE struct r300_pfs_compile_state *cs = fp->cs
71 #define R500_US_NUM_TEMP_REGS 128
72 #define R500_US_NUM_CONST_REGS 256
74 /* "Register" flags */
75 #define REG_CONSTANT (1 << 8)
76 #define REG_SRC_REL (1 << 9)
77 #define REG_DEST_REL (1 << 7)
80 #define R500_SWIZZLE_ZERO 4
81 #define R500_SWIZZLE_HALF 5
82 #define R500_SWIZZLE_ONE 6
83 #define R500_SWIZ_RGB_ZERO ((4 << 0) | (4 << 3) | (4 << 6))
84 #define R500_SWIZ_RGB_ONE ((6 << 0) | (6 << 3) | (6 << 6))
85 #define R500_SWIZ_RGB_RGB ((0 << 0) | (1 << 3) | (2 << 6))
86 #define R500_SWIZ_MOD_NEG 1
87 #define R500_SWIZ_MOD_ABS 2
88 #define R500_SWIZ_MOD_NEG_ABS 3
89 /* Swizzles for inst2 */
90 #define MAKE_SWIZ_TEX_STRQ(x) (x << 8)
91 #define MAKE_SWIZ_TEX_RGBA(x) (x << 24)
92 /* Swizzles for inst3 */
93 #define MAKE_SWIZ_RGB_A(x) (x << 2)
94 #define MAKE_SWIZ_RGB_B(x) (x << 15)
95 /* Swizzles for inst4 */
96 #define MAKE_SWIZ_ALPHA_A(x) (x << 14)
97 #define MAKE_SWIZ_ALPHA_B(x) (x << 21)
98 /* Swizzle for inst5 */
99 #define MAKE_SWIZ_RGBA_C(x) (x << 14)
100 #define MAKE_SWIZ_ALPHA_C(x) (x << 27)
103 #define R500_WRITEMASK_G 0x2
104 #define R500_WRITEMASK_RGB 0x7
105 #define R500_WRITEMASK_A 0x8
106 #define R500_WRITEMASK_AR 0x9
107 #define R500_WRITEMASK_AG 0xA
108 #define R500_WRITEMASK_ARG 0xB
109 #define R500_WRITEMASK_AB 0xC
110 #define R500_WRITEMASK_ARGB 0xF
112 /* 1/(2pi), needed for quick modulus in trig insts
113 * Thanks to glisse for pointing out how to do it! */
114 static const GLfloat RCP_2PI
[] = {0.15915494309189535,
117 0.15915494309189535};
119 static const GLfloat LIT
[] = {127.999999,
124 static void dump_program(struct r500_fragment_program
*fp
);
126 static inline GLuint
make_rgb_swizzle(struct prog_src_register src
) {
129 /* This could be optimized, but it should be plenty fast already. */
131 for (i
= 0; i
< 3; i
++) {
132 temp
= GET_SWZ(src
.Swizzle
, i
);
133 /* Fix SWIZZLE_ONE */
134 if (temp
== 5) temp
++;
138 swiz
|= (R500_SWIZ_MOD_NEG
<< 9);
142 static inline GLuint
make_rgba_swizzle(GLuint src
) {
146 for (i
= 0; i
< 4; i
++) {
147 temp
= GET_SWZ(src
, i
);
148 /* Fix SWIZZLE_ONE */
149 if (temp
== 5) temp
++;
155 static inline GLuint
make_alpha_swizzle(struct prog_src_register src
) {
156 GLuint swiz
= GET_SWZ(src
.Swizzle
, 3);
158 if (swiz
== 5) swiz
++;
161 swiz
|= (R500_SWIZ_MOD_NEG
<< 3);
166 static inline GLuint
make_sop_swizzle(struct prog_src_register src
) {
167 GLuint swiz
= GET_SWZ(src
.Swizzle
, 0);
169 if (swiz
== 5) swiz
++;
173 static inline GLuint
make_strq_swizzle(struct prog_src_register src
) {
174 GLuint swiz
= 0x0, temp
= 0x0;
176 for (i
= 0; i
< 4; i
++) {
177 temp
= GET_SWZ(src
.Swizzle
, i
) & 0x3;
183 static int get_temp(struct r500_fragment_program
*fp
, int slot
) {
187 int r
= fp
->temp_reg_offset
+ cs
->temp_in_use
+ slot
;
189 if (r
> R500_US_NUM_TEMP_REGS
) {
190 ERROR("Too many temporary registers requested, can't compile!\n");
196 /* Borrowed verbatim from r300_fragprog since it hasn't changed. */
197 static GLuint
emit_const4fv(struct r500_fragment_program
*fp
,
203 for (index
= 0; index
< fp
->const_nr
; ++index
) {
204 if (fp
->constant
[index
] == cp
)
208 if (index
>= fp
->const_nr
) {
209 if (index
>= R500_US_NUM_CONST_REGS
) {
210 ERROR("Out of hw constants!\n");
215 fp
->constant
[index
] = cp
;
218 reg
= index
| REG_CONSTANT
;
222 static GLuint
make_src(struct r500_fragment_program
*fp
, struct prog_src_register src
) {
226 case PROGRAM_TEMPORARY
:
227 reg
= src
.Index
+ fp
->temp_reg_offset
;
230 reg
= cs
->inputs
[src
.Index
].reg
;
232 case PROGRAM_LOCAL_PARAM
:
233 reg
= emit_const4fv(fp
,
234 fp
->mesa_program
.Base
.LocalParams
[src
.
237 case PROGRAM_ENV_PARAM
:
238 reg
= emit_const4fv(fp
,
239 fp
->ctx
->FragmentProgram
.Parameters
[src
.
242 case PROGRAM_STATE_VAR
:
243 case PROGRAM_NAMED_PARAM
:
244 case PROGRAM_CONSTANT
:
245 reg
= emit_const4fv(fp
, fp
->mesa_program
.Base
.Parameters
->
246 ParameterValues
[src
.Index
]);
249 ERROR("Can't handle src.File %x\n", src
.File
);
256 static GLuint
make_dest(struct r500_fragment_program
*fp
, struct prog_dst_register dest
) {
259 case PROGRAM_TEMPORARY
:
260 reg
= dest
.Index
+ fp
->temp_reg_offset
;
263 /* Eventually we may need to handle multiple
264 * rendering targets... */
268 ERROR("Can't handle dest.File %x\n", dest
.File
);
275 static void emit_tex(struct r500_fragment_program
*fp
,
276 struct prog_instruction
*fpi
, int dest
, int counter
)
281 mask
= fpi
->DstReg
.WriteMask
<< 11;
282 hwsrc
= make_src(fp
, fpi
->SrcReg
[0]);
284 if (fpi
->DstReg
.File
== PROGRAM_OUTPUT
) {
285 hwdest
= get_temp(fp
, 0);
290 fp
->inst
[counter
].inst0
= R500_INST_TYPE_TEX
| mask
291 | R500_INST_TEX_SEM_WAIT
;
293 fp
->inst
[counter
].inst1
= R500_TEX_ID(fpi
->TexSrcUnit
)
294 | R500_TEX_SEM_ACQUIRE
| R500_TEX_IGNORE_UNCOVERED
;
296 if (fpi
->TexSrcTarget
== TEXTURE_RECT_INDEX
)
297 fp
->inst
[counter
].inst1
|= R500_TEX_UNSCALED
;
299 switch (fpi
->Opcode
) {
301 fp
->inst
[counter
].inst1
|= R500_TEX_INST_TEXKILL
;
304 fp
->inst
[counter
].inst1
|= R500_TEX_INST_LD
;
307 fp
->inst
[counter
].inst1
|= R500_TEX_INST_LODBIAS
;
310 fp
->inst
[counter
].inst1
|= R500_TEX_INST_PROJ
;
313 ERROR("emit_tex can't handle opcode %x\n", fpi
->Opcode
);
316 fp
->inst
[counter
].inst2
= R500_TEX_SRC_ADDR(hwsrc
)
317 | MAKE_SWIZ_TEX_STRQ(make_strq_swizzle(fpi
->SrcReg
[0]))
318 /* | R500_TEX_SRC_S_SWIZ_R | R500_TEX_SRC_T_SWIZ_G
319 | R500_TEX_SRC_R_SWIZ_B | R500_TEX_SRC_Q_SWIZ_A */
320 | R500_TEX_DST_ADDR(hwdest
)
321 | R500_TEX_DST_R_SWIZ_R
| R500_TEX_DST_G_SWIZ_G
322 | R500_TEX_DST_B_SWIZ_B
| R500_TEX_DST_A_SWIZ_A
;
324 fp
->inst
[counter
].inst3
= 0x0;
325 fp
->inst
[counter
].inst4
= 0x0;
326 fp
->inst
[counter
].inst5
= 0x0;
328 if (fpi
->DstReg
.File
== PROGRAM_OUTPUT
) {
330 fp
->inst
[counter
].inst0
= R500_INST_TYPE_OUT
331 | R500_INST_TEX_SEM_WAIT
| (mask
<< 4);
332 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(get_temp(fp
, 0));
333 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(get_temp(fp
, 0));
334 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
335 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB
)
336 | R500_ALU_RGB_SEL_B_SRC0
337 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB
)
338 | R500_ALU_RGB_OMOD_DISABLE
;
339 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_CMP
340 | R500_ALPHA_ADDRD(dest
)
341 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(R500_ALPHA_SWIZ_A_A
)
342 | R500_ALPHA_SEL_B_SRC0
| MAKE_SWIZ_ALPHA_B(R500_ALPHA_SWIZ_A_A
)
343 | R500_ALPHA_OMOD_DISABLE
;
344 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_CMP
345 | R500_ALU_RGBA_ADDRD(dest
)
346 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO
)
347 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO
);
351 static void emit_alu(struct r500_fragment_program
*fp
, int counter
, struct prog_instruction
*fpi
) {
352 if (fpi
->DstReg
.File
== PROGRAM_OUTPUT
) {
353 fp
->inst
[counter
].inst0
= R500_INST_TYPE_OUT
;
355 if (fpi
->DstReg
.Index
== FRAG_RESULT_COLR
)
356 fp
->inst
[counter
].inst0
|= (fpi
->DstReg
.WriteMask
<< 15);
358 if (fpi
->DstReg
.Index
== FRAG_RESULT_DEPR
)
359 fp
->inst
[counter
].inst4
= R500_ALPHA_W_OMASK
;
361 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
363 | (fpi
->DstReg
.WriteMask
<< 11);
366 fp
->inst
[counter
].inst0
|= R500_INST_TEX_SEM_WAIT
;
368 /* Ideally, we shouldn't have to explicitly clear memory here! */
369 fp
->inst
[counter
].inst1
= 0x0;
370 fp
->inst
[counter
].inst2
= 0x0;
371 fp
->inst
[counter
].inst3
= 0x0;
372 fp
->inst
[counter
].inst5
= 0x0;
375 static void emit_mov(struct r500_fragment_program
*fp
, int counter
, struct prog_instruction
*fpi
, GLuint src_reg
, GLuint swizzle
, GLuint dest
) {
376 /* The r3xx shader uses MAD to implement MOV. We are using CMP, since
377 * it is technically more accurate and recommended by ATI/AMD. */
378 emit_alu(fp
, counter
, fpi
);
379 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src_reg
);
380 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src_reg
);
381 /* (De)mangle the swizzle from Mesa to R500. */
382 swizzle
= make_rgba_swizzle(swizzle
);
383 /* 0x1FF is 9 bits, size of an RGB swizzle. */
384 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
385 | MAKE_SWIZ_RGB_A((swizzle
& 0x1ff))
386 | R500_ALU_RGB_SEL_B_SRC0
387 | MAKE_SWIZ_RGB_B((swizzle
& 0x1ff))
388 | R500_ALU_RGB_OMOD_DISABLE
;
389 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_CMP
390 | R500_ALPHA_ADDRD(dest
)
391 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(GET_SWZ(swizzle
, 3))
392 | R500_ALPHA_SEL_B_SRC0
| MAKE_SWIZ_ALPHA_B(GET_SWZ(swizzle
, 3))
393 | R500_ALPHA_OMOD_DISABLE
;
394 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_CMP
395 | R500_ALU_RGBA_ADDRD(dest
)
396 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO
)
397 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO
);
400 static void emit_mad(struct r500_fragment_program
*fp
, int counter
, struct prog_instruction
*fpi
, int one
, int two
, int three
) {
401 /* Note: This code was all Corbin's. Corbin is a rather hackish coder.
402 * If you can make it pretty or fast, please do so! */
403 emit_alu(fp
, counter
, fpi
);
404 /* Common MAD stuff */
405 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_MAD
406 | R500_ALPHA_ADDRD(make_dest(fp
, fpi
->DstReg
));
407 fp
->inst
[counter
].inst5
|= R500_ALU_RGBA_OP_MAD
408 | R500_ALU_RGBA_ADDRD(make_dest(fp
, fpi
->DstReg
));
413 fp
->inst
[counter
].inst1
|= R500_RGB_ADDR0(make_src(fp
, fpi
->SrcReg
[one
]));
414 fp
->inst
[counter
].inst2
|= R500_ALPHA_ADDR0(make_src(fp
, fpi
->SrcReg
[one
]));
415 fp
->inst
[counter
].inst3
|= R500_ALU_RGB_SEL_A_SRC0
416 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[one
]));
417 fp
->inst
[counter
].inst4
|= R500_ALPHA_SEL_A_SRC0
418 | MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi
->SrcReg
[one
]));
420 case R500_SWIZZLE_ZERO
:
421 fp
->inst
[counter
].inst3
|= MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ZERO
);
422 fp
->inst
[counter
].inst4
|= MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ZERO
);
424 case R500_SWIZZLE_ONE
:
425 fp
->inst
[counter
].inst3
|= MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ONE
);
426 fp
->inst
[counter
].inst4
|= MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE
);
429 ERROR("Bad src index in emit_mad: %d\n", one
);
436 fp
->inst
[counter
].inst1
|= R500_RGB_ADDR1(make_src(fp
, fpi
->SrcReg
[two
]));
437 fp
->inst
[counter
].inst2
|= R500_ALPHA_ADDR1(make_src(fp
, fpi
->SrcReg
[two
]));
438 fp
->inst
[counter
].inst3
|= R500_ALU_RGB_SEL_B_SRC1
439 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi
->SrcReg
[two
]));
440 fp
->inst
[counter
].inst4
|= R500_ALPHA_SEL_B_SRC1
441 | MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi
->SrcReg
[two
]));
443 case R500_SWIZZLE_ZERO
:
444 fp
->inst
[counter
].inst3
|= MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ZERO
);
445 fp
->inst
[counter
].inst4
|= MAKE_SWIZ_ALPHA_B(R500_SWIZZLE_ZERO
);
447 case R500_SWIZZLE_ONE
:
448 fp
->inst
[counter
].inst3
|= MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ONE
);
449 fp
->inst
[counter
].inst4
|= MAKE_SWIZ_ALPHA_B(R500_SWIZZLE_ONE
);
452 ERROR("Bad src index in emit_mad: %d\n", two
);
459 fp
->inst
[counter
].inst1
|= R500_RGB_ADDR2(make_src(fp
, fpi
->SrcReg
[three
]));
460 fp
->inst
[counter
].inst2
|= R500_ALPHA_ADDR2(make_src(fp
, fpi
->SrcReg
[three
]));
461 fp
->inst
[counter
].inst5
|= R500_ALU_RGBA_SEL_C_SRC2
462 | MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi
->SrcReg
[three
]))
463 | R500_ALU_RGBA_ALPHA_SEL_C_SRC2
464 | MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi
->SrcReg
[three
]));
466 case R500_SWIZZLE_ZERO
:
467 fp
->inst
[counter
].inst5
|= MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO
)
468 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO
);
470 case R500_SWIZZLE_ONE
:
471 fp
->inst
[counter
].inst5
|= MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ONE
)
472 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ONE
);
475 ERROR("Bad src index in emit_mad: %d\n", three
);
480 static GLboolean
parse_program(struct r500_fragment_program
*fp
)
482 struct gl_fragment_program
*mp
= &fp
->mesa_program
;
483 const struct prog_instruction
*inst
= mp
->Base
.Instructions
;
484 struct prog_instruction
*fpi
;
485 GLuint src
[3], dest
= 0;
486 int temp_swiz
, counter
= 0;
488 if (!inst
|| inst
[0].Opcode
== OPCODE_END
) {
489 ERROR("The program is empty!\n");
493 for (fpi
= mp
->Base
.Instructions
; fpi
->Opcode
!= OPCODE_END
; fpi
++) {
495 if (fpi
->Opcode
!= OPCODE_KIL
) {
496 dest
= make_dest(fp
, fpi
->DstReg
);
499 switch (fpi
->Opcode
) {
501 emit_mov(fp
, counter
, fpi
, make_src(fp
, fpi
->SrcReg
[0]), fpi
->SrcReg
[0].Swizzle
, dest
);
502 fp
->inst
[counter
].inst3
|= R500_ALU_RGB_MOD_A_ABS
503 | R500_ALU_RGB_MOD_B_ABS
;
504 fp
->inst
[counter
].inst4
|= R500_ALPHA_MOD_A_ABS
505 | R500_ALPHA_MOD_B_ABS
;
508 /* Variation on MAD: 1*src0+src1 */
509 emit_mad(fp
, counter
, fpi
, R500_SWIZZLE_ONE
, 0, 1);
512 /* This inst's selects need to be swapped as follows:
513 * 0 -> C ; 1 -> B ; 2 -> A */
514 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
515 src
[1] = make_src(fp
, fpi
->SrcReg
[1]);
516 src
[2] = make_src(fp
, fpi
->SrcReg
[2]);
517 emit_alu(fp
, counter
, fpi
);
518 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[2])
519 | R500_RGB_ADDR1(src
[1]) | R500_RGB_ADDR2(src
[0]);
520 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[2])
521 | R500_ALPHA_ADDR1(src
[1]) | R500_ALPHA_ADDR2(src
[0]);
522 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
523 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[2]))
524 | R500_ALU_RGB_SEL_B_SRC1
| MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi
->SrcReg
[1]));
525 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_CMP
526 | R500_ALPHA_ADDRD(dest
)
527 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi
->SrcReg
[2]))
528 | R500_ALPHA_SEL_B_SRC1
| MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi
->SrcReg
[1]));
529 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_CMP
530 | R500_ALU_RGBA_ADDRD(dest
)
531 | R500_ALU_RGBA_SEL_C_SRC2
532 | MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi
->SrcReg
[0]))
533 | R500_ALU_RGBA_ALPHA_SEL_C_SRC2
534 | MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi
->SrcReg
[0]));
537 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
538 src
[1] = emit_const4fv(fp
, RCP_2PI
);
539 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| R500_INST_TEX_SEM_WAIT
540 | (R500_WRITEMASK_ARGB
<< 11);
541 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0])
542 | R500_RGB_ADDR1(src
[1]);
543 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0])
544 | R500_ALPHA_ADDR1(src
[1]);
545 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
546 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB
)
547 | R500_ALU_RGB_SEL_B_SRC1
| MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB
);
548 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_MAD
549 | R500_ALPHA_ADDRD(get_temp(fp
, 0))
550 | R500_ALPHA_SEL_A_SRC0
| R500_ALPHA_SWIZ_A_A
551 | R500_ALPHA_SEL_B_SRC1
| R500_ALPHA_SWIZ_B_A
;
552 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MAD
553 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 0))
554 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO
)
555 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO
);
557 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| (R500_WRITEMASK_ARGB
<< 11);
558 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(get_temp(fp
, 0));
559 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(get_temp(fp
, 0));
560 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
561 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB
);
562 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_FRC
563 | R500_ALPHA_ADDRD(get_temp(fp
, 1))
564 | R500_ALPHA_SEL_A_SRC0
| R500_ALPHA_SWIZ_A_A
;
565 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_FRC
566 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 1));
568 emit_alu(fp
, counter
, fpi
);
569 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(get_temp(fp
, 1));
570 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(get_temp(fp
, 1));
571 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
;
572 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_COS
573 | R500_ALPHA_ADDRD(dest
)
574 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi
->SrcReg
[0]));
575 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_SOP
576 | R500_ALU_RGBA_ADDRD(dest
);
579 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
580 src
[1] = make_src(fp
, fpi
->SrcReg
[1]);
581 emit_alu(fp
, counter
, fpi
);
582 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0])
583 | R500_RGB_ADDR1(src
[1]);
584 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0])
585 | R500_ALPHA_ADDR1(src
[1]);
586 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
587 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]))
588 | R500_ALU_RGB_SEL_B_SRC1
| MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi
->SrcReg
[1]));
589 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_DP
590 | R500_ALPHA_ADDRD(dest
)
591 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi
->SrcReg
[0]))
592 | R500_ALPHA_SEL_B_SRC1
| MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi
->SrcReg
[1]));
593 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_DP3
594 | R500_ALU_RGBA_ADDRD(dest
);
597 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
598 src
[1] = make_src(fp
, fpi
->SrcReg
[1]);
600 emit_alu(fp
, counter
, fpi
);
601 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0])
602 | R500_RGB_ADDR1(src
[1]);
603 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0])
604 | R500_ALPHA_ADDR1(src
[1]);
605 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
606 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]))
607 | R500_ALU_RGB_SEL_B_SRC1
| MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi
->SrcReg
[1]));
608 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_DP
609 | R500_ALPHA_ADDRD(dest
)
610 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi
->SrcReg
[0]))
611 | R500_ALPHA_SEL_B_SRC1
| MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi
->SrcReg
[1]));
612 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_DP4
613 | R500_ALU_RGBA_ADDRD(dest
);
616 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
617 src
[1] = make_src(fp
, fpi
->SrcReg
[1]);
619 emit_alu(fp
, counter
, fpi
);
620 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0])
621 | R500_RGB_ADDR1(src
[1]);
622 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0])
623 | R500_ALPHA_ADDR1(src
[1]);
624 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
625 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]))
626 | R500_ALU_RGB_SEL_B_SRC1
| MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi
->SrcReg
[1]));
627 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_DP
628 | R500_ALPHA_ADDRD(dest
)
629 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE
)
630 | R500_ALPHA_SEL_B_SRC1
| MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi
->SrcReg
[1]));
631 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_DP4
632 | R500_ALU_RGBA_ADDRD(dest
);
635 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
636 src
[1] = make_src(fp
, fpi
->SrcReg
[1]);
637 /* [1, src0.y*src1.y, src0.z, src1.w]
638 * So basically MUL with lotsa swizzling. */
639 emit_alu(fp
, counter
, fpi
);
640 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0])
641 | R500_RGB_ADDR1(src
[1]);
642 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0])
643 | R500_ALPHA_ADDR1(src
[1]);
644 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
645 | R500_ALU_RGB_SEL_B_SRC1
;
646 /* Select [1, y, z, 1] */
647 temp_swiz
= (make_rgb_swizzle(fpi
->SrcReg
[0]) & ~0x7) | R500_SWIZZLE_ONE
;
648 fp
->inst
[counter
].inst3
|= MAKE_SWIZ_RGB_A(temp_swiz
);
649 /* Select [1, y, 1, w] */
650 temp_swiz
= (make_rgb_swizzle(fpi
->SrcReg
[0]) & ~0x1c7) | R500_SWIZZLE_ONE
| (R500_SWIZZLE_ONE
<< 6);
651 fp
->inst
[counter
].inst3
|= MAKE_SWIZ_RGB_B(temp_swiz
);
652 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_MAD
653 | R500_ALPHA_ADDRD(dest
)
654 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE
)
655 | R500_ALPHA_SEL_B_SRC1
| MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi
->SrcReg
[1]));
656 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MAD
657 | R500_ALU_RGBA_ADDRD(dest
)
658 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO
)
659 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO
);
662 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
663 emit_alu(fp
, counter
, fpi
);
664 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0]);
665 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0]);
666 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
667 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]));
668 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_EX2
669 | R500_ALPHA_ADDRD(dest
)
670 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi
->SrcReg
[0]));
671 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_SOP
672 | R500_ALU_RGBA_ADDRD(dest
);
675 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
676 emit_alu(fp
, counter
, fpi
);
677 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0]);
678 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0]);
679 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
680 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]));
681 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_FRC
682 | R500_ALPHA_ADDRD(dest
)
683 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi
->SrcReg
[0]));
684 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_FRC
685 | R500_ALU_RGBA_ADDRD(dest
);
688 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
689 emit_alu(fp
, counter
, fpi
);
690 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0]);
691 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0]);
692 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
693 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]));
694 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_LN2
695 | R500_ALPHA_ADDRD(dest
)
696 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi
->SrcReg
[0]));
697 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_SOP
698 | R500_ALU_RGBA_ADDRD(dest
);
701 /* To be honest, I have no idea how I came up with the following.
702 * All I know is that it's based on the r3xx stuff, and was
703 * concieved with the help of NyQuil. Mmm, MyQuil. */
705 /* First instruction */
706 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
707 src
[1] = emit_const4fv(fp
, LIT
);
708 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| R500_INST_TEX_SEM_WAIT
709 | (R500_WRITEMASK_ARG
<< 11);
710 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0]) | R500_RGB_ADDR1(src
[1]);
711 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0]) | R500_ALPHA_ADDR1(src
[1]);
712 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
713 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]))
714 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ZERO
);
715 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_MAX
716 | R500_ALPHA_ADDRD(get_temp(fp
, 0))
717 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi
->SrcReg
[0]))
718 | R500_ALPHA_SEL_B_SRC1
| R500_ALPHA_SWIZ_B_A
;
719 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MAX
720 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 0));
722 /* Second instruction */
723 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| (R500_WRITEMASK_AB
<< 11);
724 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(get_temp(fp
, 0)) | R500_RGB_ADDR1(src
[1]);
725 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(get_temp(fp
, 0));
726 /* Select [z, z, z, y] */
727 temp_swiz
= 2 | (2 << 3) | (2 << 6);
728 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
729 | MAKE_SWIZ_RGB_A(temp_swiz
)
730 | R500_ALU_RGB_SEL_B_SRC0
731 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB
);
732 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_LN2
733 | R500_ALPHA_ADDRD(get_temp(fp
, 0))
734 | R500_ALPHA_SEL_A_SRC0
| R500_ALPHA_SWIZ_A_G
;
735 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MIN
736 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 0));
738 /* Third instruction */
739 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| (R500_WRITEMASK_AG
<< 11);
740 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(get_temp(fp
, 0));
741 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(get_temp(fp
, 0));
742 /* Select [x, x, x, z] */
744 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
745 | MAKE_SWIZ_RGB_A(temp_swiz
)
746 | R500_ALU_RGB_SEL_B_SRC0
747 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ONE
);
748 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_MAD
749 | R500_ALPHA_ADDRD(get_temp(fp
, 1))
750 | R500_ALPHA_SEL_A_SRC0
| R500_ALPHA_SWIZ_A_A
751 | R500_ALPHA_SEL_B_SRC0
| R500_ALPHA_SWIZ_B_B
;
752 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MAD
753 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 1))
754 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO
)
755 | R500_ALU_RGBA_A_SWIZ_0
;
757 /* Fourth instruction */
758 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| (R500_WRITEMASK_AR
<< 11);
759 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(get_temp(fp
, 0));
760 fp
->inst
[counter
].inst3
= MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ONE
)
761 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ONE
);
762 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_EX2
763 | R500_ALPHA_ADDRD(get_temp(fp
, 0))
764 | R500_ALPHA_SEL_A_SRC0
| R500_ALPHA_SWIZ_A_A
;
765 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MAD
766 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 0))
767 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO
)
768 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO
);
770 /* Fifth instruction */
771 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| (R500_WRITEMASK_AB
<< 11);
772 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(get_temp(fp
, 0));
773 /* Select [w, w, w] */
774 temp_swiz
= 3 | (3 << 3) | (3 << 6);
775 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
776 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ZERO
)
777 | R500_ALU_RGB_SEL_B_SRC0
778 | MAKE_SWIZ_RGB_B(temp_swiz
);
779 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_MAD
780 | R500_ALPHA_ADDRD(get_temp(fp
, 0))
781 | R500_ALPHA_SWIZ_A_1
782 | R500_ALPHA_SWIZ_B_1
;
783 /* Select [-y, -y, -y] */
784 temp_swiz
= 1 | (1 << 3) | (1 << 6);
785 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_CMP
786 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 0))
787 | MAKE_SWIZ_RGBA_C(temp_swiz
)
788 | R500_ALU_RGBA_MOD_C_NEG
789 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO
);
791 /* Final instruction */
792 emit_mov(fp
, counter
, fpi
, get_temp(fp
, 0), SWIZZLE_NOOP
, dest
);
795 /* src0 * src1 + INV(src0) * src2
796 * 1) MUL src0, src1, temp
797 * 2) PRE 1-src0; MAD srcp, src2, temp */
798 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
799 src
[1] = make_src(fp
, fpi
->SrcReg
[1]);
800 src
[2] = make_src(fp
, fpi
->SrcReg
[2]);
801 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| R500_INST_TEX_SEM_WAIT
802 | R500_INST_NOP
| (R500_WRITEMASK_ARGB
<< 11);
803 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0])
804 | R500_RGB_ADDR1(src
[1]);
805 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0])
806 | R500_ALPHA_ADDR1(src
[1]);
807 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
808 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]))
809 | R500_ALU_RGB_SEL_B_SRC1
| MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi
->SrcReg
[1]));
810 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_MAD
811 | R500_ALPHA_ADDRD(get_temp(fp
, 0))
812 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi
->SrcReg
[0]))
813 | R500_ALPHA_SEL_B_SRC1
| MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi
->SrcReg
[1]));
814 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MAD
815 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 0))
816 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO
)
817 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO
);
819 emit_alu(fp
, counter
, fpi
);
820 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0])
821 | R500_RGB_ADDR1(src
[2])
822 | R500_RGB_ADDR2(get_temp(fp
, 0))
823 | R500_RGB_SRCP_OP_1_MINUS_RGB0
;
824 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0])
825 | R500_ALPHA_ADDR1(src
[2])
826 | R500_ALPHA_ADDR2(get_temp(fp
, 0))
827 | R500_ALPHA_SRCP_OP_1_MINUS_A0
;
828 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRCP
829 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]))
830 | R500_ALU_RGB_SEL_B_SRC1
| MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB
);
831 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_MAD
832 | R500_ALPHA_ADDRD(dest
)
833 | R500_ALPHA_SEL_A_SRCP
| MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi
->SrcReg
[0]))
834 | R500_ALPHA_SEL_B_SRC1
| R500_ALPHA_SWIZ_B_A
;
835 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MAD
836 | R500_ALU_RGBA_ADDRD(dest
)
837 | R500_ALU_RGBA_SEL_C_SRC2
| MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi
->SrcReg
[2]))
838 | R500_ALU_RGBA_ALPHA_SEL_C_SRC2
839 | MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi
->SrcReg
[2]));
842 emit_mad(fp
, counter
, fpi
, 0, 1, 2);
845 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
846 src
[1] = make_src(fp
, fpi
->SrcReg
[1]);
847 emit_alu(fp
, counter
, fpi
);
848 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0]) | R500_RGB_ADDR1(src
[1]);
849 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0]) | R500_ALPHA_ADDR1(src
[1]);
850 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
851 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]))
852 | R500_ALU_RGB_SEL_B_SRC1
853 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi
->SrcReg
[1]));
854 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_MAX
855 | R500_ALPHA_ADDRD(dest
)
856 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi
->SrcReg
[0]))
857 | R500_ALPHA_SEL_B_SRC1
| MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi
->SrcReg
[1]));
858 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MAX
859 | R500_ALU_RGBA_ADDRD(dest
);
862 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
863 src
[1] = make_src(fp
, fpi
->SrcReg
[1]);
864 emit_alu(fp
, counter
, fpi
);
865 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0]) | R500_RGB_ADDR1(src
[1]);
866 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0]) | R500_ALPHA_ADDR1(src
[1]);
867 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
868 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]))
869 | R500_ALU_RGB_SEL_B_SRC1
870 | MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi
->SrcReg
[1]));
871 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_MIN
872 | R500_ALPHA_ADDRD(dest
)
873 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi
->SrcReg
[0]))
874 | R500_ALPHA_SEL_B_SRC1
| MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi
->SrcReg
[1]));
875 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MIN
876 | R500_ALU_RGBA_ADDRD(dest
);
879 emit_mov(fp
, counter
, fpi
, make_src(fp
, fpi
->SrcReg
[0]), fpi
->SrcReg
[0].Swizzle
, dest
);
882 /* Variation on MAD: src0*src1+0 */
883 emit_mad(fp
, counter
, fpi
, 0, 1, R500_SWIZZLE_ZERO
);
886 /* POW(a,b) = EX2(LN2(a)*b) */
887 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
888 src
[1] = make_src(fp
, fpi
->SrcReg
[1]);
889 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| R500_INST_TEX_SEM_WAIT
890 | (R500_WRITEMASK_ARGB
<< 11);
891 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0]);
892 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0]);
893 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
894 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]));
895 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_LN2
896 | R500_ALPHA_ADDRD(get_temp(fp
, 0))
897 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi
->SrcReg
[0]));
898 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_SOP
899 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 0));
901 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| (R500_WRITEMASK_ARGB
<< 11);
902 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(get_temp(fp
, 0))
903 | R500_RGB_ADDR1(src
[1]);
904 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(get_temp(fp
, 0))
905 | R500_ALPHA_ADDR1(src
[1]);
906 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
907 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]))
908 | R500_ALU_RGB_SEL_B_SRC1
| MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi
->SrcReg
[1]));
909 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_MAD
910 | R500_ALPHA_ADDRD(get_temp(fp
, 1))
911 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi
->SrcReg
[0]))
912 | R500_ALPHA_SEL_B_SRC1
| MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi
->SrcReg
[1]));
913 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MAD
914 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 1))
915 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO
)
916 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO
);
918 emit_alu(fp
, counter
, fpi
);
919 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(get_temp(fp
, 1));
920 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(get_temp(fp
, 1));
921 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
922 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]));
923 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_EX2
924 | R500_ALPHA_ADDRD(dest
)
925 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi
->SrcReg
[0]));
926 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_SOP
927 | R500_ALU_RGBA_ADDRD(dest
);
930 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
931 emit_alu(fp
, counter
, fpi
);
932 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0]);
933 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0]);
934 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
935 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]));
936 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_RCP
937 | R500_ALPHA_ADDRD(dest
)
938 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi
->SrcReg
[0]));
939 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_SOP
940 | R500_ALU_RGBA_ADDRD(dest
);
943 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
944 emit_alu(fp
, counter
, fpi
);
945 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0]);
946 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0]);
947 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
948 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]));
949 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_RSQ
950 | R500_ALPHA_ADDRD(dest
)
951 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi
->SrcReg
[0]));
952 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_SOP
953 | R500_ALU_RGBA_ADDRD(dest
);
956 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
957 src
[1] = emit_const4fv(fp
, RCP_2PI
);
958 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| R500_INST_TEX_SEM_WAIT
959 | (R500_WRITEMASK_ARGB
<< 11);
960 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0])
961 | R500_RGB_ADDR1(src
[1]);
962 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0])
963 | R500_ALPHA_ADDR1(src
[1]);
964 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
965 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB
)
966 | R500_ALU_RGB_SEL_B_SRC1
| MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB
);
967 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_MAD
968 | R500_ALPHA_ADDRD(get_temp(fp
, 0))
969 | R500_ALPHA_SEL_A_SRC0
| R500_ALPHA_SWIZ_A_A
970 | R500_ALPHA_SEL_B_SRC1
| R500_ALPHA_SWIZ_B_A
;
971 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MAD
972 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 0))
973 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO
)
974 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO
);
976 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| (R500_WRITEMASK_ARGB
<< 11);
977 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(get_temp(fp
, 0));
978 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(get_temp(fp
, 0));
979 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
980 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB
);
981 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_FRC
982 | R500_ALPHA_ADDRD(get_temp(fp
, 1))
983 | R500_ALPHA_SEL_A_SRC0
| R500_ALPHA_SWIZ_A_A
;
984 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_FRC
985 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 1));
987 /* Do a cosine, then a sine, masking out the channels we want to protect. */
988 /* Cosine only goes in R (x) channel. */
989 fpi
->DstReg
.WriteMask
= 0x1;
990 emit_alu(fp
, counter
, fpi
);
991 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(get_temp(fp
, 1));
992 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(get_temp(fp
, 1));
993 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
994 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]));
995 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_COS
996 | R500_ALPHA_ADDRD(dest
)
997 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi
->SrcReg
[0]));
998 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_SOP
999 | R500_ALU_RGBA_ADDRD(dest
);
1001 /* Sine only goes in G (y) channel. */
1002 fpi
->DstReg
.WriteMask
= 0x2;
1003 emit_alu(fp
, counter
, fpi
);
1004 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(get_temp(fp
, 1));
1005 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(get_temp(fp
, 1));
1006 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
1007 | MAKE_SWIZ_RGB_A(make_rgb_swizzle(fpi
->SrcReg
[0]));
1008 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_SIN
1009 | R500_ALPHA_ADDRD(dest
)
1010 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi
->SrcReg
[0]));
1011 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_SOP
1012 | R500_ALU_RGBA_ADDRD(dest
);
1015 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
1016 src
[1] = make_src(fp
, fpi
->SrcReg
[1]);
1017 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| R500_INST_TEX_SEM_WAIT
1018 | (R500_WRITEMASK_ARGB
<< 11);
1019 fp
->inst
[counter
].inst1
= R500_RGB_ADDR1(src
[0])
1020 | R500_RGB_ADDR2(src
[1]);
1021 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR1(src
[0])
1022 | R500_ALPHA_ADDR2(src
[1]);
1023 fp
->inst
[counter
].inst3
= /* 1 */
1024 MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ONE
)
1025 | R500_ALU_RGB_SEL_B_SRC1
| MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi
->SrcReg
[0]));
1026 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_MAD
1027 | R500_ALPHA_ADDRD(get_temp(fp
, 0))
1028 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE
)
1029 | R500_ALPHA_SEL_B_SRC1
| MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi
->SrcReg
[0]));
1030 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MAD
1031 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 0))
1032 | R500_ALU_RGBA_SEL_C_SRC2
1033 | MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi
->SrcReg
[1]))
1034 | R500_ALU_RGBA_MOD_C_NEG
1035 | R500_ALU_RGBA_ALPHA_SEL_C_SRC2
1036 | MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi
->SrcReg
[1]))
1037 | R500_ALU_RGBA_ALPHA_MOD_C_NEG
;
1039 /* This inst's selects need to be swapped as follows:
1040 * 0 -> C ; 1 -> B ; 2 -> A */
1041 emit_alu(fp
, counter
, fpi
);
1042 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(get_temp(fp
, 0));
1043 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(get_temp(fp
, 0));
1044 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
1045 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ONE
)
1046 | R500_ALU_RGB_SEL_B_SRC0
1047 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ZERO
);
1048 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_CMP
1049 | R500_ALPHA_ADDRD(dest
)
1050 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE
)
1051 | R500_ALPHA_SEL_B_SRC0
| MAKE_SWIZ_ALPHA_B(R500_SWIZZLE_ZERO
);
1052 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_CMP
1053 | R500_ALU_RGBA_ADDRD(dest
)
1054 | R500_ALU_RGBA_SEL_C_SRC0
1055 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_RGB
)
1056 | R500_ALU_RGBA_ALPHA_SEL_C_SRC0
1057 | R500_ALU_RGBA_A_SWIZ_A
;
1060 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
1061 src
[1] = emit_const4fv(fp
, RCP_2PI
);
1062 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| R500_INST_TEX_SEM_WAIT
1063 | (R500_WRITEMASK_ARGB
<< 11);
1064 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0])
1065 | R500_RGB_ADDR1(src
[1]);
1066 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0])
1067 | R500_ALPHA_ADDR1(src
[1]);
1068 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
1069 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB
)
1070 | R500_ALU_RGB_SEL_B_SRC1
| MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_RGB
);
1071 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_MAD
1072 | R500_ALPHA_ADDRD(get_temp(fp
, 0))
1073 | R500_ALPHA_SEL_A_SRC0
| R500_ALPHA_SWIZ_A_A
1074 | R500_ALPHA_SEL_B_SRC1
| R500_ALPHA_SWIZ_B_A
;
1075 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MAD
1076 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 0))
1077 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO
)
1078 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO
);
1080 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| (R500_WRITEMASK_ARGB
<< 11);
1081 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(get_temp(fp
, 0));
1082 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(get_temp(fp
, 0));
1083 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
1084 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_RGB
);
1085 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_FRC
1086 | R500_ALPHA_ADDRD(get_temp(fp
, 1))
1087 | R500_ALPHA_SEL_A_SRC0
| R500_ALPHA_SWIZ_A_A
;
1088 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_FRC
1089 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 1));
1091 emit_alu(fp
, counter
, fpi
);
1092 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(get_temp(fp
, 1));
1093 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(get_temp(fp
, 1));
1094 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
;
1095 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_SIN
1096 | R500_ALPHA_ADDRD(dest
)
1097 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_sop_swizzle(fpi
->SrcReg
[0]));
1098 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_SOP
1099 | R500_ALU_RGBA_ADDRD(dest
);
1102 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
1103 src
[1] = make_src(fp
, fpi
->SrcReg
[1]);
1104 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| R500_INST_TEX_SEM_WAIT
1105 | (R500_WRITEMASK_ARGB
<< 11);
1106 fp
->inst
[counter
].inst1
= R500_RGB_ADDR1(src
[0])
1107 | R500_RGB_ADDR2(src
[1]);
1108 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR1(src
[0])
1109 | R500_ALPHA_ADDR2(src
[1]);
1110 fp
->inst
[counter
].inst3
= /* 1 */
1111 MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ONE
)
1112 | R500_ALU_RGB_SEL_B_SRC1
| MAKE_SWIZ_RGB_B(make_rgb_swizzle(fpi
->SrcReg
[0]));
1113 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_MAD
1114 | R500_ALPHA_ADDRD(get_temp(fp
, 0))
1115 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ONE
)
1116 | R500_ALPHA_SEL_B_SRC1
| MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi
->SrcReg
[0]));
1117 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MAD
1118 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 0))
1119 | R500_ALU_RGBA_SEL_C_SRC2
1120 | MAKE_SWIZ_RGBA_C(make_rgb_swizzle(fpi
->SrcReg
[1]))
1121 | R500_ALU_RGBA_MOD_C_NEG
1122 | R500_ALU_RGBA_ALPHA_SEL_C_SRC2
1123 | MAKE_SWIZ_ALPHA_C(make_alpha_swizzle(fpi
->SrcReg
[1]))
1124 | R500_ALU_RGBA_ALPHA_MOD_C_NEG
;
1126 /* This inst's selects need to be swapped as follows:
1127 * 0 -> C ; 1 -> B ; 2 -> A */
1128 emit_alu(fp
, counter
, fpi
);
1129 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(get_temp(fp
, 0));
1130 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(get_temp(fp
, 0));
1131 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
1132 | MAKE_SWIZ_RGB_A(R500_SWIZ_RGB_ZERO
)
1133 | R500_ALU_RGB_SEL_B_SRC0
1134 | MAKE_SWIZ_RGB_B(R500_SWIZ_RGB_ONE
);
1135 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_CMP
1136 | R500_ALPHA_ADDRD(dest
)
1137 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(R500_SWIZZLE_ZERO
)
1138 | R500_ALPHA_SEL_B_SRC0
| MAKE_SWIZ_ALPHA_B(R500_SWIZZLE_ONE
);
1139 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_CMP
1140 | R500_ALU_RGBA_ADDRD(dest
)
1141 | R500_ALU_RGBA_SEL_C_SRC0
1142 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_RGB
)
1143 | R500_ALU_RGBA_ALPHA_SEL_C_SRC0
1144 | R500_ALU_RGBA_A_SWIZ_A
;
1147 /* Variation on MAD: 1*src0-src1 */
1148 fpi
->SrcReg
[1].NegateBase
= 0xF; /* NEG_XYZW */
1149 emit_mad(fp
, counter
, fpi
, R500_SWIZZLE_ONE
, 0, 1);
1152 /* TODO: The rarer negation masks! */
1153 emit_mov(fp
, counter
, fpi
, make_src(fp
, fpi
->SrcReg
[0]), fpi
->SrcReg
[0].Swizzle
, dest
);
1156 /* src0 * src1 - src1 * src0
1157 * 1) MUL temp.xyz, src0.yzx, src1.zxy
1158 * 2) MAD src0.zxy, src1.yzx, -temp.xyz */
1159 src
[0] = make_src(fp
, fpi
->SrcReg
[0]);
1160 src
[1] = make_src(fp
, fpi
->SrcReg
[1]);
1161 fp
->inst
[counter
].inst0
= R500_INST_TYPE_ALU
| R500_INST_TEX_SEM_WAIT
1162 | (R500_WRITEMASK_RGB
<< 11);
1163 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0])
1164 | R500_RGB_ADDR1(src
[1]);
1165 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0])
1166 | R500_ALPHA_ADDR1(src
[1]);
1167 /* Select [y, z, x] */
1168 temp_swiz
= make_rgb_swizzle(fpi
->SrcReg
[0]);
1169 temp_swiz
= (GET_SWZ(temp_swiz
, 1) << 0) | (GET_SWZ(temp_swiz
, 2) << 3) | (GET_SWZ(temp_swiz
, 0) << 6);
1170 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
1171 | MAKE_SWIZ_RGB_A(temp_swiz
);
1172 /* Select [z, x, y] */
1173 temp_swiz
= make_rgb_swizzle(fpi
->SrcReg
[1]);
1174 temp_swiz
= (GET_SWZ(temp_swiz
, 2) << 0) | (GET_SWZ(temp_swiz
, 0) << 3) | (GET_SWZ(temp_swiz
, 1) << 6);
1175 fp
->inst
[counter
].inst3
|= R500_ALU_RGB_SEL_B_SRC1
1176 | MAKE_SWIZ_RGB_B(temp_swiz
);
1177 fp
->inst
[counter
].inst4
= R500_ALPHA_OP_MAD
1178 | R500_ALPHA_ADDRD(get_temp(fp
, 0))
1179 | R500_ALPHA_SEL_A_SRC0
| MAKE_SWIZ_ALPHA_A(make_alpha_swizzle(fpi
->SrcReg
[0]))
1180 | R500_ALPHA_SEL_B_SRC1
| MAKE_SWIZ_ALPHA_B(make_alpha_swizzle(fpi
->SrcReg
[1]));
1181 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MAD
1182 | R500_ALU_RGBA_ADDRD(get_temp(fp
, 0))
1183 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_ZERO
)
1184 | MAKE_SWIZ_ALPHA_C(R500_SWIZZLE_ZERO
);
1186 emit_alu(fp
, counter
, fpi
);
1187 fp
->inst
[counter
].inst1
= R500_RGB_ADDR0(src
[0])
1188 | R500_RGB_ADDR1(src
[1])
1189 | R500_RGB_ADDR2(get_temp(fp
, 0));
1190 fp
->inst
[counter
].inst2
= R500_ALPHA_ADDR0(src
[0])
1191 | R500_ALPHA_ADDR1(src
[1])
1192 | R500_ALPHA_ADDR2(get_temp(fp
, 0));
1193 /* Select [z, x, y] */
1194 temp_swiz
= make_rgb_swizzle(fpi
->SrcReg
[0]);
1195 temp_swiz
= (GET_SWZ(temp_swiz
, 2) << 0) | (GET_SWZ(temp_swiz
, 0) << 3) | (GET_SWZ(temp_swiz
, 1) << 6);
1196 fp
->inst
[counter
].inst3
= R500_ALU_RGB_SEL_A_SRC0
1197 | MAKE_SWIZ_RGB_A(temp_swiz
);
1198 /* Select [y, z, x] */
1199 temp_swiz
= make_rgb_swizzle(fpi
->SrcReg
[1]);
1200 temp_swiz
= (GET_SWZ(temp_swiz
, 1) << 0) | (GET_SWZ(temp_swiz
, 2) << 3) | (GET_SWZ(temp_swiz
, 0) << 6);
1201 fp
->inst
[counter
].inst3
|= R500_ALU_RGB_SEL_B_SRC1
1202 | MAKE_SWIZ_RGB_B(temp_swiz
);
1203 fp
->inst
[counter
].inst4
|= R500_ALPHA_OP_MAD
1204 | R500_ALPHA_ADDRD(dest
)
1205 | R500_ALPHA_SWIZ_A_1
1206 | R500_ALPHA_SWIZ_B_1
;
1207 fp
->inst
[counter
].inst5
= R500_ALU_RGBA_OP_MAD
1208 | R500_ALU_RGBA_ADDRD(dest
)
1209 | R500_ALU_RGBA_SEL_C_SRC2
1210 | MAKE_SWIZ_RGBA_C(R500_SWIZ_RGB_RGB
)
1211 | R500_ALU_RGBA_MOD_C_NEG
1212 | R500_ALU_RGBA_A_SWIZ_0
;
1218 emit_tex(fp
, fpi
, dest
, counter
);
1219 if (fpi
->DstReg
.File
== PROGRAM_OUTPUT
)
1223 ERROR("unknown fpi->Opcode %s\n", _mesa_opcode_string(fpi
->Opcode
));
1227 /* Finishing touches */
1228 if (fpi
->SaturateMode
== SATURATE_ZERO_ONE
) {
1229 fp
->inst
[counter
].inst0
|= R500_INST_RGB_CLAMP
| R500_INST_ALPHA_CLAMP
;
1239 /* Finish him! (If it's an ALU/OUT instruction...) */
1240 if ((fp
->inst
[counter
-1].inst0
& 0x3) == 1) {
1241 fp
->inst
[counter
-1].inst0
|= R500_INST_LAST
;
1243 /* We still need to put an output inst, right? */
1244 WARN_ONCE("Final FP instruction is not an OUT.\n");
1247 fp
->cs
->nrslots
= counter
;
1254 static void init_program(r300ContextPtr r300
, struct r500_fragment_program
*fp
)
1256 struct r300_pfs_compile_state
*cs
= NULL
;
1257 struct gl_fragment_program
*mp
= &fp
->mesa_program
;
1258 struct prog_instruction
*fpi
;
1259 GLuint InputsRead
= mp
->Base
.InputsRead
;
1260 GLuint temps_used
= 0;
1263 /* New compile, reset tracking data */
1265 driQueryOptioni(&r300
->radeon
.optionCache
, "fp_optimization");
1266 fp
->translated
= GL_FALSE
;
1267 fp
->error
= GL_FALSE
;
1268 fp
->cs
= cs
= &(R300_CONTEXT(fp
->ctx
)->state
.pfs_compile
);
1270 /* Size of pixel stack, plus 1. */
1271 fp
->max_temp_idx
= 1;
1272 /* Temp register offset. */
1273 fp
->temp_reg_offset
= 0;
1275 _mesa_memset(cs
, 0, sizeof(*fp
->cs
));
1276 for (i
= 0; i
< PFS_MAX_ALU_INST
; i
++) {
1277 for (j
= 0; j
< 3; j
++) {
1278 cs
->slot
[i
].vsrc
[j
] = SRC_CONST
;
1279 cs
->slot
[i
].ssrc
[j
] = SRC_CONST
;
1283 /* Work out what temps the Mesa inputs correspond to, this must match
1284 * what setup_rs_unit does, which shouldn't be a problem as rs_unit
1285 * configures itself based on the fragprog's InputsRead
1287 * NOTE: this depends on get_hw_temp() allocating registers in order,
1288 * starting from register 0, so we're just going to do that instead.
1291 /* Texcoords come first */
1292 for (i
= 0; i
< fp
->ctx
->Const
.MaxTextureUnits
; i
++) {
1293 if (InputsRead
& (FRAG_BIT_TEX0
<< i
)) {
1294 cs
->inputs
[FRAG_ATTRIB_TEX0
+ i
].refcount
= 0;
1295 cs
->inputs
[FRAG_ATTRIB_TEX0
+ i
].reg
=
1296 fp
->temp_reg_offset
;
1297 fp
->temp_reg_offset
++;
1300 InputsRead
&= ~FRAG_BITS_TEX_ANY
;
1302 /* fragment position treated as a texcoord */
1303 if (InputsRead
& FRAG_BIT_WPOS
) {
1304 cs
->inputs
[FRAG_ATTRIB_WPOS
].refcount
= 0;
1305 cs
->inputs
[FRAG_ATTRIB_WPOS
].reg
=
1306 fp
->temp_reg_offset
;
1307 fp
->temp_reg_offset
++;
1309 InputsRead
&= ~FRAG_BIT_WPOS
;
1311 /* Then primary colour */
1312 if (InputsRead
& FRAG_BIT_COL0
) {
1313 cs
->inputs
[FRAG_ATTRIB_COL0
].refcount
= 0;
1314 cs
->inputs
[FRAG_ATTRIB_COL0
].reg
=
1315 fp
->temp_reg_offset
;
1316 fp
->temp_reg_offset
++;
1318 InputsRead
&= ~FRAG_BIT_COL0
;
1320 /* Secondary color */
1321 if (InputsRead
& FRAG_BIT_COL1
) {
1322 cs
->inputs
[FRAG_ATTRIB_COL1
].refcount
= 0;
1323 cs
->inputs
[FRAG_ATTRIB_COL1
].reg
=
1324 fp
->temp_reg_offset
;
1325 fp
->temp_reg_offset
++;
1327 InputsRead
&= ~FRAG_BIT_COL1
;
1331 WARN_ONCE("Don't know how to handle inputs 0x%x\n", InputsRead
);
1332 /* force read from hwreg 0 for now */
1333 for (i
= 0; i
< 32; i
++)
1334 if (InputsRead
& (1 << i
))
1335 cs
->inputs
[i
].reg
= 0;
1338 if (!mp
->Base
.Instructions
) {
1339 ERROR("No instructions found in program, going to go die now.\n");
1343 for (fpi
= mp
->Base
.Instructions
; fpi
->Opcode
!= OPCODE_END
; fpi
++) {
1344 for (i
= 0; i
< 3; i
++) {
1345 if (fpi
->SrcReg
[i
].File
== PROGRAM_TEMPORARY
) {
1346 if (fpi
->SrcReg
[i
].Index
>= temps_used
)
1347 temps_used
= fpi
->SrcReg
[i
].Index
+ 1;
1352 cs
->temp_in_use
= temps_used
+ 1;
1354 fp
->max_temp_idx
= fp
->temp_reg_offset
+ cs
->temp_in_use
;
1356 if (RADEON_DEBUG
& DEBUG_PIXEL
)
1357 fprintf(stderr
, "FP temp indices: fp->max_temp_idx: %d cs->temp_in_use: %d\n", fp
->max_temp_idx
, cs
->temp_in_use
);
1360 static void update_params(struct r500_fragment_program
*fp
)
1362 struct gl_fragment_program
*mp
= &fp
->mesa_program
;
1364 /* Ask Mesa nicely to fill in ParameterValues for us */
1365 if (mp
->Base
.Parameters
)
1366 _mesa_load_state_parameters(fp
->ctx
, mp
->Base
.Parameters
);
1369 static void dumb_shader(struct r500_fragment_program
*fp
)
1371 fp
->inst
[0].inst0
= R500_INST_TYPE_TEX
1372 | R500_INST_TEX_SEM_WAIT
1373 | R500_INST_RGB_WMASK_R
1374 | R500_INST_RGB_WMASK_G
1375 | R500_INST_RGB_WMASK_B
1376 | R500_INST_ALPHA_WMASK
1377 | R500_INST_RGB_CLAMP
1378 | R500_INST_ALPHA_CLAMP
;
1379 fp
->inst
[0].inst1
= R500_TEX_ID(0)
1381 | R500_TEX_SEM_ACQUIRE
1382 | R500_TEX_IGNORE_UNCOVERED
;
1383 fp
->inst
[0].inst2
= R500_TEX_SRC_ADDR(0)
1384 | R500_TEX_SRC_S_SWIZ_R
1385 | R500_TEX_SRC_T_SWIZ_G
1386 | R500_TEX_DST_ADDR(0)
1387 | R500_TEX_DST_R_SWIZ_R
1388 | R500_TEX_DST_G_SWIZ_G
1389 | R500_TEX_DST_B_SWIZ_B
1390 | R500_TEX_DST_A_SWIZ_A
;
1391 fp
->inst
[0].inst3
= R500_DX_ADDR(0)
1401 fp
->inst
[0].inst4
= 0x0;
1402 fp
->inst
[0].inst5
= 0x0;
1404 fp
->inst
[1].inst0
= R500_INST_TYPE_OUT
|
1405 R500_INST_TEX_SEM_WAIT
|
1407 R500_INST_RGB_OMASK_R
|
1408 R500_INST_RGB_OMASK_G
|
1409 R500_INST_RGB_OMASK_B
|
1410 R500_INST_ALPHA_OMASK
;
1411 fp
->inst
[1].inst1
= R500_RGB_ADDR0(0) |
1413 R500_RGB_ADDR1_CONST
|
1415 R500_RGB_ADDR2_CONST
|
1416 R500_RGB_SRCP_OP_1_MINUS_2RGB0
;
1417 fp
->inst
[1].inst2
= R500_ALPHA_ADDR0(0) |
1418 R500_ALPHA_ADDR1(0) |
1419 R500_ALPHA_ADDR1_CONST
|
1420 R500_ALPHA_ADDR2(0) |
1421 R500_ALPHA_ADDR2_CONST
|
1422 R500_ALPHA_SRCP_OP_1_MINUS_2A0
;
1423 fp
->inst
[1].inst3
= R500_ALU_RGB_SEL_A_SRC0
|
1424 R500_ALU_RGB_R_SWIZ_A_R
|
1425 R500_ALU_RGB_G_SWIZ_A_G
|
1426 R500_ALU_RGB_B_SWIZ_A_B
|
1427 R500_ALU_RGB_SEL_B_SRC0
|
1428 R500_ALU_RGB_R_SWIZ_B_1
|
1429 R500_ALU_RGB_B_SWIZ_B_1
|
1430 R500_ALU_RGB_G_SWIZ_B_1
;
1431 fp
->inst
[1].inst4
= R500_ALPHA_OP_MAD
|
1432 R500_ALPHA_SWIZ_A_A
|
1433 R500_ALPHA_SWIZ_B_1
;
1434 fp
->inst
[1].inst5
= R500_ALU_RGBA_OP_MAD
|
1435 R500_ALU_RGBA_R_SWIZ_0
|
1436 R500_ALU_RGBA_G_SWIZ_0
|
1437 R500_ALU_RGBA_B_SWIZ_0
|
1438 R500_ALU_RGBA_A_SWIZ_0
;
1440 fp
->cs
->nrslots
= 2;
1441 fp
->translated
= GL_TRUE
;
1444 void r500TranslateFragmentShader(r300ContextPtr r300
,
1445 struct r500_fragment_program
*fp
)
1448 struct r300_pfs_compile_state
*cs
= NULL
;
1450 if (!fp
->translated
) {
1452 init_program(r300
, fp
);
1455 if (parse_program(fp
) == GL_FALSE
) {
1456 ERROR("Huh. Couldn't parse program. There should be additional errors explaining why.\nUsing dumb shader...\n");
1458 fp
->inst_offset
= 0;
1459 fp
->inst_end
= cs
->nrslots
- 1;
1462 fp
->inst_offset
= 0;
1463 fp
->inst_end
= cs
->nrslots
- 1;
1465 fp
->translated
= GL_TRUE
;
1466 if (RADEON_DEBUG
& DEBUG_PIXEL
) {
1467 fprintf(stderr
, "Mesa program:\n");
1468 fprintf(stderr
, "-------------\n");
1469 _mesa_print_program(&fp
->mesa_program
.Base
);
1475 r300UpdateStateParameters(fp
->ctx
, _NEW_PROGRAM
);
1482 static char *toswiz(int swiz_val
) {
1489 case 5: return "1/2";
1496 static char *toop(int op_val
)
1500 case 0: str
= "MAD"; break;
1501 case 1: str
= "DP3"; break;
1502 case 2: str
= "DP4"; break;
1503 case 3: str
= "D2A"; break;
1504 case 4: str
= "MIN"; break;
1505 case 5: str
= "MAX"; break;
1506 case 6: str
= "Reserved"; break;
1507 case 7: str
= "CND"; break;
1508 case 8: str
= "CMP"; break;
1509 case 9: str
= "FRC"; break;
1510 case 10: str
= "SOP"; break;
1511 case 11: str
= "MDH"; break;
1512 case 12: str
= "MDV"; break;
1517 static char *to_alpha_op(int op_val
)
1521 case 0: str
= "MAD"; break;
1522 case 1: str
= "DP"; break;
1523 case 2: str
= "MIN"; break;
1524 case 3: str
= "MAX"; break;
1525 case 4: str
= "Reserved"; break;
1526 case 5: str
= "CND"; break;
1527 case 6: str
= "CMP"; break;
1528 case 7: str
= "FRC"; break;
1529 case 8: str
= "EX2"; break;
1530 case 9: str
= "LN2"; break;
1531 case 10: str
= "RCP"; break;
1532 case 11: str
= "RSQ"; break;
1533 case 12: str
= "SIN"; break;
1534 case 13: str
= "COS"; break;
1535 case 14: str
= "MDH"; break;
1536 case 15: str
= "MDV"; break;
1541 static char *to_mask(int val
)
1545 case 0: str
= "NONE"; break;
1546 case 1: str
= "R"; break;
1547 case 2: str
= "G"; break;
1548 case 3: str
= "RG"; break;
1549 case 4: str
= "B"; break;
1550 case 5: str
= "RB"; break;
1551 case 6: str
= "GB"; break;
1552 case 7: str
= "RGB"; break;
1553 case 8: str
= "A"; break;
1554 case 9: str
= "AR"; break;
1555 case 10: str
= "AG"; break;
1556 case 11: str
= "ARG"; break;
1557 case 12: str
= "AB"; break;
1558 case 13: str
= "ARB"; break;
1559 case 14: str
= "AGB"; break;
1560 case 15: str
= "ARGB"; break;
1565 static char *to_texop(int val
)
1568 case 0: return "NOP";
1569 case 1: return "LD";
1570 case 2: return "TEXKILL";
1571 case 3: return "PROJ";
1572 case 4: return "LODBIAS";
1573 case 5: return "LOD";
1574 case 6: return "DXDY";
1579 static void dump_program(struct r500_fragment_program
*fp
)
1582 fprintf(stderr
, "R500 Fragment Program:\n--------\n");
1590 fprintf(stderr
, "--------\nConstants:\n");
1591 for (n
= 0; n
< fp
->const_nr
; n
++) {
1592 fprintf(stderr
, "Constant %d: %f %f\n\t %f %f\n", n
,
1593 fp
->constant
[n
][0], fp
->constant
[n
][1], fp
->constant
[n
][2],
1594 fp
->constant
[n
][3]);
1596 fprintf(stderr
, "--------\n");
1599 for (n
= 0; n
< fp
->inst_end
+1; n
++) {
1600 inst0
= inst
= fp
->inst
[n
].inst0
;
1601 fprintf(stderr
,"%d\t0:CMN_INST 0x%08x:", n
, inst
);
1602 switch(inst
& 0x3) {
1603 case R500_INST_TYPE_ALU
: str
= "ALU"; break;
1604 case R500_INST_TYPE_OUT
: str
= "OUT"; break;
1605 case R500_INST_TYPE_FC
: str
= "FC"; break;
1606 case R500_INST_TYPE_TEX
: str
= "TEX"; break;
1608 fprintf(stderr
,"%s %s %s %s %s ", str
,
1609 inst
& R500_INST_TEX_SEM_WAIT
? "TEX_WAIT" : "",
1610 inst
& R500_INST_LAST
? "LAST" : "",
1611 inst
& R500_INST_NOP
? "NOP" : "",
1612 inst
& R500_INST_ALU_WAIT
? "ALU WAIT" : "");
1613 fprintf(stderr
,"wmask: %s omask: %s\n", to_mask((inst
>> 11) & 0xf),
1614 to_mask((inst
>> 15) & 0xf));
1616 switch(inst0
& 0x3) {
1619 fprintf(stderr
,"\t1:RGB_ADDR 0x%08x:", fp
->inst
[n
].inst1
);
1620 inst
= fp
->inst
[n
].inst1
;
1622 fprintf(stderr
,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
1623 inst
& 0xff, (inst
& (1<<8)) ? 'c' : 't',
1624 (inst
>> 10) & 0xff, (inst
& (1<<18)) ? 'c' : 't',
1625 (inst
>> 20) & 0xff, (inst
& (1<<28)) ? 'c' : 't',
1628 fprintf(stderr
,"\t2:ALPHA_ADDR 0x%08x:", fp
->inst
[n
].inst2
);
1629 inst
= fp
->inst
[n
].inst2
;
1630 fprintf(stderr
,"Addr0: %d%c, Addr1: %d%c, Addr2: %d%c, srcp:%d\n",
1631 inst
& 0xff, (inst
& (1<<8)) ? 'c' : 't',
1632 (inst
>> 10) & 0xff, (inst
& (1<<18)) ? 'c' : 't',
1633 (inst
>> 20) & 0xff, (inst
& (1<<28)) ? 'c' : 't',
1635 fprintf(stderr
,"\t3 RGB_INST: 0x%08x:", fp
->inst
[n
].inst3
);
1636 inst
= fp
->inst
[n
].inst3
;
1637 fprintf(stderr
,"rgb_A_src:%d %s/%s/%s %d rgb_B_src:%d %s/%s/%s %d\n",
1638 (inst
) & 0x3, toswiz((inst
>> 2) & 0x7), toswiz((inst
>> 5) & 0x7), toswiz((inst
>> 8) & 0x7),
1640 (inst
>> 13) & 0x3, toswiz((inst
>> 15) & 0x7), toswiz((inst
>> 18) & 0x7), toswiz((inst
>> 21) & 0x7),
1641 (inst
>> 24) & 0x3);
1644 fprintf(stderr
,"\t4 ALPHA_INST:0x%08x:", fp
->inst
[n
].inst4
);
1645 inst
= fp
->inst
[n
].inst4
;
1646 fprintf(stderr
,"%s dest:%d%s alp_A_src:%d %s %d alp_B_src:%d %s %d w:%d\n", to_alpha_op(inst
& 0xf),
1647 (inst
>> 4) & 0x7f, inst
& (1<<11) ? "(rel)":"",
1648 (inst
>> 12) & 0x3, toswiz((inst
>> 14) & 0x7), (inst
>> 17) & 0x3,
1649 (inst
>> 19) & 0x3, toswiz((inst
>> 21) & 0x7), (inst
>> 24) & 0x3,
1650 (inst
>> 31) & 0x1);
1652 fprintf(stderr
,"\t5 RGBA_INST: 0x%08x:", fp
->inst
[n
].inst5
);
1653 inst
= fp
->inst
[n
].inst5
;
1654 fprintf(stderr
,"%s dest:%d%s rgb_C_src:%d %s/%s/%s %d alp_C_src:%d %s %d\n", toop(inst
& 0xf),
1655 (inst
>> 4) & 0x7f, inst
& (1<<11) ? "(rel)":"",
1656 (inst
>> 12) & 0x3, toswiz((inst
>> 14) & 0x7), toswiz((inst
>> 17) & 0x7), toswiz((inst
>> 20) & 0x7),
1658 (inst
>> 25) & 0x3, toswiz((inst
>> 27) & 0x7), (inst
>> 30) & 0x3);
1663 inst
= fp
->inst
[n
].inst1
;
1664 fprintf(stderr
,"\t1:TEX_INST: 0x%08x: id: %d op:%s, %s, %s %s\n", inst
, (inst
>> 16) & 0xf,
1665 to_texop((inst
>> 22) & 0x7), (inst
& (1<<25)) ? "ACQ" : "",
1666 (inst
& (1<<26)) ? "IGNUNC" : "", (inst
& (1<<27)) ? "UNSCALED" : "SCALED");
1667 inst
= fp
->inst
[n
].inst2
;
1668 fprintf(stderr
,"\t2:TEX_ADDR: 0x%08x: src: %d%s %s/%s/%s/%s dst: %d%s %s/%s/%s/%s\n", inst
,
1669 inst
& 127, inst
& (1<<7) ? "(rel)" : "",
1670 toswiz((inst
>> 8) & 0x3), toswiz((inst
>> 10) & 0x3),
1671 toswiz((inst
>> 12) & 0x3), toswiz((inst
>> 14) & 0x3),
1672 (inst
>> 16) & 127, inst
& (1<<23) ? "(rel)" : "",
1673 toswiz((inst
>> 24) & 0x3), toswiz((inst
>> 26) & 0x3),
1674 toswiz((inst
>> 28) & 0x3), toswiz((inst
>> 30) & 0x3));
1676 fprintf(stderr
,"\t3:TEX_DXDY: 0x%08x\n", fp
->inst
[n
].inst3
);
1679 fprintf(stderr
,"\n");