- FIX: flickering
[mesa.git] / src / mesa / drivers / dri / r300 / radeon_screen.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file radeon_screen.c
32 * Screen initialization functions for the R200 driver.
33 *
34 * \author Keith Whitwell <keith@tungstengraphics.com>
35 */
36
37 #include <dlfcn.h>
38
39 #include "glheader.h"
40 #include "imports.h"
41 #include "context.h"
42
43 #define STANDALONE_MMIO
44 #include "radeon_screen.h"
45 #include "r200_context.h"
46 #include "r300_context.h"
47 #include "radeon_ioctl.h"
48 #include "r200_ioctl.h"
49 #include "radeon_macros.h"
50 #include "radeon_reg.h"
51
52 #include "utils.h"
53 #include "vblank.h"
54 #include "GL/internal/dri_interface.h"
55
56 /* R200 configuration
57 */
58 #include "xmlpool.h"
59
60 const char __driR200ConfigOptions[] =
61 DRI_CONF_BEGIN
62 DRI_CONF_SECTION_PERFORMANCE
63 DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
64 DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
65 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
66 DRI_CONF_MAX_TEXTURE_UNITS(4, 2, 6)
67 DRI_CONF_SECTION_END
68 DRI_CONF_SECTION_QUALITY
69 DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
70 DRI_CONF_DEF_MAX_ANISOTROPY(1.0, "1.0,2.0,4.0,8.0,16.0")
71 DRI_CONF_NO_NEG_LOD_BIAS(false)
72 DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
73 DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
74 DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
75 DRI_CONF_SECTION_END
76 DRI_CONF_SECTION_DEBUG
77 DRI_CONF_NO_RAST(false)
78 DRI_CONF_SECTION_END
79 DRI_CONF_SECTION_SOFTWARE
80 DRI_CONF_ARB_VERTEX_PROGRAM(true)
81 DRI_CONF_NV_VERTEX_PROGRAM(false)
82 DRI_CONF_SECTION_END
83 DRI_CONF_END;
84 static const GLuint __driR200NConfigOptions = 13;
85
86 /* TODO: integrate these into xmlpool.h! */
87 #define DRI_CONF_MAX_TEXTURE_IMAGE_UNITS(def,min,max) \
88 DRI_CONF_OPT_BEGIN_V(texture_image_units,int,def, # min ":" # max ) \
89 DRI_CONF_DESC(en,"Number of texture image units") \
90 DRI_CONF_DESC(de,"Anzahl der Textureinheiten") \
91 DRI_CONF_OPT_END
92
93 #define DRI_CONF_MAX_TEXTURE_COORD_UNITS(def,min,max) \
94 DRI_CONF_OPT_BEGIN_V(texture_coord_units,int,def, # min ":" # max ) \
95 DRI_CONF_DESC(en,"Number of texture coordinate units") \
96 DRI_CONF_DESC(de,"Anzahl der Texturkoordinateneinheiten") \
97 DRI_CONF_OPT_END
98
99 #define DRI_CONF_COMMAND_BUFFER_SIZE(def,min,max) \
100 DRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \
101 DRI_CONF_DESC(en,"Size of command buffer (in KB)") \
102 DRI_CONF_DESC(de,"Grösse des Befehlspuffers (in KB)") \
103 DRI_CONF_OPT_END
104
105
106 const char __driR300ConfigOptions[] =
107 DRI_CONF_BEGIN
108 DRI_CONF_SECTION_PERFORMANCE
109 DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
110 DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
111 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
112 DRI_CONF_MAX_TEXTURE_IMAGE_UNITS(16, 2, 16)
113 DRI_CONF_MAX_TEXTURE_COORD_UNITS(8, 2, 8)
114 DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
115 DRI_CONF_SECTION_END
116 DRI_CONF_SECTION_QUALITY
117 DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
118 DRI_CONF_DEF_MAX_ANISOTROPY(1.0, "1.0,2.0,4.0,8.0,16.0")
119 DRI_CONF_NO_NEG_LOD_BIAS(false)
120 DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
121 DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
122 DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
123 DRI_CONF_SECTION_END
124 DRI_CONF_SECTION_DEBUG
125 DRI_CONF_NO_RAST(false)
126 DRI_CONF_SECTION_END
127 DRI_CONF_END;
128 static const GLuint __driR300NConfigOptions = 13;
129
130
131 #ifndef RADEON_DEBUG
132 int RADEON_DEBUG = 0;
133 #endif
134
135 static const struct dri_debug_control debug_control[] = {
136 {"fall", DEBUG_FALLBACKS},
137 {"tex", DEBUG_TEXTURE},
138 {"ioctl", DEBUG_IOCTL},
139 {"prim", DEBUG_PRIMS},
140 {"vert", DEBUG_VERTS},
141 {"state", DEBUG_STATE},
142 {"code", DEBUG_CODEGEN},
143 {"vfmt", DEBUG_VFMT},
144 {"vtxf", DEBUG_VFMT},
145 {"verb", DEBUG_VERBOSE},
146 {"dri", DEBUG_DRI},
147 {"dma", DEBUG_DMA},
148 {"san", DEBUG_SANITY},
149 {"sync", DEBUG_SYNC},
150 {"pix", DEBUG_PIXEL},
151 {"mem", DEBUG_MEMORY},
152 {NULL, 0}
153 };
154
155 #if 1
156 /* Including xf86PciInfo.h introduces a bunch of errors...
157 */
158 #define PCI_CHIP_R200_QD 0x5144 /* why do they have r200 names? */
159 #define PCI_CHIP_R200_QE 0x5145 /* Those are all standard radeons */
160 #define PCI_CHIP_R200_QF 0x5146
161 #define PCI_CHIP_R200_QG 0x5147
162 #define PCI_CHIP_R200_QY 0x5159
163 #define PCI_CHIP_R200_QZ 0x515A
164 #define PCI_CHIP_R200_LW 0x4C57
165 #define PCI_CHIP_R200_LY 0x4C59
166 #define PCI_CHIP_R200_LZ 0x4C5A
167 #define PCI_CHIP_RV200_QW 0x5157 /* Radeon 7500 - not an R200 at all */
168 #define PCI_CHIP_RV200_QX 0x5158
169 #define PCI_CHIP_RS100_4136 0x4136 /* IGP RS100, RS200, RS250 are not R200 */
170 #define PCI_CHIP_RS200_4137 0x4137
171 #define PCI_CHIP_RS250_4237 0x4237
172 #define PCI_CHIP_RS100_4336 0x4336
173 #define PCI_CHIP_RS200_4337 0x4337
174 #define PCI_CHIP_RS250_4437 0x4437
175 #define PCI_CHIP_RS300_5834 0x5834 /* All RS300's are R200 */
176 #define PCI_CHIP_RS300_5835 0x5835
177 #define PCI_CHIP_RS300_5836 0x5836
178 #define PCI_CHIP_RS300_5837 0x5837
179 #define PCI_CHIP_R200_BB 0x4242 /* r200 (non-derived) start */
180 #define PCI_CHIP_R200_BC 0x4243
181 #define PCI_CHIP_R200_QH 0x5148
182 #define PCI_CHIP_R200_QI 0x5149
183 #define PCI_CHIP_R200_QJ 0x514A
184 #define PCI_CHIP_R200_QK 0x514B
185 #define PCI_CHIP_R200_QL 0x514C
186 #define PCI_CHIP_R200_QM 0x514D
187 #define PCI_CHIP_R200_QN 0x514E
188 #define PCI_CHIP_R200_QO 0x514F /* r200 (non-derived) end */
189 /* are the R200 Qh (0x5168) and following needed too? They are not in xf86PciInfo.h
190 but in the pci database. Maybe just secondary ports or something ? */
191
192 #define PCI_CHIP_R300_AD 0x4144
193 #define PCI_CHIP_R300_AE 0x4145
194 #define PCI_CHIP_R300_AF 0x4146
195 #define PCI_CHIP_R300_AG 0x4147
196 #define PCI_CHIP_RV350_AP 0x4150
197 #define PCI_CHIP_RV350_NP 0x4E50
198 #define PCI_CHIP_R300_ND 0x4E44
199 #define PCI_CHIP_R300_NE 0x4E45
200 #define PCI_CHIP_R300_NF 0x4E46
201 #define PCI_CHIP_R300_NG 0x4E47
202 #define PCI_CHIP_R350_NH 0x4E48
203 #endif
204
205 #ifdef USE_NEW_INTERFACE
206 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
207 #endif /* USE_NEW_INTERFACE */
208
209 static radeonScreenPtr __radeonScreen;
210
211 static int getSwapInfo(__DRIdrawablePrivate * dPriv, __DRIswapInfo * sInfo);
212
213 #ifdef USE_NEW_INTERFACE
214 static __GLcontextModes *radeonFillInModes(unsigned pixel_bits,
215 unsigned depth_bits,
216 unsigned stencil_bits,
217 GLboolean have_back_buffer)
218 {
219 __GLcontextModes *modes;
220 __GLcontextModes *m;
221 unsigned num_modes;
222 unsigned depth_buffer_factor;
223 unsigned back_buffer_factor;
224 GLenum fb_format;
225 GLenum fb_type;
226
227 /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
228 * enough to add support. Basically, if a context is created with an
229 * fbconfig where the swap method is GLX_SWAP_COPY_OML, pageflipping
230 * will never be used.
231 */
232 static const GLenum back_buffer_modes[] = {
233 GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */
234 };
235
236 uint8_t depth_bits_array[2];
237 uint8_t stencil_bits_array[2];
238
239 depth_bits_array[0] = depth_bits;
240 depth_bits_array[1] = depth_bits;
241
242 /* Just like with the accumulation buffer, always provide some modes
243 * with a stencil buffer. It will be a sw fallback, but some apps won't
244 * care about that.
245 */
246 stencil_bits_array[0] = 0;
247 stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
248
249 depth_buffer_factor = ((depth_bits != 0)
250 || (stencil_bits != 0)) ? 2 : 1;
251 back_buffer_factor = (have_back_buffer) ? 2 : 1;
252
253 num_modes = depth_buffer_factor * back_buffer_factor * 4;
254
255 if (pixel_bits == 16) {
256 fb_format = GL_RGB;
257 fb_type = GL_UNSIGNED_SHORT_5_6_5;
258 } else {
259 fb_format = GL_BGRA;
260 fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
261 }
262
263 modes = (*create_context_modes) (num_modes, sizeof(__GLcontextModes));
264 m = modes;
265 if (!driFillInModes(&m, fb_format, fb_type,
266 depth_bits_array, stencil_bits_array,
267 depth_buffer_factor, back_buffer_modes,
268 back_buffer_factor, GLX_TRUE_COLOR)) {
269 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
270 __LINE__);
271 return NULL;
272 }
273
274 if (!driFillInModes(&m, fb_format, fb_type,
275 depth_bits_array, stencil_bits_array,
276 depth_buffer_factor, back_buffer_modes,
277 back_buffer_factor, GLX_DIRECT_COLOR)) {
278 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
279 __LINE__);
280 return NULL;
281 }
282
283 /* Mark the visual as slow if there are "fake" stencil bits.
284 */
285 for (m = modes; m != NULL; m = m->next) {
286 if ((m->stencilBits != 0) && (m->stencilBits != stencil_bits)) {
287 m->visualRating = GLX_SLOW_CONFIG;
288 }
289 }
290
291 return modes;
292 }
293 #endif /* USE_NEW_INTERFACE */
294
295 /* Create the device specific screen private data struct.
296 */
297 static radeonScreenPtr radeonCreateScreen(__DRIscreenPrivate * sPriv)
298 {
299 radeonScreenPtr screen;
300 RADEONDRIPtr dri_priv = (RADEONDRIPtr) sPriv->pDevPriv;
301 unsigned char *RADEONMMIO;
302
303 /* Allocate the private area */
304 screen = (radeonScreenPtr) CALLOC(sizeof(*screen));
305 if (!screen) {
306 __driUtilMessage
307 ("%s: Could not allocate memory for screen structure",
308 __FUNCTION__);
309 return NULL;
310 }
311
312 #if DO_DEBUG
313 RADEON_DEBUG = driParseDebugString(getenv("RADEON_DEBUG"), debug_control);
314 #endif
315
316 /* Get family and potential quirks from the PCI device ID.
317 */
318 switch (dri_priv->deviceID) {
319 case PCI_CHIP_R200_QD:
320 case PCI_CHIP_R200_QE:
321 case PCI_CHIP_R200_QF:
322 case PCI_CHIP_R200_QG:
323 case PCI_CHIP_R200_QY:
324 case PCI_CHIP_R200_QZ:
325 case PCI_CHIP_RV200_QW:
326 case PCI_CHIP_RV200_QX:
327 case PCI_CHIP_R200_LW:
328 case PCI_CHIP_R200_LY:
329 case PCI_CHIP_R200_LZ:
330 case PCI_CHIP_RS100_4136:
331 case PCI_CHIP_RS200_4137:
332 case PCI_CHIP_RS250_4237:
333 case PCI_CHIP_RS100_4336:
334 case PCI_CHIP_RS200_4337:
335 case PCI_CHIP_RS250_4437:
336 __driUtilMessage("radeonCreateScreen(): Device isn't an r200!\n");
337 FREE(screen);
338 return NULL;
339
340 case PCI_CHIP_RS300_5834:
341 case PCI_CHIP_RS300_5835:
342 case PCI_CHIP_RS300_5836:
343 case PCI_CHIP_RS300_5837:
344 screen->chipset = RADEON_CHIP_UNREAL_R200;
345 break;
346
347 case PCI_CHIP_R200_BB:
348 case PCI_CHIP_R200_BC:
349 case PCI_CHIP_R200_QH:
350 case PCI_CHIP_R200_QI:
351 case PCI_CHIP_R200_QJ:
352 case PCI_CHIP_R200_QK:
353 case PCI_CHIP_R200_QL:
354 case PCI_CHIP_R200_QM:
355 case PCI_CHIP_R200_QN:
356 case PCI_CHIP_R200_QO:
357 screen->chipset = RADEON_CHIP_REAL_R200 | RADEON_CHIPSET_TCL;
358 break;
359
360 /* TODO: Check all those chips for the exact flags required.
361 */
362 case PCI_CHIP_R300_AD:
363 case PCI_CHIP_R300_AE:
364 case PCI_CHIP_R300_AF:
365 case PCI_CHIP_R300_AG:
366 case PCI_CHIP_RV350_AP:
367 case PCI_CHIP_RV350_NP:
368 screen->chipset = RADEON_CHIP_RV350;
369 break;
370
371 case PCI_CHIP_R300_ND: /* confirmed -- nh */
372 case PCI_CHIP_R300_NE:
373 case PCI_CHIP_R300_NF:
374 case PCI_CHIP_R300_NG:
375 case PCI_CHIP_R350_NH:
376 screen->chipset = RADEON_CHIP_R300;
377 break;
378
379 default:
380 fprintf(stderr,
381 "Unknown device ID %04X, please report. Assuming plain R300.\n",
382 dri_priv->deviceID);
383 screen->chipset = RADEON_CHIP_R300;
384 }
385
386 /* Parse configuration */
387 if (GET_CHIP(screen) >= RADEON_CHIP_R300) {
388 driParseOptionInfo(&screen->optionCache,
389 __driR300ConfigOptions, __driR300NConfigOptions);
390 } else {
391 driParseOptionInfo(&screen->optionCache,
392 __driR200ConfigOptions, __driR200NConfigOptions);
393 }
394
395 /* This is first since which regions we map depends on whether or
396 * not we are using a PCI card.
397 */
398 screen->IsPCI = dri_priv->IsPCI;
399
400 {
401 int ret;
402 drm_radeon_getparam_t gp;
403
404 gp.param = RADEON_PARAM_GART_BUFFER_OFFSET;
405 gp.value = &screen->gart_buffer_offset;
406
407 ret = drmCommandWriteRead(sPriv->fd, DRM_RADEON_GETPARAM,
408 &gp, sizeof(gp));
409 if (ret) {
410 FREE(screen);
411 fprintf(stderr,
412 "drmRadeonGetParam (RADEON_PARAM_GART_BUFFER_OFFSET): %d\n",
413 ret);
414 return NULL;
415 }
416
417 if (sPriv->drmMinor >= 6) {
418 gp.param = RADEON_PARAM_GART_BASE;
419 gp.value = &screen->gart_base;
420
421 ret =
422 drmCommandWriteRead(sPriv->fd, DRM_RADEON_GETPARAM,
423 &gp, sizeof(gp));
424 if (ret) {
425 FREE(screen);
426 fprintf(stderr,
427 "drmR200GetParam (RADEON_PARAM_GART_BASE): %d\n",
428 ret);
429 return NULL;
430 }
431
432 gp.param = RADEON_PARAM_IRQ_NR;
433 gp.value = &screen->irq;
434
435 ret =
436 drmCommandWriteRead(sPriv->fd, DRM_RADEON_GETPARAM,
437 &gp, sizeof(gp));
438 if (ret) {
439 FREE(screen);
440 fprintf(stderr,
441 "drmRadeonGetParam (RADEON_PARAM_IRQ_NR): %d\n",
442 ret);
443 return NULL;
444 }
445
446 /* Check if kernel module is new enough to support cube maps */
447 screen->drmSupportsCubeMaps = (sPriv->drmMinor >= 7);
448 /* Check if kernel module is new enough to support blend color and
449 separate blend functions/equations */
450 screen->drmSupportsBlendColor = (sPriv->drmMinor >= 11);
451
452 }
453 }
454
455 screen->mmio.handle = dri_priv->registerHandle;
456 screen->mmio.size = dri_priv->registerSize;
457 if (drmMap(sPriv->fd,
458 screen->mmio.handle, screen->mmio.size, &screen->mmio.map)) {
459 FREE(screen);
460 __driUtilMessage("%s: drmMap failed\n", __FUNCTION__);
461 return NULL;
462 }
463
464 RADEONMMIO = screen->mmio.map;
465
466 screen->status.handle = dri_priv->statusHandle;
467 screen->status.size = dri_priv->statusSize;
468 if (drmMap(sPriv->fd,
469 screen->status.handle,
470 screen->status.size, &screen->status.map)) {
471 drmUnmap(screen->mmio.map, screen->mmio.size);
472 FREE(screen);
473 __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__);
474 return NULL;
475 }
476 screen->scratch = (__volatile__ uint32_t *)
477 ((GLubyte *) screen->status.map + RADEON_SCRATCH_REG_OFFSET);
478
479 screen->buffers = drmMapBufs(sPriv->fd);
480 if (!screen->buffers) {
481 drmUnmap(screen->status.map, screen->status.size);
482 drmUnmap(screen->mmio.map, screen->mmio.size);
483 FREE(screen);
484 __driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__);
485 return NULL;
486 }
487
488 if (dri_priv->gartTexHandle && dri_priv->gartTexMapSize) {
489
490 screen->gartTextures.handle = dri_priv->gartTexHandle;
491 screen->gartTextures.size = dri_priv->gartTexMapSize;
492 if (drmMap(sPriv->fd,
493 screen->gartTextures.handle,
494 screen->gartTextures.size,
495 (drmAddressPtr) & screen->gartTextures.map)) {
496 drmUnmapBufs(screen->buffers);
497 drmUnmap(screen->status.map, screen->status.size);
498 drmUnmap(screen->mmio.map, screen->mmio.size);
499 FREE(screen);
500 __driUtilMessage
501 ("%s: drmMAP failed for GART texture area\n",
502 __FUNCTION__);
503 return NULL;
504 }
505
506 screen->gart_texture_offset =
507 dri_priv->gartTexOffset +
508 (screen->IsPCI ? INREG(RADEON_AIC_LO_ADDR)
509 : ((INREG(RADEON_MC_AGP_LOCATION) & 0x0ffffU) << 16));
510 }
511
512 screen->cpp = dri_priv->bpp / 8;
513 screen->AGPMode = dri_priv->AGPMode;
514
515 screen->fbLocation = (INREG(RADEON_MC_FB_LOCATION) & 0xffff) << 16;
516
517 if (sPriv->drmMinor >= 10) {
518 drm_radeon_setparam_t sp;
519
520 sp.param = RADEON_SETPARAM_FB_LOCATION;
521 sp.value = screen->fbLocation;
522
523 drmCommandWrite(sPriv->fd, DRM_RADEON_SETPARAM,
524 &sp, sizeof(sp));
525 }
526
527 screen->frontOffset = dri_priv->frontOffset;
528 screen->frontPitch = dri_priv->frontPitch;
529 screen->backOffset = dri_priv->backOffset;
530 screen->backPitch = dri_priv->backPitch;
531 screen->depthOffset = dri_priv->depthOffset;
532 screen->depthPitch = dri_priv->depthPitch;
533
534 screen->texOffset[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureOffset
535 + screen->fbLocation;
536 screen->texSize[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureSize;
537 screen->logTexGranularity[RADEON_LOCAL_TEX_HEAP] =
538 dri_priv->log2TexGran;
539
540 if (!screen->gartTextures.map) {
541 screen->numTexHeaps = RADEON_NR_TEX_HEAPS - 1;
542 screen->texOffset[RADEON_GART_TEX_HEAP] = 0;
543 screen->texSize[RADEON_GART_TEX_HEAP] = 0;
544 screen->logTexGranularity[RADEON_GART_TEX_HEAP] = 0;
545 } else {
546 screen->numTexHeaps = RADEON_NR_TEX_HEAPS;
547 screen->texOffset[RADEON_GART_TEX_HEAP] =
548 screen->gart_texture_offset;
549 screen->texSize[RADEON_GART_TEX_HEAP] =
550 dri_priv->gartTexMapSize;
551 screen->logTexGranularity[RADEON_GART_TEX_HEAP] =
552 dri_priv->log2GARTTexGran;
553 }
554
555 screen->driScreen = sPriv;
556 screen->sarea_priv_offset = dri_priv->sarea_priv_offset;
557
558 if (driCompareGLXAPIVersion(20030813) >= 0) {
559 PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
560 (PFNGLXSCRENABLEEXTENSIONPROC)
561 glXGetProcAddress((const GLubyte *)
562 "__glXScrEnableExtension");
563 void *const psc = sPriv->psc->screenConfigs;
564
565 if (glx_enable_extension != NULL) {
566 if (screen->irq != 0) {
567 (*glx_enable_extension) (psc,
568 "GLX_SGI_swap_control");
569 (*glx_enable_extension) (psc,
570 "GLX_SGI_video_sync");
571 (*glx_enable_extension) (psc,
572 "GLX_MESA_swap_control");
573 }
574
575 (*glx_enable_extension) (psc,
576 "GLX_MESA_swap_frame_usage");
577
578 if (driCompareGLXAPIVersion(20030818) >= 0) {
579 sPriv->psc->allocateMemory =
580 (void *)r200AllocateMemoryMESA;
581 sPriv->psc->freeMemory =
582 (void *)r200FreeMemoryMESA;
583 sPriv->psc->memoryOffset =
584 (void *)r200GetMemoryOffsetMESA;
585
586 (*glx_enable_extension) (psc,
587 "GLX_MESA_allocate_memory");
588 }
589
590 if (driCompareGLXAPIVersion(20030915) >= 0) {
591 (*glx_enable_extension) (psc,
592 "GLX_SGIX_fbconfig");
593 (*glx_enable_extension) (psc,
594 "GLX_OML_swap_method");
595 }
596 }
597 }
598 return screen;
599 }
600
601 /* Destroy the device specific screen private data struct.
602 */
603 static void radeonDestroyScreen(__DRIscreenPrivate * sPriv)
604 {
605 radeonScreenPtr screen = (radeonScreenPtr) sPriv->private;
606
607 if (!screen)
608 return;
609
610 if (screen->gartTextures.map) {
611 drmUnmap(screen->gartTextures.map, screen->gartTextures.size);
612 }
613 drmUnmapBufs(screen->buffers);
614 drmUnmap(screen->status.map, screen->status.size);
615 drmUnmap(screen->mmio.map, screen->mmio.size);
616
617 /* free all option information */
618 driDestroyOptionInfo(&screen->optionCache);
619
620 FREE(screen);
621 sPriv->private = NULL;
622 }
623
624 /* Initialize the driver specific screen private data.
625 */
626 static GLboolean radeonInitDriver(__DRIscreenPrivate * sPriv)
627 {
628 __radeonScreen = radeonCreateScreen(sPriv);
629
630 sPriv->private = (void *)__radeonScreen;
631
632 return sPriv->private ? GL_TRUE : GL_FALSE;
633 }
634
635 /**
636 * Create and initialize the Mesa and driver specific pixmap buffer
637 * data.
638 *
639 * \todo This function (and its interface) will need to be updated to support
640 * pbuffers.
641 */
642 static GLboolean
643 radeonCreateBuffer(__DRIscreenPrivate * driScrnPriv,
644 __DRIdrawablePrivate * driDrawPriv,
645 const __GLcontextModes * mesaVis, GLboolean isPixmap)
646 {
647 if (isPixmap) {
648 return GL_FALSE; /* not implemented */
649 } else {
650 const GLboolean swDepth = GL_FALSE;
651 const GLboolean swAlpha = GL_FALSE;
652 const GLboolean swAccum = mesaVis->accumRedBits > 0;
653 const GLboolean swStencil = mesaVis->stencilBits > 0 &&
654 mesaVis->depthBits != 24;
655 driDrawPriv->driverPrivate = (void *)
656 _mesa_create_framebuffer(mesaVis,
657 swDepth,
658 swStencil, swAccum, swAlpha);
659 return (driDrawPriv->driverPrivate != NULL);
660 }
661 }
662
663 static void radeonDestroyBuffer(__DRIdrawablePrivate * driDrawPriv)
664 {
665 _mesa_destroy_framebuffer((GLframebuffer *) (driDrawPriv->
666 driverPrivate));
667 }
668
669
670 /**
671 * Choose the appropriate CreateContext function based on the chipset.
672 */
673 static GLboolean radeonCreateContext(const __GLcontextModes * glVisual,
674 __DRIcontextPrivate * driContextPriv,
675 void *sharedContextPriv)
676 {
677 __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
678 radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
679 int chip = GET_CHIP(screen);
680
681 if (chip >= RADEON_CHIP_R300)
682 return r300CreateContext(glVisual, driContextPriv, sharedContextPriv);
683 else
684 return r200CreateContext(glVisual, driContextPriv, sharedContextPriv);
685 }
686
687
688 /**
689 * Choose the appropriate DestroyContext function based on the chipset.
690 */
691 static void radeonDestroyContext(__DRIcontextPrivate * driContextPriv)
692 {
693 radeonContextPtr radeon = (radeonContextPtr) driContextPriv->driverPrivate;
694 int chip = GET_CHIP(radeon->radeonScreen);
695
696 if (chip >= RADEON_CHIP_R300)
697 return r300DestroyContext(driContextPriv);
698 else
699 return r200DestroyContext(driContextPriv);
700 }
701
702
703 static const struct __DriverAPIRec radeonAPI = {
704 .InitDriver = radeonInitDriver,
705 .DestroyScreen = radeonDestroyScreen,
706 .CreateContext = radeonCreateContext,
707 .DestroyContext = radeonDestroyContext,
708 .CreateBuffer = radeonCreateBuffer,
709 .DestroyBuffer = radeonDestroyBuffer,
710 .SwapBuffers = radeonSwapBuffers,
711 .MakeCurrent = radeonMakeCurrent,
712 .UnbindContext = radeonUnbindContext,
713 .GetSwapInfo = getSwapInfo,
714 .GetMSC = driGetMSC32,
715 .WaitForMSC = driWaitForMSC32,
716 .WaitForSBC = NULL,
717 .SwapBuffersMSC = NULL
718 };
719
720 /*
721 * This is the bootstrap function for the driver.
722 * The __driCreateScreen name is the symbol that libGL.so fetches.
723 * Return: pointer to a __DRIscreenPrivate.
724 *
725 */
726 #if !defined(DRI_NEW_INTERFACE_ONLY)
727 void *__driCreateScreen(Display * dpy, int scrn, __DRIscreen * psc,
728 int numConfigs, __GLXvisualConfig * config)
729 {
730 __DRIscreenPrivate *psp;
731 psp =
732 __driUtilCreateScreen(dpy, scrn, psc, numConfigs, config, &radeonAPI);
733 return (void *)psp;
734 }
735 #endif /* !defined(DRI_NEW_INTERFACE_ONLY) */
736
737 /**
738 * This is the bootstrap function for the driver. libGL supplies all of the
739 * requisite information about the system, and the driver initializes itself.
740 * This routine also fills in the linked list pointed to by \c driver_modes
741 * with the \c __GLcontextModes that the driver can support for windows or
742 * pbuffers.
743 *
744 * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on
745 * failure.
746 */
747 #ifdef USE_NEW_INTERFACE
748 void *__driCreateNewScreen(__DRInativeDisplay * dpy, int scrn,
749 __DRIscreen * psc, const __GLcontextModes * modes,
750 const __DRIversion * ddx_version,
751 const __DRIversion * dri_version,
752 const __DRIversion * drm_version,
753 const __DRIframebuffer * frame_buffer,
754 drmAddress pSAREA, int fd, int internal_api_version,
755 __GLcontextModes ** driver_modes)
756 {
757 __DRIscreenPrivate *psp;
758 static const __DRIversion ddx_expected = { 4, 0, 0 };
759 static const __DRIversion dri_expected = { 4, 0, 0 };
760 static const __DRIversion drm_expected = { 1, 11, 1 };
761
762 if (!driCheckDriDdxDrmVersions2("R300",
763 dri_version, &dri_expected,
764 ddx_version, &ddx_expected,
765 drm_version, &drm_expected)) {
766 return NULL;
767 }
768
769 psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
770 ddx_version, dri_version, drm_version,
771 frame_buffer, pSAREA, fd,
772 internal_api_version, &radeonAPI);
773 if (psp != NULL) {
774 create_context_modes = (PFNGLXCREATECONTEXTMODES)
775 glXGetProcAddress((const GLubyte *)
776 "__glXCreateContextModes");
777 if (create_context_modes != NULL) {
778 RADEONDRIPtr dri_priv = (RADEONDRIPtr) psp->pDevPriv;
779 *driver_modes = radeonFillInModes(dri_priv->bpp,
780 (dri_priv->bpp ==
781 16) ? 16 : 24,
782 (dri_priv->bpp ==
783 16) ? 0 : 8,
784 (dri_priv->backOffset !=
785 dri_priv->
786 depthOffset));
787 }
788 }
789
790 return (void *)psp;
791 }
792 #endif /* USE_NEW_INTERFACE */
793
794 /**
795 * Get information about previous buffer swaps.
796 */
797 static int getSwapInfo(__DRIdrawablePrivate * dPriv, __DRIswapInfo * sInfo)
798 {
799 radeonContextPtr radeon;
800
801 if ((dPriv == NULL) || (dPriv->driContextPriv == NULL)
802 || (dPriv->driContextPriv->driverPrivate == NULL)
803 || (sInfo == NULL)) {
804 return -1;
805 }
806
807 radeon = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
808 sInfo->swap_count = radeon->swap_count;
809 sInfo->swap_ust = radeon->swap_ust;
810 sInfo->swap_missed_count = radeon->swap_missed_count;
811
812 sInfo->swap_missed_usage = (sInfo->swap_missed_count != 0)
813 ? driCalculateSwapUsage(dPriv, 0, radeon->swap_missed_ust)
814 : 0.0;
815
816 return 0;
817 }