projects / mesa.git / blob
? search:


59fab0f7cfc203e708d4b2985c147be28bfb94fe
[mesa.git] / src / mesa / drivers / dri / r300 / radeon_screen.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file radeon_screen.c
32 * Screen initialization functions for the R200 driver.
33 *
34 * \author Keith Whitwell <keith@tungstengraphics.com>
35 */
36
37 #include <dlfcn.h>
38
39 #include "glheader.h"
40 #include "imports.h"
41 #include "context.h"
42
43 #define STANDALONE_MMIO
44 #include "radeon_screen.h"
45 #include "r200_context.h"
46 #include "r300_context.h"
47 #include "radeon_ioctl.h"
48 #include "r200_ioctl.h"
49 #include "radeon_macros.h"
50 #include "radeon_reg.h"
51
52 #include "utils.h"
53 #include "vblank.h"
54 #include "GL/internal/dri_interface.h"
55
56 /* R200 configuration
57 */
58 #include "xmlpool.h"
59
60 const char __driR200ConfigOptions[] =
61 DRI_CONF_BEGIN
62 DRI_CONF_SECTION_PERFORMANCE
63 DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
64 DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
65 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
66 DRI_CONF_MAX_TEXTURE_UNITS(4, 2, 6)
67 DRI_CONF_SECTION_END
68 DRI_CONF_SECTION_QUALITY
69 DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
70 DRI_CONF_DEF_MAX_ANISOTROPY(1.0, "1.0,2.0,4.0,8.0,16.0")
71 DRI_CONF_NO_NEG_LOD_BIAS(false)
72 DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
73 DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
74 DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
75 DRI_CONF_SECTION_END
76 DRI_CONF_SECTION_DEBUG
77 DRI_CONF_NO_RAST(false)
78 DRI_CONF_SECTION_END
79 DRI_CONF_SECTION_SOFTWARE
80 DRI_CONF_ARB_VERTEX_PROGRAM(true)
81 DRI_CONF_NV_VERTEX_PROGRAM(false)
82 DRI_CONF_SECTION_END
83 DRI_CONF_END;
84 static const GLuint __driR200NConfigOptions = 13;
85
86 /* TODO: integrate these into xmlpool.h! */
87 #define DRI_CONF_MAX_TEXTURE_IMAGE_UNITS(def,min,max) \
88 DRI_CONF_OPT_BEGIN_V(texture_image_units,int,def, # min ":" # max ) \
89 DRI_CONF_DESC(en,"Number of texture image units") \
90 DRI_CONF_DESC(de,"Anzahl der Textureinheiten") \
91 DRI_CONF_OPT_END
92
93 #define DRI_CONF_MAX_TEXTURE_COORD_UNITS(def,min,max) \
94 DRI_CONF_OPT_BEGIN_V(texture_coord_units,int,def, # min ":" # max ) \
95 DRI_CONF_DESC(en,"Number of texture coordinate units") \
96 DRI_CONF_DESC(de,"Anzahl der Texturkoordinateneinheiten") \
97 DRI_CONF_OPT_END
98
99 #define DRI_CONF_COMMAND_BUFFER_SIZE(def,min,max) \
100 DRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \
101 DRI_CONF_DESC(en,"Size of command buffer (in KB)") \
102 DRI_CONF_DESC(de,"Grösse des Befehlspuffers (in KB)") \
103 DRI_CONF_OPT_END
104
105
106 const char __driR300ConfigOptions[] =
107 DRI_CONF_BEGIN
108 DRI_CONF_SECTION_PERFORMANCE
109 DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
110 DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
111 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
112 DRI_CONF_MAX_TEXTURE_IMAGE_UNITS(16, 2, 16)
113 DRI_CONF_MAX_TEXTURE_COORD_UNITS(8, 2, 8)
114 DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
115 DRI_CONF_SECTION_END
116 DRI_CONF_SECTION_QUALITY
117 DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
118 DRI_CONF_DEF_MAX_ANISOTROPY(1.0, "1.0,2.0,4.0,8.0,16.0")
119 DRI_CONF_NO_NEG_LOD_BIAS(false)
120 DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
121 DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
122 DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
123 DRI_CONF_SECTION_END
124 DRI_CONF_SECTION_DEBUG
125 DRI_CONF_NO_RAST(false)
126 DRI_CONF_SECTION_END
127 DRI_CONF_END;
128 static const GLuint __driR300NConfigOptions = 13;
129
130
131 #ifndef RADEON_DEBUG
132 int RADEON_DEBUG = 0;
133 #endif
134
135 static const struct dri_debug_control debug_control[] = {
136 {"fall", DEBUG_FALLBACKS},
137 {"tex", DEBUG_TEXTURE},
138 {"ioctl", DEBUG_IOCTL},
139 {"prim", DEBUG_PRIMS},
140 {"vert", DEBUG_VERTS},
141 {"state", DEBUG_STATE},
142 {"code", DEBUG_CODEGEN},
143 {"vfmt", DEBUG_VFMT},
144 {"vtxf", DEBUG_VFMT},
145 {"verb", DEBUG_VERBOSE},
146 {"dri", DEBUG_DRI},
147 {"dma", DEBUG_DMA},
148 {"san", DEBUG_SANITY},
149 {"sync", DEBUG_SYNC},
150 {"pix", DEBUG_PIXEL},
151 {"mem", DEBUG_MEMORY},
152 {NULL, 0}
153 };
154
155 #if 1
156 /* Including xf86PciInfo.h introduces a bunch of errors...
157 */
158 #define PCI_CHIP_R200_QD 0x5144 /* why do they have r200 names? */
159 #define PCI_CHIP_R200_QE 0x5145 /* Those are all standard radeons */
160 #define PCI_CHIP_R200_QF 0x5146
161 #define PCI_CHIP_R200_QG 0x5147
162 #define PCI_CHIP_R200_QY 0x5159
163 #define PCI_CHIP_R200_QZ 0x515A
164 #define PCI_CHIP_R200_LW 0x4C57
165 #define PCI_CHIP_R200_LY 0x4C59
166 #define PCI_CHIP_R200_LZ 0x4C5A
167 #define PCI_CHIP_RV200_QW 0x5157 /* Radeon 7500 - not an R200 at all */
168 #define PCI_CHIP_RV200_QX 0x5158
169 #define PCI_CHIP_RS100_4136 0x4136 /* IGP RS100, RS200, RS250 are not R200 */
170 #define PCI_CHIP_RS200_4137 0x4137
171 #define PCI_CHIP_RS250_4237 0x4237
172 #define PCI_CHIP_RS100_4336 0x4336
173 #define PCI_CHIP_RS200_4337 0x4337
174 #define PCI_CHIP_RS250_4437 0x4437
175 #define PCI_CHIP_RS300_5834 0x5834 /* All RS300's are R200 */
176 #define PCI_CHIP_RS300_5835 0x5835
177 #define PCI_CHIP_RS300_5836 0x5836
178 #define PCI_CHIP_RS300_5837 0x5837
179 #define PCI_CHIP_R200_BB 0x4242 /* r200 (non-derived) start */
180 #define PCI_CHIP_R200_BC 0x4243
181 #define PCI_CHIP_R200_QH 0x5148
182 #define PCI_CHIP_R200_QI 0x5149
183 #define PCI_CHIP_R200_QJ 0x514A
184 #define PCI_CHIP_R200_QK 0x514B
185 #define PCI_CHIP_R200_QL 0x514C
186 #define PCI_CHIP_R200_QM 0x514D
187 #define PCI_CHIP_R200_QN 0x514E
188 #define PCI_CHIP_R200_QO 0x514F /* r200 (non-derived) end */
189 /* are the R200 Qh (0x5168) and following needed too? They are not in xf86PciInfo.h
190 but in the pci database. Maybe just secondary ports or something ? */
191
192 #define PCI_CHIP_R300_AD 0x4144
193 #define PCI_CHIP_R300_AE 0x4145
194 #define PCI_CHIP_R300_AF 0x4146
195 #define PCI_CHIP_R300_AG 0x4147
196 #define PCI_CHIP_RV350_AP 0x4150
197 #define PCI_CHIP_RV350_AR 0x4152
198 #define PCI_CHIP_RV350_AS 0x4153
199 #define PCI_CHIP_RV350_NP 0x4E50
200 #define PCI_CHIP_RV350_NT 0x4E54
201 #define PCI_CHIP_R300_ND 0x4E44
202 #define PCI_CHIP_R300_NE 0x4E45
203 #define PCI_CHIP_R300_NF 0x4E46
204 #define PCI_CHIP_R300_NG 0x4E47
205 #define PCI_CHIP_R350_NH 0x4E48
206 #endif
207
208 #ifdef USE_NEW_INTERFACE
209 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
210 #endif /* USE_NEW_INTERFACE */
211
212 static radeonScreenPtr __radeonScreen;
213
214 static int getSwapInfo(__DRIdrawablePrivate * dPriv, __DRIswapInfo * sInfo);
215
216 #ifdef USE_NEW_INTERFACE
217 static __GLcontextModes *radeonFillInModes(unsigned pixel_bits,
218 unsigned depth_bits,
219 unsigned stencil_bits,
220 GLboolean have_back_buffer)
221 {
222 __GLcontextModes *modes;
223 __GLcontextModes *m;
224 unsigned num_modes;
225 unsigned depth_buffer_factor;
226 unsigned back_buffer_factor;
227 GLenum fb_format;
228 GLenum fb_type;
229
230 /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
231 * enough to add support. Basically, if a context is created with an
232 * fbconfig where the swap method is GLX_SWAP_COPY_OML, pageflipping
233 * will never be used.
234 */
235 static const GLenum back_buffer_modes[] = {
236 GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */
237 };
238
239 uint8_t depth_bits_array[2];
240 uint8_t stencil_bits_array[2];
241
242 depth_bits_array[0] = depth_bits;
243 depth_bits_array[1] = depth_bits;
244
245 /* Just like with the accumulation buffer, always provide some modes
246 * with a stencil buffer. It will be a sw fallback, but some apps won't
247 * care about that.
248 */
249 stencil_bits_array[0] = 0;
250 stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits;
251
252 depth_buffer_factor = ((depth_bits != 0)
253 || (stencil_bits != 0)) ? 2 : 1;
254 back_buffer_factor = (have_back_buffer) ? 2 : 1;
255
256 num_modes = depth_buffer_factor * back_buffer_factor * 4;
257
258 if (pixel_bits == 16) {
259 fb_format = GL_RGB;
260 fb_type = GL_UNSIGNED_SHORT_5_6_5;
261 } else {
262 fb_format = GL_BGRA;
263 fb_type = GL_UNSIGNED_INT_8_8_8_8_REV;
264 }
265
266 modes = (*create_context_modes) (num_modes, sizeof(__GLcontextModes));
267 m = modes;
268 if (!driFillInModes(&m, fb_format, fb_type,
269 depth_bits_array, stencil_bits_array,
270 depth_buffer_factor, back_buffer_modes,
271 back_buffer_factor, GLX_TRUE_COLOR)) {
272 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
273 __LINE__);
274 return NULL;
275 }
276
277 if (!driFillInModes(&m, fb_format, fb_type,
278 depth_bits_array, stencil_bits_array,
279 depth_buffer_factor, back_buffer_modes,
280 back_buffer_factor, GLX_DIRECT_COLOR)) {
281 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
282 __LINE__);
283 return NULL;
284 }
285
286 /* Mark the visual as slow if there are "fake" stencil bits.
287 */
288 for (m = modes; m != NULL; m = m->next) {
289 if ((m->stencilBits != 0) && (m->stencilBits != stencil_bits)) {
290 m->visualRating = GLX_SLOW_CONFIG;
291 }
292 }
293
294 return modes;
295 }
296 #endif /* USE_NEW_INTERFACE */
297
298 /* Create the device specific screen private data struct.
299 */
300 static radeonScreenPtr radeonCreateScreen(__DRIscreenPrivate * sPriv)
301 {
302 radeonScreenPtr screen;
303 RADEONDRIPtr dri_priv = (RADEONDRIPtr) sPriv->pDevPriv;
304 unsigned char *RADEONMMIO;
305
306 /* Allocate the private area */
307 screen = (radeonScreenPtr) CALLOC(sizeof(*screen));
308 if (!screen) {
309 __driUtilMessage
310 ("%s: Could not allocate memory for screen structure",
311 __FUNCTION__);
312 return NULL;
313 }
314
315 #if DO_DEBUG
316 RADEON_DEBUG = driParseDebugString(getenv("RADEON_DEBUG"), debug_control);
317 #endif
318
319 /* Get family and potential quirks from the PCI device ID.
320 */
321 switch (dri_priv->deviceID) {
322 case PCI_CHIP_R200_QD:
323 case PCI_CHIP_R200_QE:
324 case PCI_CHIP_R200_QF:
325 case PCI_CHIP_R200_QG:
326 case PCI_CHIP_R200_QY:
327 case PCI_CHIP_R200_QZ:
328 case PCI_CHIP_RV200_QW:
329 case PCI_CHIP_RV200_QX:
330 case PCI_CHIP_R200_LW:
331 case PCI_CHIP_R200_LY:
332 case PCI_CHIP_R200_LZ:
333 case PCI_CHIP_RS100_4136:
334 case PCI_CHIP_RS200_4137:
335 case PCI_CHIP_RS250_4237:
336 case PCI_CHIP_RS100_4336:
337 case PCI_CHIP_RS200_4337:
338 case PCI_CHIP_RS250_4437:
339 __driUtilMessage("radeonCreateScreen(): Device isn't an r200!\n");
340 FREE(screen);
341 return NULL;
342
343 case PCI_CHIP_RS300_5834:
344 case PCI_CHIP_RS300_5835:
345 case PCI_CHIP_RS300_5836:
346 case PCI_CHIP_RS300_5837:
347 screen->chipset = RADEON_CHIP_UNREAL_R200;
348 break;
349
350 case PCI_CHIP_R200_BB:
351 case PCI_CHIP_R200_BC:
352 case PCI_CHIP_R200_QH:
353 case PCI_CHIP_R200_QI:
354 case PCI_CHIP_R200_QJ:
355 case PCI_CHIP_R200_QK:
356 case PCI_CHIP_R200_QL:
357 case PCI_CHIP_R200_QM:
358 case PCI_CHIP_R200_QN:
359 case PCI_CHIP_R200_QO:
360 screen->chipset = RADEON_CHIP_REAL_R200 | RADEON_CHIPSET_TCL;
361 break;
362
363 /* TODO: Check all those chips for the exact flags required.
364 */
365 case PCI_CHIP_R300_AD:
366 case PCI_CHIP_R300_AE:
367 case PCI_CHIP_R300_AF:
368 case PCI_CHIP_R300_AG:
369 case PCI_CHIP_RV350_AP:
370 case PCI_CHIP_RV350_AS:
371 case PCI_CHIP_RV350_NP:
372 case PCI_CHIP_RV350_NT:
373 screen->chipset = RADEON_CHIP_RV350;
374 break;
375
376 case PCI_CHIP_R300_ND: /* confirmed -- nh */
377 case PCI_CHIP_R300_NE:
378 case PCI_CHIP_R300_NF:
379 case PCI_CHIP_R300_NG:
380 case PCI_CHIP_R350_NH:
381 screen->chipset = RADEON_CHIP_R300;
382 break;
383
384 default:
385 fprintf(stderr,
386 "Unknown device ID %04X, please report. Assuming plain R300.\n",
387 dri_priv->deviceID);
388 screen->chipset = RADEON_CHIP_R300;
389 }
390
391 /* Parse configuration */
392 if (GET_CHIP(screen) >= RADEON_CHIP_R300) {
393 driParseOptionInfo(&screen->optionCache,
394 __driR300ConfigOptions, __driR300NConfigOptions);
395 } else {
396 driParseOptionInfo(&screen->optionCache,
397 __driR200ConfigOptions, __driR200NConfigOptions);
398 }
399
400 /* This is first since which regions we map depends on whether or
401 * not we are using a PCI card.
402 */
403 screen->IsPCI = dri_priv->IsPCI;
404
405 {
406 int ret;
407 drm_radeon_getparam_t gp;
408
409 gp.param = RADEON_PARAM_GART_BUFFER_OFFSET;
410 gp.value = &screen->gart_buffer_offset;
411
412 ret = drmCommandWriteRead(sPriv->fd, DRM_RADEON_GETPARAM,
413 &gp, sizeof(gp));
414 if (ret) {
415 FREE(screen);
416 fprintf(stderr,
417 "drmRadeonGetParam (RADEON_PARAM_GART_BUFFER_OFFSET): %d\n",
418 ret);
419 return NULL;
420 }
421
422 if (sPriv->drmMinor >= 6) {
423 gp.param = RADEON_PARAM_GART_BASE;
424 gp.value = &screen->gart_base;
425
426 ret =
427 drmCommandWriteRead(sPriv->fd, DRM_RADEON_GETPARAM,
428 &gp, sizeof(gp));
429 if (ret) {
430 FREE(screen);
431 fprintf(stderr,
432 "drmR200GetParam (RADEON_PARAM_GART_BASE): %d\n",
433 ret);
434 return NULL;
435 }
436
437 gp.param = RADEON_PARAM_IRQ_NR;
438 gp.value = &screen->irq;
439
440 ret =
441 drmCommandWriteRead(sPriv->fd, DRM_RADEON_GETPARAM,
442 &gp, sizeof(gp));
443 if (ret) {
444 FREE(screen);
445 fprintf(stderr,
446 "drmRadeonGetParam (RADEON_PARAM_IRQ_NR): %d\n",
447 ret);
448 return NULL;
449 }
450
451 /* Check if kernel module is new enough to support cube maps */
452 screen->drmSupportsCubeMaps = (sPriv->drmMinor >= 7);
453 /* Check if kernel module is new enough to support blend color and
454 separate blend functions/equations */
455 screen->drmSupportsBlendColor = (sPriv->drmMinor >= 11);
456
457 }
458 }
459
460 screen->mmio.handle = dri_priv->registerHandle;
461 screen->mmio.size = dri_priv->registerSize;
462 if (drmMap(sPriv->fd,
463 screen->mmio.handle, screen->mmio.size, &screen->mmio.map)) {
464 FREE(screen);
465 __driUtilMessage("%s: drmMap failed\n", __FUNCTION__);
466 return NULL;
467 }
468
469 RADEONMMIO = screen->mmio.map;
470
471 screen->status.handle = dri_priv->statusHandle;
472 screen->status.size = dri_priv->statusSize;
473 if (drmMap(sPriv->fd,
474 screen->status.handle,
475 screen->status.size, &screen->status.map)) {
476 drmUnmap(screen->mmio.map, screen->mmio.size);
477 FREE(screen);
478 __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__);
479 return NULL;
480 }
481 screen->scratch = (__volatile__ uint32_t *)
482 ((GLubyte *) screen->status.map + RADEON_SCRATCH_REG_OFFSET);
483
484 screen->buffers = drmMapBufs(sPriv->fd);
485 if (!screen->buffers) {
486 drmUnmap(screen->status.map, screen->status.size);
487 drmUnmap(screen->mmio.map, screen->mmio.size);
488 FREE(screen);
489 __driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__);
490 return NULL;
491 }
492
493 if (dri_priv->gartTexHandle && dri_priv->gartTexMapSize) {
494
495 screen->gartTextures.handle = dri_priv->gartTexHandle;
496 screen->gartTextures.size = dri_priv->gartTexMapSize;
497 if (drmMap(sPriv->fd,
498 screen->gartTextures.handle,
499 screen->gartTextures.size,
500 (drmAddressPtr) & screen->gartTextures.map)) {
501 drmUnmapBufs(screen->buffers);
502 drmUnmap(screen->status.map, screen->status.size);
503 drmUnmap(screen->mmio.map, screen->mmio.size);
504 FREE(screen);
505 __driUtilMessage
506 ("%s: drmMAP failed for GART texture area\n",
507 __FUNCTION__);
508 return NULL;
509 }
510
511 screen->gart_texture_offset =
512 dri_priv->gartTexOffset +
513 (screen->IsPCI ? INREG(RADEON_AIC_LO_ADDR)
514 : ((INREG(RADEON_MC_AGP_LOCATION) & 0x0ffffU) << 16));
515 }
516
517 screen->cpp = dri_priv->bpp / 8;
518 screen->AGPMode = dri_priv->AGPMode;
519
520 screen->fbLocation = (INREG(RADEON_MC_FB_LOCATION) & 0xffff) << 16;
521
522 if (sPriv->drmMinor >= 10) {
523 drm_radeon_setparam_t sp;
524
525 sp.param = RADEON_SETPARAM_FB_LOCATION;
526 sp.value = screen->fbLocation;
527
528 drmCommandWrite(sPriv->fd, DRM_RADEON_SETPARAM,
529 &sp, sizeof(sp));
530 }
531
532 screen->frontOffset = dri_priv->frontOffset;
533 screen->frontPitch = dri_priv->frontPitch;
534 screen->backOffset = dri_priv->backOffset;
535 screen->backPitch = dri_priv->backPitch;
536 screen->depthOffset = dri_priv->depthOffset;
537 screen->depthPitch = dri_priv->depthPitch;
538
539 screen->texOffset[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureOffset
540 + screen->fbLocation;
541 screen->texSize[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureSize;
542 screen->logTexGranularity[RADEON_LOCAL_TEX_HEAP] =
543 dri_priv->log2TexGran;
544
545 if (!screen->gartTextures.map) {
546 screen->numTexHeaps = RADEON_NR_TEX_HEAPS - 1;
547 screen->texOffset[RADEON_GART_TEX_HEAP] = 0;
548 screen->texSize[RADEON_GART_TEX_HEAP] = 0;
549 screen->logTexGranularity[RADEON_GART_TEX_HEAP] = 0;
550 } else {
551 screen->numTexHeaps = RADEON_NR_TEX_HEAPS;
552 screen->texOffset[RADEON_GART_TEX_HEAP] =
553 screen->gart_texture_offset;
554 screen->texSize[RADEON_GART_TEX_HEAP] =
555 dri_priv->gartTexMapSize;
556 screen->logTexGranularity[RADEON_GART_TEX_HEAP] =
557 dri_priv->log2GARTTexGran;
558 }
559
560 screen->driScreen = sPriv;
561 screen->sarea_priv_offset = dri_priv->sarea_priv_offset;
562
563 if (driCompareGLXAPIVersion(20030813) >= 0) {
564 PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension =
565 (PFNGLXSCRENABLEEXTENSIONPROC)
566 glXGetProcAddress((const GLubyte *)
567 "__glXScrEnableExtension");
568 void *const psc = sPriv->psc->screenConfigs;
569
570 if (glx_enable_extension != NULL) {
571 if (screen->irq != 0) {
572 (*glx_enable_extension) (psc,
573 "GLX_SGI_swap_control");
574 (*glx_enable_extension) (psc,
575 "GLX_SGI_video_sync");
576 (*glx_enable_extension) (psc,
577 "GLX_MESA_swap_control");
578 }
579
580 (*glx_enable_extension) (psc,
581 "GLX_MESA_swap_frame_usage");
582
583 if (driCompareGLXAPIVersion(20030818) >= 0) {
584 sPriv->psc->allocateMemory =
585 (void *)r200AllocateMemoryMESA;
586 sPriv->psc->freeMemory =
587 (void *)r200FreeMemoryMESA;
588 sPriv->psc->memoryOffset =
589 (void *)r200GetMemoryOffsetMESA;
590
591 (*glx_enable_extension) (psc,
592 "GLX_MESA_allocate_memory");
593 }
594
595 if (driCompareGLXAPIVersion(20030915) >= 0) {
596 (*glx_enable_extension) (psc,
597 "GLX_SGIX_fbconfig");
598 (*glx_enable_extension) (psc,
599 "GLX_OML_swap_method");
600 }
601 }
602 }
603 return screen;
604 }
605
606 /* Destroy the device specific screen private data struct.
607 */
608 static void radeonDestroyScreen(__DRIscreenPrivate * sPriv)
609 {
610 radeonScreenPtr screen = (radeonScreenPtr) sPriv->private;
611
612 if (!screen)
613 return;
614
615 if (screen->gartTextures.map) {
616 drmUnmap(screen->gartTextures.map, screen->gartTextures.size);
617 }
618 drmUnmapBufs(screen->buffers);
619 drmUnmap(screen->status.map, screen->status.size);
620 drmUnmap(screen->mmio.map, screen->mmio.size);
621
622 /* free all option information */
623 driDestroyOptionInfo(&screen->optionCache);
624
625 FREE(screen);
626 sPriv->private = NULL;
627 }
628
629 /* Initialize the driver specific screen private data.
630 */
631 static GLboolean radeonInitDriver(__DRIscreenPrivate * sPriv)
632 {
633 __radeonScreen = radeonCreateScreen(sPriv);
634
635 sPriv->private = (void *)__radeonScreen;
636
637 return sPriv->private ? GL_TRUE : GL_FALSE;
638 }
639
640 /**
641 * Create and initialize the Mesa and driver specific pixmap buffer
642 * data.
643 *
644 * \todo This function (and its interface) will need to be updated to support
645 * pbuffers.
646 */
647 static GLboolean
648 radeonCreateBuffer(__DRIscreenPrivate * driScrnPriv,
649 __DRIdrawablePrivate * driDrawPriv,
650 const __GLcontextModes * mesaVis, GLboolean isPixmap)
651 {
652 if (isPixmap) {
653 return GL_FALSE; /* not implemented */
654 } else {
655 const GLboolean swDepth = GL_FALSE;
656 const GLboolean swAlpha = GL_FALSE;
657 const GLboolean swAccum = mesaVis->accumRedBits > 0;
658 const GLboolean swStencil = mesaVis->stencilBits > 0 &&
659 mesaVis->depthBits != 24;
660 driDrawPriv->driverPrivate = (void *)
661 _mesa_create_framebuffer(mesaVis,
662 swDepth,
663 swStencil, swAccum, swAlpha);
664 return (driDrawPriv->driverPrivate != NULL);
665 }
666 }
667
668 static void radeonDestroyBuffer(__DRIdrawablePrivate * driDrawPriv)
669 {
670 _mesa_destroy_framebuffer((GLframebuffer *) (driDrawPriv->
671 driverPrivate));
672 }
673
674
675 /**
676 * Choose the appropriate CreateContext function based on the chipset.
677 */
678 static GLboolean radeonCreateContext(const __GLcontextModes * glVisual,
679 __DRIcontextPrivate * driContextPriv,
680 void *sharedContextPriv)
681 {
682 __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
683 radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
684 int chip = GET_CHIP(screen);
685
686 if (chip >= RADEON_CHIP_R300)
687 return r300CreateContext(glVisual, driContextPriv, sharedContextPriv);
688 else
689 return r200CreateContext(glVisual, driContextPriv, sharedContextPriv);
690 }
691
692
693 /**
694 * Choose the appropriate DestroyContext function based on the chipset.
695 */
696 static void radeonDestroyContext(__DRIcontextPrivate * driContextPriv)
697 {
698 radeonContextPtr radeon = (radeonContextPtr) driContextPriv->driverPrivate;
699 int chip = GET_CHIP(radeon->radeonScreen);
700
701 if (chip >= RADEON_CHIP_R300)
702 return r300DestroyContext(driContextPriv);
703 else
704 return r200DestroyContext(driContextPriv);
705 }
706
707
708 static const struct __DriverAPIRec radeonAPI = {
709 .InitDriver = radeonInitDriver,
710 .DestroyScreen = radeonDestroyScreen,
711 .CreateContext = radeonCreateContext,
712 .DestroyContext = radeonDestroyContext,
713 .CreateBuffer = radeonCreateBuffer,
714 .DestroyBuffer = radeonDestroyBuffer,
715 .SwapBuffers = radeonSwapBuffers,
716 .MakeCurrent = radeonMakeCurrent,
717 .UnbindContext = radeonUnbindContext,
718 .GetSwapInfo = getSwapInfo,
719 .GetMSC = driGetMSC32,
720 .WaitForMSC = driWaitForMSC32,
721 .WaitForSBC = NULL,
722 .SwapBuffersMSC = NULL
723 };
724
725 /*
726 * This is the bootstrap function for the driver.
727 * The __driCreateScreen name is the symbol that libGL.so fetches.
728 * Return: pointer to a __DRIscreenPrivate.
729 *
730 */
731 #if !defined(DRI_NEW_INTERFACE_ONLY)
732 void *__driCreateScreen(Display * dpy, int scrn, __DRIscreen * psc,
733 int numConfigs, __GLXvisualConfig * config)
734 {
735 __DRIscreenPrivate *psp;
736 psp =
737 __driUtilCreateScreen(dpy, scrn, psc, numConfigs, config, &radeonAPI);
738 return (void *)psp;
739 }
740 #endif /* !defined(DRI_NEW_INTERFACE_ONLY) */
741
742 /**
743 * This is the bootstrap function for the driver. libGL supplies all of the
744 * requisite information about the system, and the driver initializes itself.
745 * This routine also fills in the linked list pointed to by \c driver_modes
746 * with the \c __GLcontextModes that the driver can support for windows or
747 * pbuffers.
748 *
749 * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on
750 * failure.
751 */
752 #ifdef USE_NEW_INTERFACE
753 void *__driCreateNewScreen(__DRInativeDisplay * dpy, int scrn,
754 __DRIscreen * psc, const __GLcontextModes * modes,
755 const __DRIversion * ddx_version,
756 const __DRIversion * dri_version,
757 const __DRIversion * drm_version,
758 const __DRIframebuffer * frame_buffer,
759 drmAddress pSAREA, int fd, int internal_api_version,
760 __GLcontextModes ** driver_modes)
761 {
762 __DRIscreenPrivate *psp;
763 static const __DRIversion ddx_expected = { 4, 0, 0 };
764 static const __DRIversion dri_expected = { 4, 0, 0 };
765 static const __DRIversion drm_expected = { 1, 11, 1 };
766
767 if (!driCheckDriDdxDrmVersions2("R300",
768 dri_version, &dri_expected,
769 ddx_version, &ddx_expected,
770 drm_version, &drm_expected)) {
771 return NULL;
772 }
773
774 psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL,
775 ddx_version, dri_version, drm_version,
776 frame_buffer, pSAREA, fd,
777 internal_api_version, &radeonAPI);
778 if (psp != NULL) {
779 create_context_modes = (PFNGLXCREATECONTEXTMODES)
780 glXGetProcAddress((const GLubyte *)
781 "__glXCreateContextModes");
782 if (create_context_modes != NULL) {
783 RADEONDRIPtr dri_priv = (RADEONDRIPtr) psp->pDevPriv;
784 *driver_modes = radeonFillInModes(dri_priv->bpp,
785 (dri_priv->bpp ==
786 16) ? 16 : 24,
787 (dri_priv->bpp ==
788 16) ? 0 : 8,
789 (dri_priv->backOffset !=
790 dri_priv->
791 depthOffset));
792 }
793 }
794
795 return (void *)psp;
796 }
797 #endif /* USE_NEW_INTERFACE */
798
799 /**
800 * Get information about previous buffer swaps.
801 */
802 static int getSwapInfo(__DRIdrawablePrivate * dPriv, __DRIswapInfo * sInfo)
803 {
804 radeonContextPtr radeon;
805
806 if ((dPriv == NULL) || (dPriv->driContextPriv == NULL)
807 || (dPriv->driContextPriv->driverPrivate == NULL)
808 || (sInfo == NULL)) {
809 return -1;
810 }
811
812 radeon = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
813 sInfo->swap_count = radeon->swap_count;
814 sInfo->swap_ust = radeon->swap_ust;
815 sInfo->swap_missed_count = radeon->swap_missed_count;
816
817 sInfo->swap_missed_usage = (sInfo->swap_missed_count != 0)
818 ? driCalculateSwapUsage(dPriv, 0, radeon->swap_missed_ust)
819 : 0.0;
820
821 return 0;
822 }