2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 **************************************************************************/
31 * \file radeon_screen.c
32 * Screen initialization functions for the R200 driver.
34 * \author Keith Whitwell <keith@tungstengraphics.com>
43 #define STANDALONE_MMIO
44 #include "radeon_screen.h"
45 #include "r200_context.h"
46 #include "r300_context.h"
47 #include "radeon_ioctl.h"
48 #include "r200_ioctl.h"
49 #include "radeon_macros.h"
50 #include "radeon_reg.h"
54 #include "GL/internal/dri_interface.h"
60 const char __driR200ConfigOptions
[] =
62 DRI_CONF_SECTION_PERFORMANCE
63 DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN
)
64 DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS
)
65 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0
)
66 DRI_CONF_MAX_TEXTURE_UNITS(4, 2, 6)
68 DRI_CONF_SECTION_QUALITY
69 DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB
)
70 DRI_CONF_DEF_MAX_ANISOTROPY(1.0, "1.0,2.0,4.0,8.0,16.0")
71 DRI_CONF_NO_NEG_LOD_BIAS(false)
72 DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER
)
73 DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC
)
74 DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF
)
76 DRI_CONF_SECTION_DEBUG
77 DRI_CONF_NO_RAST(false)
79 DRI_CONF_SECTION_SOFTWARE
80 DRI_CONF_ARB_VERTEX_PROGRAM(true)
81 DRI_CONF_NV_VERTEX_PROGRAM(false)
84 static const GLuint __driR200NConfigOptions
= 13;
86 /* TODO: integrate these into xmlpool.h! */
87 #define DRI_CONF_MAX_TEXTURE_IMAGE_UNITS(def,min,max) \
88 DRI_CONF_OPT_BEGIN_V(texture_image_units,int,def, # min ":" # max ) \
89 DRI_CONF_DESC(en,"Number of texture image units") \
90 DRI_CONF_DESC(de,"Anzahl der Textureinheiten") \
93 #define DRI_CONF_MAX_TEXTURE_COORD_UNITS(def,min,max) \
94 DRI_CONF_OPT_BEGIN_V(texture_coord_units,int,def, # min ":" # max ) \
95 DRI_CONF_DESC(en,"Number of texture coordinate units") \
96 DRI_CONF_DESC(de,"Anzahl der Texturkoordinateneinheiten") \
99 #define DRI_CONF_COMMAND_BUFFER_SIZE(def,min,max) \
100 DRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \
101 DRI_CONF_DESC(en,"Size of command buffer (in KB)") \
102 DRI_CONF_DESC(de,"Grösse des Befehlspuffers (in KB)") \
106 const char __driR300ConfigOptions
[] =
108 DRI_CONF_SECTION_PERFORMANCE
109 DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN
)
110 DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS
)
111 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0
)
112 DRI_CONF_MAX_TEXTURE_IMAGE_UNITS(16, 2, 16)
113 DRI_CONF_MAX_TEXTURE_COORD_UNITS(8, 2, 8)
114 DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
116 DRI_CONF_SECTION_QUALITY
117 DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB
)
118 DRI_CONF_DEF_MAX_ANISOTROPY(1.0, "1.0,2.0,4.0,8.0,16.0")
119 DRI_CONF_NO_NEG_LOD_BIAS(false)
120 DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER
)
121 DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC
)
122 DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF
)
124 DRI_CONF_SECTION_DEBUG
125 DRI_CONF_NO_RAST(false)
128 static const GLuint __driR300NConfigOptions
= 13;
132 int RADEON_DEBUG
= 0;
135 static const struct dri_debug_control debug_control
[] = {
136 {"fall", DEBUG_FALLBACKS
},
137 {"tex", DEBUG_TEXTURE
},
138 {"ioctl", DEBUG_IOCTL
},
139 {"prim", DEBUG_PRIMS
},
140 {"vert", DEBUG_VERTS
},
141 {"state", DEBUG_STATE
},
142 {"code", DEBUG_CODEGEN
},
143 {"vfmt", DEBUG_VFMT
},
144 {"vtxf", DEBUG_VFMT
},
145 {"verb", DEBUG_VERBOSE
},
148 {"san", DEBUG_SANITY
},
149 {"sync", DEBUG_SYNC
},
150 {"pix", DEBUG_PIXEL
},
151 {"mem", DEBUG_MEMORY
},
152 {"allmsg", ~DEBUG_SYNC
}, /* avoid the term "sync" because the parser uses strstr */
157 /* Including xf86PciInfo.h introduces a bunch of errors...
159 #define PCI_CHIP_R200_QD 0x5144 /* why do they have r200 names? */
160 #define PCI_CHIP_R200_QE 0x5145 /* Those are all standard radeons */
161 #define PCI_CHIP_R200_QF 0x5146
162 #define PCI_CHIP_R200_QG 0x5147
163 #define PCI_CHIP_R200_QY 0x5159
164 #define PCI_CHIP_R200_QZ 0x515A
165 #define PCI_CHIP_R200_LW 0x4C57
166 #define PCI_CHIP_R200_LY 0x4C59
167 #define PCI_CHIP_R200_LZ 0x4C5A
168 #define PCI_CHIP_RV200_QW 0x5157 /* Radeon 7500 - not an R200 at all */
169 #define PCI_CHIP_RV200_QX 0x5158
170 #define PCI_CHIP_RS100_4136 0x4136 /* IGP RS100, RS200, RS250 are not R200 */
171 #define PCI_CHIP_RS200_4137 0x4137
172 #define PCI_CHIP_RS250_4237 0x4237
173 #define PCI_CHIP_RS100_4336 0x4336
174 #define PCI_CHIP_RS200_4337 0x4337
175 #define PCI_CHIP_RS250_4437 0x4437
176 #define PCI_CHIP_RS300_5834 0x5834 /* All RS300's are R200 */
177 #define PCI_CHIP_RS300_5835 0x5835
178 #define PCI_CHIP_RS300_5836 0x5836
179 #define PCI_CHIP_RS300_5837 0x5837
180 #define PCI_CHIP_R200_BB 0x4242 /* r200 (non-derived) start */
181 #define PCI_CHIP_R200_BC 0x4243
182 #define PCI_CHIP_R200_QH 0x5148
183 #define PCI_CHIP_R200_QI 0x5149
184 #define PCI_CHIP_R200_QJ 0x514A
185 #define PCI_CHIP_R200_QK 0x514B
186 #define PCI_CHIP_R200_QL 0x514C
187 #define PCI_CHIP_R200_QM 0x514D
188 #define PCI_CHIP_R200_QN 0x514E
189 #define PCI_CHIP_R200_QO 0x514F /* r200 (non-derived) end */
190 /* are the R200 Qh (0x5168) and following needed too? They are not in xf86PciInfo.h
191 but in the pci database. Maybe just secondary ports or something ? */
193 #define PCI_CHIP_R300_AD 0x4144
194 #define PCI_CHIP_R300_AE 0x4145
195 #define PCI_CHIP_R300_AF 0x4146
196 #define PCI_CHIP_R300_AG 0x4147
197 #define PCI_CHIP_RV350_AP 0x4150
198 #define PCI_CHIP_RV350_AR 0x4152
199 #define PCI_CHIP_RV350_AS 0x4153
200 #define PCI_CHIP_RV350_NP 0x4E50
201 #define PCI_CHIP_RV350_NQ 0x4E51 /* Saphire 9600 256MB card */
202 #define PCI_CHIP_RV350_NT 0x4E54
203 #define PCI_CHIP_RV350_NQ_2 0x4E71 /* Saphire 9600 256MB card - Second Head */
204 #define PCI_CHIP_R300_ND 0x4E44
205 #define PCI_CHIP_R300_NE 0x4E45
206 #define PCI_CHIP_R300_NF 0x4E46
207 #define PCI_CHIP_R300_NG 0x4E47
208 #define PCI_CHIP_R350_NH 0x4E48
209 #define PCI_CHIP_R420_JK 0x4a4b
212 #ifdef USE_NEW_INTERFACE
213 static PFNGLXCREATECONTEXTMODES create_context_modes
= NULL
;
214 #endif /* USE_NEW_INTERFACE */
216 static radeonScreenPtr __radeonScreen
;
218 static int getSwapInfo(__DRIdrawablePrivate
* dPriv
, __DRIswapInfo
* sInfo
);
220 #ifdef USE_NEW_INTERFACE
221 static __GLcontextModes
*radeonFillInModes(unsigned pixel_bits
,
223 unsigned stencil_bits
,
224 GLboolean have_back_buffer
)
226 __GLcontextModes
*modes
;
229 unsigned depth_buffer_factor
;
230 unsigned back_buffer_factor
;
234 /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy
235 * enough to add support. Basically, if a context is created with an
236 * fbconfig where the swap method is GLX_SWAP_COPY_OML, pageflipping
237 * will never be used.
239 static const GLenum back_buffer_modes
[] = {
240 GLX_NONE
, GLX_SWAP_UNDEFINED_OML
/*, GLX_SWAP_COPY_OML */
243 uint8_t depth_bits_array
[2];
244 uint8_t stencil_bits_array
[2];
246 depth_bits_array
[0] = depth_bits
;
247 depth_bits_array
[1] = depth_bits
;
249 /* Just like with the accumulation buffer, always provide some modes
250 * with a stencil buffer. It will be a sw fallback, but some apps won't
253 stencil_bits_array
[0] = 0;
254 stencil_bits_array
[1] = (stencil_bits
== 0) ? 8 : stencil_bits
;
256 depth_buffer_factor
= ((depth_bits
!= 0)
257 || (stencil_bits
!= 0)) ? 2 : 1;
258 back_buffer_factor
= (have_back_buffer
) ? 2 : 1;
260 num_modes
= depth_buffer_factor
* back_buffer_factor
* 4;
262 if (pixel_bits
== 16) {
264 fb_type
= GL_UNSIGNED_SHORT_5_6_5
;
267 fb_type
= GL_UNSIGNED_INT_8_8_8_8_REV
;
270 modes
= (*create_context_modes
) (num_modes
, sizeof(__GLcontextModes
));
272 if (!driFillInModes(&m
, fb_format
, fb_type
,
273 depth_bits_array
, stencil_bits_array
,
274 depth_buffer_factor
, back_buffer_modes
,
275 back_buffer_factor
, GLX_TRUE_COLOR
)) {
276 fprintf(stderr
, "[%s:%u] Error creating FBConfig!\n", __func__
,
281 if (!driFillInModes(&m
, fb_format
, fb_type
,
282 depth_bits_array
, stencil_bits_array
,
283 depth_buffer_factor
, back_buffer_modes
,
284 back_buffer_factor
, GLX_DIRECT_COLOR
)) {
285 fprintf(stderr
, "[%s:%u] Error creating FBConfig!\n", __func__
,
290 /* Mark the visual as slow if there are "fake" stencil bits.
292 for (m
= modes
; m
!= NULL
; m
= m
->next
) {
293 if ((m
->stencilBits
!= 0) && (m
->stencilBits
!= stencil_bits
)) {
294 m
->visualRating
= GLX_SLOW_CONFIG
;
300 #endif /* USE_NEW_INTERFACE */
302 /* Create the device specific screen private data struct.
304 static radeonScreenPtr
radeonCreateScreen(__DRIscreenPrivate
* sPriv
)
306 radeonScreenPtr screen
;
307 RADEONDRIPtr dri_priv
= (RADEONDRIPtr
) sPriv
->pDevPriv
;
308 unsigned char *RADEONMMIO
;
310 /* Allocate the private area */
311 screen
= (radeonScreenPtr
) CALLOC(sizeof(*screen
));
314 ("%s: Could not allocate memory for screen structure",
320 RADEON_DEBUG
= driParseDebugString(getenv("RADEON_DEBUG"), debug_control
);
323 /* Get family and potential quirks from the PCI device ID.
325 switch (dri_priv
->deviceID
) {
326 case PCI_CHIP_R200_QD
:
327 case PCI_CHIP_R200_QE
:
328 case PCI_CHIP_R200_QF
:
329 case PCI_CHIP_R200_QG
:
330 case PCI_CHIP_R200_QY
:
331 case PCI_CHIP_R200_QZ
:
332 case PCI_CHIP_RV200_QW
:
333 case PCI_CHIP_RV200_QX
:
334 case PCI_CHIP_R200_LW
:
335 case PCI_CHIP_R200_LY
:
336 case PCI_CHIP_R200_LZ
:
337 case PCI_CHIP_RS100_4136
:
338 case PCI_CHIP_RS200_4137
:
339 case PCI_CHIP_RS250_4237
:
340 case PCI_CHIP_RS100_4336
:
341 case PCI_CHIP_RS200_4337
:
342 case PCI_CHIP_RS250_4437
:
343 __driUtilMessage("radeonCreateScreen(): Device isn't an r200!\n");
347 case PCI_CHIP_RS300_5834
:
348 case PCI_CHIP_RS300_5835
:
349 case PCI_CHIP_RS300_5836
:
350 case PCI_CHIP_RS300_5837
:
351 screen
->chipset
= RADEON_CHIP_UNREAL_R200
;
354 case PCI_CHIP_R200_BB
:
355 case PCI_CHIP_R200_BC
:
356 case PCI_CHIP_R200_QH
:
357 case PCI_CHIP_R200_QI
:
358 case PCI_CHIP_R200_QJ
:
359 case PCI_CHIP_R200_QK
:
360 case PCI_CHIP_R200_QL
:
361 case PCI_CHIP_R200_QM
:
362 case PCI_CHIP_R200_QN
:
363 case PCI_CHIP_R200_QO
:
364 screen
->chipset
= RADEON_CHIP_REAL_R200
| RADEON_CHIPSET_TCL
;
367 /* TODO: Check all those chips for the exact flags required.
369 case PCI_CHIP_R300_AD
:
370 case PCI_CHIP_R300_AE
:
371 case PCI_CHIP_R300_AF
:
372 case PCI_CHIP_R300_AG
:
373 case PCI_CHIP_RV350_AP
:
374 case PCI_CHIP_RV350_AR
:
375 case PCI_CHIP_RV350_AS
:
376 case PCI_CHIP_RV350_NP
:
377 case PCI_CHIP_RV350_NT
:
378 case PCI_CHIP_RV350_NQ
:
379 /* case PCI_CHIP_RV350_NQ: -- Should we have the second head in here too? */
380 screen
->chipset
= RADEON_CHIP_RV350
;
383 case PCI_CHIP_R300_ND
: /* confirmed -- nh */
384 case PCI_CHIP_R300_NE
:
385 case PCI_CHIP_R300_NF
:
386 case PCI_CHIP_R300_NG
:
387 case PCI_CHIP_R350_NH
:
388 screen
->chipset
= RADEON_CHIP_R300
;
391 case PCI_CHIP_R420_JK
:
392 screen
->chipset
= RADEON_CHIP_R420
;
397 "Unknown device ID %04X, please report. Assuming plain R300.\n",
399 screen
->chipset
= RADEON_CHIP_R300
;
402 /* Parse configuration */
403 if (GET_CHIP(screen
) >= RADEON_CHIP_R300
) {
404 driParseOptionInfo(&screen
->optionCache
,
405 __driR300ConfigOptions
, __driR300NConfigOptions
);
407 driParseOptionInfo(&screen
->optionCache
,
408 __driR200ConfigOptions
, __driR200NConfigOptions
);
411 /* This is first since which regions we map depends on whether or
412 * not we are using a PCI card.
414 screen
->IsPCI
= dri_priv
->IsPCI
;
418 drm_radeon_getparam_t gp
;
420 gp
.param
= RADEON_PARAM_GART_BUFFER_OFFSET
;
421 gp
.value
= &screen
->gart_buffer_offset
;
423 ret
= drmCommandWriteRead(sPriv
->fd
, DRM_RADEON_GETPARAM
,
428 "drmRadeonGetParam (RADEON_PARAM_GART_BUFFER_OFFSET): %d\n",
433 if (sPriv
->drmMinor
>= 6) {
434 gp
.param
= RADEON_PARAM_GART_BASE
;
435 gp
.value
= &screen
->gart_base
;
438 drmCommandWriteRead(sPriv
->fd
, DRM_RADEON_GETPARAM
,
443 "drmR200GetParam (RADEON_PARAM_GART_BASE): %d\n",
448 gp
.param
= RADEON_PARAM_IRQ_NR
;
449 gp
.value
= &screen
->irq
;
452 drmCommandWriteRead(sPriv
->fd
, DRM_RADEON_GETPARAM
,
457 "drmRadeonGetParam (RADEON_PARAM_IRQ_NR): %d\n",
462 /* Check if kernel module is new enough to support cube maps */
463 screen
->drmSupportsCubeMaps
= (sPriv
->drmMinor
>= 7);
464 /* Check if kernel module is new enough to support blend color and
465 separate blend functions/equations */
466 screen
->drmSupportsBlendColor
= (sPriv
->drmMinor
>= 11);
471 screen
->mmio
.handle
= dri_priv
->registerHandle
;
472 screen
->mmio
.size
= dri_priv
->registerSize
;
473 if (drmMap(sPriv
->fd
,
474 screen
->mmio
.handle
, screen
->mmio
.size
, &screen
->mmio
.map
)) {
476 __driUtilMessage("%s: drmMap failed\n", __FUNCTION__
);
480 RADEONMMIO
= screen
->mmio
.map
;
482 screen
->status
.handle
= dri_priv
->statusHandle
;
483 screen
->status
.size
= dri_priv
->statusSize
;
484 if (drmMap(sPriv
->fd
,
485 screen
->status
.handle
,
486 screen
->status
.size
, &screen
->status
.map
)) {
487 drmUnmap(screen
->mmio
.map
, screen
->mmio
.size
);
489 __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__
);
492 screen
->scratch
= (__volatile__
uint32_t *)
493 ((GLubyte
*) screen
->status
.map
+ RADEON_SCRATCH_REG_OFFSET
);
495 screen
->buffers
= drmMapBufs(sPriv
->fd
);
496 if (!screen
->buffers
) {
497 drmUnmap(screen
->status
.map
, screen
->status
.size
);
498 drmUnmap(screen
->mmio
.map
, screen
->mmio
.size
);
500 __driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__
);
504 if (dri_priv
->gartTexHandle
&& dri_priv
->gartTexMapSize
) {
506 screen
->gartTextures
.handle
= dri_priv
->gartTexHandle
;
507 screen
->gartTextures
.size
= dri_priv
->gartTexMapSize
;
508 if (drmMap(sPriv
->fd
,
509 screen
->gartTextures
.handle
,
510 screen
->gartTextures
.size
,
511 (drmAddressPtr
) & screen
->gartTextures
.map
)) {
512 drmUnmapBufs(screen
->buffers
);
513 drmUnmap(screen
->status
.map
, screen
->status
.size
);
514 drmUnmap(screen
->mmio
.map
, screen
->mmio
.size
);
517 ("%s: drmMAP failed for GART texture area\n",
522 screen
->gart_texture_offset
=
523 dri_priv
->gartTexOffset
+
524 (screen
->IsPCI
? INREG(RADEON_AIC_LO_ADDR
)
525 : ((INREG(RADEON_MC_AGP_LOCATION
) & 0x0ffffU
) << 16));
528 screen
->cpp
= dri_priv
->bpp
/ 8;
529 screen
->AGPMode
= dri_priv
->AGPMode
;
531 screen
->fbLocation
= (INREG(RADEON_MC_FB_LOCATION
) & 0xffff) << 16;
533 if (sPriv
->drmMinor
>= 10) {
534 drm_radeon_setparam_t sp
;
536 sp
.param
= RADEON_SETPARAM_FB_LOCATION
;
537 sp
.value
= screen
->fbLocation
;
539 drmCommandWrite(sPriv
->fd
, DRM_RADEON_SETPARAM
,
543 screen
->frontOffset
= dri_priv
->frontOffset
;
544 screen
->frontPitch
= dri_priv
->frontPitch
;
545 screen
->backOffset
= dri_priv
->backOffset
;
546 screen
->backPitch
= dri_priv
->backPitch
;
547 screen
->depthOffset
= dri_priv
->depthOffset
;
548 screen
->depthPitch
= dri_priv
->depthPitch
;
550 screen
->texOffset
[RADEON_LOCAL_TEX_HEAP
] = dri_priv
->textureOffset
551 + screen
->fbLocation
;
552 screen
->texSize
[RADEON_LOCAL_TEX_HEAP
] = dri_priv
->textureSize
;
553 screen
->logTexGranularity
[RADEON_LOCAL_TEX_HEAP
] =
554 dri_priv
->log2TexGran
;
556 if (!screen
->gartTextures
.map
) {
557 screen
->numTexHeaps
= RADEON_NR_TEX_HEAPS
- 1;
558 screen
->texOffset
[RADEON_GART_TEX_HEAP
] = 0;
559 screen
->texSize
[RADEON_GART_TEX_HEAP
] = 0;
560 screen
->logTexGranularity
[RADEON_GART_TEX_HEAP
] = 0;
562 screen
->numTexHeaps
= RADEON_NR_TEX_HEAPS
;
563 screen
->texOffset
[RADEON_GART_TEX_HEAP
] =
564 screen
->gart_texture_offset
;
565 screen
->texSize
[RADEON_GART_TEX_HEAP
] =
566 dri_priv
->gartTexMapSize
;
567 screen
->logTexGranularity
[RADEON_GART_TEX_HEAP
] =
568 dri_priv
->log2GARTTexGran
;
571 screen
->driScreen
= sPriv
;
572 screen
->sarea_priv_offset
= dri_priv
->sarea_priv_offset
;
574 if (driCompareGLXAPIVersion(20030813) >= 0) {
575 PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension
=
576 (PFNGLXSCRENABLEEXTENSIONPROC
)
577 glXGetProcAddress((const GLubyte
*)
578 "__glXScrEnableExtension");
579 void *const psc
= sPriv
->psc
->screenConfigs
;
581 if (glx_enable_extension
!= NULL
) {
582 if (screen
->irq
!= 0) {
583 (*glx_enable_extension
) (psc
,
584 "GLX_SGI_swap_control");
585 (*glx_enable_extension
) (psc
,
586 "GLX_SGI_video_sync");
587 (*glx_enable_extension
) (psc
,
588 "GLX_MESA_swap_control");
591 (*glx_enable_extension
) (psc
,
592 "GLX_MESA_swap_frame_usage");
594 if (driCompareGLXAPIVersion(20030818) >= 0) {
595 sPriv
->psc
->allocateMemory
=
596 (void *)r200AllocateMemoryMESA
;
597 sPriv
->psc
->freeMemory
=
598 (void *)r200FreeMemoryMESA
;
599 sPriv
->psc
->memoryOffset
=
600 (void *)r200GetMemoryOffsetMESA
;
602 (*glx_enable_extension
) (psc
,
603 "GLX_MESA_allocate_memory");
606 if (driCompareGLXAPIVersion(20030915) >= 0) {
607 (*glx_enable_extension
) (psc
,
608 "GLX_SGIX_fbconfig");
609 (*glx_enable_extension
) (psc
,
610 "GLX_OML_swap_method");
617 /* Destroy the device specific screen private data struct.
619 static void radeonDestroyScreen(__DRIscreenPrivate
* sPriv
)
621 radeonScreenPtr screen
= (radeonScreenPtr
) sPriv
->private;
626 if (screen
->gartTextures
.map
) {
627 drmUnmap(screen
->gartTextures
.map
, screen
->gartTextures
.size
);
629 drmUnmapBufs(screen
->buffers
);
630 drmUnmap(screen
->status
.map
, screen
->status
.size
);
631 drmUnmap(screen
->mmio
.map
, screen
->mmio
.size
);
633 /* free all option information */
634 driDestroyOptionInfo(&screen
->optionCache
);
637 sPriv
->private = NULL
;
640 /* Initialize the driver specific screen private data.
642 static GLboolean
radeonInitDriver(__DRIscreenPrivate
* sPriv
)
644 __radeonScreen
= radeonCreateScreen(sPriv
);
646 sPriv
->private = (void *)__radeonScreen
;
648 return sPriv
->private ? GL_TRUE
: GL_FALSE
;
652 * Create and initialize the Mesa and driver specific pixmap buffer
655 * \todo This function (and its interface) will need to be updated to support
659 radeonCreateBuffer(__DRIscreenPrivate
* driScrnPriv
,
660 __DRIdrawablePrivate
* driDrawPriv
,
661 const __GLcontextModes
* mesaVis
, GLboolean isPixmap
)
664 return GL_FALSE
; /* not implemented */
666 const GLboolean swDepth
= GL_FALSE
;
667 const GLboolean swAlpha
= GL_FALSE
;
668 const GLboolean swAccum
= mesaVis
->accumRedBits
> 0;
669 const GLboolean swStencil
= mesaVis
->stencilBits
> 0 &&
670 mesaVis
->depthBits
!= 24;
671 driDrawPriv
->driverPrivate
= (void *)
672 _mesa_create_framebuffer(mesaVis
,
674 swStencil
, swAccum
, swAlpha
);
675 return (driDrawPriv
->driverPrivate
!= NULL
);
679 static void radeonDestroyBuffer(__DRIdrawablePrivate
* driDrawPriv
)
681 _mesa_destroy_framebuffer((GLframebuffer
*) (driDrawPriv
->
687 * Choose the appropriate CreateContext function based on the chipset.
689 static GLboolean
radeonCreateContext(const __GLcontextModes
* glVisual
,
690 __DRIcontextPrivate
* driContextPriv
,
691 void *sharedContextPriv
)
693 __DRIscreenPrivate
*sPriv
= driContextPriv
->driScreenPriv
;
694 radeonScreenPtr screen
= (radeonScreenPtr
) (sPriv
->private);
695 int chip
= GET_CHIP(screen
);
697 if (chip
>= RADEON_CHIP_R300
)
698 return r300CreateContext(glVisual
, driContextPriv
, sharedContextPriv
);
700 return r200CreateContext(glVisual
, driContextPriv
, sharedContextPriv
);
705 * Choose the appropriate DestroyContext function based on the chipset.
707 static void radeonDestroyContext(__DRIcontextPrivate
* driContextPriv
)
709 radeonContextPtr radeon
= (radeonContextPtr
) driContextPriv
->driverPrivate
;
710 int chip
= GET_CHIP(radeon
->radeonScreen
);
712 if (chip
>= RADEON_CHIP_R300
)
713 return r300DestroyContext(driContextPriv
);
715 return r200DestroyContext(driContextPriv
);
719 static const struct __DriverAPIRec radeonAPI
= {
720 .InitDriver
= radeonInitDriver
,
721 .DestroyScreen
= radeonDestroyScreen
,
722 .CreateContext
= radeonCreateContext
,
723 .DestroyContext
= radeonDestroyContext
,
724 .CreateBuffer
= radeonCreateBuffer
,
725 .DestroyBuffer
= radeonDestroyBuffer
,
726 .SwapBuffers
= radeonSwapBuffers
,
727 .MakeCurrent
= radeonMakeCurrent
,
728 .UnbindContext
= radeonUnbindContext
,
729 .GetSwapInfo
= getSwapInfo
,
730 .GetMSC
= driGetMSC32
,
731 .WaitForMSC
= driWaitForMSC32
,
733 .SwapBuffersMSC
= NULL
737 * This is the bootstrap function for the driver.
738 * The __driCreateScreen name is the symbol that libGL.so fetches.
739 * Return: pointer to a __DRIscreenPrivate.
742 #if !defined(DRI_NEW_INTERFACE_ONLY)
743 void *__driCreateScreen(Display
* dpy
, int scrn
, __DRIscreen
* psc
,
744 int numConfigs
, __GLXvisualConfig
* config
)
746 __DRIscreenPrivate
*psp
;
748 __driUtilCreateScreen(dpy
, scrn
, psc
, numConfigs
, config
, &radeonAPI
);
751 #endif /* !defined(DRI_NEW_INTERFACE_ONLY) */
754 * This is the bootstrap function for the driver. libGL supplies all of the
755 * requisite information about the system, and the driver initializes itself.
756 * This routine also fills in the linked list pointed to by \c driver_modes
757 * with the \c __GLcontextModes that the driver can support for windows or
760 * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on
763 #ifdef USE_NEW_INTERFACE
764 void *__driCreateNewScreen(__DRInativeDisplay
* dpy
, int scrn
,
765 __DRIscreen
* psc
, const __GLcontextModes
* modes
,
766 const __DRIversion
* ddx_version
,
767 const __DRIversion
* dri_version
,
768 const __DRIversion
* drm_version
,
769 const __DRIframebuffer
* frame_buffer
,
770 drmAddress pSAREA
, int fd
, int internal_api_version
,
771 __GLcontextModes
** driver_modes
)
773 __DRIscreenPrivate
*psp
;
774 static const __DRIversion ddx_expected
= { 4, 0, 0 };
775 static const __DRIversion dri_expected
= { 4, 0, 0 };
776 static const __DRIversion drm_expected
= { 1, 11, 1 };
778 if (!driCheckDriDdxDrmVersions2("R300",
779 dri_version
, &dri_expected
,
780 ddx_version
, &ddx_expected
,
781 drm_version
, &drm_expected
)) {
785 psp
= __driUtilCreateNewScreen(dpy
, scrn
, psc
, NULL
,
786 ddx_version
, dri_version
, drm_version
,
787 frame_buffer
, pSAREA
, fd
,
788 internal_api_version
, &radeonAPI
);
790 create_context_modes
= (PFNGLXCREATECONTEXTMODES
)
791 glXGetProcAddress((const GLubyte
*)
792 "__glXCreateContextModes");
793 if (create_context_modes
!= NULL
) {
794 RADEONDRIPtr dri_priv
= (RADEONDRIPtr
) psp
->pDevPriv
;
795 *driver_modes
= radeonFillInModes(dri_priv
->bpp
,
800 (dri_priv
->backOffset
!=
808 #endif /* USE_NEW_INTERFACE */
811 * Get information about previous buffer swaps.
813 static int getSwapInfo(__DRIdrawablePrivate
* dPriv
, __DRIswapInfo
* sInfo
)
815 radeonContextPtr radeon
;
817 if ((dPriv
== NULL
) || (dPriv
->driContextPriv
== NULL
)
818 || (dPriv
->driContextPriv
->driverPrivate
== NULL
)
819 || (sInfo
== NULL
)) {
823 radeon
= (radeonContextPtr
) dPriv
->driContextPriv
->driverPrivate
;
824 sInfo
->swap_count
= radeon
->swap_count
;
825 sInfo
->swap_ust
= radeon
->swap_ust
;
826 sInfo
->swap_missed_count
= radeon
->swap_missed_count
;
828 sInfo
->swap_missed_usage
= (sInfo
->swap_missed_count
!= 0)
829 ? driCalculateSwapUsage(dPriv
, 0, radeon
->swap_missed_ust
)