src/mesa/drivers/dri/r300/radeon_span.c

   1 /**************************************************************************
   2
   3 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   4 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   5                      VA Linux Systems Inc., Fremont, California.
   6
   7 The Weather Channel (TM) funded Tungsten Graphics to develop the
   8 initial release of the Radeon 8500 driver under the XFree86 license.
   9 This notice must be preserved.
  10
  11 All Rights Reserved.
  12
  13 Permission is hereby granted, free of charge, to any person obtaining
  14 a copy of this software and associated documentation files (the
  15 "Software"), to deal in the Software without restriction, including
  16 without limitation the rights to use, copy, modify, merge, publish,
  17 distribute, sublicense, and/or sell copies of the Software, and to
  18 permit persons to whom the Software is furnished to do so, subject to
  19 the following conditions:
  20
  21 The above copyright notice and this permission notice (including the
  22 next paragraph) shall be included in all copies or substantial
  23 portions of the Software.
  24
  25 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  28 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  29 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  30 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  31 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  32
  33 **************************************************************************/
  34
  35 /*
  36  * Authors:
  37  *   Kevin E. Martin <martin@valinux.com>
  38  *   Gareth Hughes <gareth@valinux.com>
  39  *   Keith Whitwell <keith@tungstengraphics.com>
  40  *
  41  */
  42
  43 #include "main/glheader.h"
  44 #include "swrast/swrast.h"
  45
  46 #include "r300_state.h"
  47 #include "radeon_ioctl.h"
  48 #include "r300_ioctl.h"
  49 #include "radeon_span.h"
  50
  51 #include "radeon_buffer.h"
  52
  53 #define DBG 0
  54
  55 /*
  56  * Note that all information needed to access pixels in a renderbuffer
  57  * should be obtained through the gl_renderbuffer parameter, not per-context
  58  * information.
  59  */
  60 #define LOCAL_VARS                                              \
  61    struct radeon_renderbuffer *rrb = (void *) rb;               \
  62    const __DRIdrawablePrivate *dPriv = rrb->dPriv;              \
  63    const GLuint bottom = dPriv->h - 1;                          \
  64    GLuint p;                                            \
  65    (void)p;
  66
  67 #define LOCAL_DEPTH_VARS                                \
  68    struct radeon_renderbuffer *rrb = (void *) rb;       \
  69    const __DRIdrawablePrivate *dPriv = rrb->dPriv;      \
  70    const GLuint bottom = dPriv->h - 1;                  \
  71    GLuint xo = dPriv->x;                                \
  72    GLuint yo = dPriv->y;
  73
  74 #define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS
  75
  76 #define Y_FLIP(Y) (bottom - (Y))
  77
  78 #define HW_LOCK()
  79
  80 #define HW_UNLOCK()
  81
  82 /* ================================================================
  83  * Color buffer
  84  */
  85
  86 /* 16 bit, RGB565 color spanline and pixel functions
  87  */
  88 #define SPANTMP_PIXEL_FMT GL_RGB
  89 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_SHORT_5_6_5
  90
  91 #define TAG(x)    radeon##x##_RGB565
  92 #define TAG2(x,y) radeon##x##_RGB565##y
  93 #define GET_PTR(X,Y) radeon_ptr16(rrb, (X), (Y))
  94 #include "spantmp2.h"
  95
  96 /* 32 bit, ARGB8888 color spanline and pixel functions
  97  */
  98 #define SPANTMP_PIXEL_FMT GL_BGRA
  99 #define SPANTMP_PIXEL_TYPE GL_UNSIGNED_INT_8_8_8_8_REV
 100
 101 #define TAG(x)    radeon##x##_ARGB8888
 102 #define TAG2(x,y) radeon##x##_ARGB8888##y
 103 #define GET_PTR(X,Y) radeon_ptr32(rrb, (X), (Y))
 104 #include "spantmp2.h"
 105
 106 /* ================================================================
 107  * Depth buffer
 108  */
 109
 110 /* The Radeon family has depth tiling on all the time, so we have to convert
 111  * the x,y coordinates into the memory bus address (mba) in the same
 112  * manner as the engine.  In each case, the linear block address (ba)
 113  * is calculated, and then wired with x and y to produce the final
 114  * memory address.
 115  * The chip will do address translation on its own if the surface registers
 116  * are set up correctly. It is not quite enough to get it working with hyperz
 117  * too...
 118  */
 119
 120 /* 16-bit depth buffer functions
 121  */
 122 #define VALUE_TYPE GLushort
 123
 124 #define WRITE_DEPTH( _x, _y, d )                                        \
 125    *(GLushort *)radeon_ptr(rrb, _x + xo, _y + yo) = d
 126
 127 #define READ_DEPTH( d, _x, _y )                                         \
 128    d = *(GLushort *)radeon_ptr(rrb, _x + xo, _y + yo)
 129
 130 #define TAG(x) radeon##x##_z16
 131 #include "depthtmp.h"
 132
 133 /* 24 bit depth, 8 bit stencil depthbuffer functions
 134  *
 135  * Careful: It looks like the R300 uses ZZZS byte order while the R200
 136  * uses SZZZ for 24 bit depth, 8 bit stencil mode.
 137  */
 138 #define VALUE_TYPE GLuint
 139
 140 #ifdef COMPILE_R300
 141 #define WRITE_DEPTH( _x, _y, d )                                        \
 142 do {                                                                    \
 143    GLuint *_ptr = (GLuint*)radeon_ptr32( rrb, _x + xo, _y + yo );               \
 144    GLuint tmp = *_ptr;                          \
 145    tmp &= 0x000000ff;                                                   \
 146    tmp |= ((d << 8) & 0xffffff00);                                      \
 147    *_ptr = tmp;                                 \
 148 } while (0)
 149 #else
 150 #define WRITE_DEPTH( _x, _y, d )                                        \
 151 do {                                                                    \
 152    GLuint *_ptr = (GLuint*)radeon_ptr32( rrb, _x + xo, _y + yo );               \
 153    GLuint tmp = *_ptr;                          \
 154    tmp &= 0xff000000;                                                   \
 155    tmp |= ((d) & 0x00ffffff);                                           \
 156    *_ptr = tmp;                                 \
 157 } while (0)
 158 #endif
 159
 160 #ifdef COMPILE_R300
 161 #define READ_DEPTH( d, _x, _y )                                         \
 162   do { \
 163     d = (*(GLuint*)(radeon_ptr32(rrb, _x + xo, _y + yo)) & 0xffffff00) >> 8; \
 164   }while(0)
 165 #else
 166 #define READ_DEPTH( d, _x, _y )                                         \
 167    d = *(GLuint*)(radeon_ptr32(rrb, _x + xo,    _y + yo )) & 0x00ffffff;
 168 #endif
 169 /*
 170     fprintf(stderr, "dval(%d, %d, %d, %d)=0x%08X\n", _x, xo, _y, yo, d);\
 171    d = *(GLuint*)(radeon_ptr(rrb, _x + xo,      _y + yo )) & 0x00ffffff;
 172 */
 173 #define TAG(x) radeon##x##_z24_s8
 174 #include "depthtmp.h"
 175
 176 /* ================================================================
 177  * Stencil buffer
 178  */
 179
 180 /* 24 bit depth, 8 bit stencil depthbuffer functions
 181  */
 182 #ifdef COMPILE_R300
 183 #define WRITE_STENCIL( _x, _y, d )                                      \
 184 do {                                                                    \
 185    GLuint *_ptr = (GLuint*)radeon_ptr32(rrb, _x + xo, _y + yo);         \
 186    GLuint tmp = *_ptr;                          \
 187    tmp &= 0xffffff00;                                                   \
 188    tmp |= (d) & 0xff;                                                   \
 189    *_ptr = tmp;                                 \
 190 } while (0)
 191 #else
 192 #define WRITE_STENCIL( _x, _y, d )                                      \
 193 do {                                                                    \
 194    GLuint *_ptr = (GLuint*)radeon_ptr32(rrb, _x + xo, _y + yo);         \
 195    GLuint tmp = *_ptr;                          \
 196    tmp &= 0x00ffffff;                                                   \
 197    tmp |= (((d) & 0xff) << 24);                                         \
 198    *_ptr = tmp;                                 \
 199 } while (0)
 200 #endif
 201
 202 #ifdef COMPILE_R300
 203 #define READ_STENCIL( d, _x, _y )                                       \
 204 do {                                                                    \
 205    GLuint *_ptr = (GLuint*)radeon_ptr32( rrb, _x + xo, _y + yo );               \
 206    GLuint tmp = *_ptr;                          \
 207    d = tmp & 0x000000ff;                                                \
 208 } while (0)
 209 #else
 210 #define READ_STENCIL( d, _x, _y )                                       \
 211 do {                                                                    \
 212    GLuint *_ptr = (GLuint*)radeon_ptr32( rrb, _x + xo, _y + yo );               \
 213    GLuint tmp = *_ptr;                          \
 214    d = (tmp & 0xff000000) >> 24;                                        \
 215 } while (0)
 216 #endif
 217
 218 #define TAG(x) radeon##x##_z24_s8
 219 #include "stenciltmp.h"
 220
 221 void radeonInitSpanFuncs(GLcontext * ctx)
 222 {
 223         struct swrast_device_driver *swdd =
 224             _swrast_GetDeviceDriverReference(ctx);
 225         swdd->SpanRenderStart = radeonSpanRenderStart;
 226         swdd->SpanRenderFinish = radeonSpanRenderFinish;
 227 }
 228
 229 /**
 230  * Plug in the Get/Put routines for the given driRenderbuffer.
 231  */
 232 void radeonSetSpanFunctions(struct radeon_renderbuffer *rrb)
 233 {
 234         if (rrb->base.InternalFormat == GL_RGB5) {
 235                 radeonInitPointers_RGB565(&rrb->base);
 236         } else if (rrb->base.InternalFormat == GL_RGBA8) {
 237                 radeonInitPointers_ARGB8888(&rrb->base);
 238         } else if (rrb->base.InternalFormat == GL_DEPTH_COMPONENT16) {
 239                 radeonInitDepthPointers_z16(&rrb->base);
 240         } else if (rrb->base.InternalFormat == GL_DEPTH_COMPONENT24) {
 241                 radeonInitDepthPointers_z24_s8(&rrb->base);
 242         } else if (rrb->base.InternalFormat == GL_STENCIL_INDEX8_EXT) {
 243                 radeonInitStencilPointers_z24_s8(&rrb->base);
 244         }
 245 }