547ac3daaf9760a8d03c6e68adf7ca147a54ac63
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 **************************************************************************/
32 * Keith Whitwell <keith@tungstengraphics.com>
37 #include "swrast/swrast.h"
40 #include "r200_context.h"
41 #include "radeon_ioctl.h"
42 #include "r300_ioctl.h"
43 #include "radeon_span.h"
48 radeonContextPtr radeon = RADEON_CONTEXT(ctx); \
49 driRenderbuffer* drb = (driRenderbuffer*)rb; \
50 __DRIscreenPrivate *sPriv = radeon->dri.screen; \
51 __DRIdrawablePrivate *dPriv = radeon->dri.drawable; \
52 GLuint pitch = drb->flippedPitch * drb->cpp; \
53 GLuint height = dPriv->h; \
54 char *buf = (char *)(sPriv->pFB + \
55 drb->flippedOffset + \
56 (dPriv->x * drb->cpp) + \
57 (dPriv->y * pitch)); \
61 #define LOCAL_DEPTH_VARS \
62 radeonContextPtr radeon = RADEON_CONTEXT(ctx); \
63 driRenderbuffer* drb = (driRenderbuffer*)rb; \
64 __DRIscreenPrivate *sPriv = radeon->dri.screen; \
65 __DRIdrawablePrivate *dPriv = radeon->dri.drawable; \
66 GLuint pitch = drb->pitch; \
67 GLuint height = dPriv->h; \
68 GLuint xo = dPriv->x; \
69 GLuint yo = dPriv->y; \
70 char *buf = (char *)(sPriv->pFB + drb->offset); \
71 (void) buf; (void) pitch
73 #define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS
75 #define CLIPPIXEL( _x, _y ) \
76 ((_x >= minx) && (_x < maxx) && (_y >= miny) && (_y < maxy))
78 #define CLIPSPAN( _x, _y, _n, _x1, _n1, _i ) \
79 if ( _y < miny || _y >= maxy ) { \
84 if ( _x1 < minx ) _i += (minx-_x1), _n1 -= (minx-_x1), _x1 = minx; \
85 if ( _x1 + _n1 >= maxx ) n1 -= (_x1 + _n1 - maxx); \
88 #define Y_FLIP( _y ) (height - _y - 1)
92 #define HW_CLIPLOOP() \
94 int _nc = dPriv->numClipRects; \
97 int minx = dPriv->pClipRects[_nc].x1 - dPriv->x; \
98 int miny = dPriv->pClipRects[_nc].y1 - dPriv->y; \
99 int maxx = dPriv->pClipRects[_nc].x2 - dPriv->x; \
100 int maxy = dPriv->pClipRects[_nc].y2 - dPriv->y;
102 #define HW_ENDCLIPLOOP() \
108 /* ================================================================
112 /* 16 bit, RGB565 color spanline and pixel functions
114 #define INIT_MONO_PIXEL(p, color) \
115 p = PACK_COLOR_565( color[0], color[1], color[2] )
117 #define WRITE_RGBA( _x, _y, r, g, b, a ) \
118 *(GLushort *)(buf + _x*2 + _y*pitch) = ((((int)r & 0xf8) << 8) | \
119 (((int)g & 0xfc) << 3) | \
120 (((int)b & 0xf8) >> 3))
122 #define WRITE_PIXEL( _x, _y, p ) \
123 *(GLushort *)(buf + _x*2 + _y*pitch) = p
125 #define READ_RGBA( rgba, _x, _y ) \
127 GLushort p = *(GLushort *)(buf + _x*2 + _y*pitch); \
128 rgba[0] = ((p >> 8) & 0xf8) * 255 / 0xf8; \
129 rgba[1] = ((p >> 3) & 0xfc) * 255 / 0xfc; \
130 rgba[2] = ((p << 3) & 0xf8) * 255 / 0xf8; \
134 #define TAG(x) radeon##x##_RGB565
137 /* 32 bit, ARGB8888 color spanline and pixel functions
139 #undef INIT_MONO_PIXEL
140 #define INIT_MONO_PIXEL(p, color) \
141 p = PACK_COLOR_8888( color[3], color[0], color[1], color[2] )
143 #define WRITE_RGBA( _x, _y, r, g, b, a ) \
145 *(GLuint *)(buf + _x*4 + _y*pitch) = ((b << 0) | \
151 #define WRITE_PIXEL( _x, _y, p ) \
153 *(GLuint *)(buf + _x*4 + _y*pitch) = p; \
156 #define READ_RGBA( rgba, _x, _y ) \
158 volatile GLuint *ptr = (volatile GLuint *)(buf + _x*4 + _y*pitch); \
160 rgba[0] = (p >> 16) & 0xff; \
161 rgba[1] = (p >> 8) & 0xff; \
162 rgba[2] = (p >> 0) & 0xff; \
163 rgba[3] = (p >> 24) & 0xff; \
166 #define TAG(x) radeon##x##_ARGB8888
169 /* ================================================================
173 /* 16-bit depth buffer functions
175 #define WRITE_DEPTH( _x, _y, d ) \
176 *(GLushort *)(buf + (_x + xo + (_y + yo)*pitch)*2 ) = d;
178 #define READ_DEPTH( d, _x, _y ) \
179 d = *(GLushort *)(buf + (_x + xo + (_y + yo)*pitch)*2 );
181 #define TAG(x) radeon##x##_16_LINEAR
182 #include "depthtmp.h"
184 /* 24 bit depth, 8 bit stencil depthbuffer functions
186 * Careful: It looks like the R300 uses ZZZS byte order while the R200
187 * uses SZZZ for 24 bit depth, 8 bit stencil mode.
189 #define WRITE_DEPTH( _x, _y, d ) \
191 GLuint offset = ((_x) + xo + ((_y) + yo)*pitch)*4; \
192 GLuint tmp = *(GLuint *)(buf + offset); \
194 tmp |= ((d << 8) & 0xffffff00); \
195 *(GLuint *)(buf + offset) = tmp; \
198 #define READ_DEPTH( d, _x, _y ) \
200 d = (*(GLuint *)(buf + ((_x) + xo + ((_y) + yo)*pitch)*4) & 0xffffff00) >> 8; \
203 #define TAG(x) radeon##x##_24_8_LINEAR
204 #include "depthtmp.h"
206 /* ================================================================
210 /* 24 bit depth, 8 bit stencil depthbuffer functions
212 #define WRITE_STENCIL( _x, _y, d ) \
214 GLuint offset = (_x + xo + (_y + yo)*pitch)*4; \
215 GLuint tmp = *(GLuint *)(buf + offset); \
218 *(GLuint *)(buf + offset) = tmp; \
221 #define READ_STENCIL( d, _x, _y ) \
223 GLuint offset = (_x + xo + (_y + yo)*pitch)*4; \
224 GLuint tmp = *(GLuint *)(buf + offset); \
225 d = tmp & 0x000000ff; \
228 #define TAG(x) radeon##x##_24_8_LINEAR
229 #include "stenciltmp.h"
232 /* Move locking out to get reasonable span performance (10x better
233 * than doing this in HW_LOCK above). WaitForIdle() is the main
237 static void radeonSpanRenderStart(GLcontext
* ctx
)
239 radeonContextPtr radeon
= RADEON_CONTEXT(ctx
);
241 if (IS_FAMILY_R200(radeon
))
242 R200_FIREVERTICES((r200ContextPtr
)radeon
);
246 LOCK_HARDWARE(radeon
);
247 radeonWaitForIdleLocked(radeon
);
249 /* Read & rewrite the first pixel in the frame buffer. This should
250 * be a noop, right? In fact without this conform fails as reading
251 * from the framebuffer sometimes produces old results -- the
252 * on-card read cache gets mixed up and doesn't notice that the
253 * framebuffer has been updated.
255 * In the worst case this is buggy too as p might get the wrong
256 * value first time, so really need a hidden pixel somewhere for this.
260 driRenderbuffer
*drb
=
261 (driRenderbuffer
*) ctx
->WinSysDrawBuffer
->_ColorDrawBuffers
[0][0];
263 (volatile int *)(radeon
->dri
.screen
->pFB
+ drb
->offset
);
269 static void radeonSpanRenderFinish(GLcontext
* ctx
)
271 radeonContextPtr radeon
= RADEON_CONTEXT(ctx
);
273 UNLOCK_HARDWARE(radeon
);
276 void radeonInitSpanFuncs(GLcontext
* ctx
)
278 struct swrast_device_driver
*swdd
=
279 _swrast_GetDeviceDriverReference(ctx
);
280 swdd
->SpanRenderStart
= radeonSpanRenderStart
;
281 swdd
->SpanRenderFinish
= radeonSpanRenderFinish
;
285 * Plug in the Get/Put routines for the given driRenderbuffer.
287 void radeonSetSpanFunctions(driRenderbuffer
*drb
, const GLvisual
*vis
)
289 if (drb
->Base
.InternalFormat
== GL_RGBA
) {
290 if (vis
->redBits
== 5 && vis
->greenBits
== 6 && vis
->blueBits
== 5) {
291 radeonInitPointers_RGB565(&drb
->Base
);
294 radeonInitPointers_ARGB8888(&drb
->Base
);
297 else if (drb
->Base
.InternalFormat
== GL_DEPTH_COMPONENT16
) {
298 radeonInitDepthPointers_16_LINEAR(&drb
->Base
);
300 else if (drb
->Base
.InternalFormat
== GL_DEPTH_COMPONENT24
) {
301 radeonInitDepthPointers_24_8_LINEAR(&drb
->Base
);
303 else if (drb
->Base
.InternalFormat
== GL_STENCIL_INDEX8_EXT
) {
304 radeonInitStencilPointers_24_8_LINEAR(&drb
->Base
);