547ac3daaf9760a8d03c6e68adf7ca147a54ac63
[mesa.git] / src / mesa / drivers / dri / r300 / radeon_span.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /*
31 * Authors:
32 * Keith Whitwell <keith@tungstengraphics.com>
33 */
34
35 #include "glheader.h"
36 #include "imports.h"
37 #include "swrast/swrast.h"
38 #include "colormac.h"
39
40 #include "r200_context.h"
41 #include "radeon_ioctl.h"
42 #include "r300_ioctl.h"
43 #include "radeon_span.h"
44
45 #define DBG 0
46
47 #define LOCAL_VARS \
48 radeonContextPtr radeon = RADEON_CONTEXT(ctx); \
49 driRenderbuffer* drb = (driRenderbuffer*)rb; \
50 __DRIscreenPrivate *sPriv = radeon->dri.screen; \
51 __DRIdrawablePrivate *dPriv = radeon->dri.drawable; \
52 GLuint pitch = drb->flippedPitch * drb->cpp; \
53 GLuint height = dPriv->h; \
54 char *buf = (char *)(sPriv->pFB + \
55 drb->flippedOffset + \
56 (dPriv->x * drb->cpp) + \
57 (dPriv->y * pitch)); \
58 GLuint p; \
59 (void) p
60
61 #define LOCAL_DEPTH_VARS \
62 radeonContextPtr radeon = RADEON_CONTEXT(ctx); \
63 driRenderbuffer* drb = (driRenderbuffer*)rb; \
64 __DRIscreenPrivate *sPriv = radeon->dri.screen; \
65 __DRIdrawablePrivate *dPriv = radeon->dri.drawable; \
66 GLuint pitch = drb->pitch; \
67 GLuint height = dPriv->h; \
68 GLuint xo = dPriv->x; \
69 GLuint yo = dPriv->y; \
70 char *buf = (char *)(sPriv->pFB + drb->offset); \
71 (void) buf; (void) pitch
72
73 #define LOCAL_STENCIL_VARS LOCAL_DEPTH_VARS
74
75 #define CLIPPIXEL( _x, _y ) \
76 ((_x >= minx) && (_x < maxx) && (_y >= miny) && (_y < maxy))
77
78 #define CLIPSPAN( _x, _y, _n, _x1, _n1, _i ) \
79 if ( _y < miny || _y >= maxy ) { \
80 _n1 = 0, _x1 = x; \
81 } else { \
82 _n1 = _n; \
83 _x1 = _x; \
84 if ( _x1 < minx ) _i += (minx-_x1), _n1 -= (minx-_x1), _x1 = minx; \
85 if ( _x1 + _n1 >= maxx ) n1 -= (_x1 + _n1 - maxx); \
86 }
87
88 #define Y_FLIP( _y ) (height - _y - 1)
89
90 #define HW_LOCK()
91
92 #define HW_CLIPLOOP() \
93 do { \
94 int _nc = dPriv->numClipRects; \
95 \
96 while ( _nc-- ) { \
97 int minx = dPriv->pClipRects[_nc].x1 - dPriv->x; \
98 int miny = dPriv->pClipRects[_nc].y1 - dPriv->y; \
99 int maxx = dPriv->pClipRects[_nc].x2 - dPriv->x; \
100 int maxy = dPriv->pClipRects[_nc].y2 - dPriv->y;
101
102 #define HW_ENDCLIPLOOP() \
103 } \
104 } while (0)
105
106 #define HW_UNLOCK()
107
108 /* ================================================================
109 * Color buffer
110 */
111
112 /* 16 bit, RGB565 color spanline and pixel functions
113 */
114 #define INIT_MONO_PIXEL(p, color) \
115 p = PACK_COLOR_565( color[0], color[1], color[2] )
116
117 #define WRITE_RGBA( _x, _y, r, g, b, a ) \
118 *(GLushort *)(buf + _x*2 + _y*pitch) = ((((int)r & 0xf8) << 8) | \
119 (((int)g & 0xfc) << 3) | \
120 (((int)b & 0xf8) >> 3))
121
122 #define WRITE_PIXEL( _x, _y, p ) \
123 *(GLushort *)(buf + _x*2 + _y*pitch) = p
124
125 #define READ_RGBA( rgba, _x, _y ) \
126 do { \
127 GLushort p = *(GLushort *)(buf + _x*2 + _y*pitch); \
128 rgba[0] = ((p >> 8) & 0xf8) * 255 / 0xf8; \
129 rgba[1] = ((p >> 3) & 0xfc) * 255 / 0xfc; \
130 rgba[2] = ((p << 3) & 0xf8) * 255 / 0xf8; \
131 rgba[3] = 0xff; \
132 } while (0)
133
134 #define TAG(x) radeon##x##_RGB565
135 #include "spantmp.h"
136
137 /* 32 bit, ARGB8888 color spanline and pixel functions
138 */
139 #undef INIT_MONO_PIXEL
140 #define INIT_MONO_PIXEL(p, color) \
141 p = PACK_COLOR_8888( color[3], color[0], color[1], color[2] )
142
143 #define WRITE_RGBA( _x, _y, r, g, b, a ) \
144 do { \
145 *(GLuint *)(buf + _x*4 + _y*pitch) = ((b << 0) | \
146 (g << 8) | \
147 (r << 16) | \
148 (a << 24) ); \
149 } while (0)
150
151 #define WRITE_PIXEL( _x, _y, p ) \
152 do { \
153 *(GLuint *)(buf + _x*4 + _y*pitch) = p; \
154 } while (0)
155
156 #define READ_RGBA( rgba, _x, _y ) \
157 do { \
158 volatile GLuint *ptr = (volatile GLuint *)(buf + _x*4 + _y*pitch); \
159 GLuint p = *ptr; \
160 rgba[0] = (p >> 16) & 0xff; \
161 rgba[1] = (p >> 8) & 0xff; \
162 rgba[2] = (p >> 0) & 0xff; \
163 rgba[3] = (p >> 24) & 0xff; \
164 } while (0)
165
166 #define TAG(x) radeon##x##_ARGB8888
167 #include "spantmp.h"
168
169 /* ================================================================
170 * Depth buffer
171 */
172
173 /* 16-bit depth buffer functions
174 */
175 #define WRITE_DEPTH( _x, _y, d ) \
176 *(GLushort *)(buf + (_x + xo + (_y + yo)*pitch)*2 ) = d;
177
178 #define READ_DEPTH( d, _x, _y ) \
179 d = *(GLushort *)(buf + (_x + xo + (_y + yo)*pitch)*2 );
180
181 #define TAG(x) radeon##x##_16_LINEAR
182 #include "depthtmp.h"
183
184 /* 24 bit depth, 8 bit stencil depthbuffer functions
185 *
186 * Careful: It looks like the R300 uses ZZZS byte order while the R200
187 * uses SZZZ for 24 bit depth, 8 bit stencil mode.
188 */
189 #define WRITE_DEPTH( _x, _y, d ) \
190 do { \
191 GLuint offset = ((_x) + xo + ((_y) + yo)*pitch)*4; \
192 GLuint tmp = *(GLuint *)(buf + offset); \
193 tmp &= 0x000000ff; \
194 tmp |= ((d << 8) & 0xffffff00); \
195 *(GLuint *)(buf + offset) = tmp; \
196 } while (0)
197
198 #define READ_DEPTH( d, _x, _y ) \
199 do { \
200 d = (*(GLuint *)(buf + ((_x) + xo + ((_y) + yo)*pitch)*4) & 0xffffff00) >> 8; \
201 } while(0)
202
203 #define TAG(x) radeon##x##_24_8_LINEAR
204 #include "depthtmp.h"
205
206 /* ================================================================
207 * Stencil buffer
208 */
209
210 /* 24 bit depth, 8 bit stencil depthbuffer functions
211 */
212 #define WRITE_STENCIL( _x, _y, d ) \
213 do { \
214 GLuint offset = (_x + xo + (_y + yo)*pitch)*4; \
215 GLuint tmp = *(GLuint *)(buf + offset); \
216 tmp &= 0xffffff00; \
217 tmp |= (d) & 0xff; \
218 *(GLuint *)(buf + offset) = tmp; \
219 } while (0)
220
221 #define READ_STENCIL( d, _x, _y ) \
222 do { \
223 GLuint offset = (_x + xo + (_y + yo)*pitch)*4; \
224 GLuint tmp = *(GLuint *)(buf + offset); \
225 d = tmp & 0x000000ff; \
226 } while (0)
227
228 #define TAG(x) radeon##x##_24_8_LINEAR
229 #include "stenciltmp.h"
230
231
232 /* Move locking out to get reasonable span performance (10x better
233 * than doing this in HW_LOCK above). WaitForIdle() is the main
234 * culprit.
235 */
236
237 static void radeonSpanRenderStart(GLcontext * ctx)
238 {
239 radeonContextPtr radeon = RADEON_CONTEXT(ctx);
240
241 if (IS_FAMILY_R200(radeon))
242 R200_FIREVERTICES((r200ContextPtr)radeon);
243 else
244 r300Flush(ctx);
245
246 LOCK_HARDWARE(radeon);
247 radeonWaitForIdleLocked(radeon);
248
249 /* Read & rewrite the first pixel in the frame buffer. This should
250 * be a noop, right? In fact without this conform fails as reading
251 * from the framebuffer sometimes produces old results -- the
252 * on-card read cache gets mixed up and doesn't notice that the
253 * framebuffer has been updated.
254 *
255 * In the worst case this is buggy too as p might get the wrong
256 * value first time, so really need a hidden pixel somewhere for this.
257 */
258 {
259 int p;
260 driRenderbuffer *drb =
261 (driRenderbuffer *) ctx->WinSysDrawBuffer->_ColorDrawBuffers[0][0];
262 volatile int *buf =
263 (volatile int *)(radeon->dri.screen->pFB + drb->offset);
264 p = *buf;
265 *buf = p;
266 }
267 }
268
269 static void radeonSpanRenderFinish(GLcontext * ctx)
270 {
271 radeonContextPtr radeon = RADEON_CONTEXT(ctx);
272 _swrast_flush(ctx);
273 UNLOCK_HARDWARE(radeon);
274 }
275
276 void radeonInitSpanFuncs(GLcontext * ctx)
277 {
278 struct swrast_device_driver *swdd =
279 _swrast_GetDeviceDriverReference(ctx);
280 swdd->SpanRenderStart = radeonSpanRenderStart;
281 swdd->SpanRenderFinish = radeonSpanRenderFinish;
282 }
283
284 /**
285 * Plug in the Get/Put routines for the given driRenderbuffer.
286 */
287 void radeonSetSpanFunctions(driRenderbuffer *drb, const GLvisual *vis)
288 {
289 if (drb->Base.InternalFormat == GL_RGBA) {
290 if (vis->redBits == 5 && vis->greenBits == 6 && vis->blueBits == 5) {
291 radeonInitPointers_RGB565(&drb->Base);
292 }
293 else {
294 radeonInitPointers_ARGB8888(&drb->Base);
295 }
296 }
297 else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT16) {
298 radeonInitDepthPointers_16_LINEAR(&drb->Base);
299 }
300 else if (drb->Base.InternalFormat == GL_DEPTH_COMPONENT24) {
301 radeonInitDepthPointers_24_8_LINEAR(&drb->Base);
302 }
303 else if (drb->Base.InternalFormat == GL_STENCIL_INDEX8_EXT) {
304 radeonInitStencilPointers_24_8_LINEAR(&drb->Base);
305 }
306 }
307