2 * Copyright (C) 2008-2009 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 * Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
27 #include "main/glheader.h"
28 #include "main/mtypes.h"
29 #include "main/imports.h"
30 #include "main/enums.h"
31 #include "main/macros.h"
32 #include "main/context.h"
34 #include "main/simple_list.h"
37 #include "tnl/t_pipeline.h"
38 #include "swrast/swrast.h"
39 #include "swrast_setup/swrast_setup.h"
40 #include "main/api_arrayelt.h"
41 #include "main/framebuffer.h"
42 #include "drivers/common/meta.h"
43 #include "program/prog_parameter.h"
44 #include "program/prog_statevars.h"
48 #include "r600_context.h"
50 #include "evergreen_state.h"
51 #include "evergreen_diff.h"
52 #include "evergreen_vertprog.h"
53 #include "evergreen_fragprog.h"
54 #include "evergreen_tex.h"
56 void evergreenUpdateStateParameters(GLcontext
* ctx
, GLuint new_state
); //same
58 void evergreenUpdateShaders(GLcontext
* ctx
)
60 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
62 /* should only happenen once, just after context is created */
63 /* TODO: shouldn't we fallback to sw here? */
64 if (!ctx
->FragmentProgram
._Current
) {
65 fprintf(stderr
, "No ctx->FragmentProgram._Current!!\n");
69 evergreenSelectFragmentShader(ctx
);
71 evergreenSelectVertexShader(ctx
);
72 evergreenUpdateStateParameters(ctx
, _NEW_PROGRAM
| _NEW_PROGRAM_CONSTANTS
);
73 context
->radeon
.NewGLState
= 0;
76 void evergreeUpdateShaders(GLcontext
* ctx
)
78 context_t
*context
= R700_CONTEXT(ctx
);
80 /* should only happenen once, just after context is created */
81 /* TODO: shouldn't we fallback to sw here? */
82 if (!ctx
->FragmentProgram
._Current
) {
83 fprintf(stderr
, "No ctx->FragmentProgram._Current!!\n");
87 evergreenSelectFragmentShader(ctx
);
89 evergreenSelectVertexShader(ctx
);
90 evergreenUpdateStateParameters(ctx
, _NEW_PROGRAM
| _NEW_PROGRAM_CONSTANTS
);
91 context
->radeon
.NewGLState
= 0;
95 * To correctly position primitives:
97 void evergreenUpdateViewportOffset(GLcontext
* ctx
) //------------------
99 context_t
*context
= R700_CONTEXT(ctx
);
100 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
101 __DRIdrawable
*dPriv
= radeon_get_drawable(&context
->radeon
);
102 GLfloat xoffset
= (GLfloat
) dPriv
->x
;
103 GLfloat yoffset
= (GLfloat
) dPriv
->y
+ dPriv
->h
;
104 const GLfloat
*v
= ctx
->Viewport
._WindowMap
.m
;
107 GLfloat tx
= v
[MAT_TX
] + xoffset
;
108 GLfloat ty
= (-v
[MAT_TY
]) + yoffset
;
110 if (evergreen
->viewport
[id
].PA_CL_VPORT_XOFFSET
.f32All
!= tx
||
111 evergreen
->viewport
[id
].PA_CL_VPORT_YOFFSET
.f32All
!= ty
) {
112 /* Note: this should also modify whatever data the context reset
115 EVERGREEN_STATECHANGE(context
, pa
);
116 evergreen
->viewport
[id
].PA_CL_VPORT_XOFFSET
.f32All
= tx
;
117 evergreen
->viewport
[id
].PA_CL_VPORT_YOFFSET
.f32All
= ty
;
120 radeonUpdateScissor(ctx
);
123 void evergreenUpdateStateParameters(GLcontext
* ctx
, GLuint new_state
) //same
125 struct evergreen_fragment_program
*fp
=
126 (struct evergreen_fragment_program
*)ctx
->FragmentProgram
._Current
;
127 struct gl_program_parameter_list
*paramList
;
129 if (!(new_state
& (_NEW_BUFFERS
| _NEW_PROGRAM
| _NEW_PROGRAM_CONSTANTS
)))
132 if (!ctx
->FragmentProgram
._Current
|| !fp
)
135 paramList
= ctx
->FragmentProgram
._Current
->Base
.Parameters
;
140 _mesa_load_state_parameters(ctx
, paramList
);
145 * Called by Mesa after an internal state update.
147 static void evergreenInvalidateState(GLcontext
* ctx
, GLuint new_state
) //same
149 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
151 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
153 _swrast_InvalidateState(ctx
, new_state
);
154 _swsetup_InvalidateState(ctx
, new_state
);
155 _vbo_InvalidateState(ctx
, new_state
);
156 _tnl_InvalidateState(ctx
, new_state
);
157 _ae_invalidate_state(ctx
, new_state
);
159 if (new_state
& _NEW_BUFFERS
) {
160 _mesa_update_framebuffer(ctx
);
161 /* this updates the DrawBuffer's Width/Height if it's a FBO */
162 _mesa_update_draw_buffer_bounds(ctx
);
164 EVERGREEN_STATECHANGE(context
, cb
);
165 EVERGREEN_STATECHANGE(context
, db
);
168 if (new_state
& (_NEW_LIGHT
)) {
169 EVERGREEN_STATECHANGE(context
, pa
);
170 if (ctx
->Light
.ProvokingVertex
== GL_LAST_VERTEX_CONVENTION
)
171 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, PROVOKING_VTX_LAST_bit
);
173 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, PROVOKING_VTX_LAST_bit
);
176 evergreenUpdateStateParameters(ctx
, new_state
);
178 EVERGREEN_STATECHANGE(context
, pa
);
179 EVERGREEN_STATECHANGE(context
, spi
);
181 if(GL_TRUE
== evergreen
->bEnablePerspective
)
183 /* Do scale XY and Z by 1/W0 for perspective correction on pos. For orthogonal case, set both to one. */
184 CLEARbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_XY_FMT_bit
);
185 CLEARbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_Z_FMT_bit
);
187 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_W0_FMT_bit
);
189 SETbit(evergreen
->SPI_PS_IN_CONTROL_0
.u32All
, PERSP_GRADIENT_ENA_bit
);
190 CLEARbit(evergreen
->SPI_PS_IN_CONTROL_0
.u32All
, LINEAR_GRADIENT_ENA_bit
);
192 SETfield(evergreen
->SPI_BARYC_CNTL
.u32All
, 1,
193 EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_shift
,
194 EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_mask
);
198 /* For orthogonal case. */
199 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_XY_FMT_bit
);
200 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_Z_FMT_bit
);
202 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_W0_FMT_bit
);
204 CLEARbit(evergreen
->SPI_PS_IN_CONTROL_0
.u32All
, PERSP_GRADIENT_ENA_bit
);
205 SETbit(evergreen
->SPI_PS_IN_CONTROL_0
.u32All
, LINEAR_GRADIENT_ENA_bit
);
207 SETfield(evergreen
->SPI_BARYC_CNTL
.u32All
, 1,
208 EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_shift
,
209 EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_mask
);
212 context
->radeon
.NewGLState
|= new_state
;
215 static void evergreenSetAlphaState(GLcontext
* ctx
) //same
217 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
218 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
219 uint32_t alpha_func
= REF_ALWAYS
;
220 GLboolean really_enabled
= ctx
->Color
.AlphaEnabled
;
222 EVERGREEN_STATECHANGE(context
, sx
);
224 switch (ctx
->Color
.AlphaFunc
) {
226 alpha_func
= REF_NEVER
;
229 alpha_func
= REF_LESS
;
232 alpha_func
= REF_EQUAL
;
235 alpha_func
= REF_LEQUAL
;
238 alpha_func
= REF_GREATER
;
241 alpha_func
= REF_NOTEQUAL
;
244 alpha_func
= REF_GEQUAL
;
247 /*alpha_func = REF_ALWAYS; */
248 really_enabled
= GL_FALSE
;
252 if (really_enabled
) {
253 SETfield(evergreen
->SX_ALPHA_TEST_CONTROL
.u32All
, alpha_func
,
254 ALPHA_FUNC_shift
, ALPHA_FUNC_mask
);
255 SETbit(evergreen
->SX_ALPHA_TEST_CONTROL
.u32All
, ALPHA_TEST_ENABLE_bit
);
256 evergreen
->SX_ALPHA_REF
.f32All
= ctx
->Color
.AlphaRef
;
258 CLEARbit(evergreen
->SX_ALPHA_TEST_CONTROL
.u32All
, ALPHA_TEST_ENABLE_bit
);
262 static void evergreenAlphaFunc(GLcontext
* ctx
, GLenum func
, GLfloat ref
) //same
266 evergreenSetAlphaState(ctx
);
269 static void evergreenBlendColor(GLcontext
* ctx
, const GLfloat cf
[4]) //same
271 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
272 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
274 EVERGREEN_STATECHANGE(context
, cb
);
276 evergreen
->CB_BLEND_RED
.f32All
= cf
[0];
277 evergreen
->CB_BLEND_GREEN
.f32All
= cf
[1];
278 evergreen
->CB_BLEND_BLUE
.f32All
= cf
[2];
279 evergreen
->CB_BLEND_ALPHA
.f32All
= cf
[3];
282 static int evergreenblend_factor(GLenum factor
, GLboolean is_src
) //same
292 return BLEND_DST_COLOR
;
294 case GL_ONE_MINUS_DST_COLOR
:
295 return BLEND_ONE_MINUS_DST_COLOR
;
298 return BLEND_SRC_COLOR
;
300 case GL_ONE_MINUS_SRC_COLOR
:
301 return BLEND_ONE_MINUS_SRC_COLOR
;
304 return BLEND_SRC_ALPHA
;
306 case GL_ONE_MINUS_SRC_ALPHA
:
307 return BLEND_ONE_MINUS_SRC_ALPHA
;
310 return BLEND_DST_ALPHA
;
312 case GL_ONE_MINUS_DST_ALPHA
:
313 return BLEND_ONE_MINUS_DST_ALPHA
;
315 case GL_SRC_ALPHA_SATURATE
:
316 return (is_src
) ? BLEND_SRC_ALPHA_SATURATE
: BLEND_ZERO
;
318 case GL_CONSTANT_COLOR
:
319 return BLEND_CONSTANT_COLOR
;
321 case GL_ONE_MINUS_CONSTANT_COLOR
:
322 return BLEND_ONE_MINUS_CONSTANT_COLOR
;
324 case GL_CONSTANT_ALPHA
:
325 return BLEND_CONSTANT_ALPHA
;
327 case GL_ONE_MINUS_CONSTANT_ALPHA
:
328 return BLEND_ONE_MINUS_CONSTANT_ALPHA
;
331 fprintf(stderr
, "unknown blend factor %x\n", factor
);
332 return (is_src
) ? BLEND_ONE
: BLEND_ZERO
;
337 static void evergreenSetBlendState(GLcontext
* ctx
) //diff : CB_COLOR_CONTROL, CB_BLEND0_CONTROL bits
339 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
340 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
341 uint32_t blend_reg
= 0, eqn
, eqnA
;
343 EVERGREEN_STATECHANGE(context
, cb
);
345 if (RGBA_LOGICOP_ENABLED(ctx
) || !ctx
->Color
.BlendEnabled
) {
347 BLEND_ONE
, COLOR_SRCBLEND_shift
, COLOR_SRCBLEND_mask
);
349 BLEND_ZERO
, COLOR_DESTBLEND_shift
, COLOR_DESTBLEND_mask
);
351 COMB_DST_PLUS_SRC
, COLOR_COMB_FCN_shift
, COLOR_COMB_FCN_mask
);
353 BLEND_ONE
, ALPHA_SRCBLEND_shift
, ALPHA_SRCBLEND_mask
);
355 BLEND_ZERO
, ALPHA_DESTBLEND_shift
, ALPHA_DESTBLEND_mask
);
357 COMB_DST_PLUS_SRC
, ALPHA_COMB_FCN_shift
, ALPHA_COMB_FCN_mask
);
358 //if (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_R600)
359 // evergreen->CB_BLEND_CONTROL.u32All = blend_reg;
361 evergreen
->CB_BLEND0_CONTROL
.u32All
= blend_reg
;
366 evergreenblend_factor(ctx
->Color
.BlendSrcRGB
, GL_TRUE
),
367 COLOR_SRCBLEND_shift
, COLOR_SRCBLEND_mask
);
369 evergreenblend_factor(ctx
->Color
.BlendDstRGB
, GL_FALSE
),
370 COLOR_DESTBLEND_shift
, COLOR_DESTBLEND_mask
);
372 switch (ctx
->Color
.BlendEquationRGB
) {
374 eqn
= COMB_DST_PLUS_SRC
;
376 case GL_FUNC_SUBTRACT
:
377 eqn
= COMB_SRC_MINUS_DST
;
379 case GL_FUNC_REVERSE_SUBTRACT
:
380 eqn
= COMB_DST_MINUS_SRC
;
383 eqn
= COMB_MIN_DST_SRC
;
386 COLOR_SRCBLEND_shift
, COLOR_SRCBLEND_mask
);
389 COLOR_DESTBLEND_shift
, COLOR_DESTBLEND_mask
);
392 eqn
= COMB_MAX_DST_SRC
;
395 COLOR_SRCBLEND_shift
, COLOR_SRCBLEND_mask
);
398 COLOR_DESTBLEND_shift
, COLOR_DESTBLEND_mask
);
403 "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
404 __FUNCTION__
, __LINE__
, ctx
->Color
.BlendEquationRGB
);
408 eqn
, COLOR_COMB_FCN_shift
, COLOR_COMB_FCN_mask
);
411 evergreenblend_factor(ctx
->Color
.BlendSrcA
, GL_TRUE
),
412 ALPHA_SRCBLEND_shift
, ALPHA_SRCBLEND_mask
);
414 evergreenblend_factor(ctx
->Color
.BlendDstA
, GL_FALSE
),
415 ALPHA_DESTBLEND_shift
, ALPHA_DESTBLEND_mask
);
417 switch (ctx
->Color
.BlendEquationA
) {
419 eqnA
= COMB_DST_PLUS_SRC
;
421 case GL_FUNC_SUBTRACT
:
422 eqnA
= COMB_SRC_MINUS_DST
;
424 case GL_FUNC_REVERSE_SUBTRACT
:
425 eqnA
= COMB_DST_MINUS_SRC
;
428 eqnA
= COMB_MIN_DST_SRC
;
431 ALPHA_SRCBLEND_shift
, ALPHA_SRCBLEND_mask
);
434 ALPHA_DESTBLEND_shift
, ALPHA_DESTBLEND_mask
);
437 eqnA
= COMB_MAX_DST_SRC
;
440 ALPHA_SRCBLEND_shift
, ALPHA_SRCBLEND_mask
);
443 ALPHA_DESTBLEND_shift
, ALPHA_DESTBLEND_mask
);
447 "[%s:%u] Invalid A blend equation (0x%04x).\n",
448 __FUNCTION__
, __LINE__
, ctx
->Color
.BlendEquationA
);
453 eqnA
, ALPHA_COMB_FCN_shift
, ALPHA_COMB_FCN_mask
);
455 SETbit(blend_reg
, SEPARATE_ALPHA_BLEND_bit
);
457 SETbit(blend_reg
, EG_CB_BLENDX_CONTROL_ENABLE_bit
);
459 evergreen
->CB_BLEND0_CONTROL
.u32All
= blend_reg
;
462 static void evergreenBlendEquationSeparate(GLcontext
* ctx
,
463 GLenum modeRGB
, GLenum modeA
) //same
465 evergreenSetBlendState(ctx
);
468 static void evergreenBlendFuncSeparate(GLcontext
* ctx
,
469 GLenum sfactorRGB
, GLenum dfactorRGB
,
470 GLenum sfactorA
, GLenum dfactorA
) //same
472 evergreenSetBlendState(ctx
);
475 static GLuint
evergreen_translate_logicop(GLenum logicop
) //same
484 case GL_COPY_INVERTED
:
504 case GL_AND_INVERTED
:
511 fprintf(stderr
, "unknown blend logic operation %x\n", logicop
);
516 static void evergreenSetLogicOpState(GLcontext
*ctx
) //diff : CB_COLOR_CONTROL.ROP3 is actually same bits.
518 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
519 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
521 EVERGREEN_STATECHANGE(context
, cb
);
523 if (RGBA_LOGICOP_ENABLED(ctx
))
524 SETfield(evergreen
->CB_COLOR_CONTROL
.u32All
,
525 evergreen_translate_logicop(ctx
->Color
.LogicOp
),
526 EG_CB_COLOR_CONTROL__ROP3_shift
,
527 EG_CB_COLOR_CONTROL__ROP3_mask
);
529 SETfield(evergreen
->CB_COLOR_CONTROL
.u32All
, 0xCC,
530 EG_CB_COLOR_CONTROL__ROP3_shift
,
531 EG_CB_COLOR_CONTROL__ROP3_mask
);
534 static void evergreenClipPlane( GLcontext
*ctx
, GLenum plane
, const GLfloat
*eq
) //same , but PA_CL_UCP_0_ offset diff
536 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
537 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
541 p
= (GLint
) plane
- (GLint
) GL_CLIP_PLANE0
;
542 ip
= (GLint
*)ctx
->Transform
._ClipUserPlane
[p
];
544 EVERGREEN_STATECHANGE(context
, pa
);
546 evergreen
->ucp
[p
].PA_CL_UCP_0_X
.u32All
= ip
[0];
547 evergreen
->ucp
[p
].PA_CL_UCP_0_Y
.u32All
= ip
[1];
548 evergreen
->ucp
[p
].PA_CL_UCP_0_Z
.u32All
= ip
[2];
549 evergreen
->ucp
[p
].PA_CL_UCP_0_W
.u32All
= ip
[3];
552 static void evergreenSetClipPlaneState(GLcontext
* ctx
, GLenum cap
, GLboolean state
) //diff in func calls
554 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
555 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
558 p
= cap
- GL_CLIP_PLANE0
;
560 EVERGREEN_STATECHANGE(context
, pa
);
563 evergreen
->PA_CL_CLIP_CNTL
.u32All
|= (UCP_ENA_0_bit
<< p
);
564 evergreen
->ucp
[p
].enabled
= GL_TRUE
;
565 evergreenClipPlane(ctx
, cap
, NULL
);
567 evergreen
->PA_CL_CLIP_CNTL
.u32All
&= ~(UCP_ENA_0_bit
<< p
);
568 evergreen
->ucp
[p
].enabled
= GL_FALSE
;
572 static void evergreenSetDBRenderState(GLcontext
* ctx
)
574 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
575 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
576 struct evergreen_fragment_program
*fp
=
577 (struct evergreen_fragment_program
*)(ctx
->FragmentProgram
._Current
);
579 EVERGREEN_STATECHANGE(context
, db
);
581 SETbit(evergreen
->DB_SHADER_CONTROL
.u32All
,
582 DUAL_EXPORT_ENABLE_bit
);
583 SETfield(evergreen
->DB_SHADER_CONTROL
.u32All
, EARLY_Z_THEN_LATE_Z
,
586 /* XXX need to enable htile for hiz/s */
587 SETfield(evergreen
->DB_RENDER_OVERRIDE
.u32All
, FORCE_DISABLE
,
588 FORCE_HIZ_ENABLE_shift
,
589 FORCE_HIZ_ENABLE_mask
);
590 SETfield(evergreen
->DB_RENDER_OVERRIDE
.u32All
, FORCE_DISABLE
,
591 FORCE_HIS_ENABLE0_shift
,
592 FORCE_HIS_ENABLE0_mask
);
593 SETfield(evergreen
->DB_RENDER_OVERRIDE
.u32All
, FORCE_DISABLE
,
594 FORCE_HIS_ENABLE1_shift
,
595 FORCE_HIS_ENABLE1_mask
);
597 if (context
->radeon
.query
.current
)
599 SETbit(evergreen
->DB_RENDER_OVERRIDE
.u32All
, NOOP_CULL_DISABLE_bit
);
600 SETbit(evergreen
->DB_COUNT_CONTROL
.u32All
,
601 EG_DB_COUNT_CONTROL__PERFECT_ZPASS_COUNTS_bit
);
605 CLEARbit(evergreen
->DB_RENDER_OVERRIDE
.u32All
, NOOP_CULL_DISABLE_bit
);
606 CLEARbit(evergreen
->DB_COUNT_CONTROL
.u32All
,
607 EG_DB_COUNT_CONTROL__PERFECT_ZPASS_COUNTS_bit
);
612 if (fp
->r700Shader
.killIsUsed
)
614 SETbit(evergreen
->DB_SHADER_CONTROL
.u32All
, KILL_ENABLE_bit
);
618 CLEARbit(evergreen
->DB_SHADER_CONTROL
.u32All
, KILL_ENABLE_bit
);
621 if (fp
->r700Shader
.depthIsExported
)
623 SETbit(evergreen
->DB_SHADER_CONTROL
.u32All
, Z_EXPORT_ENABLE_bit
);
627 CLEARbit(evergreen
->DB_SHADER_CONTROL
.u32All
, Z_EXPORT_ENABLE_bit
);
632 void evergreenUpdateShaderStates(GLcontext
* ctx
)
634 evergreenSetDBRenderState(ctx
);
635 evergreenUpdateTextureState(ctx
);
638 static void evergreenSetDepthState(GLcontext
* ctx
) //same
640 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
641 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
643 EVERGREEN_STATECHANGE(context
, db
);
647 SETbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, Z_ENABLE_bit
);
650 SETbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, Z_WRITE_ENABLE_bit
);
654 CLEARbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, Z_WRITE_ENABLE_bit
);
657 switch (ctx
->Depth
.Func
)
660 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_NEVER
,
661 ZFUNC_shift
, ZFUNC_mask
);
664 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_LESS
,
665 ZFUNC_shift
, ZFUNC_mask
);
668 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_EQUAL
,
669 ZFUNC_shift
, ZFUNC_mask
);
672 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_LEQUAL
,
673 ZFUNC_shift
, ZFUNC_mask
);
676 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_GREATER
,
677 ZFUNC_shift
, ZFUNC_mask
);
680 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_NOTEQUAL
,
681 ZFUNC_shift
, ZFUNC_mask
);
684 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_GEQUAL
,
685 ZFUNC_shift
, ZFUNC_mask
);
688 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_ALWAYS
,
689 ZFUNC_shift
, ZFUNC_mask
);
692 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_ALWAYS
,
693 ZFUNC_shift
, ZFUNC_mask
);
699 CLEARbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, Z_ENABLE_bit
);
700 CLEARbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, Z_WRITE_ENABLE_bit
);
704 static void evergreenSetStencilState(GLcontext
* ctx
, GLboolean state
) //same
706 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
707 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
708 GLboolean hw_stencil
= GL_FALSE
;
710 if (ctx
->DrawBuffer
) {
711 struct radeon_renderbuffer
*rrbStencil
712 = radeon_get_renderbuffer(ctx
->DrawBuffer
, BUFFER_STENCIL
);
713 hw_stencil
= (rrbStencil
&& rrbStencil
->bo
);
717 EVERGREEN_STATECHANGE(context
, db
);
719 SETbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, STENCIL_ENABLE_bit
);
720 SETbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, BACKFACE_ENABLE_bit
);
721 SETbit(evergreen
->DB_STENCIL_INFO
.u32All
, EG_DB_STENCIL_INFO__FORMAT_bit
);
723 CLEARbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, STENCIL_ENABLE_bit
);
727 static void evergreenUpdateCulling(GLcontext
* ctx
) //same
729 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
730 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
732 EVERGREEN_STATECHANGE(context
, pa
);
734 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, FACE_bit
);
735 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_FRONT_bit
);
736 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_BACK_bit
);
738 if (ctx
->Polygon
.CullFlag
)
740 switch (ctx
->Polygon
.CullFaceMode
)
743 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_FRONT_bit
);
744 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_BACK_bit
);
747 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_FRONT_bit
);
748 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_BACK_bit
);
750 case GL_FRONT_AND_BACK
:
751 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_FRONT_bit
);
752 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_BACK_bit
);
755 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_FRONT_bit
);
756 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, CULL_BACK_bit
);
761 switch (ctx
->Polygon
.FrontFace
)
764 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, FACE_bit
);
767 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, FACE_bit
);
770 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, FACE_bit
); /* default: ccw */
774 /* Winding is inverted when rendering to FBO */
775 if (ctx
->DrawBuffer
&& ctx
->DrawBuffer
->Name
)
776 evergreen
->PA_SU_SC_MODE_CNTL
.u32All
^= FACE_bit
;
779 static void evergreenSetPolygonOffsetState(GLcontext
* ctx
, GLboolean state
) //same
781 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
782 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
784 EVERGREEN_STATECHANGE(context
, pa
);
787 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, POLY_OFFSET_FRONT_ENABLE_bit
);
788 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, POLY_OFFSET_BACK_ENABLE_bit
);
789 SETbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, POLY_OFFSET_PARA_ENABLE_bit
);
791 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, POLY_OFFSET_FRONT_ENABLE_bit
);
792 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, POLY_OFFSET_BACK_ENABLE_bit
);
793 CLEARbit(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, POLY_OFFSET_PARA_ENABLE_bit
);
797 static void evergreenUpdateLineStipple(GLcontext
* ctx
) //diff
802 void evergreenSetScissor(context_t
*context
) //diff
804 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
805 unsigned x1
, y1
, x2
, y2
;
807 struct radeon_renderbuffer
*rrb
;
809 rrb
= radeon_get_colorbuffer(&context
->radeon
);
810 if (!rrb
|| !rrb
->bo
) {
813 if (context
->radeon
.state
.scissor
.enabled
) {
814 x1
= context
->radeon
.state
.scissor
.rect
.x1
;
815 y1
= context
->radeon
.state
.scissor
.rect
.y1
;
816 x2
= context
->radeon
.state
.scissor
.rect
.x2
;
817 y2
= context
->radeon
.state
.scissor
.rect
.y2
;
818 /* r600 has exclusive BR scissors */
819 if (context
->radeon
.radeonScreen
->kernel_mm
) {
824 if (context
->radeon
.radeonScreen
->driScreen
->dri2
.enabled
) {
827 x2
= rrb
->base
.Width
;
828 y2
= rrb
->base
.Height
;
832 x2
= rrb
->dPriv
->x
+ rrb
->dPriv
->w
;
833 y2
= rrb
->dPriv
->y
+ rrb
->dPriv
->h
;
837 EVERGREEN_STATECHANGE(context
, pa
);
840 /* TODO : check WINDOW_OFFSET_DISABLE */
841 //SETbit(evergreen->PA_SC_SCREEN_SCISSOR_TL.u32All, WINDOW_OFFSET_DISABLE_bit);
842 SETfield(evergreen
->PA_SC_SCREEN_SCISSOR_TL
.u32All
, x1
,
843 PA_SC_SCREEN_SCISSOR_TL__TL_X_shift
, EG_PA_SC_SCREEN_SCISSOR_TL__TL_X_mask
);
844 SETfield(evergreen
->PA_SC_SCREEN_SCISSOR_TL
.u32All
, y1
,
845 PA_SC_SCREEN_SCISSOR_TL__TL_Y_shift
, EG_PA_SC_SCREEN_SCISSOR_TL__TL_Y_mask
);
847 SETfield(evergreen
->PA_SC_SCREEN_SCISSOR_BR
.u32All
, x2
,
848 PA_SC_SCREEN_SCISSOR_BR__BR_X_shift
, EG_PA_SC_SCREEN_SCISSOR_BR__BR_X_mask
);
849 SETfield(evergreen
->PA_SC_SCREEN_SCISSOR_BR
.u32All
, y2
,
850 PA_SC_SCREEN_SCISSOR_BR__BR_Y_shift
, EG_PA_SC_SCREEN_SCISSOR_BR__BR_Y_mask
);
853 SETbit(evergreen
->PA_SC_WINDOW_SCISSOR_TL
.u32All
, WINDOW_OFFSET_DISABLE_bit
);
854 SETfield(evergreen
->PA_SC_WINDOW_SCISSOR_TL
.u32All
, x1
,
855 PA_SC_WINDOW_SCISSOR_TL__TL_X_shift
, EG_PA_SC_WINDOW_SCISSOR_TL__TL_X_mask
);
856 SETfield(evergreen
->PA_SC_WINDOW_SCISSOR_TL
.u32All
, y1
,
857 PA_SC_WINDOW_SCISSOR_TL__TL_Y_shift
, EG_PA_SC_WINDOW_SCISSOR_TL__TL_Y_mask
);
859 SETfield(evergreen
->PA_SC_WINDOW_SCISSOR_BR
.u32All
, x2
,
860 PA_SC_WINDOW_SCISSOR_BR__BR_X_shift
, EG_PA_SC_WINDOW_SCISSOR_BR__BR_X_mask
);
861 SETfield(evergreen
->PA_SC_WINDOW_SCISSOR_BR
.u32All
, y2
,
862 PA_SC_WINDOW_SCISSOR_BR__BR_Y_shift
, EG_PA_SC_WINDOW_SCISSOR_BR__BR_Y_mask
);
865 SETfield(evergreen
->PA_SC_CLIPRECT_0_TL
.u32All
, x1
,
866 PA_SC_CLIPRECT_0_TL__TL_X_shift
, EG_PA_SC_CLIPRECT_0_TL__TL_X_mask
);
867 SETfield(evergreen
->PA_SC_CLIPRECT_0_TL
.u32All
, y1
,
868 PA_SC_CLIPRECT_0_TL__TL_Y_shift
, EG_PA_SC_CLIPRECT_0_TL__TL_Y_mask
);
869 SETfield(evergreen
->PA_SC_CLIPRECT_0_BR
.u32All
, x2
,
870 PA_SC_CLIPRECT_0_BR__BR_X_shift
, EG_PA_SC_CLIPRECT_0_BR__BR_X_mask
);
871 SETfield(evergreen
->PA_SC_CLIPRECT_0_BR
.u32All
, y2
,
872 PA_SC_CLIPRECT_0_BR__BR_Y_shift
, EG_PA_SC_CLIPRECT_0_BR__BR_Y_mask
);
874 evergreen
->PA_SC_CLIPRECT_1_TL
.u32All
= evergreen
->PA_SC_CLIPRECT_0_TL
.u32All
;
875 evergreen
->PA_SC_CLIPRECT_1_BR
.u32All
= evergreen
->PA_SC_CLIPRECT_0_BR
.u32All
;
876 evergreen
->PA_SC_CLIPRECT_2_TL
.u32All
= evergreen
->PA_SC_CLIPRECT_0_TL
.u32All
;
877 evergreen
->PA_SC_CLIPRECT_2_BR
.u32All
= evergreen
->PA_SC_CLIPRECT_0_BR
.u32All
;
878 evergreen
->PA_SC_CLIPRECT_3_TL
.u32All
= evergreen
->PA_SC_CLIPRECT_0_TL
.u32All
;
879 evergreen
->PA_SC_CLIPRECT_3_BR
.u32All
= evergreen
->PA_SC_CLIPRECT_0_BR
.u32All
;
881 /* more....2d clip */
882 SETbit(evergreen
->PA_SC_GENERIC_SCISSOR_TL
.u32All
, WINDOW_OFFSET_DISABLE_bit
);
883 SETfield(evergreen
->PA_SC_GENERIC_SCISSOR_TL
.u32All
, x1
,
884 PA_SC_GENERIC_SCISSOR_TL__TL_X_shift
, EG_PA_SC_GENERIC_SCISSOR_TL__TL_X_mask
);
885 SETfield(evergreen
->PA_SC_GENERIC_SCISSOR_TL
.u32All
, y1
,
886 PA_SC_GENERIC_SCISSOR_TL__TL_Y_shift
, EG_PA_SC_GENERIC_SCISSOR_TL__TL_Y_mask
);
887 SETfield(evergreen
->PA_SC_GENERIC_SCISSOR_BR
.u32All
, x2
,
888 PA_SC_GENERIC_SCISSOR_BR__BR_X_shift
, EG_PA_SC_GENERIC_SCISSOR_BR__BR_X_mask
);
889 SETfield(evergreen
->PA_SC_GENERIC_SCISSOR_BR
.u32All
, y2
,
890 PA_SC_GENERIC_SCISSOR_BR__BR_Y_shift
, EG_PA_SC_GENERIC_SCISSOR_BR__BR_Y_mask
);
892 SETbit(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_TL
.u32All
, WINDOW_OFFSET_DISABLE_bit
);
893 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_TL
.u32All
, x1
,
894 PA_SC_VPORT_SCISSOR_0_TL__TL_X_shift
, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_X_mask
);
895 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_TL
.u32All
, y1
,
896 PA_SC_VPORT_SCISSOR_0_TL__TL_Y_shift
, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_Y_mask
);
897 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_BR
.u32All
, x2
,
898 PA_SC_VPORT_SCISSOR_0_BR__BR_X_shift
, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_X_mask
);
899 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_BR
.u32All
, y2
,
900 PA_SC_VPORT_SCISSOR_0_BR__BR_Y_shift
, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_Y_mask
);
903 SETbit(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_TL
.u32All
, WINDOW_OFFSET_DISABLE_bit
);
904 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_TL
.u32All
, x1
,
905 PA_SC_VPORT_SCISSOR_0_TL__TL_X_shift
, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_X_mask
);
906 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_TL
.u32All
, y1
,
907 PA_SC_VPORT_SCISSOR_0_TL__TL_Y_shift
, EG_PA_SC_VPORT_SCISSOR_0_TL__TL_Y_mask
);
908 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_BR
.u32All
, x2
,
909 PA_SC_VPORT_SCISSOR_0_BR__BR_X_shift
, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_X_mask
);
910 SETfield(evergreen
->viewport
[id
].PA_SC_VPORT_SCISSOR_0_BR
.u32All
, y2
,
911 PA_SC_VPORT_SCISSOR_0_BR__BR_Y_shift
, EG_PA_SC_VPORT_SCISSOR_0_BR__BR_Y_mask
);
913 evergreen
->viewport
[id
].enabled
= GL_TRUE
;
916 static void evergreenUpdateWindow(GLcontext
* ctx
, int id
) //diff in calling evergreenSetScissor
918 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
919 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
920 __DRIdrawable
*dPriv
= radeon_get_drawable(&context
->radeon
);
921 GLfloat xoffset
= dPriv
? (GLfloat
) dPriv
->x
: 0;
922 GLfloat yoffset
= dPriv
? (GLfloat
) dPriv
->y
+ dPriv
->h
: 0;
923 const GLfloat
*v
= ctx
->Viewport
._WindowMap
.m
;
924 const GLfloat depthScale
= 1.0F
/ ctx
->DrawBuffer
->_DepthMaxF
;
925 const GLboolean render_to_fbo
= (ctx
->DrawBuffer
->Name
!= 0);
926 GLfloat y_scale
, y_bias
;
936 GLfloat sx
= v
[MAT_SX
];
937 GLfloat tx
= v
[MAT_TX
] + xoffset
;
938 GLfloat sy
= v
[MAT_SY
] * y_scale
;
939 GLfloat ty
= (v
[MAT_TY
] * y_scale
) + y_bias
;
940 GLfloat sz
= v
[MAT_SZ
] * depthScale
;
941 GLfloat tz
= v
[MAT_TZ
] * depthScale
;
943 EVERGREEN_STATECHANGE(context
, pa
);
946 evergreen
->viewport
[id
].PA_CL_VPORT_XSCALE
.f32All
= sx
;
947 evergreen
->viewport
[id
].PA_CL_VPORT_XOFFSET
.f32All
= tx
;
949 evergreen
->viewport
[id
].PA_CL_VPORT_YSCALE
.f32All
= sy
;
950 evergreen
->viewport
[id
].PA_CL_VPORT_YOFFSET
.f32All
= ty
;
952 evergreen
->viewport
[id
].PA_CL_VPORT_ZSCALE
.f32All
= sz
;
953 evergreen
->viewport
[id
].PA_CL_VPORT_ZOFFSET
.f32All
= tz
;
955 if (ctx
->Transform
.DepthClamp
) {
956 evergreen
->viewport
[id
].PA_SC_VPORT_ZMIN_0
.f32All
= MIN2(ctx
->Viewport
.Near
, ctx
->Viewport
.Far
);
957 evergreen
->viewport
[id
].PA_SC_VPORT_ZMAX_0
.f32All
= MAX2(ctx
->Viewport
.Near
, ctx
->Viewport
.Far
);
958 SETbit(evergreen
->PA_CL_CLIP_CNTL
.u32All
, ZCLIP_NEAR_DISABLE_bit
);
959 SETbit(evergreen
->PA_CL_CLIP_CNTL
.u32All
, ZCLIP_FAR_DISABLE_bit
);
961 evergreen
->viewport
[id
].PA_SC_VPORT_ZMIN_0
.f32All
= 0.0;
962 evergreen
->viewport
[id
].PA_SC_VPORT_ZMAX_0
.f32All
= 1.0;
963 CLEARbit(evergreen
->PA_CL_CLIP_CNTL
.u32All
, ZCLIP_NEAR_DISABLE_bit
);
964 CLEARbit(evergreen
->PA_CL_CLIP_CNTL
.u32All
, ZCLIP_FAR_DISABLE_bit
);
967 evergreen
->viewport
[id
].enabled
= GL_TRUE
;
969 evergreenSetScissor(context
);
972 static void evergreenEnable(GLcontext
* ctx
, GLenum cap
, GLboolean state
) //diff in func calls
974 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
986 evergreenSetAlphaState(ctx
);
988 case GL_COLOR_LOGIC_OP
:
989 evergreenSetLogicOpState(ctx
);
990 /* fall-through, because logic op overrides blending */
992 evergreenSetBlendState(ctx
);
1000 evergreenSetClipPlaneState(ctx
, cap
, state
);
1003 evergreenSetDepthState(ctx
);
1005 case GL_STENCIL_TEST
:
1006 evergreenSetStencilState(ctx
, state
);
1009 evergreenUpdateCulling(ctx
);
1011 case GL_POLYGON_OFFSET_POINT
:
1012 case GL_POLYGON_OFFSET_LINE
:
1013 case GL_POLYGON_OFFSET_FILL
:
1014 evergreenSetPolygonOffsetState(ctx
, state
);
1016 case GL_SCISSOR_TEST
:
1017 radeon_firevertices(&context
->radeon
);
1018 context
->radeon
.state
.scissor
.enabled
= state
;
1019 radeonUpdateScissor(ctx
);
1021 case GL_LINE_STIPPLE
:
1022 evergreenUpdateLineStipple(ctx
);
1024 case GL_DEPTH_CLAMP
:
1025 evergreenUpdateWindow(ctx
, 0);
1033 static void evergreenColorMask(GLcontext
* ctx
,
1034 GLboolean r
, GLboolean g
, GLboolean b
, GLboolean a
) //same
1036 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1037 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1038 unsigned int mask
= ((r
? 1 : 0) |
1043 if (mask
!= evergreen
->CB_TARGET_MASK
.u32All
) {
1044 EVERGREEN_STATECHANGE(context
, cb
);
1045 SETfield(evergreen
->CB_TARGET_MASK
.u32All
, mask
, TARGET0_ENABLE_shift
, TARGET0_ENABLE_mask
);
1049 static void evergreenDepthFunc(GLcontext
* ctx
, GLenum func
) //same
1051 evergreenSetDepthState(ctx
);
1054 static void evergreenDepthMask(GLcontext
* ctx
, GLboolean mask
) //same
1056 evergreenSetDepthState(ctx
);
1059 static void evergreenCullFace(GLcontext
* ctx
, GLenum mode
) //same
1061 evergreenUpdateCulling(ctx
);
1064 static void evergreenFogfv(GLcontext
* ctx
, GLenum pname
, const GLfloat
* param
) //same
1068 static void evergreenUpdatePolygonMode(GLcontext
* ctx
) //same
1070 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1071 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1073 EVERGREEN_STATECHANGE(context
, pa
);
1075 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DISABLE_POLY_MODE
, POLY_MODE_shift
, POLY_MODE_mask
);
1077 /* Only do something if a polygon mode is wanted, default is GL_FILL */
1078 if (ctx
->Polygon
.FrontMode
!= GL_FILL
||
1079 ctx
->Polygon
.BackMode
!= GL_FILL
) {
1082 /* Handle GL_CW (clock wise and GL_CCW (counter clock wise)
1083 * correctly by selecting the correct front and back face
1085 f
= ctx
->Polygon
.FrontMode
;
1086 b
= ctx
->Polygon
.BackMode
;
1088 /* Enable polygon mode */
1089 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DUAL_MODE
, POLY_MODE_shift
, POLY_MODE_mask
);
1093 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DRAW_LINES
,
1094 POLYMODE_FRONT_PTYPE_shift
, POLYMODE_FRONT_PTYPE_mask
);
1097 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DRAW_POINTS
,
1098 POLYMODE_FRONT_PTYPE_shift
, POLYMODE_FRONT_PTYPE_mask
);
1101 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DRAW_TRIANGLES
,
1102 POLYMODE_FRONT_PTYPE_shift
, POLYMODE_FRONT_PTYPE_mask
);
1108 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DRAW_LINES
,
1109 POLYMODE_BACK_PTYPE_shift
, POLYMODE_BACK_PTYPE_mask
);
1112 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DRAW_POINTS
,
1113 POLYMODE_BACK_PTYPE_shift
, POLYMODE_BACK_PTYPE_mask
);
1116 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, X_DRAW_TRIANGLES
,
1117 POLYMODE_BACK_PTYPE_shift
, POLYMODE_BACK_PTYPE_mask
);
1123 static void evergreenFrontFace(GLcontext
* ctx
, GLenum mode
) //same
1125 evergreenUpdateCulling(ctx
);
1126 evergreenUpdatePolygonMode(ctx
);
1129 static void evergreenShadeModel(GLcontext
* ctx
, GLenum mode
) //same
1131 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1132 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1134 EVERGREEN_STATECHANGE(context
, spi
);
1136 /* also need to set/clear FLAT_SHADE bit per param in SPI_PS_INPUT_CNTL_[0-31] */
1139 SETbit(evergreen
->SPI_INTERP_CONTROL_0
.u32All
, FLAT_SHADE_ENA_bit
);
1142 CLEARbit(evergreen
->SPI_INTERP_CONTROL_0
.u32All
, FLAT_SHADE_ENA_bit
);
1149 static void evergreenLogicOpcode(GLcontext
*ctx
, GLenum logicop
) //diff
1151 if (RGBA_LOGICOP_ENABLED(ctx
))
1152 evergreenSetLogicOpState(ctx
);
1155 static void evergreenPointSize(GLcontext
* ctx
, GLfloat size
) //same
1157 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1158 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1160 EVERGREEN_STATECHANGE(context
, pa
);
1162 /* We need to clamp to user defined range here, because
1163 * the HW clamping happens only for per vertex point size. */
1164 size
= CLAMP(size
, ctx
->Point
.MinSize
, ctx
->Point
.MaxSize
);
1166 /* same size limits for AA, non-AA points */
1167 size
= CLAMP(size
, ctx
->Const
.MinPointSize
, ctx
->Const
.MaxPointSize
);
1169 /* format is 12.4 fixed point */
1170 SETfield(evergreen
->PA_SU_POINT_SIZE
.u32All
, (int)(size
* 8.0),
1171 PA_SU_POINT_SIZE__HEIGHT_shift
, PA_SU_POINT_SIZE__HEIGHT_mask
);
1172 SETfield(evergreen
->PA_SU_POINT_SIZE
.u32All
, (int)(size
* 8.0),
1173 PA_SU_POINT_SIZE__WIDTH_shift
, PA_SU_POINT_SIZE__WIDTH_mask
);
1177 static void evergreenPointParameter(GLcontext
* ctx
, GLenum pname
, const GLfloat
* param
) //same
1179 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1180 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1182 EVERGREEN_STATECHANGE(context
, pa
);
1184 /* format is 12.4 fixed point */
1186 case GL_POINT_SIZE_MIN
:
1187 SETfield(evergreen
->PA_SU_POINT_MINMAX
.u32All
, (int)(ctx
->Point
.MinSize
* 8.0),
1188 MIN_SIZE_shift
, MIN_SIZE_mask
);
1189 evergreenPointSize(ctx
, ctx
->Point
.Size
);
1191 case GL_POINT_SIZE_MAX
:
1192 SETfield(evergreen
->PA_SU_POINT_MINMAX
.u32All
, (int)(ctx
->Point
.MaxSize
* 8.0),
1193 MAX_SIZE_shift
, MAX_SIZE_mask
);
1194 evergreenPointSize(ctx
, ctx
->Point
.Size
);
1196 case GL_POINT_DISTANCE_ATTENUATION
:
1198 case GL_POINT_FADE_THRESHOLD_SIZE
:
1205 static int evergreen_translate_stencil_func(int func
) //same
1219 return REF_NOTEQUAL
;
1228 static void evergreenStencilFuncSeparate(GLcontext
* ctx
, GLenum face
,
1229 GLenum func
, GLint ref
, GLuint mask
) //same
1231 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1232 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1233 const unsigned back
= ctx
->Stencil
._BackFace
;
1236 EVERGREEN_STATECHANGE(context
, db
);
1239 SETfield(evergreen
->DB_STENCILREFMASK
.u32All
, ctx
->Stencil
.Ref
[0],
1240 STENCILREF_shift
, STENCILREF_mask
);
1241 SETfield(evergreen
->DB_STENCILREFMASK
.u32All
, ctx
->Stencil
.ValueMask
[0],
1242 STENCILMASK_shift
, STENCILMASK_mask
);
1244 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_func(ctx
->Stencil
.Function
[0]),
1245 STENCILFUNC_shift
, STENCILFUNC_mask
);
1248 SETfield(evergreen
->DB_STENCILREFMASK_BF
.u32All
, ctx
->Stencil
.Ref
[back
],
1249 STENCILREF_BF_shift
, STENCILREF_BF_mask
);
1250 SETfield(evergreen
->DB_STENCILREFMASK_BF
.u32All
, ctx
->Stencil
.ValueMask
[back
],
1251 STENCILMASK_BF_shift
, STENCILMASK_BF_mask
);
1253 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_func(ctx
->Stencil
.Function
[back
]),
1254 STENCILFUNC_BF_shift
, STENCILFUNC_BF_mask
);
1257 static void evergreenStencilMaskSeparate(GLcontext
* ctx
, GLenum face
, GLuint mask
) //same
1259 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1260 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1261 const unsigned back
= ctx
->Stencil
._BackFace
;
1263 EVERGREEN_STATECHANGE(context
, db
);
1266 SETfield(evergreen
->DB_STENCILREFMASK
.u32All
, ctx
->Stencil
.WriteMask
[0],
1267 STENCILWRITEMASK_shift
, STENCILWRITEMASK_mask
);
1270 SETfield(evergreen
->DB_STENCILREFMASK_BF
.u32All
, ctx
->Stencil
.WriteMask
[back
],
1271 STENCILWRITEMASK_BF_shift
, STENCILWRITEMASK_BF_mask
);
1275 static int evergreen_translate_stencil_op(int op
) //same
1279 return STENCIL_KEEP
;
1281 return STENCIL_ZERO
;
1283 return STENCIL_REPLACE
;
1285 return STENCIL_INCR_CLAMP
;
1287 return STENCIL_DECR_CLAMP
;
1288 case GL_INCR_WRAP_EXT
:
1289 return STENCIL_INCR_WRAP
;
1290 case GL_DECR_WRAP_EXT
:
1291 return STENCIL_DECR_WRAP
;
1293 return STENCIL_INVERT
;
1295 WARN_ONCE("Do not know how to translate stencil op");
1296 return STENCIL_KEEP
;
1301 static void evergreenStencilOpSeparate(GLcontext
* ctx
, GLenum face
,
1302 GLenum fail
, GLenum zfail
, GLenum zpass
) //same
1304 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1305 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1306 const unsigned back
= ctx
->Stencil
._BackFace
;
1308 EVERGREEN_STATECHANGE(context
, db
);
1310 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_op(ctx
->Stencil
.FailFunc
[0]),
1311 STENCILFAIL_shift
, STENCILFAIL_mask
);
1312 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_op(ctx
->Stencil
.ZFailFunc
[0]),
1313 STENCILZFAIL_shift
, STENCILZFAIL_mask
);
1314 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_op(ctx
->Stencil
.ZPassFunc
[0]),
1315 STENCILZPASS_shift
, STENCILZPASS_mask
);
1317 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_op(ctx
->Stencil
.FailFunc
[back
]),
1318 STENCILFAIL_BF_shift
, STENCILFAIL_BF_mask
);
1319 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_op(ctx
->Stencil
.ZFailFunc
[back
]),
1320 STENCILZFAIL_BF_shift
, STENCILZFAIL_BF_mask
);
1321 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, evergreen_translate_stencil_op(ctx
->Stencil
.ZPassFunc
[back
]),
1322 STENCILZPASS_BF_shift
, STENCILZPASS_BF_mask
);
1325 static void evergreenViewport(GLcontext
* ctx
,
1329 GLsizei height
) //diff in evergreenUpdateWindow
1331 evergreenUpdateWindow(ctx
, 0);
1333 radeon_viewport(ctx
, x
, y
, width
, height
);
1336 static void evergreenDepthRange(GLcontext
* ctx
, GLclampd nearval
, GLclampd farval
) //diff in evergreenUpdateWindow
1338 evergreenUpdateWindow(ctx
, 0);
1341 static void evergreenLineWidth(GLcontext
* ctx
, GLfloat widthf
) //same
1343 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1344 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1345 uint32_t lineWidth
= (uint32_t)((widthf
* 0.5) * (1 << 4));
1347 EVERGREEN_STATECHANGE(context
, pa
);
1349 if (lineWidth
> 0xFFFF)
1351 SETfield(evergreen
->PA_SU_LINE_CNTL
.u32All
,(uint16_t)lineWidth
,
1352 PA_SU_LINE_CNTL__WIDTH_shift
, PA_SU_LINE_CNTL__WIDTH_mask
);
1355 static void evergreenLineStipple(GLcontext
*ctx
, GLint factor
, GLushort pattern
) //same
1357 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1358 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1360 EVERGREEN_STATECHANGE(context
, pa
);
1362 SETfield(evergreen
->PA_SC_LINE_STIPPLE
.u32All
, pattern
, LINE_PATTERN_shift
, LINE_PATTERN_mask
);
1363 SETfield(evergreen
->PA_SC_LINE_STIPPLE
.u32All
, (factor
-1), REPEAT_COUNT_shift
, REPEAT_COUNT_mask
);
1364 SETfield(evergreen
->PA_SC_LINE_STIPPLE
.u32All
, 1, AUTO_RESET_CNTL_shift
, AUTO_RESET_CNTL_mask
);
1367 static void evergreenPolygonOffset(GLcontext
* ctx
, GLfloat factor
, GLfloat units
) //diff :
1368 //all register here offset diff, bits same
1370 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1371 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1372 GLfloat constant
= units
;
1375 EVERGREEN_STATECHANGE(context
, pa
);
1377 switch (ctx
->Visual
.depthBits
) {
1389 SETfield(evergreen
->PA_SU_POLY_OFFSET_DB_FMT_CNTL
.u32All
, depth
,
1390 POLY_OFFSET_NEG_NUM_DB_BITS_shift
, POLY_OFFSET_NEG_NUM_DB_BITS_mask
);
1391 //evergreen->PA_SU_POLY_OFFSET_CLAMP.f32All = constant; //???
1392 evergreen
->PA_SU_POLY_OFFSET_FRONT_SCALE
.f32All
= factor
;
1393 evergreen
->PA_SU_POLY_OFFSET_FRONT_OFFSET
.f32All
= constant
;
1394 evergreen
->PA_SU_POLY_OFFSET_BACK_SCALE
.f32All
= factor
;
1395 evergreen
->PA_SU_POLY_OFFSET_BACK_OFFSET
.f32All
= constant
;
1398 static void evergreenPolygonMode(GLcontext
* ctx
, GLenum face
, GLenum mode
) //same
1403 evergreenUpdatePolygonMode(ctx
);
1406 static void evergreenRenderMode(GLcontext
* ctx
, GLenum mode
) //same
1410 //TODO : move to kernel.
1411 static void evergreenInitSQConfig(GLcontext
* ctx
)
1413 context_t
*context
= EVERGREEN_CONTEXT(ctx
);
1414 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1416 uint32_t uSqNumCfInsts
, uMaxGPRs
, uMaxThreads
, uMaxStackEntries
, uPSThreadCount
, uOtherThreadCount
;
1417 uint32_t NUM_PS_GPRS
, NUM_VS_GPRS
, NUM_GS_GPRS
, NUM_ES_GPRS
, NUM_HS_GPRS
, NUM_LS_GPRS
, NUM_CLAUSE_TEMP_GPRS
;
1418 GLboolean bVC_ENABLE
= GL_TRUE
;
1420 R600_STATECHANGE(context
, sq
);
1422 switch (context
->radeon
.radeonScreen
->chip_family
)
1424 case CHIP_FAMILY_CEDAR
:
1426 bVC_ENABLE
= GL_FALSE
;
1428 uPSThreadCount
= 96;
1430 uMaxStackEntries
= 256;
1432 case CHIP_FAMILY_REDWOOD
:
1434 bVC_ENABLE
= GL_TRUE
;
1436 uPSThreadCount
= 128;
1438 uMaxStackEntries
= 256;
1440 case CHIP_FAMILY_JUNIPER
:
1442 bVC_ENABLE
= GL_TRUE
;
1444 uPSThreadCount
= 128;
1446 uMaxStackEntries
= 512;
1448 case CHIP_FAMILY_CYPRESS
:
1450 bVC_ENABLE
= GL_TRUE
;
1452 uPSThreadCount
= 128;
1454 uMaxStackEntries
= 512;
1456 case CHIP_FAMILY_HEMLOCK
:
1457 uSqNumCfInsts
= 2;//?
1458 bVC_ENABLE
= GL_TRUE
;
1460 uPSThreadCount
= 128;
1462 uMaxStackEntries
= 512;
1466 bVC_ENABLE
= GL_TRUE
;
1468 uPSThreadCount
= 128;
1470 uMaxStackEntries
= 512;
1474 evergreen
->evergreen_config
.SQ_DYN_GPR_CNTL_PS_FLUSH_REQ
.u32All
= 0;
1476 evergreen
->evergreen_config
.SPI_CONFIG_CNTL
.u32All
= 0;
1477 evergreen
->evergreen_config
.SPI_CONFIG_CNTL_1
.u32All
= 0;
1478 SETfield(evergreen
->evergreen_config
.SPI_CONFIG_CNTL_1
.u32All
, 4,
1479 EG_SPI_CONFIG_CNTL_1__VTX_DONE_DELAY_shift
,
1480 EG_SPI_CONFIG_CNTL_1__VTX_DONE_DELAY_mask
);
1482 evergreen
->evergreen_config
.CP_PERFMON_CNTL
.u32All
= 0;
1484 evergreen
->evergreen_config
.SQ_MS_FIFO_SIZES
.u32All
= 0;
1485 SETfield(evergreen
->evergreen_config
.SQ_MS_FIFO_SIZES
.u32All
, 16 * uSqNumCfInsts
,
1486 EG_SQ_MS_FIFO_SIZES__CACHE_FIFO_SIZE_shift
,
1487 EG_SQ_MS_FIFO_SIZES__CACHE_FIFO_SIZE_mask
);
1488 SETfield(evergreen
->evergreen_config
.SQ_MS_FIFO_SIZES
.u32All
, 0x4,
1489 EG_SQ_MS_FIFO_SIZES__FETCH_FIFO_HIWATER_shift
,
1490 EG_SQ_MS_FIFO_SIZES__FETCH_FIFO_HIWATER_mask
);
1491 SETfield(evergreen
->evergreen_config
.SQ_MS_FIFO_SIZES
.u32All
, 0xE0,
1492 EG_SQ_MS_FIFO_SIZES__DONE_FIFO_HIWATER_shift
,
1493 EG_SQ_MS_FIFO_SIZES__DONE_FIFO_HIWATER_mask
);
1494 SETfield(evergreen
->evergreen_config
.SQ_MS_FIFO_SIZES
.u32All
, 0x8,
1495 EG_SQ_MS_FIFO_SIZES__ALU_UPDATE_FIFO_HIWATER_shift
,
1496 EG_SQ_MS_FIFO_SIZES__ALU_UPDATE_FIFO_HIWATER_mask
);
1498 if(bVC_ENABLE
== GL_TRUE
)
1500 SETbit(evergreen
->evergreen_config
.SQ_CONFIG
.u32All
,
1501 EG_SQ_CONFIG__VC_ENABLE_bit
);
1505 CLEARbit(evergreen
->evergreen_config
.SQ_CONFIG
.u32All
,
1506 EG_SQ_CONFIG__VC_ENABLE_bit
);
1508 SETbit(evergreen
->evergreen_config
.SQ_CONFIG
.u32All
,
1509 EG_SQ_CONFIG__EXPORT_SRC_C_bit
);
1510 SETfield(evergreen
->evergreen_config
.SQ_CONFIG
.u32All
, 0,
1511 EG_SQ_CONFIG__PS_PRIO_shift
,
1512 EG_SQ_CONFIG__PS_PRIO_mask
);
1513 SETfield(evergreen
->evergreen_config
.SQ_CONFIG
.u32All
, 1,
1514 EG_SQ_CONFIG__VS_PRIO_shift
,
1515 EG_SQ_CONFIG__VS_PRIO_mask
);
1516 SETfield(evergreen
->evergreen_config
.SQ_CONFIG
.u32All
, 2,
1517 EG_SQ_CONFIG__GS_PRIO_shift
,
1518 EG_SQ_CONFIG__GS_PRIO_mask
);
1519 SETfield(evergreen
->evergreen_config
.SQ_CONFIG
.u32All
, 3,
1520 EG_SQ_CONFIG__ES_PRIO_shift
,
1521 EG_SQ_CONFIG__ES_PRIO_mask
);
1523 NUM_CLAUSE_TEMP_GPRS
= 4;
1524 NUM_PS_GPRS
= ((uMaxGPRs
-(4*2))*12/32); // 93
1525 NUM_VS_GPRS
= ((uMaxGPRs
-(4*2))*6/32); // 46
1526 NUM_GS_GPRS
= ((uMaxGPRs
-(4*2))*4/32); // 31
1527 NUM_ES_GPRS
= ((uMaxGPRs
-(4*2))*4/32); // 31
1528 NUM_HS_GPRS
= ((uMaxGPRs
-(4*2))*3/32); // 23
1529 NUM_LS_GPRS
= ((uMaxGPRs
-(4*2))*3/32); // 23
1531 evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_1
.u32All
= 0;
1532 evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_2
.u32All
= 0;
1533 evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_3
.u32All
= 0;
1535 SETfield(evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_1
.u32All
, NUM_PS_GPRS
,
1536 NUM_PS_GPRS_shift
, NUM_PS_GPRS_mask
);
1537 SETfield(evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_1
.u32All
, NUM_VS_GPRS
,
1538 NUM_VS_GPRS_shift
, NUM_VS_GPRS_mask
);
1539 SETfield(evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_1
.u32All
, NUM_CLAUSE_TEMP_GPRS
,
1540 NUM_CLAUSE_TEMP_GPRS_shift
, NUM_CLAUSE_TEMP_GPRS_mask
);
1541 SETfield(evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_2
.u32All
, NUM_GS_GPRS
,
1542 NUM_GS_GPRS_shift
, NUM_GS_GPRS_mask
);
1543 SETfield(evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_2
.u32All
, NUM_ES_GPRS
,
1544 NUM_ES_GPRS_shift
, NUM_ES_GPRS_mask
);
1545 SETfield(evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_3
.u32All
, NUM_HS_GPRS
,
1546 NUM_PS_GPRS_shift
, NUM_PS_GPRS_mask
);
1547 SETfield(evergreen
->evergreen_config
.SQ_GPR_RESOURCE_MGMT_3
.u32All
, NUM_LS_GPRS
,
1548 NUM_VS_GPRS_shift
, NUM_VS_GPRS_mask
);
1550 uOtherThreadCount
= (((uMaxThreads
-uPSThreadCount
)/6)/8)*8;
1551 evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT
.u32All
= 0;
1552 evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT_2
.u32All
= 0;
1553 SETfield(evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT
.u32All
, uPSThreadCount
,
1554 NUM_PS_THREADS_shift
, NUM_PS_THREADS_mask
);
1555 SETfield(evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT
.u32All
, uOtherThreadCount
,
1556 NUM_VS_THREADS_shift
, NUM_VS_THREADS_mask
);
1557 SETfield(evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT
.u32All
, uOtherThreadCount
,
1558 NUM_GS_THREADS_shift
, NUM_GS_THREADS_mask
);
1559 SETfield(evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT
.u32All
, uOtherThreadCount
,
1560 NUM_ES_THREADS_shift
, NUM_ES_THREADS_mask
);
1561 SETfield(evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT_2
.u32All
, uOtherThreadCount
,
1562 NUM_PS_THREADS_shift
, NUM_PS_THREADS_mask
);
1563 SETfield(evergreen
->evergreen_config
.SQ_THREAD_RESOURCE_MGMT_2
.u32All
, uOtherThreadCount
,
1564 NUM_VS_THREADS_shift
, NUM_VS_THREADS_mask
);
1566 uMaxStackEntries
= ((uMaxStackEntries
*1)/6);
1567 evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_1
.u32All
= 0;
1568 evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_2
.u32All
= 0;
1569 evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_3
.u32All
= 0;
1570 SETfield(evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_1
.u32All
, uMaxStackEntries
,
1571 NUM_PS_STACK_ENTRIES_shift
, NUM_PS_STACK_ENTRIES_mask
);
1572 SETfield(evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_1
.u32All
, uMaxStackEntries
,
1573 NUM_VS_STACK_ENTRIES_shift
, NUM_VS_STACK_ENTRIES_mask
);
1574 SETfield(evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_2
.u32All
, uMaxStackEntries
,
1575 NUM_GS_STACK_ENTRIES_shift
, NUM_GS_STACK_ENTRIES_mask
);
1576 SETfield(evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_2
.u32All
, uMaxStackEntries
,
1577 NUM_ES_STACK_ENTRIES_shift
, NUM_ES_STACK_ENTRIES_mask
);
1578 SETfield(evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_3
.u32All
, uMaxStackEntries
,
1579 NUM_PS_STACK_ENTRIES_shift
, NUM_PS_STACK_ENTRIES_mask
);
1580 SETfield(evergreen
->evergreen_config
.SQ_STACK_RESOURCE_MGMT_3
.u32All
, uMaxStackEntries
,
1581 NUM_VS_STACK_ENTRIES_shift
, NUM_VS_STACK_ENTRIES_mask
);
1583 evergreen
->evergreen_config
.PA_SC_FORCE_EOV_MAX_CNTS
.u32All
= 0;
1584 SETfield(evergreen
->evergreen_config
.PA_SC_FORCE_EOV_MAX_CNTS
.u32All
, 4095,
1585 EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_CLK_CNT_shift
,
1586 EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_CLK_CNT_mask
);
1587 SETfield(evergreen
->evergreen_config
.PA_SC_FORCE_EOV_MAX_CNTS
.u32All
, 255,
1588 EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_REZ_CNT_shift
,
1589 EG_PA_SC_FORCE_EOV_MAX_CNTS__FORCE_EOV_MAX_REZ_CNT_mask
);
1591 evergreen
->evergreen_config
.VGT_CACHE_INVALIDATION
.u32All
= 0;
1592 SETfield(evergreen
->evergreen_config
.VGT_CACHE_INVALIDATION
.u32All
, 2,
1593 EG_VGT_CACHE_INVALIDATION__CACHE_INVALIDATION_shift
,
1594 EG_VGT_CACHE_INVALIDATION__CACHE_INVALIDATION_mask
);
1596 evergreen
->evergreen_config
.VGT_GS_VERTEX_REUSE
.u32All
= 0;
1597 SETfield(evergreen
->evergreen_config
.VGT_GS_VERTEX_REUSE
.u32All
, 16,
1601 evergreen
->evergreen_config
.PA_SC_LINE_STIPPLE_STATE
.u32All
= 0;
1603 evergreen
->evergreen_config
.PA_CL_ENHANCE
.u32All
= 0;
1604 SETbit(evergreen
->evergreen_config
.PA_CL_ENHANCE
.u32All
,
1605 CLIP_VTX_REORDER_ENA_bit
);
1606 SETfield(evergreen
->evergreen_config
.PA_CL_ENHANCE
.u32All
, 3,
1611 void evergreenInitState(GLcontext
* ctx
) //diff
1613 context_t
*context
= R700_CONTEXT(ctx
);
1614 EVERGREEN_CHIP_CONTEXT
*evergreen
= GET_EVERGREEN_CHIP(context
);
1618 //calloc should have done this
1619 memset(evergreen
, 0, sizeof(EVERGREEN_CHIP_CONTEXT
));
1621 // Disable window clipping and offset:
1622 SETfield(evergreen
->PA_SC_WINDOW_OFFSET
.u32All
, 0,
1623 EG_PA_SC_WINDOW_OFFSET__WINDOW_X_OFFSET_shift
, EG_PA_SC_WINDOW_OFFSET__WINDOW_X_OFFSET_mask
);
1624 SETfield(evergreen
->PA_SC_WINDOW_OFFSET
.u32All
, 0,
1625 EG_PA_SC_WINDOW_OFFSET__WINDOW_Y_OFFSET_shift
, EG_PA_SC_WINDOW_OFFSET__WINDOW_Y_OFFSET_mask
);
1627 SETbit(evergreen
->PA_SC_WINDOW_SCISSOR_TL
.u32All
, WINDOW_OFFSET_DISABLE_bit
);
1629 evergreen
->PA_SC_CLIPRECT_RULE
.u32All
= 0x0000FFFF;
1631 evergreen
->PA_SC_EDGERULE
.u32All
= 0xAAAAAAAA;
1633 // Set up Z min/max:
1634 evergreen
->viewport
[id
].PA_SC_VPORT_ZMIN_0
.f32All
= 0.0;
1635 evergreen
->viewport
[id
].PA_SC_VPORT_ZMAX_0
.f32All
= 1.0;
1637 SETfield(evergreen
->CB_TARGET_MASK
.u32All
, 0xF, TARGET0_ENABLE_shift
, TARGET0_ENABLE_mask
);
1638 SETfield(evergreen
->CB_SHADER_MASK
.u32All
, 0xF, OUTPUT0_ENABLE_shift
, OUTPUT0_ENABLE_mask
);
1640 SETfield(evergreen
->SPI_BARYC_CNTL
.u32All
, 1,
1641 EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_shift
,
1642 EG_SPI_BARYC_CNTL__PERSP_CENTROID_ENA_mask
);
1643 SETfield(evergreen
->SPI_BARYC_CNTL
.u32All
, 1,
1644 EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_shift
,
1645 EG_SPI_BARYC_CNTL__LINEAR_CENTROID_ENA_mask
);
1647 // Turn off vgt reuse:
1648 evergreen
->VGT_REUSE_OFF
.u32All
= 0;
1649 SETbit(evergreen
->VGT_REUSE_OFF
.u32All
, REUSE_OFF_bit
);
1651 // Specify offsetting and clamp values for vertices:
1652 evergreen
->VGT_MAX_VTX_INDX
.u32All
= 0xFFFFFF;
1653 evergreen
->VGT_MIN_VTX_INDX
.u32All
= 0;
1654 evergreen
->VGT_INDX_OFFSET
.u32All
= 0;
1656 evergreen
->VGT_DMA_NUM_INSTANCES
.u32All
= 1;
1658 // Do not alpha blend:
1659 SETfield(evergreen
->SX_ALPHA_TEST_CONTROL
.u32All
, REF_NEVER
,
1660 ALPHA_FUNC_shift
, ALPHA_FUNC_mask
);
1661 CLEARbit(evergreen
->SX_ALPHA_TEST_CONTROL
.u32All
, ALPHA_TEST_ENABLE_bit
);
1663 evergreen
->SPI_VS_OUT_ID_0
.u32All
= 0x03020100;
1664 evergreen
->SPI_VS_OUT_ID_1
.u32All
= 0x07060504;
1666 evergreen
->SPI_PS_INPUT_CNTL
[0].u32All
= 0x00000800;
1667 evergreen
->SPI_PS_INPUT_CNTL
[1].u32All
= 0x00000801;
1668 evergreen
->SPI_PS_INPUT_CNTL
[2].u32All
= 0x00000802;
1671 // Depth buffer currently disabled:
1672 evergreen
->DB_DEPTH_CONTROL
.u32All
= 0;
1673 SETbit(evergreen
->DB_DEPTH_CONTROL
.u32All
, Z_WRITE_ENABLE_bit
);
1674 SETfield(evergreen
->DB_DEPTH_CONTROL
.u32All
, FRAG_ALWAYS
,
1675 ZFUNC_shift
, ZFUNC_mask
);
1677 evergreen
->DB_Z_READ_BASE
.u32All
= 0;
1678 evergreen
->DB_Z_WRITE_BASE
.u32All
= 0;
1680 evergreen
->DB_DEPTH_CLEAR
.f32All
= 1.0;
1682 evergreen
->DB_DEPTH_VIEW
.u32All
= 0;
1684 evergreen
->DB_SHADER_CONTROL
.u32All
= 0;
1685 SETbit(evergreen
->DB_SHADER_CONTROL
.u32All
, EG_DB_SHADER_CONTROL__DUAL_EXPORT_ENABLE_bit
);
1687 evergreen
->DB_Z_INFO
.u32All
= 0;
1688 SETfield(evergreen
->DB_Z_INFO
.u32All
, ARRAY_1D_TILED_THIN1
,
1689 EG_DB_Z_INFO__ARRAY_MODE_shift
, EG_DB_Z_INFO__ARRAY_MODE_mask
);
1690 SETfield(evergreen
->DB_Z_INFO
.u32All
, EG_Z_24
,
1691 EG_DB_Z_INFO__FORMAT_shift
, EG_DB_Z_INFO__FORMAT_mask
);
1692 SETfield(evergreen
->DB_Z_INFO
.u32All
, EG_ADDR_SURF_TILE_SPLIT_256B
,
1693 EG_DB_Z_INFO__TILE_SPLIT_shift
, EG_DB_Z_INFO__TILE_SPLIT_mask
);
1694 SETfield(evergreen
->DB_Z_INFO
.u32All
, EG_ADDR_SURF_8_BANK
,
1695 EG_DB_Z_INFO__NUM_BANKS_shift
, EG_DB_Z_INFO__NUM_BANKS_mask
);
1696 SETfield(evergreen
->DB_Z_INFO
.u32All
, EG_ADDR_SURF_BANK_WIDTH_1
,
1697 EG_DB_Z_INFO__BANK_WIDTH_shift
, EG_DB_Z_INFO__BANK_WIDTH_mask
);
1698 SETfield(evergreen
->DB_Z_INFO
.u32All
, EG_ADDR_SURF_BANK_HEIGHT_1
,
1699 EG_DB_Z_INFO__BANK_HEIGHT_shift
, EG_DB_Z_INFO__BANK_HEIGHT_mask
);
1701 evergreen
->DB_STENCIL_INFO
.u32All
= 0;
1702 CLEARbit(evergreen
->DB_STENCIL_INFO
.u32All
, EG_DB_STENCIL_INFO__FORMAT_bit
);
1703 SETfield(evergreen
->DB_STENCIL_INFO
.u32All
, 0,
1704 EG_DB_STENCIL_INFO__TILE_SPLIT_shift
, EG_DB_STENCIL_INFO__TILE_SPLIT_mask
);
1706 evergreen
->DB_RENDER_CONTROL
.u32All
= 0;
1708 evergreen
->DB_RENDER_OVERRIDE
.u32All
= 0;
1709 SETfield(evergreen
->DB_RENDER_OVERRIDE
.u32All
, FORCE_DISABLE
, FORCE_HIZ_ENABLE_shift
, FORCE_HIZ_ENABLE_mask
);
1710 SETfield(evergreen
->DB_RENDER_OVERRIDE
.u32All
, FORCE_DISABLE
, FORCE_HIS_ENABLE0_shift
, FORCE_HIS_ENABLE0_mask
);
1711 SETfield(evergreen
->DB_RENDER_OVERRIDE
.u32All
, FORCE_DISABLE
, FORCE_HIS_ENABLE1_shift
, FORCE_HIS_ENABLE1_mask
);
1714 evergreenEnable(ctx
, GL_STENCIL_TEST
, ctx
->Stencil
._Enabled
);
1715 evergreenStencilMaskSeparate(ctx
, 0, ctx
->Stencil
.WriteMask
[0]);
1716 evergreenStencilFuncSeparate(ctx
, 0, ctx
->Stencil
.Function
[0],
1717 ctx
->Stencil
.Ref
[0], ctx
->Stencil
.ValueMask
[0]);
1718 evergreenStencilOpSeparate(ctx
, 0, ctx
->Stencil
.FailFunc
[0],
1719 ctx
->Stencil
.ZFailFunc
[0],
1720 ctx
->Stencil
.ZPassFunc
[0]);
1722 // Disable ROP3 modes by setting src to dst copy:
1723 SETfield(evergreen
->CB_COLOR_CONTROL
.u32All
, 0xCC,
1724 EG_CB_COLOR_CONTROL__ROP3_shift
,
1725 EG_CB_COLOR_CONTROL__ROP3_mask
);
1726 SETfield(evergreen
->CB_COLOR_CONTROL
.u32All
, EG_CB_NORMAL
,
1727 EG_CB_COLOR_CONTROL__MODE_shift
,
1728 EG_CB_COLOR_CONTROL__MODE_mask
);
1730 SETfield(evergreen
->CB_BLEND0_CONTROL
.u32All
,
1731 BLEND_ONE
, COLOR_SRCBLEND_shift
, COLOR_SRCBLEND_mask
);
1733 SETfield(evergreen
->CB_BLEND0_CONTROL
.u32All
,
1734 BLEND_ONE
, ALPHA_SRCBLEND_shift
, ALPHA_SRCBLEND_mask
);
1736 //evergreen->PA_CL_CLIP_CNTL.CLIP_DISABLE = 1;
1738 SETbit(evergreen
->PA_CL_CLIP_CNTL
.u32All
, DX_LINEAR_ATTR_CLIP_ENA_bit
);
1740 // Set up the culling control register:
1741 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, 2,
1742 POLYMODE_FRONT_PTYPE_shift
, POLYMODE_FRONT_PTYPE_mask
); // draw using triangles
1743 SETfield(evergreen
->PA_SU_SC_MODE_CNTL
.u32All
, 2,
1744 POLYMODE_BACK_PTYPE_shift
, POLYMODE_BACK_PTYPE_mask
); // draw using triangles
1746 // Do scale XY or X by 1/W0. eg:
1747 evergreen
->bEnablePerspective
= GL_TRUE
;
1749 CLEARbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_XY_FMT_bit
);
1750 CLEARbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_Z_FMT_bit
);
1751 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VTX_W0_FMT_bit
);
1753 // Enable viewport scaling for all three axis:
1754 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VPORT_X_SCALE_ENA_bit
);
1755 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VPORT_X_OFFSET_ENA_bit
);
1756 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VPORT_Y_SCALE_ENA_bit
);
1757 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VPORT_Y_OFFSET_ENA_bit
);
1758 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VPORT_Z_SCALE_ENA_bit
);
1759 SETbit(evergreen
->PA_CL_VTE_CNTL
.u32All
, VPORT_Z_OFFSET_ENA_bit
);
1761 // Set up point sizes and min/max values:
1762 SETfield(evergreen
->PA_SU_POINT_SIZE
.u32All
, 0x8,
1763 PA_SU_POINT_SIZE__HEIGHT_shift
, PA_SU_POINT_SIZE__HEIGHT_mask
);
1764 SETfield(evergreen
->PA_SU_POINT_SIZE
.u32All
, 0x8,
1765 PA_SU_POINT_SIZE__WIDTH_shift
, PA_SU_POINT_SIZE__WIDTH_mask
);
1766 CLEARfield(evergreen
->PA_SU_POINT_MINMAX
.u32All
, MIN_SIZE_mask
);
1767 SETfield(evergreen
->PA_SU_POINT_MINMAX
.u32All
, 0x8000, MAX_SIZE_shift
, MAX_SIZE_mask
);
1768 SETfield(evergreen
->PA_SU_LINE_CNTL
.u32All
,0x8,
1769 PA_SU_LINE_CNTL__WIDTH_shift
, PA_SU_LINE_CNTL__WIDTH_mask
);
1771 // Set up line control:
1772 evergreen
->PA_SC_LINE_CNTL
.u32All
= 0;
1773 CLEARbit(evergreen
->PA_SC_LINE_CNTL
.u32All
, EXPAND_LINE_WIDTH_bit
);
1774 SETbit(evergreen
->PA_SC_LINE_CNTL
.u32All
, LAST_PIXEL_bit
);
1776 // Set up vertex control:
1777 evergreen
->PA_SU_VTX_CNTL
.u32All
= 0;
1778 CLEARfield(evergreen
->PA_SU_VTX_CNTL
.u32All
, QUANT_MODE_mask
);
1779 SETbit(evergreen
->PA_SU_VTX_CNTL
.u32All
, PIX_CENTER_bit
);
1780 SETfield(evergreen
->PA_SU_VTX_CNTL
.u32All
, X_ROUND_TO_EVEN
,
1781 PA_SU_VTX_CNTL__ROUND_MODE_shift
, PA_SU_VTX_CNTL__ROUND_MODE_mask
);
1783 // to 1.0 = no guard band:
1784 evergreen
->PA_CL_GB_VERT_CLIP_ADJ
.u32All
= 0x3F800000; // 1.0
1785 evergreen
->PA_CL_GB_VERT_DISC_ADJ
.u32All
= 0x3F800000; // 1.0
1786 evergreen
->PA_CL_GB_HORZ_CLIP_ADJ
.u32All
= 0x3F800000; // 1.0
1787 evergreen
->PA_CL_GB_HORZ_DISC_ADJ
.u32All
= 0x3F800000; // 1.0
1789 // Diable color compares:
1790 SETfield(evergreen
->CB_CLRCMP_CONTROL
.u32All
, CLRCMP_DRAW_ALWAYS
,
1791 CLRCMP_FCN_SRC_shift
, CLRCMP_FCN_SRC_mask
);
1792 SETfield(evergreen
->CB_CLRCMP_CONTROL
.u32All
, CLRCMP_DRAW_ALWAYS
,
1793 CLRCMP_FCN_DST_shift
, CLRCMP_FCN_DST_mask
);
1794 SETfield(evergreen
->CB_CLRCMP_CONTROL
.u32All
, CLRCMP_SEL_SRC
,
1795 CLRCMP_FCN_SEL_shift
, CLRCMP_FCN_SEL_mask
);
1798 evergreen
->CB_CLRCMP_SRC
.u32All
= 0x00000000;
1800 // Put a compare color in for error checking:
1801 evergreen
->CB_CLRCMP_DST
.u32All
= 0x000000FF;
1803 // Set up color compare mask:
1804 evergreen
->CB_CLRCMP_MSK
.u32All
= 0xFFFFFFFF;
1806 // Enable all samples for multi-sample anti-aliasing:
1807 evergreen
->PA_SC_AA_MASK
.u32All
= 0xFFFFFFFF;
1809 evergreen
->PA_SC_AA_CONFIG
.u32All
= 0;
1811 SETfield(evergreen
->VGT_OUT_DEALLOC_CNTL
.u32All
, 16,
1812 DEALLOC_DIST_shift
, DEALLOC_DIST_mask
);
1813 SETfield(evergreen
->VGT_VERTEX_REUSE_BLOCK_CNTL
.u32All
, 14,
1814 VTX_REUSE_DEPTH_shift
, VTX_REUSE_DEPTH_mask
);
1816 evergreen
->SX_MISC
.u32All
= 0;
1818 SETfield(evergreen
->render_target
[id
].CB_COLOR0_INFO
.u32All
, 1,
1819 EG_CB_COLOR0_INFO__SOURCE_FORMAT_shift
, EG_CB_COLOR0_INFO__SOURCE_FORMAT_mask
);
1820 SETbit(evergreen
->render_target
[id
].CB_COLOR0_INFO
.u32All
, EG_CB_COLOR0_INFO__BLEND_CLAMP_bit
);
1821 SETfield(evergreen
->render_target
[id
].CB_COLOR0_INFO
.u32All
, 0,
1822 EG_CB_COLOR0_INFO__NUMBER_TYPE_shift
, EG_CB_COLOR0_INFO__NUMBER_TYPE_mask
);
1824 SETfield(evergreen
->render_target
[id
].CB_COLOR0_INFO
.u32All
, SWAP_STD
,
1825 EG_CB_COLOR0_INFO__COMP_SWAP_shift
, EG_CB_COLOR0_INFO__COMP_SWAP_mask
);
1827 evergreen
->render_target
[id
].CB_COLOR0_VIEW
.u32All
= 0;
1828 evergreen
->render_target
[id
].CB_COLOR0_CMASK
.u32All
= 0;
1829 evergreen
->render_target
[id
].CB_COLOR0_FMASK
.u32All
= 0;
1830 evergreen
->render_target
[id
].CB_COLOR0_FMASK_SLICE
.u32All
= 0;
1832 evergreenInitSQConfig(ctx
);
1834 context
->radeon
.hw
.all_dirty
= GL_TRUE
;
1837 void evergreenInitStateFuncs(radeonContextPtr radeon
, struct dd_function_table
*functions
)
1839 functions
->UpdateState
= evergreenInvalidateState
;
1840 functions
->AlphaFunc
= evergreenAlphaFunc
;
1841 functions
->BlendColor
= evergreenBlendColor
;
1842 functions
->BlendEquationSeparate
= evergreenBlendEquationSeparate
;
1843 functions
->BlendFuncSeparate
= evergreenBlendFuncSeparate
;
1844 functions
->Enable
= evergreenEnable
;
1845 functions
->ColorMask
= evergreenColorMask
;
1846 functions
->DepthFunc
= evergreenDepthFunc
;
1847 functions
->DepthMask
= evergreenDepthMask
;
1848 functions
->CullFace
= evergreenCullFace
;
1849 functions
->Fogfv
= evergreenFogfv
;
1850 functions
->FrontFace
= evergreenFrontFace
;
1851 functions
->ShadeModel
= evergreenShadeModel
;
1852 functions
->LogicOpcode
= evergreenLogicOpcode
;
1854 /* ARB_point_parameters */
1855 functions
->PointParameterfv
= evergreenPointParameter
;
1857 /* Stencil related */
1858 functions
->StencilFuncSeparate
= evergreenStencilFuncSeparate
;
1859 functions
->StencilMaskSeparate
= evergreenStencilMaskSeparate
;
1860 functions
->StencilOpSeparate
= evergreenStencilOpSeparate
;
1862 /* Viewport related */
1863 functions
->Viewport
= evergreenViewport
;
1864 functions
->DepthRange
= evergreenDepthRange
;
1865 functions
->PointSize
= evergreenPointSize
;
1866 functions
->LineWidth
= evergreenLineWidth
;
1867 functions
->LineStipple
= evergreenLineStipple
;
1869 functions
->PolygonOffset
= evergreenPolygonOffset
;
1870 functions
->PolygonMode
= evergreenPolygonMode
;
1872 functions
->RenderMode
= evergreenRenderMode
;
1874 functions
->ClipPlane
= evergreenClipPlane
;
1876 functions
->Scissor
= radeonScissor
;
1878 functions
->DrawBuffer
= radeonDrawBuffer
;
1879 functions
->ReadBuffer
= radeonReadBuffer
;
1881 if (radeon
->radeonScreen
->kernel_mm
) {
1882 functions
->CopyPixels
= _mesa_meta_CopyPixels
;
1883 functions
->DrawPixels
= _mesa_meta_DrawPixels
;
1884 functions
->ReadPixels
= radeonReadPixels
;