src/mesa/drivers/dri/r600/r600_context.c

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /**
  31  * \file
  32  *
  33  * \author Keith Whitwell <keith@tungstengraphics.com>
  34  *
  35  * \author Nicolai Haehnle <prefect_@gmx.net>
  36  */
  37
  38 #include "main/glheader.h"
  39 #include "main/api_arrayelt.h"
  40 #include "main/context.h"
  41 #include "main/simple_list.h"
  42 #include "main/imports.h"
  43 #include "main/extensions.h"
  44 #include "main/bufferobj.h"
  45 #include "main/texobj.h"
  46 #include "main/points.h"
  47
  48 #include "swrast/swrast.h"
  49 #include "swrast_setup/swrast_setup.h"
  50 #include "vbo/vbo.h"
  51
  52 #include "tnl/tnl.h"
  53 #include "tnl/t_pipeline.h"
  54
  55 #include "drivers/common/driverfuncs.h"
  56
  57 #include "radeon_debug.h"
  58 #include "r600_context.h"
  59 #include "radeon_common_context.h"
  60 #include "radeon_buffer_objects.h"
  61 #include "radeon_span.h"
  62 #include "r600_cmdbuf.h"
  63 #include "radeon_bocs_wrapper.h"
  64 #include "radeon_queryobj.h"
  65 #include "r600_blit.h"
  66
  67 #include "r700_state.h"
  68 #include "r700_ioctl.h"
  69
  70 #include "evergreen_context.h"
  71 #include "evergreen_state.h"
  72 #include "evergreen_tex.h"
  73 #include "evergreen_ioctl.h"
  74 #include "evergreen_oglprog.h"
  75
  76 #include "utils.h"
  77
  78 #define R600_ENABLE_GLSL_TEST 1
  79
  80 #define need_GL_VERSION_2_0
  81 #define need_GL_VERSION_2_1
  82 #define need_GL_ARB_draw_elements_base_vertex
  83 #define need_GL_ARB_occlusion_query
  84 #define need_GL_ARB_point_parameters
  85 #define need_GL_ARB_vertex_program
  86 #define need_GL_EXT_blend_equation_separate
  87 #define need_GL_EXT_blend_func_separate
  88 #define need_GL_EXT_blend_minmax
  89 #define need_GL_EXT_framebuffer_object
  90 #define need_GL_EXT_fog_coord
  91 #define need_GL_EXT_gpu_program_parameters
  92 #define need_GL_EXT_provoking_vertex
  93 #define need_GL_EXT_secondary_color
  94 #define need_GL_EXT_stencil_two_side
  95 #define need_GL_ATI_separate_stencil
  96 #define need_GL_NV_vertex_program
  97
  98 #include "main/remap_helper.h"
  99
 100 static const struct dri_extension card_extensions[] = {
 101   /* *INDENT-OFF* */
 102   {"GL_ARB_depth_clamp",                NULL},
 103   {"GL_ARB_depth_texture",              NULL},
 104   {"GL_ARB_fragment_program",           NULL},
 105   {"GL_ARB_fragment_program_shadow",    NULL},
 106   {"GL_ARB_occlusion_query",            GL_ARB_occlusion_query_functions},
 107   {"GL_ARB_multitexture",               NULL},
 108   {"GL_ARB_point_parameters",           GL_ARB_point_parameters_functions},
 109   {"GL_ARB_shadow",                     NULL},
 110   {"GL_ARB_shadow_ambient",             NULL},
 111   {"GL_ARB_texture_border_clamp",       NULL},
 112   {"GL_ARB_texture_cube_map",           NULL},
 113   {"GL_ARB_texture_env_add",            NULL},
 114   {"GL_ARB_texture_env_combine",        NULL},
 115   {"GL_ARB_texture_env_crossbar",       NULL},
 116   {"GL_ARB_texture_env_dot3",           NULL},
 117   {"GL_ARB_texture_mirrored_repeat",    NULL},
 118   {"GL_ARB_texture_non_power_of_two",   NULL},
 119   {"GL_ARB_vertex_program",             GL_ARB_vertex_program_functions},
 120   {"GL_EXT_blend_equation_separate",    GL_EXT_blend_equation_separate_functions},
 121   {"GL_EXT_blend_func_separate",        GL_EXT_blend_func_separate_functions},
 122   {"GL_EXT_blend_minmax",               GL_EXT_blend_minmax_functions},
 123   {"GL_EXT_blend_subtract",             NULL},
 124   {"GL_EXT_packed_depth_stencil",       NULL},
 125   {"GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
 126   {"GL_EXT_gpu_program_parameters",     GL_EXT_gpu_program_parameters_functions},
 127   {"GL_EXT_provoking_vertex",           GL_EXT_provoking_vertex_functions },
 128   {"GL_EXT_secondary_color",            GL_EXT_secondary_color_functions},
 129   {"GL_EXT_shadow_funcs",               NULL},
 130   {"GL_EXT_stencil_two_side",           GL_EXT_stencil_two_side_functions},
 131   {"GL_EXT_stencil_wrap",               NULL},
 132   {"GL_EXT_texture_edge_clamp",         NULL},
 133   {"GL_EXT_texture_env_combine",        NULL},
 134   {"GL_EXT_texture_env_dot3",           NULL},
 135   {"GL_EXT_texture_filter_anisotropic", NULL},
 136   {"GL_EXT_texture_lod_bias",           NULL},
 137   {"GL_EXT_texture_mirror_clamp",       NULL},
 138   {"GL_EXT_texture_rectangle",          NULL},
 139   {"GL_EXT_vertex_array_bgra",          NULL},
 140   {"GL_EXT_texture_sRGB",               NULL},
 141   {"GL_ATI_separate_stencil",           GL_ATI_separate_stencil_functions},
 142   {"GL_ATI_texture_env_combine3",       NULL},
 143   {"GL_ATI_texture_mirror_once",        NULL},
 144   {"GL_MESA_pack_invert",               NULL},
 145   {"GL_MESA_ycbcr_texture",             NULL},
 146   {"GL_MESAX_texture_float",            NULL},
 147   {"GL_NV_blend_square",                NULL},
 148   {"GL_NV_vertex_program",              GL_NV_vertex_program_functions},
 149   {"GL_SGIS_generate_mipmap",           NULL},
 150   {"GL_ARB_pixel_buffer_object",        NULL},
 151   {"GL_ARB_draw_elements_base_vertex",  GL_ARB_draw_elements_base_vertex_functions },
 152   {NULL,                                NULL}
 153   /* *INDENT-ON* */
 154 };
 155
 156
 157 static const struct dri_extension mm_extensions[] = {
 158   { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
 159   { NULL, NULL }
 160 };
 161
 162 /**
 163  * The GL 2.0 functions are needed to make display lists work with
 164  * functions added by GL_ATI_separate_stencil.
 165  */
 166 static const struct dri_extension gl_20_extension[] = {
 167 #ifdef R600_ENABLE_GLSL_TEST
 168     {"GL_ARB_shading_language_100",                     GL_VERSION_2_0_functions },
 169     {"GL_ARB_shading_language_120",                     GL_VERSION_2_1_functions },
 170 #else
 171   {"GL_VERSION_2_0",                    GL_VERSION_2_0_functions },
 172 #endif /* R600_ENABLE_GLSL_TEST */
 173   {NULL, NULL}
 174 };
 175
 176 static const struct tnl_pipeline_stage *r600_pipeline[] = {
 177         /* Catch any t&l fallbacks
 178          */
 179         &_tnl_vertex_transform_stage,
 180         &_tnl_normal_transform_stage,
 181         &_tnl_lighting_stage,
 182         &_tnl_fog_coordinate_stage,
 183         &_tnl_texgen_stage,
 184         &_tnl_texture_transform_stage,
 185         &_tnl_point_attenuation_stage,
 186         &_tnl_vertex_program_stage,
 187         &_tnl_render_stage,
 188         0,
 189 };
 190
 191 static void r600_get_lock(radeonContextPtr rmesa)
 192 {
 193         drm_radeon_sarea_t *sarea = rmesa->sarea;
 194
 195         if (sarea->ctx_owner != rmesa->dri.hwContext) {
 196                 sarea->ctx_owner = rmesa->dri.hwContext;
 197                 if (!rmesa->radeonScreen->kernel_mm)
 198                         radeon_bo_legacy_texture_age(rmesa->radeonScreen->bom);
 199         }
 200 }
 201
 202 static void r600_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
 203 {
 204     /* please flush pipe do all pending work */
 205     /* to be enabled */
 206 }
 207
 208 static void r600_vtbl_pre_emit_atoms(radeonContextPtr radeon)
 209 {
 210         r700Start3D((context_t *)radeon);
 211 }
 212
 213 static void r600_fallback(GLcontext *ctx, GLuint bit, GLboolean mode)
 214 {
 215         context_t *context = R700_CONTEXT(ctx);
 216         if (mode)
 217                 context->radeon.Fallback |= bit;
 218         else
 219                 context->radeon.Fallback &= ~bit;
 220 }
 221
 222 static void r600_emit_query_finish(radeonContextPtr radeon)
 223 {
 224         context_t *context = (context_t*) radeon;
 225         BATCH_LOCALS(&context->radeon);
 226
 227         struct radeon_query_object *query = radeon->query.current;
 228
 229         BEGIN_BATCH_NO_AUTOSTATE(4 + 2);
 230         R600_OUT_BATCH(CP_PACKET3(R600_IT_EVENT_WRITE, 2));
 231         R600_OUT_BATCH(R600_EVENT_TYPE(ZPASS_DONE) | R600_EVENT_INDEX(1));
 232         R600_OUT_BATCH(query->curr_offset + 8); /* hw writes qwords */
 233         R600_OUT_BATCH(0x00000000);
 234         R600_OUT_BATCH_RELOC(VGT_EVENT_INITIATOR, query->bo, 0, 0, RADEON_GEM_DOMAIN_GTT, 0);
 235         END_BATCH();
 236         assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
 237         query->emitted_begin = GL_FALSE;
 238 }
 239
 240 static void r600_init_vtbl(radeonContextPtr radeon)
 241 {
 242         radeon->vtbl.get_lock = r600_get_lock;
 243         radeon->vtbl.update_viewport_offset = r700UpdateViewportOffset;
 244         radeon->vtbl.emit_cs_header = r600_vtbl_emit_cs_header;
 245         radeon->vtbl.swtcl_flush = NULL;
 246         radeon->vtbl.pre_emit_atoms = r600_vtbl_pre_emit_atoms;
 247         radeon->vtbl.fallback = r600_fallback;
 248         radeon->vtbl.emit_query_finish = r600_emit_query_finish;
 249         radeon->vtbl.check_blit = r600_check_blit;
 250         radeon->vtbl.blit = r600_blit;
 251         radeon->vtbl.is_format_renderable = r600IsFormatRenderable;
 252 }
 253
 254 static void r600InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
 255 {
 256     context_t         *context = R700_CONTEXT(ctx);
 257     R700_CHIP_CONTEXT *r700    = (R700_CHIP_CONTEXT*)(&context->hw);
 258
 259     if(  (context->radeon.radeonScreen->chip_family >= CHIP_FAMILY_CEDAR)
 260        &&(context->radeon.radeonScreen->chip_family <= CHIP_FAMILY_HEMLOCK) )
 261     {
 262         r700->bShaderUseMemConstant = GL_TRUE;
 263     }
 264     else
 265     {
 266         r700->bShaderUseMemConstant = GL_FALSE;
 267     }
 268
 269         ctx->Const.MaxTextureImageUnits = 16;
 270         /* 8 per clause on r6xx, 16 on r7xx
 271          * but I think mesa only supports 8 at the moment
 272          */
 273         ctx->Const.MaxTextureCoordUnits = 8;
 274         ctx->Const.MaxTextureUnits =
 275             MIN2(ctx->Const.MaxTextureImageUnits,
 276                  ctx->Const.MaxTextureCoordUnits);
 277         ctx->Const.MaxCombinedTextureImageUnits =
 278                 ctx->Const.MaxVertexTextureImageUnits +
 279                 ctx->Const.MaxTextureImageUnits;
 280
 281         ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 282         ctx->Const.MaxTextureLodBias = 16.0;
 283
 284         ctx->Const.MaxTextureLevels = 13; /* hw support 14 */
 285         ctx->Const.MaxTextureRectSize = 4096; /* hw support 8192 */
 286
 287         ctx->Const.MinPointSize   = 0x0001 / 8.0;
 288         ctx->Const.MinPointSizeAA = 0x0001 / 8.0;
 289         ctx->Const.MaxPointSize   = 0xffff / 8.0;
 290         ctx->Const.MaxPointSizeAA = 0xffff / 8.0;
 291
 292         ctx->Const.MinLineWidth   = 0x0001 / 8.0;
 293         ctx->Const.MinLineWidthAA = 0x0001 / 8.0;
 294         ctx->Const.MaxLineWidth   = 0xffff / 8.0;
 295         ctx->Const.MaxLineWidthAA = 0xffff / 8.0;
 296
 297         ctx->Const.MaxDrawBuffers = 1; /* hw supports 8 */
 298         ctx->Const.MaxColorAttachments = 1;
 299         ctx->Const.MaxRenderbufferSize = 4096;
 300
 301         /* 256 for reg-based consts, inline consts also supported */
 302         ctx->Const.VertexProgram.MaxInstructions = 8192; /* in theory no limit */
 303         ctx->Const.VertexProgram.MaxNativeInstructions = 8192;
 304         ctx->Const.VertexProgram.MaxNativeAttribs = 160;
 305         ctx->Const.VertexProgram.MaxTemps = 128;
 306         ctx->Const.VertexProgram.MaxNativeTemps = 128;
 307         ctx->Const.VertexProgram.MaxNativeParameters = 256;
 308         ctx->Const.VertexProgram.MaxNativeAddressRegs = 1; /* ??? */
 309
 310         ctx->Const.FragmentProgram.MaxNativeTemps = 128;
 311         ctx->Const.FragmentProgram.MaxNativeAttribs = 32;
 312         ctx->Const.FragmentProgram.MaxNativeParameters = 256;
 313         ctx->Const.FragmentProgram.MaxNativeAluInstructions = 8192;
 314         /* 8 per clause on r6xx, 16 on r7xx */
 315         if (screen->chip_family >= CHIP_FAMILY_RV770)
 316                 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 16;
 317         else
 318                 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 8;
 319         ctx->Const.FragmentProgram.MaxNativeInstructions = 8192;
 320         ctx->Const.FragmentProgram.MaxNativeTexIndirections = 8; /* ??? */
 321         ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;    /* and these are?? */
 322 }
 323
 324 static void r600ParseOptions(context_t *r600, radeonScreenPtr screen)
 325 {
 326         /* Parse configuration files.
 327          * Do this here so that initialMaxAnisotropy is set before we create
 328          * the default textures.
 329          */
 330         driParseConfigFiles(&r600->radeon.optionCache, &screen->optionCache,
 331                             screen->driScreen->myNum, "r600");
 332
 333         r600->radeon.initialMaxAnisotropy = driQueryOptionf(&r600->radeon.optionCache,
 334                                                             "def_max_anisotropy");
 335
 336 }
 337
 338 static void r600InitGLExtensions(GLcontext *ctx)
 339 {
 340         context_t *r600 = R700_CONTEXT(ctx);
 341 #ifdef R600_ENABLE_GLSL_TEST
 342         unsigned i;
 343 #endif
 344
 345         driInitExtensions(ctx, card_extensions, GL_TRUE);
 346         if (r600->radeon.radeonScreen->kernel_mm)
 347           driInitExtensions(ctx, mm_extensions, GL_FALSE);
 348
 349 #ifdef R600_ENABLE_GLSL_TEST
 350     driInitExtensions(ctx, gl_20_extension, GL_TRUE);
 351     _mesa_enable_2_0_extensions(ctx);
 352
 353         /* glsl compiler has problem if this is not GL_TRUE */
 354         for (i = 0; i <= MESA_SHADER_FRAGMENT; i++)
 355                 ctx->ShaderCompilerOptions[i].EmitCondCodes = GL_TRUE;
 356 #endif /* R600_ENABLE_GLSL_TEST */
 357
 358         if (driQueryOptionb
 359             (&r600->radeon.optionCache, "disable_stencil_two_side"))
 360                 _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
 361
 362         if (r600->radeon.glCtx->Mesa_DXTn
 363             && !driQueryOptionb(&r600->radeon.optionCache, "disable_s3tc")) {
 364                 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
 365                 _mesa_enable_extension(ctx, "GL_S3_s3tc");
 366         } else
 367             if (driQueryOptionb(&r600->radeon.optionCache, "force_s3tc_enable"))
 368         {
 369                 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
 370         }
 371
 372         /* RV740 had a broken pipe config prior to drm 1.32 */
 373         if (!r600->radeon.radeonScreen->kernel_mm) {
 374                 if ((r600->radeon.dri.drmMinor < 32) &&
 375                     (r600->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV740))
 376                         _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
 377         }
 378 }
 379
 380 /* Create the device specific rendering context.
 381  */
 382 GLboolean r600CreateContext(gl_api api,
 383                             const __GLcontextModes * glVisual,
 384                             __DRIcontext * driContextPriv,
 385                             void *sharedContextPrivate)
 386 {
 387         __DRIscreen *sPriv = driContextPriv->driScreenPriv;
 388         radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
 389         struct dd_function_table functions;
 390         context_t *r600;
 391         GLcontext *ctx;
 392
 393         assert(glVisual);
 394         assert(driContextPriv);
 395         assert(screen);
 396
 397         /* Allocate the R600 context */
 398         r600 = (context_t*) CALLOC(sizeof(*r600));
 399         if (!r600) {
 400                 radeon_error("Failed to allocate memory for context.\n");
 401                 return GL_FALSE;
 402         }
 403
 404         r600ParseOptions(r600, screen);
 405
 406         r600->radeon.radeonScreen = screen;
 407
 408     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 409     {
 410             evergreen_init_vtbl(&r600->radeon);
 411     }
 412     else
 413     {
 414         r600_init_vtbl(&r600->radeon);
 415     }
 416
 417         /* Init default driver functions then plug in our R600-specific functions
 418          * (the texture functions are especially important)
 419          */
 420         _mesa_init_driver_functions(&functions);
 421
 422     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 423     {
 424         evergreenCreateChip(r600);
 425         evergreenInitStateFuncs(&r600->radeon, &functions);
 426             evergreenInitTextureFuncs(&r600->radeon, &functions);
 427             evergreenInitShaderFuncs(&functions);
 428     }
 429     else
 430     {
 431             r700InitStateFuncs(&r600->radeon, &functions);
 432             r600InitTextureFuncs(&r600->radeon, &functions);
 433             r700InitShaderFuncs(&functions);
 434     }
 435
 436         radeonInitQueryObjFunctions(&functions);
 437
 438     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 439     {
 440         evergreenInitIoctlFuncs(&functions);
 441     }
 442     else
 443     {
 444             r700InitIoctlFuncs(&functions);
 445     }
 446         radeonInitBufferObjectFuncs(&functions);
 447
 448         if (!radeonInitContext(&r600->radeon, &functions,
 449                                glVisual, driContextPriv,
 450                                sharedContextPrivate)) {
 451                 radeon_error("Initializing context failed.\n");
 452                 FREE(r600);
 453                 return GL_FALSE;
 454         }
 455
 456         ctx = r600->radeon.glCtx;
 457
 458         ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
 459         ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
 460
 461         r600InitConstValues(ctx, screen);
 462
 463         /* reinit, it depends on consts above */
 464         _mesa_init_point(ctx);
 465
 466         _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
 467
 468         /* Initialize the software rasterizer and helper modules.
 469          */
 470         _swrast_CreateContext(ctx);
 471         _vbo_CreateContext(ctx);
 472         _tnl_CreateContext(ctx);
 473         _swsetup_CreateContext(ctx);
 474         _swsetup_Wakeup(ctx);
 475
 476         /* Install the customized pipeline:
 477          */
 478         _tnl_destroy_pipeline(ctx);
 479         _tnl_install_pipeline(ctx, r600_pipeline);
 480         TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
 481
 482         /* Configure swrast and TNL to match hardware characteristics:
 483          */
 484         _swrast_allow_pixel_fog(ctx, GL_FALSE);
 485         _swrast_allow_vertex_fog(ctx, GL_TRUE);
 486         _tnl_allow_pixel_fog(ctx, GL_FALSE);
 487         _tnl_allow_vertex_fog(ctx, GL_TRUE);
 488
 489         radeon_init_debug();
 490
 491     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 492     {
 493         evergreenInitDraw(ctx);
 494     }
 495     else
 496     {
 497             r700InitDraw(ctx);
 498     }
 499
 500         radeon_fbo_init(&r600->radeon);
 501         radeonInitSpanFuncs( ctx );
 502         r600InitCmdBuf(r600);
 503
 504     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 505     {
 506         evergreenInitState(r600->radeon.glCtx);
 507     }
 508     else
 509     {
 510             r700InitState(r600->radeon.glCtx);
 511     }
 512
 513         r600InitGLExtensions(ctx);
 514
 515         return GL_TRUE;
 516 }
 517
 518 void r600DestroyContext(__DRIcontext *driContextPriv )
 519 {
 520     void      *pChip;
 521     context_t *context = (context_t *) driContextPriv->driverPrivate;
 522
 523     assert(context);
 524
 525     pChip = context->pChip;
 526
 527     /* destroy context first, free pChip, in case there are things flush to asic. */
 528     radeonDestroyContext(driContextPriv);
 529
 530     FREE(pChip);
 531 }
 532
 533