src/mesa/drivers/dri/r600/r600_context.c

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /**
  31  * \file
  32  *
  33  * \author Keith Whitwell <keith@tungstengraphics.com>
  34  *
  35  * \author Nicolai Haehnle <prefect_@gmx.net>
  36  */
  37
  38 #include <stdbool.h>
  39 #include "main/glheader.h"
  40 #include "main/api_arrayelt.h"
  41 #include "main/context.h"
  42 #include "main/simple_list.h"
  43 #include "main/imports.h"
  44 #include "main/extensions.h"
  45 #include "main/bufferobj.h"
  46 #include "main/texobj.h"
  47 #include "main/points.h"
  48 #include "main/mfeatures.h"
  49
  50 #include "swrast/swrast.h"
  51 #include "swrast_setup/swrast_setup.h"
  52 #include "vbo/vbo.h"
  53
  54 #include "tnl/tnl.h"
  55 #include "tnl/t_pipeline.h"
  56
  57 #include "drivers/common/driverfuncs.h"
  58
  59 #include "radeon_debug.h"
  60 #include "r600_context.h"
  61 #include "radeon_common_context.h"
  62 #include "radeon_buffer_objects.h"
  63 #include "radeon_span.h"
  64 #include "r600_cmdbuf.h"
  65 #include "radeon_bocs_wrapper.h"
  66 #include "radeon_queryobj.h"
  67 #include "r600_blit.h"
  68
  69 #include "r700_state.h"
  70 #include "r700_ioctl.h"
  71
  72 #include "evergreen_context.h"
  73 #include "evergreen_state.h"
  74 #include "evergreen_tex.h"
  75 #include "evergreen_ioctl.h"
  76 #include "evergreen_oglprog.h"
  77
  78 #include "utils.h"
  79
  80 #define R600_ENABLE_GLSL_TEST 1
  81
  82 static const struct tnl_pipeline_stage *r600_pipeline[] = {
  83         /* Catch any t&l fallbacks
  84          */
  85         &_tnl_vertex_transform_stage,
  86         &_tnl_normal_transform_stage,
  87         &_tnl_lighting_stage,
  88         &_tnl_fog_coordinate_stage,
  89         &_tnl_texgen_stage,
  90         &_tnl_texture_transform_stage,
  91         &_tnl_point_attenuation_stage,
  92         &_tnl_vertex_program_stage,
  93         &_tnl_render_stage,
  94         0,
  95 };
  96
  97 static void r600_get_lock(radeonContextPtr rmesa)
  98 {
  99         drm_radeon_sarea_t *sarea = rmesa->sarea;
 100
 101         if (sarea->ctx_owner != rmesa->dri.hwContext) {
 102                 sarea->ctx_owner = rmesa->dri.hwContext;
 103                 if (!rmesa->radeonScreen->kernel_mm)
 104                         radeon_bo_legacy_texture_age(rmesa->radeonScreen->bom);
 105         }
 106 }
 107
 108 static void r600_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
 109 {
 110     /* please flush pipe do all pending work */
 111     /* to be enabled */
 112 }
 113
 114 static void r600_vtbl_pre_emit_atoms(radeonContextPtr radeon)
 115 {
 116         r700Start3D((context_t *)radeon);
 117 }
 118
 119 static void r600_fallback(struct gl_context *ctx, GLuint bit, GLboolean mode)
 120 {
 121         context_t *context = R700_CONTEXT(ctx);
 122         if (mode)
 123                 context->radeon.Fallback |= bit;
 124         else
 125                 context->radeon.Fallback &= ~bit;
 126 }
 127
 128 static void r600_emit_query_finish(radeonContextPtr radeon)
 129 {
 130         context_t *context = (context_t*) radeon;
 131         BATCH_LOCALS(&context->radeon);
 132
 133         struct radeon_query_object *query = radeon->query.current;
 134
 135         BEGIN_BATCH_NO_AUTOSTATE(4 + 2);
 136         R600_OUT_BATCH(CP_PACKET3(R600_IT_EVENT_WRITE, 2));
 137         R600_OUT_BATCH(R600_EVENT_TYPE(ZPASS_DONE) | R600_EVENT_INDEX(1));
 138         R600_OUT_BATCH(query->curr_offset + 8); /* hw writes qwords */
 139         R600_OUT_BATCH(0x00000000);
 140         R600_OUT_BATCH_RELOC(VGT_EVENT_INITIATOR, query->bo, 0, 0, RADEON_GEM_DOMAIN_GTT, 0);
 141         END_BATCH();
 142         assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
 143         query->emitted_begin = GL_FALSE;
 144 }
 145
 146 static void r600_init_vtbl(radeonContextPtr radeon)
 147 {
 148         radeon->vtbl.get_lock = r600_get_lock;
 149         radeon->vtbl.update_viewport_offset = r700UpdateViewportOffset;
 150         radeon->vtbl.emit_cs_header = r600_vtbl_emit_cs_header;
 151         radeon->vtbl.swtcl_flush = NULL;
 152         radeon->vtbl.pre_emit_atoms = r600_vtbl_pre_emit_atoms;
 153         radeon->vtbl.fallback = r600_fallback;
 154         radeon->vtbl.emit_query_finish = r600_emit_query_finish;
 155         radeon->vtbl.check_blit = r600_check_blit;
 156         radeon->vtbl.blit = r600_blit;
 157         radeon->vtbl.is_format_renderable = r600IsFormatRenderable;
 158 }
 159
 160 static void r600InitConstValues(struct gl_context *ctx, radeonScreenPtr screen)
 161 {
 162     context_t         *context = R700_CONTEXT(ctx);
 163     R700_CHIP_CONTEXT *r700    = (R700_CHIP_CONTEXT*)(&context->hw);
 164
 165     if(  (context->radeon.radeonScreen->chip_family >= CHIP_FAMILY_CEDAR)
 166        &&(context->radeon.radeonScreen->chip_family <= CHIP_FAMILY_CAICOS) )
 167     {
 168         r700->bShaderUseMemConstant = GL_TRUE;
 169     }
 170     else
 171     {
 172         r700->bShaderUseMemConstant = GL_FALSE;
 173     }
 174
 175         ctx->Const.GLSLVersion = 120;
 176         _mesa_override_glsl_version(ctx);
 177
 178         ctx->Const.MaxTextureImageUnits = 16;
 179         /* 8 per clause on r6xx, 16 on r7xx
 180          * but I think mesa only supports 8 at the moment
 181          */
 182         ctx->Const.MaxTextureCoordUnits = 8;
 183         ctx->Const.MaxTextureUnits =
 184             MIN2(ctx->Const.MaxTextureImageUnits,
 185                  ctx->Const.MaxTextureCoordUnits);
 186         ctx->Const.MaxCombinedTextureImageUnits =
 187                 ctx->Const.MaxVertexTextureImageUnits +
 188                 ctx->Const.MaxTextureImageUnits;
 189
 190         ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 191         ctx->Const.MaxTextureLodBias = 16.0;
 192
 193         if (screen->chip_family >= CHIP_FAMILY_CEDAR) {
 194                 ctx->Const.MaxTextureLevels = 15;
 195                 ctx->Const.MaxTextureRectSize = 16384;
 196         } else {
 197                 ctx->Const.MaxTextureLevels = 14;
 198                 ctx->Const.MaxTextureRectSize = 8192;
 199         }
 200
 201         ctx->Const.MinPointSize   = 0x0001 / 8.0;
 202         ctx->Const.MinPointSizeAA = 0x0001 / 8.0;
 203         ctx->Const.MaxPointSize   = 0xffff / 8.0;
 204         ctx->Const.MaxPointSizeAA = 0xffff / 8.0;
 205
 206         ctx->Const.MinLineWidth   = 0x0001 / 8.0;
 207         ctx->Const.MinLineWidthAA = 0x0001 / 8.0;
 208         ctx->Const.MaxLineWidth   = 0xffff / 8.0;
 209         ctx->Const.MaxLineWidthAA = 0xffff / 8.0;
 210
 211         ctx->Const.MaxDrawBuffers = 1; /* hw supports 8 */
 212         ctx->Const.MaxColorAttachments = 1;
 213         ctx->Const.MaxRenderbufferSize = 4096;
 214
 215         /* 256 for reg-based consts, inline consts also supported */
 216         ctx->Const.VertexProgram.MaxInstructions = 8192; /* in theory no limit */
 217         ctx->Const.VertexProgram.MaxNativeInstructions = 8192;
 218         ctx->Const.VertexProgram.MaxNativeAttribs = 160;
 219         ctx->Const.VertexProgram.MaxTemps = 128;
 220         ctx->Const.VertexProgram.MaxNativeTemps = 128;
 221         ctx->Const.VertexProgram.MaxNativeParameters = 256;
 222         ctx->Const.VertexProgram.MaxNativeAddressRegs = 1; /* ??? */
 223
 224         ctx->Const.FragmentProgram.MaxNativeTemps = 128;
 225         ctx->Const.FragmentProgram.MaxNativeAttribs = 32;
 226         ctx->Const.FragmentProgram.MaxNativeParameters = 256;
 227         ctx->Const.FragmentProgram.MaxNativeAluInstructions = 8192;
 228         /* 8 per clause on r6xx, 16 on r7xx */
 229         if (screen->chip_family >= CHIP_FAMILY_RV770)
 230                 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 16;
 231         else
 232                 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 8;
 233         ctx->Const.FragmentProgram.MaxNativeInstructions = 8192;
 234         ctx->Const.FragmentProgram.MaxNativeTexIndirections = 8; /* ??? */
 235         ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;    /* and these are?? */
 236 }
 237
 238 static void r600ParseOptions(context_t *r600, radeonScreenPtr screen)
 239 {
 240         /* Parse configuration files.
 241          * Do this here so that initialMaxAnisotropy is set before we create
 242          * the default textures.
 243          */
 244         driParseConfigFiles(&r600->radeon.optionCache, &screen->optionCache,
 245                             screen->driScreen->myNum, "r600");
 246
 247         r600->radeon.initialMaxAnisotropy = driQueryOptionf(&r600->radeon.optionCache,
 248                                                             "def_max_anisotropy");
 249
 250 }
 251
 252 static void r600InitGLExtensions(struct gl_context *ctx)
 253 {
 254         context_t *r600 = R700_CONTEXT(ctx);
 255 #ifdef R600_ENABLE_GLSL_TEST
 256         unsigned i;
 257 #endif
 258
 259         ctx->Extensions.ARB_depth_clamp = true;
 260         ctx->Extensions.ARB_depth_texture = true;
 261         ctx->Extensions.ARB_draw_elements_base_vertex = true;
 262         ctx->Extensions.ARB_fragment_program = true;
 263         ctx->Extensions.ARB_fragment_program_shadow = true;
 264         ctx->Extensions.ARB_occlusion_query = true;
 265         ctx->Extensions.ARB_shadow = true;
 266         ctx->Extensions.ARB_shadow_ambient = true;
 267         ctx->Extensions.ARB_texture_border_clamp = true;
 268         ctx->Extensions.ARB_texture_cube_map = true;
 269         ctx->Extensions.ARB_texture_env_combine = true;
 270         ctx->Extensions.ARB_texture_env_crossbar = true;
 271         ctx->Extensions.ARB_texture_env_dot3 = true;
 272         ctx->Extensions.ARB_texture_mirrored_repeat = true;
 273         ctx->Extensions.ARB_texture_non_power_of_two = true;
 274         ctx->Extensions.ARB_vertex_program = true;
 275         ctx->Extensions.EXT_blend_color = true;
 276         ctx->Extensions.EXT_blend_equation_separate = true;
 277         ctx->Extensions.EXT_blend_func_separate = true;
 278         ctx->Extensions.EXT_blend_minmax = true;
 279         ctx->Extensions.EXT_packed_depth_stencil = true;
 280         ctx->Extensions.EXT_fog_coord = true;
 281         ctx->Extensions.EXT_gpu_program_parameters = true;
 282         ctx->Extensions.EXT_pixel_buffer_object = true;
 283         ctx->Extensions.EXT_point_parameters = true;
 284         ctx->Extensions.EXT_provoking_vertex = true;
 285         ctx->Extensions.EXT_secondary_color = true;
 286         ctx->Extensions.EXT_shadow_funcs = true;
 287         ctx->Extensions.EXT_stencil_two_side = true;
 288         ctx->Extensions.EXT_texture_env_dot3 = true;
 289         ctx->Extensions.EXT_texture_filter_anisotropic = true;
 290         ctx->Extensions.EXT_texture_mirror_clamp = true;
 291         ctx->Extensions.EXT_vertex_array_bgra = true;
 292         ctx->Extensions.EXT_texture_sRGB = true;
 293         ctx->Extensions.ATI_separate_stencil = true;
 294         ctx->Extensions.ATI_texture_env_combine3 = true;
 295         ctx->Extensions.ATI_texture_mirror_once = true;
 296         ctx->Extensions.MESA_pack_invert = true;
 297         ctx->Extensions.MESA_ycbcr_texture = true;
 298         ctx->Extensions.NV_blend_square = true;
 299         ctx->Extensions.NV_texture_rectangle = true;
 300         ctx->Extensions.NV_vertex_program = true;
 301 #if FEATURE_OES_EGL_image
 302         ctx->Extensions.OES_EGL_image = true;
 303 #endif
 304
 305         if (r600->radeon.radeonScreen->kernel_mm)
 306                 ctx->Extensions.EXT_framebuffer_object = true;
 307
 308 #ifdef R600_ENABLE_GLSL_TEST
 309         ctx->Extensions.ARB_shading_language_100 = true;
 310     _mesa_enable_2_0_extensions(ctx);
 311
 312         /* glsl compiler has problem if this is not GL_TRUE */
 313         for (i = 0; i <= MESA_SHADER_FRAGMENT; i++)
 314                 ctx->ShaderCompilerOptions[i].EmitCondCodes = GL_TRUE;
 315 #endif /* R600_ENABLE_GLSL_TEST */
 316
 317         if (driQueryOptionb
 318             (&r600->radeon.optionCache, "disable_stencil_two_side"))
 319                 ctx->Extensions.EXT_stencil_two_side = false;
 320
 321         if (r600->radeon.glCtx->Mesa_DXTn
 322             && !driQueryOptionb(&r600->radeon.optionCache, "disable_s3tc")) {
 323                 ctx->Extensions.EXT_texture_compression_s3tc = true;
 324                 ctx->Extensions.S3_s3tc = true;
 325         } else
 326             if (driQueryOptionb(&r600->radeon.optionCache, "force_s3tc_enable"))
 327         {
 328                 ctx->Extensions.EXT_texture_compression_s3tc = true;
 329         }
 330
 331         /* RV740 had a broken pipe config prior to drm 1.32 */
 332         if (!r600->radeon.radeonScreen->kernel_mm) {
 333                 if ((r600->radeon.dri.drmMinor < 32) &&
 334                     (r600->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV740))
 335                         ctx->Extensions.ARB_occlusion_query = false;
 336         }
 337 }
 338
 339 /* Create the device specific rendering context.
 340  */
 341 GLboolean r600CreateContext(gl_api api,
 342                             const struct gl_config * glVisual,
 343                             __DRIcontext * driContextPriv,
 344                             void *sharedContextPrivate)
 345 {
 346         __DRIscreen *sPriv = driContextPriv->driScreenPriv;
 347         radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
 348         struct dd_function_table functions;
 349         context_t *r600;
 350         struct gl_context *ctx;
 351
 352         assert(glVisual);
 353         assert(driContextPriv);
 354         assert(screen);
 355
 356         /* Allocate the R600 context */
 357         r600 = (context_t*) CALLOC(sizeof(*r600));
 358         if (!r600) {
 359                 radeon_error("Failed to allocate memory for context.\n");
 360                 return GL_FALSE;
 361         }
 362
 363         r600ParseOptions(r600, screen);
 364
 365         r600->radeon.radeonScreen = screen;
 366
 367     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 368     {
 369             evergreen_init_vtbl(&r600->radeon);
 370     }
 371     else
 372     {
 373         r600_init_vtbl(&r600->radeon);
 374     }
 375
 376         /* Init default driver functions then plug in our R600-specific functions
 377          * (the texture functions are especially important)
 378          */
 379         _mesa_init_driver_functions(&functions);
 380
 381     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 382     {
 383         evergreenCreateChip(r600);
 384         evergreenInitStateFuncs(&r600->radeon, &functions);
 385             evergreenInitTextureFuncs(&r600->radeon, &functions);
 386             evergreenInitShaderFuncs(&functions);
 387     }
 388     else
 389     {
 390             r700InitStateFuncs(&r600->radeon, &functions);
 391             r600InitTextureFuncs(&r600->radeon, &functions);
 392             r700InitShaderFuncs(&functions);
 393     }
 394
 395         radeonInitQueryObjFunctions(&functions);
 396
 397     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 398     {
 399         evergreenInitIoctlFuncs(&functions);
 400     }
 401     else
 402     {
 403             r700InitIoctlFuncs(&functions);
 404     }
 405         radeonInitBufferObjectFuncs(&functions);
 406
 407         if (!radeonInitContext(&r600->radeon, &functions,
 408                                glVisual, driContextPriv,
 409                                sharedContextPrivate)) {
 410                 radeon_error("Initializing context failed.\n");
 411                 FREE(r600);
 412                 return GL_FALSE;
 413         }
 414
 415         ctx = r600->radeon.glCtx;
 416
 417         ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
 418         ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
 419
 420         r600InitConstValues(ctx, screen);
 421
 422         /* reinit, it depends on consts above */
 423         _mesa_init_point(ctx);
 424
 425         _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
 426
 427         /* Initialize the software rasterizer and helper modules.
 428          */
 429         _swrast_CreateContext(ctx);
 430         _vbo_CreateContext(ctx);
 431         _tnl_CreateContext(ctx);
 432         _swsetup_CreateContext(ctx);
 433         _swsetup_Wakeup(ctx);
 434
 435         /* Install the customized pipeline:
 436          */
 437         _tnl_destroy_pipeline(ctx);
 438         _tnl_install_pipeline(ctx, r600_pipeline);
 439         TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
 440
 441         /* Configure swrast and TNL to match hardware characteristics:
 442          */
 443         _swrast_allow_pixel_fog(ctx, GL_FALSE);
 444         _swrast_allow_vertex_fog(ctx, GL_TRUE);
 445         _tnl_allow_pixel_fog(ctx, GL_FALSE);
 446         _tnl_allow_vertex_fog(ctx, GL_TRUE);
 447
 448         radeon_init_debug();
 449
 450     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 451     {
 452         evergreenInitDraw(ctx);
 453     }
 454     else
 455     {
 456             r700InitDraw(ctx);
 457     }
 458
 459         radeon_fbo_init(&r600->radeon);
 460         radeonInitSpanFuncs( ctx );
 461         r600InitCmdBuf(r600);
 462
 463     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 464     {
 465         evergreenInitState(r600->radeon.glCtx);
 466     }
 467     else
 468     {
 469             r700InitState(r600->radeon.glCtx);
 470     }
 471
 472         r600InitGLExtensions(ctx);
 473
 474         return GL_TRUE;
 475 }
 476
 477 void r600DestroyContext(__DRIcontext *driContextPriv )
 478 {
 479     void      *pChip;
 480     context_t *context = (context_t *) driContextPriv->driverPrivate;
 481
 482     assert(context);
 483
 484     pChip = context->pChip;
 485
 486     /* destroy context first, free pChip, in case there are things flush to asic. */
 487     radeonDestroyContext(driContextPriv);
 488
 489     FREE(pChip);
 490 }
 491
 492