src/mesa/drivers/dri/r600/r600_context.c

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /**
  31  * \file
  32  *
  33  * \author Keith Whitwell <keith@tungstengraphics.com>
  34  *
  35  * \author Nicolai Haehnle <prefect_@gmx.net>
  36  */
  37
  38 #include "main/glheader.h"
  39 #include "main/api_arrayelt.h"
  40 #include "main/context.h"
  41 #include "main/simple_list.h"
  42 #include "main/imports.h"
  43 #include "main/extensions.h"
  44 #include "main/bufferobj.h"
  45 #include "main/texobj.h"
  46 #include "main/points.h"
  47
  48 #include "swrast/swrast.h"
  49 #include "swrast_setup/swrast_setup.h"
  50 #include "vbo/vbo.h"
  51
  52 #include "tnl/tnl.h"
  53 #include "tnl/t_pipeline.h"
  54
  55 #include "drivers/common/driverfuncs.h"
  56
  57 #include "radeon_debug.h"
  58 #include "r600_context.h"
  59 #include "radeon_common_context.h"
  60 #include "radeon_buffer_objects.h"
  61 #include "radeon_span.h"
  62 #include "r600_cmdbuf.h"
  63 #include "radeon_bocs_wrapper.h"
  64 #include "radeon_queryobj.h"
  65 #include "r600_blit.h"
  66
  67 #include "r700_state.h"
  68 #include "r700_ioctl.h"
  69
  70 #include "evergreen_context.h"
  71 #include "evergreen_state.h"
  72 #include "evergreen_tex.h"
  73 #include "evergreen_ioctl.h"
  74 #include "evergreen_oglprog.h"
  75
  76 #include "utils.h"
  77
  78 #define R600_ENABLE_GLSL_TEST 1
  79
  80 #define need_GL_VERSION_2_0
  81 #define need_GL_VERSION_2_1
  82 #define need_GL_ARB_draw_elements_base_vertex
  83 #define need_GL_ARB_occlusion_query
  84 #define need_GL_ARB_point_parameters
  85 #define need_GL_ARB_vertex_program
  86 #define need_GL_EXT_blend_equation_separate
  87 #define need_GL_EXT_blend_func_separate
  88 #define need_GL_EXT_blend_minmax
  89 #define need_GL_EXT_framebuffer_object
  90 #define need_GL_EXT_fog_coord
  91 #define need_GL_EXT_gpu_program_parameters
  92 #define need_GL_EXT_provoking_vertex
  93 #define need_GL_EXT_secondary_color
  94 #define need_GL_EXT_stencil_two_side
  95 #define need_GL_ATI_separate_stencil
  96 #define need_GL_NV_vertex_program
  97 #define need_GL_OES_EGL_image
  98
  99 #include "main/remap_helper.h"
 100
 101 static const struct dri_extension card_extensions[] = {
 102   /* *INDENT-OFF* */
 103   {"GL_ARB_depth_clamp",                NULL},
 104   {"GL_ARB_depth_texture",              NULL},
 105   {"GL_ARB_fragment_program",           NULL},
 106   {"GL_ARB_fragment_program_shadow",    NULL},
 107   {"GL_ARB_occlusion_query",            GL_ARB_occlusion_query_functions},
 108   {"GL_ARB_multitexture",               NULL},
 109   {"GL_ARB_point_parameters",           GL_ARB_point_parameters_functions},
 110   {"GL_ARB_shadow",                     NULL},
 111   {"GL_ARB_shadow_ambient",             NULL},
 112   {"GL_ARB_texture_border_clamp",       NULL},
 113   {"GL_ARB_texture_cube_map",           NULL},
 114   {"GL_ARB_texture_env_add",            NULL},
 115   {"GL_ARB_texture_env_combine",        NULL},
 116   {"GL_ARB_texture_env_crossbar",       NULL},
 117   {"GL_ARB_texture_env_dot3",           NULL},
 118   {"GL_ARB_texture_mirrored_repeat",    NULL},
 119   {"GL_ARB_texture_non_power_of_two",   NULL},
 120   {"GL_ARB_vertex_program",             GL_ARB_vertex_program_functions},
 121   {"GL_EXT_blend_equation_separate",    GL_EXT_blend_equation_separate_functions},
 122   {"GL_EXT_blend_func_separate",        GL_EXT_blend_func_separate_functions},
 123   {"GL_EXT_blend_minmax",               GL_EXT_blend_minmax_functions},
 124   {"GL_EXT_blend_subtract",             NULL},
 125   {"GL_EXT_packed_depth_stencil",       NULL},
 126   {"GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
 127   {"GL_EXT_gpu_program_parameters",     GL_EXT_gpu_program_parameters_functions},
 128   {"GL_EXT_provoking_vertex",           GL_EXT_provoking_vertex_functions },
 129   {"GL_EXT_secondary_color",            GL_EXT_secondary_color_functions},
 130   {"GL_EXT_shadow_funcs",               NULL},
 131   {"GL_EXT_stencil_two_side",           GL_EXT_stencil_two_side_functions},
 132   {"GL_EXT_stencil_wrap",               NULL},
 133   {"GL_EXT_texture_edge_clamp",         NULL},
 134   {"GL_EXT_texture_env_combine",        NULL},
 135   {"GL_EXT_texture_env_dot3",           NULL},
 136   {"GL_EXT_texture_filter_anisotropic", NULL},
 137   {"GL_EXT_texture_lod_bias",           NULL},
 138   {"GL_EXT_texture_mirror_clamp",       NULL},
 139   {"GL_EXT_texture_rectangle",          NULL},
 140   {"GL_EXT_vertex_array_bgra",          NULL},
 141   {"GL_EXT_texture_sRGB",               NULL},
 142   {"GL_ATI_separate_stencil",           GL_ATI_separate_stencil_functions},
 143   {"GL_ATI_texture_env_combine3",       NULL},
 144   {"GL_ATI_texture_mirror_once",        NULL},
 145   {"GL_MESA_pack_invert",               NULL},
 146   {"GL_MESA_ycbcr_texture",             NULL},
 147   {"GL_MESAX_texture_float",            NULL},
 148   {"GL_NV_blend_square",                NULL},
 149   {"GL_NV_vertex_program",              GL_NV_vertex_program_functions},
 150   {"GL_ARB_pixel_buffer_object",        NULL},
 151   {"GL_ARB_draw_elements_base_vertex",  GL_ARB_draw_elements_base_vertex_functions },
 152 #if FEATURE_OES_EGL_image
 153   {"GL_OES_EGL_image",                  GL_OES_EGL_image_functions},
 154 #endif
 155   {NULL,                                NULL}
 156   /* *INDENT-ON* */
 157 };
 158
 159
 160 static const struct dri_extension mm_extensions[] = {
 161   { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
 162   { NULL, NULL }
 163 };
 164
 165 /**
 166  * The GL 2.0 functions are needed to make display lists work with
 167  * functions added by GL_ATI_separate_stencil.
 168  */
 169 static const struct dri_extension gl_20_extension[] = {
 170 #ifdef R600_ENABLE_GLSL_TEST
 171     {"GL_ARB_shading_language_100",                     GL_VERSION_2_0_functions },
 172 #else
 173   {"GL_VERSION_2_0",                    GL_VERSION_2_0_functions },
 174 #endif /* R600_ENABLE_GLSL_TEST */
 175   {NULL, NULL}
 176 };
 177
 178 static const struct tnl_pipeline_stage *r600_pipeline[] = {
 179         /* Catch any t&l fallbacks
 180          */
 181         &_tnl_vertex_transform_stage,
 182         &_tnl_normal_transform_stage,
 183         &_tnl_lighting_stage,
 184         &_tnl_fog_coordinate_stage,
 185         &_tnl_texgen_stage,
 186         &_tnl_texture_transform_stage,
 187         &_tnl_point_attenuation_stage,
 188         &_tnl_vertex_program_stage,
 189         &_tnl_render_stage,
 190         0,
 191 };
 192
 193 static void r600_get_lock(radeonContextPtr rmesa)
 194 {
 195         drm_radeon_sarea_t *sarea = rmesa->sarea;
 196
 197         if (sarea->ctx_owner != rmesa->dri.hwContext) {
 198                 sarea->ctx_owner = rmesa->dri.hwContext;
 199                 if (!rmesa->radeonScreen->kernel_mm)
 200                         radeon_bo_legacy_texture_age(rmesa->radeonScreen->bom);
 201         }
 202 }
 203
 204 static void r600_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
 205 {
 206     /* please flush pipe do all pending work */
 207     /* to be enabled */
 208 }
 209
 210 static void r600_vtbl_pre_emit_atoms(radeonContextPtr radeon)
 211 {
 212         r700Start3D((context_t *)radeon);
 213 }
 214
 215 static void r600_fallback(struct gl_context *ctx, GLuint bit, GLboolean mode)
 216 {
 217         context_t *context = R700_CONTEXT(ctx);
 218         if (mode)
 219                 context->radeon.Fallback |= bit;
 220         else
 221                 context->radeon.Fallback &= ~bit;
 222 }
 223
 224 static void r600_emit_query_finish(radeonContextPtr radeon)
 225 {
 226         context_t *context = (context_t*) radeon;
 227         BATCH_LOCALS(&context->radeon);
 228
 229         struct radeon_query_object *query = radeon->query.current;
 230
 231         BEGIN_BATCH_NO_AUTOSTATE(4 + 2);
 232         R600_OUT_BATCH(CP_PACKET3(R600_IT_EVENT_WRITE, 2));
 233         R600_OUT_BATCH(R600_EVENT_TYPE(ZPASS_DONE) | R600_EVENT_INDEX(1));
 234         R600_OUT_BATCH(query->curr_offset + 8); /* hw writes qwords */
 235         R600_OUT_BATCH(0x00000000);
 236         R600_OUT_BATCH_RELOC(VGT_EVENT_INITIATOR, query->bo, 0, 0, RADEON_GEM_DOMAIN_GTT, 0);
 237         END_BATCH();
 238         assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
 239         query->emitted_begin = GL_FALSE;
 240 }
 241
 242 static void r600_init_vtbl(radeonContextPtr radeon)
 243 {
 244         radeon->vtbl.get_lock = r600_get_lock;
 245         radeon->vtbl.update_viewport_offset = r700UpdateViewportOffset;
 246         radeon->vtbl.emit_cs_header = r600_vtbl_emit_cs_header;
 247         radeon->vtbl.swtcl_flush = NULL;
 248         radeon->vtbl.pre_emit_atoms = r600_vtbl_pre_emit_atoms;
 249         radeon->vtbl.fallback = r600_fallback;
 250         radeon->vtbl.emit_query_finish = r600_emit_query_finish;
 251         radeon->vtbl.check_blit = r600_check_blit;
 252         radeon->vtbl.blit = r600_blit;
 253         radeon->vtbl.is_format_renderable = r600IsFormatRenderable;
 254 }
 255
 256 static void r600InitConstValues(struct gl_context *ctx, radeonScreenPtr screen)
 257 {
 258     context_t         *context = R700_CONTEXT(ctx);
 259     R700_CHIP_CONTEXT *r700    = (R700_CHIP_CONTEXT*)(&context->hw);
 260
 261     if(  (context->radeon.radeonScreen->chip_family >= CHIP_FAMILY_CEDAR)
 262        &&(context->radeon.radeonScreen->chip_family <= CHIP_FAMILY_HEMLOCK) )
 263     {
 264         r700->bShaderUseMemConstant = GL_TRUE;
 265     }
 266     else
 267     {
 268         r700->bShaderUseMemConstant = GL_FALSE;
 269     }
 270
 271         ctx->Const.GLSLVersion = 120;
 272
 273         ctx->Const.MaxTextureImageUnits = 16;
 274         /* 8 per clause on r6xx, 16 on r7xx
 275          * but I think mesa only supports 8 at the moment
 276          */
 277         ctx->Const.MaxTextureCoordUnits = 8;
 278         ctx->Const.MaxTextureUnits =
 279             MIN2(ctx->Const.MaxTextureImageUnits,
 280                  ctx->Const.MaxTextureCoordUnits);
 281         ctx->Const.MaxCombinedTextureImageUnits =
 282                 ctx->Const.MaxVertexTextureImageUnits +
 283                 ctx->Const.MaxTextureImageUnits;
 284
 285         ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 286         ctx->Const.MaxTextureLodBias = 16.0;
 287
 288         ctx->Const.MaxTextureLevels = 13; /* hw support 14 */
 289         ctx->Const.MaxTextureRectSize = 4096; /* hw support 8192 */
 290
 291         ctx->Const.MinPointSize   = 0x0001 / 8.0;
 292         ctx->Const.MinPointSizeAA = 0x0001 / 8.0;
 293         ctx->Const.MaxPointSize   = 0xffff / 8.0;
 294         ctx->Const.MaxPointSizeAA = 0xffff / 8.0;
 295
 296         ctx->Const.MinLineWidth   = 0x0001 / 8.0;
 297         ctx->Const.MinLineWidthAA = 0x0001 / 8.0;
 298         ctx->Const.MaxLineWidth   = 0xffff / 8.0;
 299         ctx->Const.MaxLineWidthAA = 0xffff / 8.0;
 300
 301         ctx->Const.MaxDrawBuffers = 1; /* hw supports 8 */
 302         ctx->Const.MaxColorAttachments = 1;
 303         ctx->Const.MaxRenderbufferSize = 4096;
 304
 305         /* 256 for reg-based consts, inline consts also supported */
 306         ctx->Const.VertexProgram.MaxInstructions = 8192; /* in theory no limit */
 307         ctx->Const.VertexProgram.MaxNativeInstructions = 8192;
 308         ctx->Const.VertexProgram.MaxNativeAttribs = 160;
 309         ctx->Const.VertexProgram.MaxTemps = 128;
 310         ctx->Const.VertexProgram.MaxNativeTemps = 128;
 311         ctx->Const.VertexProgram.MaxNativeParameters = 256;
 312         ctx->Const.VertexProgram.MaxNativeAddressRegs = 1; /* ??? */
 313
 314         ctx->Const.FragmentProgram.MaxNativeTemps = 128;
 315         ctx->Const.FragmentProgram.MaxNativeAttribs = 32;
 316         ctx->Const.FragmentProgram.MaxNativeParameters = 256;
 317         ctx->Const.FragmentProgram.MaxNativeAluInstructions = 8192;
 318         /* 8 per clause on r6xx, 16 on r7xx */
 319         if (screen->chip_family >= CHIP_FAMILY_RV770)
 320                 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 16;
 321         else
 322                 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 8;
 323         ctx->Const.FragmentProgram.MaxNativeInstructions = 8192;
 324         ctx->Const.FragmentProgram.MaxNativeTexIndirections = 8; /* ??? */
 325         ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;    /* and these are?? */
 326 }
 327
 328 static void r600ParseOptions(context_t *r600, radeonScreenPtr screen)
 329 {
 330         /* Parse configuration files.
 331          * Do this here so that initialMaxAnisotropy is set before we create
 332          * the default textures.
 333          */
 334         driParseConfigFiles(&r600->radeon.optionCache, &screen->optionCache,
 335                             screen->driScreen->myNum, "r600");
 336
 337         r600->radeon.initialMaxAnisotropy = driQueryOptionf(&r600->radeon.optionCache,
 338                                                             "def_max_anisotropy");
 339
 340 }
 341
 342 static void r600InitGLExtensions(struct gl_context *ctx)
 343 {
 344         context_t *r600 = R700_CONTEXT(ctx);
 345 #ifdef R600_ENABLE_GLSL_TEST
 346         unsigned i;
 347 #endif
 348
 349         driInitExtensions(ctx, card_extensions, GL_TRUE);
 350         if (r600->radeon.radeonScreen->kernel_mm)
 351           driInitExtensions(ctx, mm_extensions, GL_FALSE);
 352
 353 #ifdef R600_ENABLE_GLSL_TEST
 354     driInitExtensions(ctx, gl_20_extension, GL_TRUE);
 355     _mesa_enable_2_0_extensions(ctx);
 356
 357         /* glsl compiler has problem if this is not GL_TRUE */
 358         for (i = 0; i <= MESA_SHADER_FRAGMENT; i++)
 359                 ctx->ShaderCompilerOptions[i].EmitCondCodes = GL_TRUE;
 360 #endif /* R600_ENABLE_GLSL_TEST */
 361
 362         if (driQueryOptionb
 363             (&r600->radeon.optionCache, "disable_stencil_two_side"))
 364                 _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
 365
 366         if (r600->radeon.glCtx->Mesa_DXTn
 367             && !driQueryOptionb(&r600->radeon.optionCache, "disable_s3tc")) {
 368                 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
 369                 _mesa_enable_extension(ctx, "GL_S3_s3tc");
 370         } else
 371             if (driQueryOptionb(&r600->radeon.optionCache, "force_s3tc_enable"))
 372         {
 373                 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
 374         }
 375
 376         /* RV740 had a broken pipe config prior to drm 1.32 */
 377         if (!r600->radeon.radeonScreen->kernel_mm) {
 378                 if ((r600->radeon.dri.drmMinor < 32) &&
 379                     (r600->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV740))
 380                         _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
 381         }
 382 }
 383
 384 /* Create the device specific rendering context.
 385  */
 386 GLboolean r600CreateContext(gl_api api,
 387                             const struct gl_config * glVisual,
 388                             __DRIcontext * driContextPriv,
 389                             void *sharedContextPrivate)
 390 {
 391         __DRIscreen *sPriv = driContextPriv->driScreenPriv;
 392         radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
 393         struct dd_function_table functions;
 394         context_t *r600;
 395         struct gl_context *ctx;
 396
 397         assert(glVisual);
 398         assert(driContextPriv);
 399         assert(screen);
 400
 401         /* Allocate the R600 context */
 402         r600 = (context_t*) CALLOC(sizeof(*r600));
 403         if (!r600) {
 404                 radeon_error("Failed to allocate memory for context.\n");
 405                 return GL_FALSE;
 406         }
 407
 408         r600ParseOptions(r600, screen);
 409
 410         r600->radeon.radeonScreen = screen;
 411
 412     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 413     {
 414             evergreen_init_vtbl(&r600->radeon);
 415     }
 416     else
 417     {
 418         r600_init_vtbl(&r600->radeon);
 419     }
 420
 421         /* Init default driver functions then plug in our R600-specific functions
 422          * (the texture functions are especially important)
 423          */
 424         _mesa_init_driver_functions(&functions);
 425
 426     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 427     {
 428         evergreenCreateChip(r600);
 429         evergreenInitStateFuncs(&r600->radeon, &functions);
 430             evergreenInitTextureFuncs(&r600->radeon, &functions);
 431             evergreenInitShaderFuncs(&functions);
 432     }
 433     else
 434     {
 435             r700InitStateFuncs(&r600->radeon, &functions);
 436             r600InitTextureFuncs(&r600->radeon, &functions);
 437             r700InitShaderFuncs(&functions);
 438     }
 439
 440         radeonInitQueryObjFunctions(&functions);
 441
 442     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 443     {
 444         evergreenInitIoctlFuncs(&functions);
 445     }
 446     else
 447     {
 448             r700InitIoctlFuncs(&functions);
 449     }
 450         radeonInitBufferObjectFuncs(&functions);
 451
 452         if (!radeonInitContext(&r600->radeon, &functions,
 453                                glVisual, driContextPriv,
 454                                sharedContextPrivate)) {
 455                 radeon_error("Initializing context failed.\n");
 456                 FREE(r600);
 457                 return GL_FALSE;
 458         }
 459
 460         ctx = r600->radeon.glCtx;
 461
 462         ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
 463         ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
 464
 465         r600InitConstValues(ctx, screen);
 466
 467         /* reinit, it depends on consts above */
 468         _mesa_init_point(ctx);
 469
 470         _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
 471
 472         /* Initialize the software rasterizer and helper modules.
 473          */
 474         _swrast_CreateContext(ctx);
 475         _vbo_CreateContext(ctx);
 476         _tnl_CreateContext(ctx);
 477         _swsetup_CreateContext(ctx);
 478         _swsetup_Wakeup(ctx);
 479
 480         /* Install the customized pipeline:
 481          */
 482         _tnl_destroy_pipeline(ctx);
 483         _tnl_install_pipeline(ctx, r600_pipeline);
 484         TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
 485
 486         /* Configure swrast and TNL to match hardware characteristics:
 487          */
 488         _swrast_allow_pixel_fog(ctx, GL_FALSE);
 489         _swrast_allow_vertex_fog(ctx, GL_TRUE);
 490         _tnl_allow_pixel_fog(ctx, GL_FALSE);
 491         _tnl_allow_vertex_fog(ctx, GL_TRUE);
 492
 493         radeon_init_debug();
 494
 495     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 496     {
 497         evergreenInitDraw(ctx);
 498     }
 499     else
 500     {
 501             r700InitDraw(ctx);
 502     }
 503
 504         radeon_fbo_init(&r600->radeon);
 505         radeonInitSpanFuncs( ctx );
 506         r600InitCmdBuf(r600);
 507
 508     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 509     {
 510         evergreenInitState(r600->radeon.glCtx);
 511     }
 512     else
 513     {
 514             r700InitState(r600->radeon.glCtx);
 515     }
 516
 517         r600InitGLExtensions(ctx);
 518
 519         return GL_TRUE;
 520 }
 521
 522 void r600DestroyContext(__DRIcontext *driContextPriv )
 523 {
 524     void      *pChip;
 525     context_t *context = (context_t *) driContextPriv->driverPrivate;
 526
 527     assert(context);
 528
 529     pChip = context->pChip;
 530
 531     /* destroy context first, free pChip, in case there are things flush to asic. */
 532     radeonDestroyContext(driContextPriv);
 533
 534     FREE(pChip);
 535 }
 536
 537