r100/r200/r300/r600: Set MaxCombinedTextureImageunits.
[mesa.git] / src / mesa / drivers / dri / r600 / r600_context.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file
32 *
33 * \author Keith Whitwell <keith@tungstengraphics.com>
34 *
35 * \author Nicolai Haehnle <prefect_@gmx.net>
36 */
37
38 #include "main/glheader.h"
39 #include "main/api_arrayelt.h"
40 #include "main/context.h"
41 #include "main/simple_list.h"
42 #include "main/imports.h"
43 #include "main/extensions.h"
44 #include "main/bufferobj.h"
45 #include "main/texobj.h"
46
47 #include "swrast/swrast.h"
48 #include "swrast_setup/swrast_setup.h"
49 #include "vbo/vbo.h"
50
51 #include "tnl/tnl.h"
52 #include "tnl/t_pipeline.h"
53
54 #include "drivers/common/driverfuncs.h"
55
56 #include "radeon_debug.h"
57 #include "r600_context.h"
58 #include "radeon_common_context.h"
59 #include "radeon_buffer_objects.h"
60 #include "radeon_span.h"
61 #include "r600_cmdbuf.h"
62 #include "r600_emit.h"
63 #include "radeon_bocs_wrapper.h"
64 #include "radeon_queryobj.h"
65 #include "r600_blit.h"
66
67 #include "r700_state.h"
68 #include "r700_ioctl.h"
69
70
71 #include "utils.h"
72
73 #define R600_ENABLE_GLSL_TEST 1
74
75 #define need_GL_VERSION_2_0
76 #define need_GL_ARB_occlusion_query
77 #define need_GL_ARB_point_parameters
78 #define need_GL_ARB_vertex_program
79 #define need_GL_EXT_blend_equation_separate
80 #define need_GL_EXT_blend_func_separate
81 #define need_GL_EXT_blend_minmax
82 #define need_GL_EXT_framebuffer_object
83 #define need_GL_EXT_fog_coord
84 #define need_GL_EXT_gpu_program_parameters
85 #define need_GL_EXT_provoking_vertex
86 #define need_GL_EXT_secondary_color
87 #define need_GL_EXT_stencil_two_side
88 #define need_GL_ATI_separate_stencil
89 #define need_GL_NV_vertex_program
90
91 #include "main/remap_helper.h"
92
93 static const struct dri_extension card_extensions[] = {
94 /* *INDENT-OFF* */
95 {"GL_ARB_depth_clamp", NULL},
96 {"GL_ARB_depth_texture", NULL},
97 {"GL_ARB_fragment_program", NULL},
98 {"GL_ARB_fragment_program_shadow", NULL},
99 {"GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions},
100 {"GL_ARB_multitexture", NULL},
101 {"GL_ARB_point_parameters", GL_ARB_point_parameters_functions},
102 {"GL_ARB_shadow", NULL},
103 {"GL_ARB_shadow_ambient", NULL},
104 {"GL_ARB_texture_border_clamp", NULL},
105 {"GL_ARB_texture_cube_map", NULL},
106 {"GL_ARB_texture_env_add", NULL},
107 {"GL_ARB_texture_env_combine", NULL},
108 {"GL_ARB_texture_env_crossbar", NULL},
109 {"GL_ARB_texture_env_dot3", NULL},
110 {"GL_ARB_texture_mirrored_repeat", NULL},
111 {"GL_ARB_texture_non_power_of_two", NULL},
112 {"GL_ARB_vertex_program", GL_ARB_vertex_program_functions},
113 {"GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions},
114 {"GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions},
115 {"GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions},
116 {"GL_EXT_blend_subtract", NULL},
117 {"GL_EXT_packed_depth_stencil", NULL},
118 {"GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
119 {"GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions},
120 {"GL_EXT_provoking_vertex", GL_EXT_provoking_vertex_functions },
121 {"GL_EXT_secondary_color", GL_EXT_secondary_color_functions},
122 {"GL_EXT_shadow_funcs", NULL},
123 {"GL_EXT_stencil_two_side", GL_EXT_stencil_two_side_functions},
124 {"GL_EXT_stencil_wrap", NULL},
125 {"GL_EXT_texture_edge_clamp", NULL},
126 {"GL_EXT_texture_env_combine", NULL},
127 {"GL_EXT_texture_env_dot3", NULL},
128 {"GL_EXT_texture_filter_anisotropic", NULL},
129 {"GL_EXT_texture_lod_bias", NULL},
130 {"GL_EXT_texture_mirror_clamp", NULL},
131 {"GL_EXT_texture_rectangle", NULL},
132 {"GL_EXT_vertex_array_bgra", NULL},
133 {"GL_EXT_texture_sRGB", NULL},
134 {"GL_ATI_separate_stencil", GL_ATI_separate_stencil_functions},
135 {"GL_ATI_texture_env_combine3", NULL},
136 {"GL_ATI_texture_mirror_once", NULL},
137 {"GL_MESA_pack_invert", NULL},
138 {"GL_MESA_ycbcr_texture", NULL},
139 {"GL_MESAX_texture_float", NULL},
140 {"GL_NV_blend_square", NULL},
141 {"GL_NV_vertex_program", GL_NV_vertex_program_functions},
142 {"GL_SGIS_generate_mipmap", NULL},
143 {NULL, NULL}
144 /* *INDENT-ON* */
145 };
146
147
148 static const struct dri_extension mm_extensions[] = {
149 { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
150 { NULL, NULL }
151 };
152
153 /**
154 * The GL 2.0 functions are needed to make display lists work with
155 * functions added by GL_ATI_separate_stencil.
156 */
157 static const struct dri_extension gl_20_extension[] = {
158 #ifdef R600_ENABLE_GLSL_TEST
159 {"GL_ARB_shading_language_100", GL_VERSION_2_0_functions },
160 #else
161 {"GL_VERSION_2_0", GL_VERSION_2_0_functions },
162 #endif /* R600_ENABLE_GLSL_TEST */
163 {NULL, NULL}
164 };
165
166 static const struct tnl_pipeline_stage *r600_pipeline[] = {
167 /* Catch any t&l fallbacks
168 */
169 &_tnl_vertex_transform_stage,
170 &_tnl_normal_transform_stage,
171 &_tnl_lighting_stage,
172 &_tnl_fog_coordinate_stage,
173 &_tnl_texgen_stage,
174 &_tnl_texture_transform_stage,
175 &_tnl_point_attenuation_stage,
176 &_tnl_vertex_program_stage,
177 &_tnl_render_stage,
178 0,
179 };
180
181 static void r600_get_lock(radeonContextPtr rmesa)
182 {
183 drm_radeon_sarea_t *sarea = rmesa->sarea;
184
185 if (sarea->ctx_owner != rmesa->dri.hwContext) {
186 sarea->ctx_owner = rmesa->dri.hwContext;
187 if (!rmesa->radeonScreen->kernel_mm)
188 radeon_bo_legacy_texture_age(rmesa->radeonScreen->bom);
189 }
190 }
191
192 static void r600_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
193 {
194 /* please flush pipe do all pending work */
195 /* to be enabled */
196 }
197
198 static void r600_vtbl_pre_emit_atoms(radeonContextPtr radeon)
199 {
200 r700Start3D((context_t *)radeon);
201 }
202
203 static void r600_fallback(GLcontext *ctx, GLuint bit, GLboolean mode)
204 {
205 context_t *context = R700_CONTEXT(ctx);
206 if (mode)
207 context->radeon.Fallback |= bit;
208 else
209 context->radeon.Fallback &= ~bit;
210 }
211
212 static void r600_emit_query_finish(radeonContextPtr radeon)
213 {
214 context_t *context = (context_t*) radeon;
215 BATCH_LOCALS(&context->radeon);
216
217 struct radeon_query_object *query = radeon->query.current;
218
219 BEGIN_BATCH_NO_AUTOSTATE(4 + 2);
220 R600_OUT_BATCH(CP_PACKET3(R600_IT_EVENT_WRITE, 2));
221 R600_OUT_BATCH(ZPASS_DONE);
222 R600_OUT_BATCH(query->curr_offset + 8); /* hw writes qwords */
223 R600_OUT_BATCH(0x00000000);
224 R600_OUT_BATCH_RELOC(VGT_EVENT_INITIATOR, query->bo, 0, 0, RADEON_GEM_DOMAIN_GTT, 0);
225 END_BATCH();
226 assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
227 query->emitted_begin = GL_FALSE;
228 }
229
230 static void r600_init_vtbl(radeonContextPtr radeon)
231 {
232 radeon->vtbl.get_lock = r600_get_lock;
233 radeon->vtbl.update_viewport_offset = r700UpdateViewportOffset;
234 radeon->vtbl.emit_cs_header = r600_vtbl_emit_cs_header;
235 radeon->vtbl.swtcl_flush = NULL;
236 radeon->vtbl.pre_emit_atoms = r600_vtbl_pre_emit_atoms;
237 radeon->vtbl.fallback = r600_fallback;
238 radeon->vtbl.emit_query_finish = r600_emit_query_finish;
239 radeon->vtbl.blit = r600_blit;
240 }
241
242 static void r600InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
243 {
244 ctx->Const.MaxTextureImageUnits = 16;
245 /* 8 per clause on r6xx, 16 on r7xx
246 * but I think mesa only supports 8 at the moment
247 */
248 ctx->Const.MaxTextureCoordUnits = 8;
249 ctx->Const.MaxTextureUnits =
250 MIN2(ctx->Const.MaxTextureImageUnits,
251 ctx->Const.MaxTextureCoordUnits);
252 ctx->Const.MaxCombinedTextureImageUnits =
253 ctx->Const.MaxVertexTextureImageUnits +
254 ctx->Const.MaxTextureImageUnits;
255
256 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
257 ctx->Const.MaxTextureLodBias = 16.0;
258
259 ctx->Const.MaxTextureLevels = 13; /* hw support 14 */
260 ctx->Const.MaxTextureRectSize = 4096; /* hw support 8192 */
261
262 ctx->Const.MinPointSize = 0x0001 / 8.0;
263 ctx->Const.MinPointSizeAA = 0x0001 / 8.0;
264 ctx->Const.MaxPointSize = 0xffff / 8.0;
265 ctx->Const.MaxPointSizeAA = 0xffff / 8.0;
266
267 ctx->Const.MinLineWidth = 0x0001 / 8.0;
268 ctx->Const.MinLineWidthAA = 0x0001 / 8.0;
269 ctx->Const.MaxLineWidth = 0xffff / 8.0;
270 ctx->Const.MaxLineWidthAA = 0xffff / 8.0;
271
272 ctx->Const.MaxDrawBuffers = 1; /* hw supports 8 */
273
274 /* 256 for reg-based consts, inline consts also supported */
275 ctx->Const.VertexProgram.MaxInstructions = 8192; /* in theory no limit */
276 ctx->Const.VertexProgram.MaxNativeInstructions = 8192;
277 ctx->Const.VertexProgram.MaxNativeAttribs = 160;
278 ctx->Const.VertexProgram.MaxTemps = 128;
279 ctx->Const.VertexProgram.MaxNativeTemps = 128;
280 ctx->Const.VertexProgram.MaxNativeParameters = 256;
281 ctx->Const.VertexProgram.MaxNativeAddressRegs = 1; /* ??? */
282
283 ctx->Const.FragmentProgram.MaxNativeTemps = 128;
284 ctx->Const.FragmentProgram.MaxNativeAttribs = 32;
285 ctx->Const.FragmentProgram.MaxNativeParameters = 256;
286 ctx->Const.FragmentProgram.MaxNativeAluInstructions = 8192;
287 /* 8 per clause on r6xx, 16 on r7xx */
288 if (screen->chip_family >= CHIP_FAMILY_RV770)
289 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 16;
290 else
291 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 8;
292 ctx->Const.FragmentProgram.MaxNativeInstructions = 8192;
293 ctx->Const.FragmentProgram.MaxNativeTexIndirections = 8; /* ??? */
294 ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0; /* and these are?? */
295 }
296
297 static void r600ParseOptions(context_t *r600, radeonScreenPtr screen)
298 {
299 /* Parse configuration files.
300 * Do this here so that initialMaxAnisotropy is set before we create
301 * the default textures.
302 */
303 driParseConfigFiles(&r600->radeon.optionCache, &screen->optionCache,
304 screen->driScreen->myNum, "r600");
305
306 r600->radeon.initialMaxAnisotropy = driQueryOptionf(&r600->radeon.optionCache,
307 "def_max_anisotropy");
308
309 }
310
311 static void r600InitGLExtensions(GLcontext *ctx)
312 {
313 context_t *r600 = R700_CONTEXT(ctx);
314
315 driInitExtensions(ctx, card_extensions, GL_TRUE);
316 if (r600->radeon.radeonScreen->kernel_mm)
317 driInitExtensions(ctx, mm_extensions, GL_FALSE);
318
319 #ifdef R600_ENABLE_GLSL_TEST
320 driInitExtensions(ctx, gl_20_extension, GL_TRUE);
321 _mesa_enable_2_0_extensions(ctx);
322
323 /* glsl compiler has problem if this is not GL_TRUE */
324 ctx->Shader.EmitCondCodes = GL_TRUE;
325 #endif /* R600_ENABLE_GLSL_TEST */
326
327 if (driQueryOptionb
328 (&r600->radeon.optionCache, "disable_stencil_two_side"))
329 _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
330
331 if (r600->radeon.glCtx->Mesa_DXTn
332 && !driQueryOptionb(&r600->radeon.optionCache, "disable_s3tc")) {
333 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
334 _mesa_enable_extension(ctx, "GL_S3_s3tc");
335 } else
336 if (driQueryOptionb(&r600->radeon.optionCache, "force_s3tc_enable"))
337 {
338 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
339 }
340
341 /* XXX: RV740 only seems to report results from half of its DBs */
342 if (r600->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV740)
343 _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
344 }
345
346 /* Create the device specific rendering context.
347 */
348 GLboolean r600CreateContext(const __GLcontextModes * glVisual,
349 __DRIcontext * driContextPriv,
350 void *sharedContextPrivate)
351 {
352 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
353 radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
354 struct dd_function_table functions;
355 context_t *r600;
356 GLcontext *ctx;
357
358 assert(glVisual);
359 assert(driContextPriv);
360 assert(screen);
361
362 /* Allocate the R600 context */
363 r600 = (context_t*) CALLOC(sizeof(*r600));
364 if (!r600) {
365 radeon_error("Failed to allocate memory for context.\n");
366 return GL_FALSE;
367 }
368
369 r600ParseOptions(r600, screen);
370
371 r600->radeon.radeonScreen = screen;
372 r600_init_vtbl(&r600->radeon);
373
374 /* Init default driver functions then plug in our R600-specific functions
375 * (the texture functions are especially important)
376 */
377 _mesa_init_driver_functions(&functions);
378
379 r700InitStateFuncs(&functions);
380 r600InitTextureFuncs(&r600->radeon, &functions);
381 r700InitShaderFuncs(&functions);
382 radeonInitQueryObjFunctions(&functions);
383 r700InitIoctlFuncs(&functions);
384 radeonInitBufferObjectFuncs(&functions);
385
386 if (!radeonInitContext(&r600->radeon, &functions,
387 glVisual, driContextPriv,
388 sharedContextPrivate)) {
389 radeon_error("Initializing context failed.\n");
390 FREE(r600);
391 return GL_FALSE;
392 }
393
394 ctx = r600->radeon.glCtx;
395
396 ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
397 ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
398
399 r600InitConstValues(ctx, screen);
400
401 _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
402
403 /* Initialize the software rasterizer and helper modules.
404 */
405 _swrast_CreateContext(ctx);
406 _vbo_CreateContext(ctx);
407 _tnl_CreateContext(ctx);
408 _swsetup_CreateContext(ctx);
409 _swsetup_Wakeup(ctx);
410
411 /* Install the customized pipeline:
412 */
413 _tnl_destroy_pipeline(ctx);
414 _tnl_install_pipeline(ctx, r600_pipeline);
415 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
416
417 /* Configure swrast and TNL to match hardware characteristics:
418 */
419 _swrast_allow_pixel_fog(ctx, GL_FALSE);
420 _swrast_allow_vertex_fog(ctx, GL_TRUE);
421 _tnl_allow_pixel_fog(ctx, GL_FALSE);
422 _tnl_allow_vertex_fog(ctx, GL_TRUE);
423
424 radeon_init_debug();
425
426 r700InitDraw(ctx);
427
428 radeon_fbo_init(&r600->radeon);
429 radeonInitSpanFuncs( ctx );
430 r600InitCmdBuf(r600);
431 r700InitState(r600->radeon.glCtx);
432
433 r600InitGLExtensions(ctx);
434
435 return GL_TRUE;
436 }
437
438