Merge branch 'gallium-docs'
[mesa.git] / src / mesa / drivers / dri / r600 / r600_context.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file
32 *
33 * \author Keith Whitwell <keith@tungstengraphics.com>
34 *
35 * \author Nicolai Haehnle <prefect_@gmx.net>
36 */
37
38 #include "main/glheader.h"
39 #include "main/api_arrayelt.h"
40 #include "main/context.h"
41 #include "main/simple_list.h"
42 #include "main/imports.h"
43 #include "main/matrix.h"
44 #include "main/extensions.h"
45 #include "main/state.h"
46 #include "main/bufferobj.h"
47 #include "main/texobj.h"
48
49 #include "swrast/swrast.h"
50 #include "swrast_setup/swrast_setup.h"
51 #include "vbo/vbo.h"
52
53 #include "tnl/tnl.h"
54 #include "tnl/t_pipeline.h"
55 #include "tnl/t_vp_build.h"
56
57 #include "drivers/common/driverfuncs.h"
58
59 #include "radeon_debug.h"
60 #include "r600_context.h"
61 #include "radeon_common_context.h"
62 #include "radeon_buffer_objects.h"
63 #include "radeon_span.h"
64 #include "r600_cmdbuf.h"
65 #include "r600_emit.h"
66 #include "radeon_bocs_wrapper.h"
67 #include "radeon_queryobj.h"
68
69 #include "r700_state.h"
70 #include "r700_ioctl.h"
71
72
73 #include "vblank.h"
74 #include "utils.h"
75 #include "xmlpool.h" /* for symbolic values of enum-type options */
76
77 #define R600_ENABLE_GLSL_TEST 1
78
79 #define need_GL_VERSION_2_0
80 #define need_GL_ARB_occlusion_query
81 #define need_GL_ARB_point_parameters
82 #define need_GL_ARB_vertex_program
83 #define need_GL_EXT_blend_equation_separate
84 #define need_GL_EXT_blend_func_separate
85 #define need_GL_EXT_blend_minmax
86 #define need_GL_EXT_framebuffer_object
87 #define need_GL_EXT_fog_coord
88 #define need_GL_EXT_gpu_program_parameters
89 #define need_GL_EXT_provoking_vertex
90 #define need_GL_EXT_secondary_color
91 #define need_GL_EXT_stencil_two_side
92 #define need_GL_ATI_separate_stencil
93 #define need_GL_NV_vertex_program
94
95 #include "main/remap_helper.h"
96
97 static const struct dri_extension card_extensions[] = {
98 /* *INDENT-OFF* */
99 {"GL_ARB_depth_clamp", NULL},
100 {"GL_ARB_depth_texture", NULL},
101 {"GL_ARB_fragment_program", NULL},
102 {"GL_ARB_fragment_program_shadow", NULL},
103 {"GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions},
104 {"GL_ARB_multitexture", NULL},
105 {"GL_ARB_point_parameters", GL_ARB_point_parameters_functions},
106 {"GL_ARB_shadow", NULL},
107 {"GL_ARB_shadow_ambient", NULL},
108 {"GL_ARB_texture_border_clamp", NULL},
109 {"GL_ARB_texture_cube_map", NULL},
110 {"GL_ARB_texture_env_add", NULL},
111 {"GL_ARB_texture_env_combine", NULL},
112 {"GL_ARB_texture_env_crossbar", NULL},
113 {"GL_ARB_texture_env_dot3", NULL},
114 {"GL_ARB_texture_mirrored_repeat", NULL},
115 {"GL_ARB_texture_non_power_of_two", NULL},
116 {"GL_ARB_vertex_program", GL_ARB_vertex_program_functions},
117 {"GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions},
118 {"GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions},
119 {"GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions},
120 {"GL_EXT_blend_subtract", NULL},
121 {"GL_EXT_packed_depth_stencil", NULL},
122 {"GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
123 {"GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions},
124 {"GL_EXT_provoking_vertex", GL_EXT_provoking_vertex_functions },
125 {"GL_EXT_secondary_color", GL_EXT_secondary_color_functions},
126 {"GL_EXT_shadow_funcs", NULL},
127 {"GL_EXT_stencil_two_side", GL_EXT_stencil_two_side_functions},
128 {"GL_EXT_stencil_wrap", NULL},
129 {"GL_EXT_texture_edge_clamp", NULL},
130 {"GL_EXT_texture_env_combine", NULL},
131 {"GL_EXT_texture_env_dot3", NULL},
132 {"GL_EXT_texture_filter_anisotropic", NULL},
133 {"GL_EXT_texture_lod_bias", NULL},
134 {"GL_EXT_texture_mirror_clamp", NULL},
135 {"GL_EXT_texture_rectangle", NULL},
136 {"GL_EXT_vertex_array_bgra", NULL},
137 {"GL_EXT_texture_sRGB", NULL},
138 {"GL_ATI_separate_stencil", GL_ATI_separate_stencil_functions},
139 {"GL_ATI_texture_env_combine3", NULL},
140 {"GL_ATI_texture_mirror_once", NULL},
141 {"GL_MESA_pack_invert", NULL},
142 {"GL_MESA_ycbcr_texture", NULL},
143 {"GL_MESAX_texture_float", NULL},
144 {"GL_NV_blend_square", NULL},
145 {"GL_NV_vertex_program", GL_NV_vertex_program_functions},
146 {"GL_SGIS_generate_mipmap", NULL},
147 {NULL, NULL}
148 /* *INDENT-ON* */
149 };
150
151
152 static const struct dri_extension mm_extensions[] = {
153 { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
154 { NULL, NULL }
155 };
156
157 /**
158 * The GL 2.0 functions are needed to make display lists work with
159 * functions added by GL_ATI_separate_stencil.
160 */
161 static const struct dri_extension gl_20_extension[] = {
162 #ifdef R600_ENABLE_GLSL_TEST
163 {"GL_ARB_shading_language_100", GL_VERSION_2_0_functions },
164 #else
165 {"GL_VERSION_2_0", GL_VERSION_2_0_functions },
166 #endif /* R600_ENABLE_GLSL_TEST */
167 {NULL, NULL}
168 };
169
170 static const struct tnl_pipeline_stage *r600_pipeline[] = {
171 /* Catch any t&l fallbacks
172 */
173 &_tnl_vertex_transform_stage,
174 &_tnl_normal_transform_stage,
175 &_tnl_lighting_stage,
176 &_tnl_fog_coordinate_stage,
177 &_tnl_texgen_stage,
178 &_tnl_texture_transform_stage,
179 &_tnl_point_attenuation_stage,
180 &_tnl_vertex_program_stage,
181 &_tnl_render_stage,
182 0,
183 };
184
185 static void r600_get_lock(radeonContextPtr rmesa)
186 {
187 drm_radeon_sarea_t *sarea = rmesa->sarea;
188
189 if (sarea->ctx_owner != rmesa->dri.hwContext) {
190 sarea->ctx_owner = rmesa->dri.hwContext;
191 if (!rmesa->radeonScreen->kernel_mm)
192 radeon_bo_legacy_texture_age(rmesa->radeonScreen->bom);
193 }
194 }
195
196 static void r600_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
197 {
198 /* please flush pipe do all pending work */
199 /* to be enabled */
200 }
201
202 static void r600_vtbl_pre_emit_atoms(radeonContextPtr radeon)
203 {
204 r700Start3D((context_t *)radeon);
205 }
206
207 static void r600_fallback(GLcontext *ctx, GLuint bit, GLboolean mode)
208 {
209 context_t *context = R700_CONTEXT(ctx);
210 if (mode)
211 context->radeon.Fallback |= bit;
212 else
213 context->radeon.Fallback &= ~bit;
214 }
215
216 static void r600_emit_query_finish(radeonContextPtr radeon)
217 {
218 context_t *context = (context_t*) radeon;
219 BATCH_LOCALS(&context->radeon);
220
221 struct radeon_query_object *query = radeon->query.current;
222
223 BEGIN_BATCH_NO_AUTOSTATE(4 + 2);
224 R600_OUT_BATCH(CP_PACKET3(R600_IT_EVENT_WRITE, 2));
225 R600_OUT_BATCH(ZPASS_DONE);
226 R600_OUT_BATCH(query->curr_offset + 8); /* hw writes qwords */
227 R600_OUT_BATCH(0x00000000);
228 R600_OUT_BATCH_RELOC(VGT_EVENT_INITIATOR, query->bo, 0, 0, RADEON_GEM_DOMAIN_GTT, 0);
229 END_BATCH();
230 assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
231 query->emitted_begin = GL_FALSE;
232 }
233
234 static void r600_init_vtbl(radeonContextPtr radeon)
235 {
236 radeon->vtbl.get_lock = r600_get_lock;
237 radeon->vtbl.update_viewport_offset = r700UpdateViewportOffset;
238 radeon->vtbl.emit_cs_header = r600_vtbl_emit_cs_header;
239 radeon->vtbl.swtcl_flush = NULL;
240 radeon->vtbl.pre_emit_atoms = r600_vtbl_pre_emit_atoms;
241 radeon->vtbl.fallback = r600_fallback;
242 radeon->vtbl.emit_query_finish = r600_emit_query_finish;
243 }
244
245 static void r600InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
246 {
247 context_t *r600 = R700_CONTEXT(ctx);
248
249 ctx->Const.MaxTextureImageUnits =
250 driQueryOptioni(&r600->radeon.optionCache, "texture_image_units");
251 ctx->Const.MaxTextureCoordUnits =
252 driQueryOptioni(&r600->radeon.optionCache, "texture_coord_units");
253 ctx->Const.MaxTextureUnits =
254 MIN2(ctx->Const.MaxTextureImageUnits,
255 ctx->Const.MaxTextureCoordUnits);
256 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
257 ctx->Const.MaxTextureLodBias = 16.0;
258
259 ctx->Const.MaxTextureLevels = 13; /* hw support 14 */
260 ctx->Const.MaxTextureRectSize = 4096; /* hw support 8192 */
261
262 ctx->Const.MinPointSize = 0x0001 / 8.0;
263 ctx->Const.MinPointSizeAA = 0x0001 / 8.0;
264 ctx->Const.MaxPointSize = 0xffff / 8.0;
265 ctx->Const.MaxPointSizeAA = 0xffff / 8.0;
266
267 ctx->Const.MinLineWidth = 0x0001 / 8.0;
268 ctx->Const.MinLineWidthAA = 0x0001 / 8.0;
269 ctx->Const.MaxLineWidth = 0xffff / 8.0;
270 ctx->Const.MaxLineWidthAA = 0xffff / 8.0;
271
272 ctx->Const.MaxDrawBuffers = 1; /* hw supports 8 */
273
274 /* 256 for reg-based consts, inline consts also supported */
275 ctx->Const.VertexProgram.MaxInstructions = 8192; /* in theory no limit */
276 ctx->Const.VertexProgram.MaxNativeInstructions = 8192;
277 ctx->Const.VertexProgram.MaxNativeAttribs = 160;
278 ctx->Const.VertexProgram.MaxTemps = 128;
279 ctx->Const.VertexProgram.MaxNativeTemps = 128;
280 ctx->Const.VertexProgram.MaxNativeParameters = 256;
281 ctx->Const.VertexProgram.MaxNativeAddressRegs = 1; /* ??? */
282
283 ctx->Const.FragmentProgram.MaxNativeTemps = 128;
284 ctx->Const.FragmentProgram.MaxNativeAttribs = 32;
285 ctx->Const.FragmentProgram.MaxNativeParameters = 256;
286 ctx->Const.FragmentProgram.MaxNativeAluInstructions = 8192;
287 /* 8 per clause on r6xx, 16 on rv670/r7xx */
288 if ((screen->chip_family == CHIP_FAMILY_RV670) ||
289 (screen->chip_family >= CHIP_FAMILY_RV770))
290 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 16;
291 else
292 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 8;
293 ctx->Const.FragmentProgram.MaxNativeInstructions = 8192;
294 ctx->Const.FragmentProgram.MaxNativeTexIndirections = 8; /* ??? */
295 ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0; /* and these are?? */
296 }
297
298 static void r600ParseOptions(context_t *r600, radeonScreenPtr screen)
299 {
300 /* Parse configuration files.
301 * Do this here so that initialMaxAnisotropy is set before we create
302 * the default textures.
303 */
304 driParseConfigFiles(&r600->radeon.optionCache, &screen->optionCache,
305 screen->driScreen->myNum, "r600");
306
307 r600->radeon.initialMaxAnisotropy = driQueryOptionf(&r600->radeon.optionCache,
308 "def_max_anisotropy");
309
310 }
311
312 static void r600InitGLExtensions(GLcontext *ctx)
313 {
314 context_t *r600 = R700_CONTEXT(ctx);
315
316 driInitExtensions(ctx, card_extensions, GL_TRUE);
317 if (r600->radeon.radeonScreen->kernel_mm)
318 driInitExtensions(ctx, mm_extensions, GL_FALSE);
319
320 #ifdef R600_ENABLE_GLSL_TEST
321 driInitExtensions(ctx, gl_20_extension, GL_TRUE);
322 _mesa_enable_2_0_extensions(ctx);
323
324 /* glsl compiler has problem if this is not GL_TRUE */
325 ctx->Shader.EmitCondCodes = GL_TRUE;
326 #endif /* R600_ENABLE_GLSL_TEST */
327
328 if (driQueryOptionb
329 (&r600->radeon.optionCache, "disable_stencil_two_side"))
330 _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
331
332 if (r600->radeon.glCtx->Mesa_DXTn
333 && !driQueryOptionb(&r600->radeon.optionCache, "disable_s3tc")) {
334 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
335 _mesa_enable_extension(ctx, "GL_S3_s3tc");
336 } else
337 if (driQueryOptionb(&r600->radeon.optionCache, "force_s3tc_enable"))
338 {
339 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
340 }
341
342 /* XXX: RV740 only seems to report results from half of its DBs */
343 if (r600->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV740)
344 _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
345 }
346
347 /* Create the device specific rendering context.
348 */
349 GLboolean r600CreateContext(const __GLcontextModes * glVisual,
350 __DRIcontext * driContextPriv,
351 void *sharedContextPrivate)
352 {
353 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
354 radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
355 struct dd_function_table functions;
356 context_t *r600;
357 GLcontext *ctx;
358
359 assert(glVisual);
360 assert(driContextPriv);
361 assert(screen);
362
363 /* Allocate the R600 context */
364 r600 = (context_t*) CALLOC(sizeof(*r600));
365 if (!r600) {
366 radeon_error("Failed to allocate memory for context.\n");
367 return GL_FALSE;
368 }
369
370 r600ParseOptions(r600, screen);
371
372 r600->radeon.radeonScreen = screen;
373 r600_init_vtbl(&r600->radeon);
374
375 /* Init default driver functions then plug in our R600-specific functions
376 * (the texture functions are especially important)
377 */
378 _mesa_init_driver_functions(&functions);
379
380 r700InitStateFuncs(&functions);
381 r600InitTextureFuncs(&functions);
382 r700InitShaderFuncs(&functions);
383 radeonInitQueryObjFunctions(&functions);
384 r700InitIoctlFuncs(&functions);
385 radeonInitBufferObjectFuncs(&functions);
386
387 if (!radeonInitContext(&r600->radeon, &functions,
388 glVisual, driContextPriv,
389 sharedContextPrivate)) {
390 radeon_error("Initializing context failed.\n");
391 FREE(r600);
392 return GL_FALSE;
393 }
394
395 ctx = r600->radeon.glCtx;
396
397 ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
398 ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
399
400 r600InitConstValues(ctx, screen);
401
402 _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
403
404 /* Initialize the software rasterizer and helper modules.
405 */
406 _swrast_CreateContext(ctx);
407 _vbo_CreateContext(ctx);
408 _tnl_CreateContext(ctx);
409 _swsetup_CreateContext(ctx);
410 _swsetup_Wakeup(ctx);
411
412 /* Install the customized pipeline:
413 */
414 _tnl_destroy_pipeline(ctx);
415 _tnl_install_pipeline(ctx, r600_pipeline);
416 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
417
418 /* Configure swrast and TNL to match hardware characteristics:
419 */
420 _swrast_allow_pixel_fog(ctx, GL_FALSE);
421 _swrast_allow_vertex_fog(ctx, GL_TRUE);
422 _tnl_allow_pixel_fog(ctx, GL_FALSE);
423 _tnl_allow_vertex_fog(ctx, GL_TRUE);
424
425 radeon_init_debug();
426
427 r700InitDraw(ctx);
428
429 radeon_fbo_init(&r600->radeon);
430 radeonInitSpanFuncs( ctx );
431 r600InitCmdBuf(r600);
432 r700InitState(r600->radeon.glCtx);
433
434 r600InitGLExtensions(ctx);
435
436 return GL_TRUE;
437 }
438
439