r600 : enable gl2, set R600_ENABLE_GLSL_TEST by default.
[mesa.git] / src / mesa / drivers / dri / r600 / r600_context.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file
32 *
33 * \author Keith Whitwell <keith@tungstengraphics.com>
34 *
35 * \author Nicolai Haehnle <prefect_@gmx.net>
36 */
37
38 #include "main/glheader.h"
39 #include "main/api_arrayelt.h"
40 #include "main/context.h"
41 #include "main/simple_list.h"
42 #include "main/imports.h"
43 #include "main/matrix.h"
44 #include "main/extensions.h"
45 #include "main/state.h"
46 #include "main/bufferobj.h"
47 #include "main/texobj.h"
48
49 #include "swrast/swrast.h"
50 #include "swrast_setup/swrast_setup.h"
51 #include "vbo/vbo.h"
52
53 #include "tnl/tnl.h"
54 #include "tnl/t_pipeline.h"
55 #include "tnl/t_vp_build.h"
56
57 #include "drivers/common/driverfuncs.h"
58
59 #include "radeon_debug.h"
60 #include "r600_context.h"
61 #include "radeon_common_context.h"
62 #include "radeon_buffer_objects.h"
63 #include "radeon_span.h"
64 #include "r600_cmdbuf.h"
65 #include "r600_emit.h"
66 #include "radeon_bocs_wrapper.h"
67 #include "radeon_queryobj.h"
68
69 #include "r700_state.h"
70 #include "r700_ioctl.h"
71
72
73 #include "vblank.h"
74 #include "utils.h"
75 #include "xmlpool.h" /* for symbolic values of enum-type options */
76
77 #define R600_ENABLE_GLSL_TEST 1
78
79 #define need_GL_VERSION_2_0
80 #define need_GL_ARB_occlusion_query
81 #define need_GL_ARB_point_parameters
82 #define need_GL_ARB_vertex_program
83 #define need_GL_EXT_blend_equation_separate
84 #define need_GL_EXT_blend_func_separate
85 #define need_GL_EXT_blend_minmax
86 #define need_GL_EXT_framebuffer_object
87 #define need_GL_EXT_fog_coord
88 #define need_GL_EXT_gpu_program_parameters
89 #define need_GL_EXT_provoking_vertex
90 #define need_GL_EXT_secondary_color
91 #define need_GL_EXT_stencil_two_side
92 #define need_GL_ATI_separate_stencil
93 #define need_GL_NV_vertex_program
94
95 #include "main/remap_helper.h"
96
97 static const struct dri_extension card_extensions[] = {
98 /* *INDENT-OFF* */
99 {"GL_ARB_depth_clamp", NULL},
100 {"GL_ARB_depth_texture", NULL},
101 {"GL_ARB_fragment_program", NULL},
102 {"GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions},
103 {"GL_ARB_multitexture", NULL},
104 {"GL_ARB_point_parameters", GL_ARB_point_parameters_functions},
105 {"GL_ARB_shadow", NULL},
106 {"GL_ARB_shadow_ambient", NULL},
107 {"GL_ARB_texture_border_clamp", NULL},
108 {"GL_ARB_texture_cube_map", NULL},
109 {"GL_ARB_texture_env_add", NULL},
110 {"GL_ARB_texture_env_combine", NULL},
111 {"GL_ARB_texture_env_crossbar", NULL},
112 {"GL_ARB_texture_env_dot3", NULL},
113 {"GL_ARB_texture_mirrored_repeat", NULL},
114 {"GL_ARB_texture_non_power_of_two", NULL},
115 {"GL_ARB_vertex_program", GL_ARB_vertex_program_functions},
116 {"GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions},
117 {"GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions},
118 {"GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions},
119 {"GL_EXT_blend_subtract", NULL},
120 {"GL_EXT_packed_depth_stencil", NULL},
121 {"GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
122 {"GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions},
123 {"GL_EXT_provoking_vertex", GL_EXT_provoking_vertex_functions },
124 {"GL_EXT_secondary_color", GL_EXT_secondary_color_functions},
125 {"GL_EXT_shadow_funcs", NULL},
126 {"GL_EXT_stencil_two_side", GL_EXT_stencil_two_side_functions},
127 {"GL_EXT_stencil_wrap", NULL},
128 {"GL_EXT_texture_edge_clamp", NULL},
129 {"GL_EXT_texture_env_combine", NULL},
130 {"GL_EXT_texture_env_dot3", NULL},
131 {"GL_EXT_texture_filter_anisotropic", NULL},
132 {"GL_EXT_texture_lod_bias", NULL},
133 {"GL_EXT_texture_mirror_clamp", NULL},
134 {"GL_EXT_texture_rectangle", NULL},
135 {"GL_EXT_vertex_array_bgra", NULL},
136 {"GL_EXT_texture_sRGB", NULL},
137 {"GL_ATI_separate_stencil", GL_ATI_separate_stencil_functions},
138 {"GL_ATI_texture_env_combine3", NULL},
139 {"GL_ATI_texture_mirror_once", NULL},
140 {"GL_MESA_pack_invert", NULL},
141 {"GL_MESA_ycbcr_texture", NULL},
142 {"GL_MESAX_texture_float", NULL},
143 {"GL_NV_blend_square", NULL},
144 {"GL_NV_vertex_program", GL_NV_vertex_program_functions},
145 {"GL_SGIS_generate_mipmap", NULL},
146 {NULL, NULL}
147 /* *INDENT-ON* */
148 };
149
150
151 static const struct dri_extension mm_extensions[] = {
152 { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
153 { NULL, NULL }
154 };
155
156 /**
157 * The GL 2.0 functions are needed to make display lists work with
158 * functions added by GL_ATI_separate_stencil.
159 */
160 static const struct dri_extension gl_20_extension[] = {
161 #ifdef R600_ENABLE_GLSL_TEST
162 {"GL_ARB_shading_language_100", GL_VERSION_2_0_functions },
163 #else
164 {"GL_VERSION_2_0", GL_VERSION_2_0_functions },
165 #endif /* R600_ENABLE_GLSL_TEST */
166 };
167
168 static const struct tnl_pipeline_stage *r600_pipeline[] = {
169 /* Catch any t&l fallbacks
170 */
171 &_tnl_vertex_transform_stage,
172 &_tnl_normal_transform_stage,
173 &_tnl_lighting_stage,
174 &_tnl_fog_coordinate_stage,
175 &_tnl_texgen_stage,
176 &_tnl_texture_transform_stage,
177 &_tnl_point_attenuation_stage,
178 &_tnl_vertex_program_stage,
179 &_tnl_render_stage,
180 0,
181 };
182
183 static void r600_get_lock(radeonContextPtr rmesa)
184 {
185 drm_radeon_sarea_t *sarea = rmesa->sarea;
186
187 if (sarea->ctx_owner != rmesa->dri.hwContext) {
188 sarea->ctx_owner = rmesa->dri.hwContext;
189 if (!rmesa->radeonScreen->kernel_mm)
190 radeon_bo_legacy_texture_age(rmesa->radeonScreen->bom);
191 }
192 }
193
194 static void r600_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
195 {
196 /* please flush pipe do all pending work */
197 /* to be enabled */
198 }
199
200 static void r600_vtbl_pre_emit_atoms(radeonContextPtr radeon)
201 {
202 r700Start3D((context_t *)radeon);
203 }
204
205 static void r600_fallback(GLcontext *ctx, GLuint bit, GLboolean mode)
206 {
207 context_t *context = R700_CONTEXT(ctx);
208 if (mode)
209 context->radeon.Fallback |= bit;
210 else
211 context->radeon.Fallback &= ~bit;
212 }
213
214 static void r600_emit_query_finish(radeonContextPtr radeon)
215 {
216 context_t *context = (context_t*) radeon;
217 BATCH_LOCALS(&context->radeon);
218
219 struct radeon_query_object *query = radeon->query.current;
220
221 BEGIN_BATCH_NO_AUTOSTATE(4 + 2);
222 R600_OUT_BATCH(CP_PACKET3(R600_IT_EVENT_WRITE, 2));
223 R600_OUT_BATCH(ZPASS_DONE);
224 R600_OUT_BATCH(query->curr_offset + 8); /* hw writes qwords */
225 R600_OUT_BATCH(0x00000000);
226 R600_OUT_BATCH_RELOC(VGT_EVENT_INITIATOR, query->bo, 0, 0, RADEON_GEM_DOMAIN_GTT, 0);
227 END_BATCH();
228 assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
229 query->emitted_begin = GL_FALSE;
230 }
231
232 static void r600_init_vtbl(radeonContextPtr radeon)
233 {
234 radeon->vtbl.get_lock = r600_get_lock;
235 radeon->vtbl.update_viewport_offset = r700UpdateViewportOffset;
236 radeon->vtbl.emit_cs_header = r600_vtbl_emit_cs_header;
237 radeon->vtbl.swtcl_flush = NULL;
238 radeon->vtbl.pre_emit_atoms = r600_vtbl_pre_emit_atoms;
239 radeon->vtbl.fallback = r600_fallback;
240 radeon->vtbl.emit_query_finish = r600_emit_query_finish;
241 }
242
243 static void r600InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
244 {
245 context_t *r600 = R700_CONTEXT(ctx);
246
247 ctx->Const.MaxTextureImageUnits =
248 driQueryOptioni(&r600->radeon.optionCache, "texture_image_units");
249 ctx->Const.MaxTextureCoordUnits =
250 driQueryOptioni(&r600->radeon.optionCache, "texture_coord_units");
251 ctx->Const.MaxTextureUnits =
252 MIN2(ctx->Const.MaxTextureImageUnits,
253 ctx->Const.MaxTextureCoordUnits);
254 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
255 ctx->Const.MaxTextureLodBias = 16.0;
256
257 ctx->Const.MaxTextureLevels = 13; /* hw support 14 */
258 ctx->Const.MaxTextureRectSize = 4096; /* hw support 8192 */
259
260 ctx->Const.MinPointSize = 0x0001 / 8.0;
261 ctx->Const.MinPointSizeAA = 0x0001 / 8.0;
262 ctx->Const.MaxPointSize = 0xffff / 8.0;
263 ctx->Const.MaxPointSizeAA = 0xffff / 8.0;
264
265 ctx->Const.MinLineWidth = 0x0001 / 8.0;
266 ctx->Const.MinLineWidthAA = 0x0001 / 8.0;
267 ctx->Const.MaxLineWidth = 0xffff / 8.0;
268 ctx->Const.MaxLineWidthAA = 0xffff / 8.0;
269
270 ctx->Const.MaxDrawBuffers = 1; /* hw supports 8 */
271
272 /* 256 for reg-based consts, inline consts also supported */
273 ctx->Const.VertexProgram.MaxInstructions = 8192; /* in theory no limit */
274 ctx->Const.VertexProgram.MaxNativeInstructions = 8192;
275 ctx->Const.VertexProgram.MaxNativeAttribs = 160;
276 ctx->Const.VertexProgram.MaxTemps = 128;
277 ctx->Const.VertexProgram.MaxNativeTemps = 128;
278 ctx->Const.VertexProgram.MaxNativeParameters = 256;
279 ctx->Const.VertexProgram.MaxNativeAddressRegs = 1; /* ??? */
280
281 ctx->Const.FragmentProgram.MaxNativeTemps = 128;
282 ctx->Const.FragmentProgram.MaxNativeAttribs = 32;
283 ctx->Const.FragmentProgram.MaxNativeParameters = 256;
284 ctx->Const.FragmentProgram.MaxNativeAluInstructions = 8192;
285 /* 8 per clause on r6xx, 16 on rv670/r7xx */
286 if ((screen->chip_family == CHIP_FAMILY_RV670) ||
287 (screen->chip_family >= CHIP_FAMILY_RV770))
288 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 16;
289 else
290 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 8;
291 ctx->Const.FragmentProgram.MaxNativeInstructions = 8192;
292 ctx->Const.FragmentProgram.MaxNativeTexIndirections = 8; /* ??? */
293 ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0; /* and these are?? */
294 }
295
296 static void r600ParseOptions(context_t *r600, radeonScreenPtr screen)
297 {
298 /* Parse configuration files.
299 * Do this here so that initialMaxAnisotropy is set before we create
300 * the default textures.
301 */
302 driParseConfigFiles(&r600->radeon.optionCache, &screen->optionCache,
303 screen->driScreen->myNum, "r600");
304
305 r600->radeon.initialMaxAnisotropy = driQueryOptionf(&r600->radeon.optionCache,
306 "def_max_anisotropy");
307
308 }
309
310 static void r600InitGLExtensions(GLcontext *ctx)
311 {
312 context_t *r600 = R700_CONTEXT(ctx);
313
314 driInitExtensions(ctx, card_extensions, GL_TRUE);
315 if (r600->radeon.radeonScreen->kernel_mm)
316 driInitExtensions(ctx, mm_extensions, GL_FALSE);
317
318 #ifdef R600_ENABLE_GLSL_TEST
319 driInitExtensions(ctx, gl_20_extension, GL_TRUE);
320 _mesa_enable_2_0_extensions(ctx);
321
322 /* glsl compiler has problem if this is not GL_TRUE */
323 ctx->Shader.EmitCondCodes = GL_TRUE;
324 #endif /* R600_ENABLE_GLSL_TEST */
325
326 if (driQueryOptionb
327 (&r600->radeon.optionCache, "disable_stencil_two_side"))
328 _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
329
330 if (r600->radeon.glCtx->Mesa_DXTn
331 && !driQueryOptionb(&r600->radeon.optionCache, "disable_s3tc")) {
332 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
333 _mesa_enable_extension(ctx, "GL_S3_s3tc");
334 } else
335 if (driQueryOptionb(&r600->radeon.optionCache, "force_s3tc_enable"))
336 {
337 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
338 }
339
340 /* XXX: RV740 only seems to report results from half of its DBs */
341 if (r600->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV740)
342 _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
343 }
344
345 /* Create the device specific rendering context.
346 */
347 GLboolean r600CreateContext(const __GLcontextModes * glVisual,
348 __DRIcontextPrivate * driContextPriv,
349 void *sharedContextPrivate)
350 {
351 __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
352 radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
353 struct dd_function_table functions;
354 context_t *r600;
355 GLcontext *ctx;
356
357 assert(glVisual);
358 assert(driContextPriv);
359 assert(screen);
360
361 /* Allocate the R600 context */
362 r600 = (context_t*) CALLOC(sizeof(*r600));
363 if (!r600) {
364 radeon_error("Failed to allocate memory for context.\n");
365 return GL_FALSE;
366 }
367
368 r600ParseOptions(r600, screen);
369
370 r600->radeon.radeonScreen = screen;
371 r600_init_vtbl(&r600->radeon);
372
373 /* Init default driver functions then plug in our R600-specific functions
374 * (the texture functions are especially important)
375 */
376 _mesa_init_driver_functions(&functions);
377
378 r700InitStateFuncs(&functions);
379 r600InitTextureFuncs(&functions);
380 r700InitShaderFuncs(&functions);
381 radeonInitQueryObjFunctions(&functions);
382 r700InitIoctlFuncs(&functions);
383 radeonInitBufferObjectFuncs(&functions);
384
385 if (!radeonInitContext(&r600->radeon, &functions,
386 glVisual, driContextPriv,
387 sharedContextPrivate)) {
388 radeon_error("Initializing context failed.\n");
389 FREE(r600);
390 return GL_FALSE;
391 }
392
393 ctx = r600->radeon.glCtx;
394
395 ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
396 ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
397
398 r600InitConstValues(ctx, screen);
399
400 _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
401
402 /* Initialize the software rasterizer and helper modules.
403 */
404 _swrast_CreateContext(ctx);
405 _vbo_CreateContext(ctx);
406 _tnl_CreateContext(ctx);
407 _swsetup_CreateContext(ctx);
408 _swsetup_Wakeup(ctx);
409
410 /* Install the customized pipeline:
411 */
412 _tnl_destroy_pipeline(ctx);
413 _tnl_install_pipeline(ctx, r600_pipeline);
414 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
415
416 /* Configure swrast and TNL to match hardware characteristics:
417 */
418 _swrast_allow_pixel_fog(ctx, GL_FALSE);
419 _swrast_allow_vertex_fog(ctx, GL_TRUE);
420 _tnl_allow_pixel_fog(ctx, GL_FALSE);
421 _tnl_allow_vertex_fog(ctx, GL_TRUE);
422
423 radeon_init_debug();
424
425 r700InitDraw(ctx);
426
427 radeon_fbo_init(&r600->radeon);
428 radeonInitSpanFuncs( ctx );
429 r600InitCmdBuf(r600);
430 r700InitState(r600->radeon.glCtx);
431
432 r600InitGLExtensions(ctx);
433
434 return GL_TRUE;
435 }
436
437