Merge branch 'mesa-2d-registers'
[mesa.git] / src / mesa / drivers / dri / r600 / r600_context.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file
32 *
33 * \author Keith Whitwell <keith@tungstengraphics.com>
34 *
35 * \author Nicolai Haehnle <prefect_@gmx.net>
36 */
37
38 #include "main/glheader.h"
39 #include "main/api_arrayelt.h"
40 #include "main/context.h"
41 #include "main/simple_list.h"
42 #include "main/imports.h"
43 #include "main/extensions.h"
44 #include "main/bufferobj.h"
45 #include "main/texobj.h"
46
47 #include "swrast/swrast.h"
48 #include "swrast_setup/swrast_setup.h"
49 #include "vbo/vbo.h"
50
51 #include "tnl/tnl.h"
52 #include "tnl/t_pipeline.h"
53
54 #include "drivers/common/driverfuncs.h"
55
56 #include "radeon_debug.h"
57 #include "r600_context.h"
58 #include "radeon_common_context.h"
59 #include "radeon_buffer_objects.h"
60 #include "radeon_span.h"
61 #include "r600_cmdbuf.h"
62 #include "radeon_bocs_wrapper.h"
63 #include "radeon_queryobj.h"
64 #include "r600_blit.h"
65
66 #include "r700_state.h"
67 #include "r700_ioctl.h"
68
69
70 #include "utils.h"
71
72 #define R600_ENABLE_GLSL_TEST 1
73
74 #define need_GL_VERSION_2_0
75 #define need_GL_ARB_occlusion_query
76 #define need_GL_ARB_point_parameters
77 #define need_GL_ARB_vertex_program
78 #define need_GL_EXT_blend_equation_separate
79 #define need_GL_EXT_blend_func_separate
80 #define need_GL_EXT_blend_minmax
81 #define need_GL_EXT_framebuffer_object
82 #define need_GL_EXT_fog_coord
83 #define need_GL_EXT_gpu_program_parameters
84 #define need_GL_EXT_provoking_vertex
85 #define need_GL_EXT_secondary_color
86 #define need_GL_EXT_stencil_two_side
87 #define need_GL_ATI_separate_stencil
88 #define need_GL_NV_vertex_program
89
90 #include "main/remap_helper.h"
91
92 static const struct dri_extension card_extensions[] = {
93 /* *INDENT-OFF* */
94 {"GL_ARB_depth_clamp", NULL},
95 {"GL_ARB_depth_texture", NULL},
96 {"GL_ARB_fragment_program", NULL},
97 {"GL_ARB_fragment_program_shadow", NULL},
98 {"GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions},
99 {"GL_ARB_multitexture", NULL},
100 {"GL_ARB_point_parameters", GL_ARB_point_parameters_functions},
101 {"GL_ARB_shadow", NULL},
102 {"GL_ARB_shadow_ambient", NULL},
103 {"GL_ARB_texture_border_clamp", NULL},
104 {"GL_ARB_texture_cube_map", NULL},
105 {"GL_ARB_texture_env_add", NULL},
106 {"GL_ARB_texture_env_combine", NULL},
107 {"GL_ARB_texture_env_crossbar", NULL},
108 {"GL_ARB_texture_env_dot3", NULL},
109 {"GL_ARB_texture_mirrored_repeat", NULL},
110 {"GL_ARB_texture_non_power_of_two", NULL},
111 {"GL_ARB_vertex_program", GL_ARB_vertex_program_functions},
112 {"GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions},
113 {"GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions},
114 {"GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions},
115 {"GL_EXT_blend_subtract", NULL},
116 {"GL_EXT_packed_depth_stencil", NULL},
117 {"GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
118 {"GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions},
119 {"GL_EXT_provoking_vertex", GL_EXT_provoking_vertex_functions },
120 {"GL_EXT_secondary_color", GL_EXT_secondary_color_functions},
121 {"GL_EXT_shadow_funcs", NULL},
122 {"GL_EXT_stencil_two_side", GL_EXT_stencil_two_side_functions},
123 {"GL_EXT_stencil_wrap", NULL},
124 {"GL_EXT_texture_edge_clamp", NULL},
125 {"GL_EXT_texture_env_combine", NULL},
126 {"GL_EXT_texture_env_dot3", NULL},
127 {"GL_EXT_texture_filter_anisotropic", NULL},
128 {"GL_EXT_texture_lod_bias", NULL},
129 {"GL_EXT_texture_mirror_clamp", NULL},
130 {"GL_EXT_texture_rectangle", NULL},
131 {"GL_EXT_vertex_array_bgra", NULL},
132 {"GL_EXT_texture_sRGB", NULL},
133 {"GL_ATI_separate_stencil", GL_ATI_separate_stencil_functions},
134 {"GL_ATI_texture_env_combine3", NULL},
135 {"GL_ATI_texture_mirror_once", NULL},
136 {"GL_MESA_pack_invert", NULL},
137 {"GL_MESA_ycbcr_texture", NULL},
138 {"GL_MESAX_texture_float", NULL},
139 {"GL_NV_blend_square", NULL},
140 {"GL_NV_vertex_program", GL_NV_vertex_program_functions},
141 {"GL_SGIS_generate_mipmap", NULL},
142 {"GL_ARB_pixel_buffer_object", NULL},
143 {NULL, NULL}
144 /* *INDENT-ON* */
145 };
146
147
148 static const struct dri_extension mm_extensions[] = {
149 { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
150 { NULL, NULL }
151 };
152
153 /**
154 * The GL 2.0 functions are needed to make display lists work with
155 * functions added by GL_ATI_separate_stencil.
156 */
157 static const struct dri_extension gl_20_extension[] = {
158 #ifdef R600_ENABLE_GLSL_TEST
159 {"GL_ARB_shading_language_100", GL_VERSION_2_0_functions },
160 #else
161 {"GL_VERSION_2_0", GL_VERSION_2_0_functions },
162 #endif /* R600_ENABLE_GLSL_TEST */
163 {NULL, NULL}
164 };
165
166 static const struct tnl_pipeline_stage *r600_pipeline[] = {
167 /* Catch any t&l fallbacks
168 */
169 &_tnl_vertex_transform_stage,
170 &_tnl_normal_transform_stage,
171 &_tnl_lighting_stage,
172 &_tnl_fog_coordinate_stage,
173 &_tnl_texgen_stage,
174 &_tnl_texture_transform_stage,
175 &_tnl_point_attenuation_stage,
176 &_tnl_vertex_program_stage,
177 &_tnl_render_stage,
178 0,
179 };
180
181 static void r600_get_lock(radeonContextPtr rmesa)
182 {
183 drm_radeon_sarea_t *sarea = rmesa->sarea;
184
185 if (sarea->ctx_owner != rmesa->dri.hwContext) {
186 sarea->ctx_owner = rmesa->dri.hwContext;
187 if (!rmesa->radeonScreen->kernel_mm)
188 radeon_bo_legacy_texture_age(rmesa->radeonScreen->bom);
189 }
190 }
191
192 static void r600_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
193 {
194 /* please flush pipe do all pending work */
195 /* to be enabled */
196 }
197
198 static void r600_vtbl_pre_emit_atoms(radeonContextPtr radeon)
199 {
200 r700Start3D((context_t *)radeon);
201 }
202
203 static void r600_fallback(GLcontext *ctx, GLuint bit, GLboolean mode)
204 {
205 context_t *context = R700_CONTEXT(ctx);
206 if (mode)
207 context->radeon.Fallback |= bit;
208 else
209 context->radeon.Fallback &= ~bit;
210 }
211
212 static void r600_emit_query_finish(radeonContextPtr radeon)
213 {
214 context_t *context = (context_t*) radeon;
215 BATCH_LOCALS(&context->radeon);
216
217 struct radeon_query_object *query = radeon->query.current;
218
219 BEGIN_BATCH_NO_AUTOSTATE(4 + 2);
220 R600_OUT_BATCH(CP_PACKET3(R600_IT_EVENT_WRITE, 2));
221 R600_OUT_BATCH(ZPASS_DONE);
222 R600_OUT_BATCH(query->curr_offset + 8); /* hw writes qwords */
223 R600_OUT_BATCH(0x00000000);
224 R600_OUT_BATCH_RELOC(VGT_EVENT_INITIATOR, query->bo, 0, 0, RADEON_GEM_DOMAIN_GTT, 0);
225 END_BATCH();
226 assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
227 query->emitted_begin = GL_FALSE;
228 }
229
230 static void r600_init_vtbl(radeonContextPtr radeon)
231 {
232 radeon->vtbl.get_lock = r600_get_lock;
233 radeon->vtbl.update_viewport_offset = r700UpdateViewportOffset;
234 radeon->vtbl.emit_cs_header = r600_vtbl_emit_cs_header;
235 radeon->vtbl.swtcl_flush = NULL;
236 radeon->vtbl.pre_emit_atoms = r600_vtbl_pre_emit_atoms;
237 radeon->vtbl.fallback = r600_fallback;
238 radeon->vtbl.emit_query_finish = r600_emit_query_finish;
239 radeon->vtbl.check_blit = r600_check_blit;
240 radeon->vtbl.blit = r600_blit;
241 radeon->vtbl.is_format_renderable = r600IsFormatRenderable;
242 }
243
244 static void r600InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
245 {
246 ctx->Const.MaxTextureImageUnits = 16;
247 /* 8 per clause on r6xx, 16 on r7xx
248 * but I think mesa only supports 8 at the moment
249 */
250 ctx->Const.MaxTextureCoordUnits = 8;
251 ctx->Const.MaxTextureUnits =
252 MIN2(ctx->Const.MaxTextureImageUnits,
253 ctx->Const.MaxTextureCoordUnits);
254 ctx->Const.MaxCombinedTextureImageUnits =
255 ctx->Const.MaxVertexTextureImageUnits +
256 ctx->Const.MaxTextureImageUnits;
257
258 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
259 ctx->Const.MaxTextureLodBias = 16.0;
260
261 ctx->Const.MaxTextureLevels = 13; /* hw support 14 */
262 ctx->Const.MaxTextureRectSize = 4096; /* hw support 8192 */
263
264 ctx->Const.MinPointSize = 0x0001 / 8.0;
265 ctx->Const.MinPointSizeAA = 0x0001 / 8.0;
266 ctx->Const.MaxPointSize = 0xffff / 8.0;
267 ctx->Const.MaxPointSizeAA = 0xffff / 8.0;
268
269 ctx->Const.MinLineWidth = 0x0001 / 8.0;
270 ctx->Const.MinLineWidthAA = 0x0001 / 8.0;
271 ctx->Const.MaxLineWidth = 0xffff / 8.0;
272 ctx->Const.MaxLineWidthAA = 0xffff / 8.0;
273
274 ctx->Const.MaxDrawBuffers = 1; /* hw supports 8 */
275 ctx->Const.MaxColorAttachments = 1;
276 ctx->Const.MaxRenderbufferSize = 4096;
277
278 /* 256 for reg-based consts, inline consts also supported */
279 ctx->Const.VertexProgram.MaxInstructions = 8192; /* in theory no limit */
280 ctx->Const.VertexProgram.MaxNativeInstructions = 8192;
281 ctx->Const.VertexProgram.MaxNativeAttribs = 160;
282 ctx->Const.VertexProgram.MaxTemps = 128;
283 ctx->Const.VertexProgram.MaxNativeTemps = 128;
284 ctx->Const.VertexProgram.MaxNativeParameters = 256;
285 ctx->Const.VertexProgram.MaxNativeAddressRegs = 1; /* ??? */
286
287 ctx->Const.FragmentProgram.MaxNativeTemps = 128;
288 ctx->Const.FragmentProgram.MaxNativeAttribs = 32;
289 ctx->Const.FragmentProgram.MaxNativeParameters = 256;
290 ctx->Const.FragmentProgram.MaxNativeAluInstructions = 8192;
291 /* 8 per clause on r6xx, 16 on r7xx */
292 if (screen->chip_family >= CHIP_FAMILY_RV770)
293 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 16;
294 else
295 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 8;
296 ctx->Const.FragmentProgram.MaxNativeInstructions = 8192;
297 ctx->Const.FragmentProgram.MaxNativeTexIndirections = 8; /* ??? */
298 ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0; /* and these are?? */
299 }
300
301 static void r600ParseOptions(context_t *r600, radeonScreenPtr screen)
302 {
303 /* Parse configuration files.
304 * Do this here so that initialMaxAnisotropy is set before we create
305 * the default textures.
306 */
307 driParseConfigFiles(&r600->radeon.optionCache, &screen->optionCache,
308 screen->driScreen->myNum, "r600");
309
310 r600->radeon.initialMaxAnisotropy = driQueryOptionf(&r600->radeon.optionCache,
311 "def_max_anisotropy");
312
313 }
314
315 static void r600InitGLExtensions(GLcontext *ctx)
316 {
317 context_t *r600 = R700_CONTEXT(ctx);
318
319 driInitExtensions(ctx, card_extensions, GL_TRUE);
320 if (r600->radeon.radeonScreen->kernel_mm)
321 driInitExtensions(ctx, mm_extensions, GL_FALSE);
322
323 #ifdef R600_ENABLE_GLSL_TEST
324 driInitExtensions(ctx, gl_20_extension, GL_TRUE);
325 _mesa_enable_2_0_extensions(ctx);
326
327 /* glsl compiler has problem if this is not GL_TRUE */
328 ctx->Shader.EmitCondCodes = GL_TRUE;
329 #endif /* R600_ENABLE_GLSL_TEST */
330
331 if (driQueryOptionb
332 (&r600->radeon.optionCache, "disable_stencil_two_side"))
333 _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
334
335 if (r600->radeon.glCtx->Mesa_DXTn
336 && !driQueryOptionb(&r600->radeon.optionCache, "disable_s3tc")) {
337 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
338 _mesa_enable_extension(ctx, "GL_S3_s3tc");
339 } else
340 if (driQueryOptionb(&r600->radeon.optionCache, "force_s3tc_enable"))
341 {
342 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
343 }
344
345 /* RV740 had a broken pipe config prior to drm 1.32 */
346 if (!r600->radeon.radeonScreen->kernel_mm) {
347 if ((r600->radeon.dri.drmMinor < 32) &&
348 (r600->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV740))
349 _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
350 }
351 }
352
353 /* Create the device specific rendering context.
354 */
355 GLboolean r600CreateContext(gl_api api,
356 const __GLcontextModes * glVisual,
357 __DRIcontext * driContextPriv,
358 void *sharedContextPrivate)
359 {
360 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
361 radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
362 struct dd_function_table functions;
363 context_t *r600;
364 GLcontext *ctx;
365
366 assert(glVisual);
367 assert(driContextPriv);
368 assert(screen);
369
370 /* Allocate the R600 context */
371 r600 = (context_t*) CALLOC(sizeof(*r600));
372 if (!r600) {
373 radeon_error("Failed to allocate memory for context.\n");
374 return GL_FALSE;
375 }
376
377 r600ParseOptions(r600, screen);
378
379 r600->radeon.radeonScreen = screen;
380 r600_init_vtbl(&r600->radeon);
381
382 /* Init default driver functions then plug in our R600-specific functions
383 * (the texture functions are especially important)
384 */
385 _mesa_init_driver_functions(&functions);
386
387 r700InitStateFuncs(&r600->radeon, &functions);
388 r600InitTextureFuncs(&r600->radeon, &functions);
389 r700InitShaderFuncs(&functions);
390 radeonInitQueryObjFunctions(&functions);
391 r700InitIoctlFuncs(&functions);
392 radeonInitBufferObjectFuncs(&functions);
393
394 if (!radeonInitContext(&r600->radeon, &functions,
395 glVisual, driContextPriv,
396 sharedContextPrivate)) {
397 radeon_error("Initializing context failed.\n");
398 FREE(r600);
399 return GL_FALSE;
400 }
401
402 ctx = r600->radeon.glCtx;
403
404 ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
405 ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
406
407 r600InitConstValues(ctx, screen);
408
409 _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
410
411 /* Initialize the software rasterizer and helper modules.
412 */
413 _swrast_CreateContext(ctx);
414 _vbo_CreateContext(ctx);
415 _tnl_CreateContext(ctx);
416 _swsetup_CreateContext(ctx);
417 _swsetup_Wakeup(ctx);
418
419 /* Install the customized pipeline:
420 */
421 _tnl_destroy_pipeline(ctx);
422 _tnl_install_pipeline(ctx, r600_pipeline);
423 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
424
425 /* Configure swrast and TNL to match hardware characteristics:
426 */
427 _swrast_allow_pixel_fog(ctx, GL_FALSE);
428 _swrast_allow_vertex_fog(ctx, GL_TRUE);
429 _tnl_allow_pixel_fog(ctx, GL_FALSE);
430 _tnl_allow_vertex_fog(ctx, GL_TRUE);
431
432 radeon_init_debug();
433
434 r700InitDraw(ctx);
435
436 radeon_fbo_init(&r600->radeon);
437 radeonInitSpanFuncs( ctx );
438 r600InitCmdBuf(r600);
439 r700InitState(r600->radeon.glCtx);
440
441 r600InitGLExtensions(ctx);
442
443 return GL_TRUE;
444 }
445
446