r600: enable GL_ARB_pixel_buffer_object
[mesa.git] / src / mesa / drivers / dri / r600 / r600_context.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file
32 *
33 * \author Keith Whitwell <keith@tungstengraphics.com>
34 *
35 * \author Nicolai Haehnle <prefect_@gmx.net>
36 */
37
38 #include "main/glheader.h"
39 #include "main/api_arrayelt.h"
40 #include "main/context.h"
41 #include "main/simple_list.h"
42 #include "main/imports.h"
43 #include "main/extensions.h"
44 #include "main/bufferobj.h"
45 #include "main/texobj.h"
46
47 #include "swrast/swrast.h"
48 #include "swrast_setup/swrast_setup.h"
49 #include "vbo/vbo.h"
50
51 #include "tnl/tnl.h"
52 #include "tnl/t_pipeline.h"
53
54 #include "drivers/common/driverfuncs.h"
55
56 #include "radeon_debug.h"
57 #include "r600_context.h"
58 #include "radeon_common_context.h"
59 #include "radeon_buffer_objects.h"
60 #include "radeon_span.h"
61 #include "r600_cmdbuf.h"
62 #include "r600_emit.h"
63 #include "radeon_bocs_wrapper.h"
64 #include "radeon_queryobj.h"
65 #include "r600_blit.h"
66
67 #include "r700_state.h"
68 #include "r700_ioctl.h"
69
70
71 #include "utils.h"
72
73 #define R600_ENABLE_GLSL_TEST 1
74
75 #define need_GL_VERSION_2_0
76 #define need_GL_ARB_occlusion_query
77 #define need_GL_ARB_point_parameters
78 #define need_GL_ARB_vertex_program
79 #define need_GL_EXT_blend_equation_separate
80 #define need_GL_EXT_blend_func_separate
81 #define need_GL_EXT_blend_minmax
82 #define need_GL_EXT_framebuffer_object
83 #define need_GL_EXT_fog_coord
84 #define need_GL_EXT_gpu_program_parameters
85 #define need_GL_EXT_provoking_vertex
86 #define need_GL_EXT_secondary_color
87 #define need_GL_EXT_stencil_two_side
88 #define need_GL_ATI_separate_stencil
89 #define need_GL_NV_vertex_program
90
91 #include "main/remap_helper.h"
92
93 static const struct dri_extension card_extensions[] = {
94 /* *INDENT-OFF* */
95 {"GL_ARB_depth_clamp", NULL},
96 {"GL_ARB_depth_texture", NULL},
97 {"GL_ARB_fragment_program", NULL},
98 {"GL_ARB_fragment_program_shadow", NULL},
99 {"GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions},
100 {"GL_ARB_multitexture", NULL},
101 {"GL_ARB_point_parameters", GL_ARB_point_parameters_functions},
102 {"GL_ARB_shadow", NULL},
103 {"GL_ARB_shadow_ambient", NULL},
104 {"GL_ARB_texture_border_clamp", NULL},
105 {"GL_ARB_texture_cube_map", NULL},
106 {"GL_ARB_texture_env_add", NULL},
107 {"GL_ARB_texture_env_combine", NULL},
108 {"GL_ARB_texture_env_crossbar", NULL},
109 {"GL_ARB_texture_env_dot3", NULL},
110 {"GL_ARB_texture_mirrored_repeat", NULL},
111 {"GL_ARB_texture_non_power_of_two", NULL},
112 {"GL_ARB_vertex_program", GL_ARB_vertex_program_functions},
113 {"GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions},
114 {"GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions},
115 {"GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions},
116 {"GL_EXT_blend_subtract", NULL},
117 {"GL_EXT_packed_depth_stencil", NULL},
118 {"GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
119 {"GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions},
120 {"GL_EXT_provoking_vertex", GL_EXT_provoking_vertex_functions },
121 {"GL_EXT_secondary_color", GL_EXT_secondary_color_functions},
122 {"GL_EXT_shadow_funcs", NULL},
123 {"GL_EXT_stencil_two_side", GL_EXT_stencil_two_side_functions},
124 {"GL_EXT_stencil_wrap", NULL},
125 {"GL_EXT_texture_edge_clamp", NULL},
126 {"GL_EXT_texture_env_combine", NULL},
127 {"GL_EXT_texture_env_dot3", NULL},
128 {"GL_EXT_texture_filter_anisotropic", NULL},
129 {"GL_EXT_texture_lod_bias", NULL},
130 {"GL_EXT_texture_mirror_clamp", NULL},
131 {"GL_EXT_texture_rectangle", NULL},
132 {"GL_EXT_vertex_array_bgra", NULL},
133 {"GL_EXT_texture_sRGB", NULL},
134 {"GL_ATI_separate_stencil", GL_ATI_separate_stencil_functions},
135 {"GL_ATI_texture_env_combine3", NULL},
136 {"GL_ATI_texture_mirror_once", NULL},
137 {"GL_MESA_pack_invert", NULL},
138 {"GL_MESA_ycbcr_texture", NULL},
139 {"GL_MESAX_texture_float", NULL},
140 {"GL_NV_blend_square", NULL},
141 {"GL_NV_vertex_program", GL_NV_vertex_program_functions},
142 {"GL_SGIS_generate_mipmap", NULL},
143 {"GL_ARB_pixel_buffer_object", NULL},
144 {NULL, NULL}
145 /* *INDENT-ON* */
146 };
147
148
149 static const struct dri_extension mm_extensions[] = {
150 { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
151 { NULL, NULL }
152 };
153
154 /**
155 * The GL 2.0 functions are needed to make display lists work with
156 * functions added by GL_ATI_separate_stencil.
157 */
158 static const struct dri_extension gl_20_extension[] = {
159 #ifdef R600_ENABLE_GLSL_TEST
160 {"GL_ARB_shading_language_100", GL_VERSION_2_0_functions },
161 #else
162 {"GL_VERSION_2_0", GL_VERSION_2_0_functions },
163 #endif /* R600_ENABLE_GLSL_TEST */
164 {NULL, NULL}
165 };
166
167 static const struct tnl_pipeline_stage *r600_pipeline[] = {
168 /* Catch any t&l fallbacks
169 */
170 &_tnl_vertex_transform_stage,
171 &_tnl_normal_transform_stage,
172 &_tnl_lighting_stage,
173 &_tnl_fog_coordinate_stage,
174 &_tnl_texgen_stage,
175 &_tnl_texture_transform_stage,
176 &_tnl_point_attenuation_stage,
177 &_tnl_vertex_program_stage,
178 &_tnl_render_stage,
179 0,
180 };
181
182 static void r600_get_lock(radeonContextPtr rmesa)
183 {
184 drm_radeon_sarea_t *sarea = rmesa->sarea;
185
186 if (sarea->ctx_owner != rmesa->dri.hwContext) {
187 sarea->ctx_owner = rmesa->dri.hwContext;
188 if (!rmesa->radeonScreen->kernel_mm)
189 radeon_bo_legacy_texture_age(rmesa->radeonScreen->bom);
190 }
191 }
192
193 static void r600_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
194 {
195 /* please flush pipe do all pending work */
196 /* to be enabled */
197 }
198
199 static void r600_vtbl_pre_emit_atoms(radeonContextPtr radeon)
200 {
201 r700Start3D((context_t *)radeon);
202 }
203
204 static void r600_fallback(GLcontext *ctx, GLuint bit, GLboolean mode)
205 {
206 context_t *context = R700_CONTEXT(ctx);
207 if (mode)
208 context->radeon.Fallback |= bit;
209 else
210 context->radeon.Fallback &= ~bit;
211 }
212
213 static void r600_emit_query_finish(radeonContextPtr radeon)
214 {
215 context_t *context = (context_t*) radeon;
216 BATCH_LOCALS(&context->radeon);
217
218 struct radeon_query_object *query = radeon->query.current;
219
220 BEGIN_BATCH_NO_AUTOSTATE(4 + 2);
221 R600_OUT_BATCH(CP_PACKET3(R600_IT_EVENT_WRITE, 2));
222 R600_OUT_BATCH(ZPASS_DONE);
223 R600_OUT_BATCH(query->curr_offset + 8); /* hw writes qwords */
224 R600_OUT_BATCH(0x00000000);
225 R600_OUT_BATCH_RELOC(VGT_EVENT_INITIATOR, query->bo, 0, 0, RADEON_GEM_DOMAIN_GTT, 0);
226 END_BATCH();
227 assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
228 query->emitted_begin = GL_FALSE;
229 }
230
231 static void r600_init_vtbl(radeonContextPtr radeon)
232 {
233 radeon->vtbl.get_lock = r600_get_lock;
234 radeon->vtbl.update_viewport_offset = r700UpdateViewportOffset;
235 radeon->vtbl.emit_cs_header = r600_vtbl_emit_cs_header;
236 radeon->vtbl.swtcl_flush = NULL;
237 radeon->vtbl.pre_emit_atoms = r600_vtbl_pre_emit_atoms;
238 radeon->vtbl.fallback = r600_fallback;
239 radeon->vtbl.emit_query_finish = r600_emit_query_finish;
240 radeon->vtbl.check_blit = r600_check_blit;
241 radeon->vtbl.blit = r600_blit;
242 }
243
244 static void r600InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
245 {
246 ctx->Const.MaxTextureImageUnits = 16;
247 /* 8 per clause on r6xx, 16 on r7xx
248 * but I think mesa only supports 8 at the moment
249 */
250 ctx->Const.MaxTextureCoordUnits = 8;
251 ctx->Const.MaxTextureUnits =
252 MIN2(ctx->Const.MaxTextureImageUnits,
253 ctx->Const.MaxTextureCoordUnits);
254 ctx->Const.MaxCombinedTextureImageUnits =
255 ctx->Const.MaxVertexTextureImageUnits +
256 ctx->Const.MaxTextureImageUnits;
257
258 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
259 ctx->Const.MaxTextureLodBias = 16.0;
260
261 ctx->Const.MaxTextureLevels = 13; /* hw support 14 */
262 ctx->Const.MaxTextureRectSize = 4096; /* hw support 8192 */
263
264 ctx->Const.MinPointSize = 0x0001 / 8.0;
265 ctx->Const.MinPointSizeAA = 0x0001 / 8.0;
266 ctx->Const.MaxPointSize = 0xffff / 8.0;
267 ctx->Const.MaxPointSizeAA = 0xffff / 8.0;
268
269 ctx->Const.MinLineWidth = 0x0001 / 8.0;
270 ctx->Const.MinLineWidthAA = 0x0001 / 8.0;
271 ctx->Const.MaxLineWidth = 0xffff / 8.0;
272 ctx->Const.MaxLineWidthAA = 0xffff / 8.0;
273
274 ctx->Const.MaxDrawBuffers = 1; /* hw supports 8 */
275 ctx->Const.MaxColorAttachments = 1;
276 ctx->Const.MaxRenderbufferSize = 4096;
277
278 /* 256 for reg-based consts, inline consts also supported */
279 ctx->Const.VertexProgram.MaxInstructions = 8192; /* in theory no limit */
280 ctx->Const.VertexProgram.MaxNativeInstructions = 8192;
281 ctx->Const.VertexProgram.MaxNativeAttribs = 160;
282 ctx->Const.VertexProgram.MaxTemps = 128;
283 ctx->Const.VertexProgram.MaxNativeTemps = 128;
284 ctx->Const.VertexProgram.MaxNativeParameters = 256;
285 ctx->Const.VertexProgram.MaxNativeAddressRegs = 1; /* ??? */
286
287 ctx->Const.FragmentProgram.MaxNativeTemps = 128;
288 ctx->Const.FragmentProgram.MaxNativeAttribs = 32;
289 ctx->Const.FragmentProgram.MaxNativeParameters = 256;
290 ctx->Const.FragmentProgram.MaxNativeAluInstructions = 8192;
291 /* 8 per clause on r6xx, 16 on r7xx */
292 if (screen->chip_family >= CHIP_FAMILY_RV770)
293 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 16;
294 else
295 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 8;
296 ctx->Const.FragmentProgram.MaxNativeInstructions = 8192;
297 ctx->Const.FragmentProgram.MaxNativeTexIndirections = 8; /* ??? */
298 ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0; /* and these are?? */
299 }
300
301 static void r600ParseOptions(context_t *r600, radeonScreenPtr screen)
302 {
303 /* Parse configuration files.
304 * Do this here so that initialMaxAnisotropy is set before we create
305 * the default textures.
306 */
307 driParseConfigFiles(&r600->radeon.optionCache, &screen->optionCache,
308 screen->driScreen->myNum, "r600");
309
310 r600->radeon.initialMaxAnisotropy = driQueryOptionf(&r600->radeon.optionCache,
311 "def_max_anisotropy");
312
313 }
314
315 static void r600InitGLExtensions(GLcontext *ctx)
316 {
317 context_t *r600 = R700_CONTEXT(ctx);
318
319 driInitExtensions(ctx, card_extensions, GL_TRUE);
320 if (r600->radeon.radeonScreen->kernel_mm)
321 driInitExtensions(ctx, mm_extensions, GL_FALSE);
322
323 #ifdef R600_ENABLE_GLSL_TEST
324 driInitExtensions(ctx, gl_20_extension, GL_TRUE);
325 _mesa_enable_2_0_extensions(ctx);
326
327 /* glsl compiler has problem if this is not GL_TRUE */
328 ctx->Shader.EmitCondCodes = GL_TRUE;
329 #endif /* R600_ENABLE_GLSL_TEST */
330
331 if (driQueryOptionb
332 (&r600->radeon.optionCache, "disable_stencil_two_side"))
333 _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
334
335 if (r600->radeon.glCtx->Mesa_DXTn
336 && !driQueryOptionb(&r600->radeon.optionCache, "disable_s3tc")) {
337 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
338 _mesa_enable_extension(ctx, "GL_S3_s3tc");
339 } else
340 if (driQueryOptionb(&r600->radeon.optionCache, "force_s3tc_enable"))
341 {
342 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
343 }
344
345 /* RV740 had a broken pipe config prior to drm 1.32 */
346 if (!r600->radeon.radeonScreen->kernel_mm) {
347 if ((r600->radeon.dri.drmMinor < 32) &&
348 (r600->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV740))
349 _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
350 }
351 }
352
353 /* Create the device specific rendering context.
354 */
355 GLboolean r600CreateContext(const __GLcontextModes * glVisual,
356 __DRIcontext * driContextPriv,
357 void *sharedContextPrivate)
358 {
359 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
360 radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
361 struct dd_function_table functions;
362 context_t *r600;
363 GLcontext *ctx;
364
365 assert(glVisual);
366 assert(driContextPriv);
367 assert(screen);
368
369 /* Allocate the R600 context */
370 r600 = (context_t*) CALLOC(sizeof(*r600));
371 if (!r600) {
372 radeon_error("Failed to allocate memory for context.\n");
373 return GL_FALSE;
374 }
375
376 r600ParseOptions(r600, screen);
377
378 r600->radeon.radeonScreen = screen;
379 r600_init_vtbl(&r600->radeon);
380
381 /* Init default driver functions then plug in our R600-specific functions
382 * (the texture functions are especially important)
383 */
384 _mesa_init_driver_functions(&functions);
385
386 r700InitStateFuncs(&functions);
387 r600InitTextureFuncs(&r600->radeon, &functions);
388 r700InitShaderFuncs(&functions);
389 radeonInitQueryObjFunctions(&functions);
390 r700InitIoctlFuncs(&functions);
391 radeonInitBufferObjectFuncs(&functions);
392
393 if (!radeonInitContext(&r600->radeon, &functions,
394 glVisual, driContextPriv,
395 sharedContextPrivate)) {
396 radeon_error("Initializing context failed.\n");
397 FREE(r600);
398 return GL_FALSE;
399 }
400
401 ctx = r600->radeon.glCtx;
402
403 ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
404 ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
405
406 r600InitConstValues(ctx, screen);
407
408 _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
409
410 /* Initialize the software rasterizer and helper modules.
411 */
412 _swrast_CreateContext(ctx);
413 _vbo_CreateContext(ctx);
414 _tnl_CreateContext(ctx);
415 _swsetup_CreateContext(ctx);
416 _swsetup_Wakeup(ctx);
417
418 /* Install the customized pipeline:
419 */
420 _tnl_destroy_pipeline(ctx);
421 _tnl_install_pipeline(ctx, r600_pipeline);
422 TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
423
424 /* Configure swrast and TNL to match hardware characteristics:
425 */
426 _swrast_allow_pixel_fog(ctx, GL_FALSE);
427 _swrast_allow_vertex_fog(ctx, GL_TRUE);
428 _tnl_allow_pixel_fog(ctx, GL_FALSE);
429 _tnl_allow_vertex_fog(ctx, GL_TRUE);
430
431 radeon_init_debug();
432
433 r700InitDraw(ctx);
434
435 radeon_fbo_init(&r600->radeon);
436 radeonInitSpanFuncs( ctx );
437 r600InitCmdBuf(r600);
438 r700InitState(r600->radeon.glCtx);
439
440 r600InitGLExtensions(ctx);
441
442 return GL_TRUE;
443 }
444
445