src/mesa/drivers/dri/r600/r600_context.h

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /**
  31  * \file
  32  *
  33  * \author Keith Whitwell <keith@tungstengraphics.com>
  34  * \author Nicolai Haehnle <prefect_@gmx.net>
  35  */
  36
  37 #ifndef __R600_CONTEXT_H__
  38 #define __R600_CONTEXT_H__
  39
  40 #include "tnl/t_vertex.h"
  41 #include "drm.h"
  42 #include "radeon_drm.h"
  43 #include "dri_util.h"
  44 #include "texmem.h"
  45 #include "radeon_common.h"
  46
  47 #include "main/macros.h"
  48 #include "main/mtypes.h"
  49 #include "main/colormac.h"
  50
  51 #include "r700_chip.h"
  52 #include "r600_tex.h"
  53 #include "r700_oglprog.h"
  54
  55 struct r600_context;
  56 typedef struct r600_context context_t;
  57
  58 GLboolean r700SendPSState(context_t *context);
  59 GLboolean r700SendVSState(context_t *context);
  60 GLboolean r700SendSQConfig(context_t *context);
  61
  62 #include "main/mm.h"
  63
  64 /************ DMA BUFFERS **************/
  65
  66 /* The blit width for texture uploads
  67  */
  68 #define R600_BLIT_WIDTH_BYTES 1024
  69 #define R600_MAX_TEXTURE_UNITS 8
  70
  71 struct r600_texture_state {
  72         int tc_count;           /* number of incoming texture coordinates from VAP */
  73 };
  74
  75 /* Perhaps more if we store programs in vmem? */
  76 /* drm_r600_cmd_header_t->vpu->count is unsigned char */
  77 #define VSF_MAX_FRAGMENT_LENGTH (255*4)
  78
  79 /* Can be tested with colormat currently. */
  80 #define VSF_MAX_FRAGMENT_TEMPS (14)
  81
  82 #define STATE_R600_WINDOW_DIMENSION (STATE_INTERNAL_DRIVER+0)
  83 #define STATE_R600_TEXRECT_FACTOR (STATE_INTERNAL_DRIVER+1)
  84
  85 extern int hw_tcl_on;
  86
  87 #define COLOR_IS_RGBA
  88 #define TAG(x) r600##x
  89 #include "tnl_dd/t_dd_vertex.h"
  90 #undef TAG
  91
  92 #define PFS_MAX_ALU_INST        64
  93 #define PFS_MAX_TEX_INST        64
  94 #define PFS_MAX_TEX_INDIRECT 4
  95 #define PFS_NUM_TEMP_REGS       32
  96 #define PFS_NUM_CONST_REGS      16
  97
  98 #define R600_MAX_AOS_ARRAYS             16
  99
 100 #define REG_COORDS      0
 101 #define REG_COLOR0      1
 102 #define REG_TEX0        2
 103
 104 #define R600_FALLBACK_NONE 0
 105 #define R600_FALLBACK_TCL 1
 106 #define R600_FALLBACK_RAST 2
 107
 108 enum
 109 {
 110     NO_SHIFT    = 0,
 111     LEFT_SHIFT  = 1,
 112     RIGHT_SHIFT = 2,
 113 };
 114
 115 /**
 116  * \brief R600 context structure.
 117  */
 118 struct r600_context {
 119         struct radeon_context radeon;   /* parent class, must be first */
 120
 121         /* ------ */
 122         R700_CHIP_CONTEXT hw;
 123
 124         /* Vertex buffers
 125          */
 126         GLvector4f dummy_attrib[_TNL_ATTRIB_MAX];
 127         GLvector4f *temp_attrib[_TNL_ATTRIB_MAX];
 128
 129 };
 130
 131 #define R700_CONTEXT(ctx)               ((context_t *)(ctx->DriverCtx))
 132 #define GL_CONTEXT(context)     ((GLcontext *)(context->radeon.glCtx))
 133
 134 extern void r600DestroyContext(__DRIcontextPrivate * driContextPriv);
 135 extern GLboolean r600CreateContext(const __GLcontextModes * glVisual,
 136                                    __DRIcontextPrivate * driContextPriv,
 137                                    void *sharedContextPrivate);
 138
 139 #define R700_CONTEXT_STATES(context) ((R700_CHIP_CONTEXT *)(&context->hw))
 140
 141 extern GLboolean r700InitChipObject(context_t *context);
 142 extern GLboolean r700SendContextStates(context_t *context);
 143 extern GLboolean r700SendViewportState(context_t *context, int id);
 144 extern GLboolean r700SendRenderTargetState(context_t *context, int id);
 145 extern GLboolean r700SendTextureState(context_t *context);
 146 extern GLboolean r700SendDepthTargetState(context_t *context);
 147 extern GLboolean r700SendUCPState(context_t *context);
 148 extern GLboolean r700SendFSState(context_t *context);
 149 extern void r700EmitState(GLcontext * ctx);
 150
 151 extern GLboolean r700SyncSurf(context_t *context,
 152                               struct radeon_bo *pbo,
 153                               uint32_t read_domain,
 154                               uint32_t write_domain,
 155                               uint32_t sync_type);
 156
 157 extern int       r700SetupStreams(GLcontext * ctx);
 158 extern void      r700SetupVTXConstants(GLcontext  * ctx,
 159                                        unsigned int nStreamID,
 160                                        void *       pAos,
 161                                        unsigned int size,      /* number of elements in vector */
 162                                        unsigned int stride,
 163                                        unsigned int Count);    /* number of vectors in stream */
 164
 165 #define RADEON_D_CAPTURE 0
 166 #define RADEON_D_PLAYBACK 1
 167 #define RADEON_D_PLAYBACK_RAW 2
 168 #define RADEON_D_T 3
 169
 170 #define r600PackFloat32 radeonPackFloat32
 171 #define r600PackFloat24 radeonPackFloat24
 172
 173 #endif                          /* __R600_CONTEXT_H__ */