2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 **************************************************************************/
33 * \author Keith Whitwell <keith@tungstengraphics.com>
34 * \author Nicolai Haehnle <prefect_@gmx.net>
37 #ifndef __R600_CONTEXT_H__
38 #define __R600_CONTEXT_H__
40 #include "tnl/t_vertex.h"
42 #include "radeon_drm.h"
45 #include "radeon_common.h"
47 #include "main/macros.h"
48 #include "main/mtypes.h"
49 #include "main/colormac.h"
51 #include "r700_chip.h"
53 #include "r700_oglprog.h"
54 #include "r700_vertprog.h"
56 #include "evergreen_chip.h"
59 typedef struct r600_context context_t
;
64 #define TAG(x) r600##x
65 #include "tnl_dd/t_dd_vertex.h"
68 #define FORCE_CF_TEX_BARRIER 1
70 /* #define GENERATE_SHADER_FOR_2D 1 */
72 #define R600_FALLBACK_NONE 0
73 #define R600_FALLBACK_TCL 1
74 #define R600_FALLBACK_RAST 2
76 struct r600_hw_state
{
77 struct radeon_state_atom sq
;
78 struct radeon_state_atom db
;
79 struct radeon_state_atom stencil
;
80 struct radeon_state_atom db_target
;
81 struct radeon_state_atom sc
;
82 struct radeon_state_atom scissor
;
83 struct radeon_state_atom aa
;
84 struct radeon_state_atom cl
;
85 struct radeon_state_atom gb
;
86 struct radeon_state_atom ucp
;
87 struct radeon_state_atom su
;
88 struct radeon_state_atom poly
;
89 struct radeon_state_atom cb
;
90 struct radeon_state_atom clrcmp
;
91 struct radeon_state_atom blnd
;
92 struct radeon_state_atom blnd_clr
;
93 struct radeon_state_atom cb_target
;
94 struct radeon_state_atom sx
;
95 struct radeon_state_atom vgt
;
96 struct radeon_state_atom spi
;
97 struct radeon_state_atom vpt
;
99 struct radeon_state_atom fs
;
100 struct radeon_state_atom vs
;
101 struct radeon_state_atom ps
;
103 struct radeon_state_atom vs_consts
;
104 struct radeon_state_atom ps_consts
;
106 struct radeon_state_atom vtx
;
107 struct radeon_state_atom tx
;
108 struct radeon_state_atom tx_smplr
;
109 struct radeon_state_atom tx_brdr_clr
;
112 struct evergreen_hw_state
{
113 struct radeon_state_atom one_time_init
;
114 struct radeon_state_atom init
;
115 struct radeon_state_atom pa
;
116 struct radeon_state_atom vgt
;
117 struct radeon_state_atom tp
;
118 struct radeon_state_atom sq
;
119 struct radeon_state_atom vs
;
120 struct radeon_state_atom spi
;
121 struct radeon_state_atom sx
;
122 struct radeon_state_atom tx
;
123 struct radeon_state_atom db
;
124 struct radeon_state_atom cb
;
125 struct radeon_state_atom vtx
;
126 struct radeon_state_atom cp
;
127 struct radeon_state_atom timestamp
;
130 typedef struct StreamDesc
132 GLint size
; //number of data element
133 GLenum type
; //data element type
135 GLenum format
; // GL_RGBA,GLBGRA
137 struct radeon_bo
*bo
;
144 GLboolean is_named_bo
;
148 typedef struct r700_index_buffer
150 struct radeon_bo
*bo
;
158 * \brief R600 context structure.
160 struct r600_context
{
161 struct radeon_context radeon
; /* parent class, must be first */
164 R700_CHIP_CONTEXT hw
;
166 struct r600_hw_state atoms
;
168 struct evergreen_hw_state evergreen_atoms
;
171 struct r700_vertex_program
*selected_vp
;
176 StreamDesc stream_desc
[VERT_ATTRIB_MAX
];
177 struct r700_index_buffer ind_buf
;
178 struct radeon_bo
*blit_bo
;
179 GLboolean blit_bo_loaded
;
181 /* Shader const buffer */
182 struct radeon_bo
* vp_Constbo
;
184 struct radeon_bo
* fp_Constbo
;
188 #define EVERGREEN_CONTEXT(ctx) ((context_t *)(ctx->DriverCtx))
190 #define R700_CONTEXT(ctx) ((context_t *)(ctx->DriverCtx))
191 #define GL_CONTEXT(context) ((struct gl_context *)(context->radeon.glCtx))
193 #define GET_EVERGREEN_CHIP(context) ((EVERGREEN_CHIP_CONTEXT*)(context->pChip))
195 extern GLboolean
r600CreateContext(gl_api api
,
196 const struct gl_config
* glVisual
,
197 __DRIcontext
* driContextPriv
,
198 void *sharedContextPrivate
);
200 extern void r600DestroyContext(__DRIcontext
*driContextPriv
);
201 extern void evergreenCreateChip(context_t
*context
);
203 #define R700_CONTEXT_STATES(context) ((R700_CHIP_CONTEXT *)(&context->hw))
205 #define R600_NEWPRIM( rmesa ) \
207 if ( rmesa->radeon.dma.flush ) \
208 rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); \
211 #define R600_STATECHANGE(r600, ATOM) \
213 R600_NEWPRIM(r600); \
214 r600->atoms.ATOM.dirty = GL_TRUE; \
215 r600->radeon.hw.is_dirty = GL_TRUE; \
218 #define EVERGREEN_STATECHANGE(r600, ATOM) \
220 R600_NEWPRIM(r600); \
221 r600->evergreen_atoms.ATOM.dirty = GL_TRUE; \
222 r600->radeon.hw.is_dirty = GL_TRUE; \
225 extern GLboolean
r700SyncSurf(context_t
*context
,
226 struct radeon_bo
*pbo
,
227 uint32_t read_domain
,
228 uint32_t write_domain
,
231 extern void r700WaitForIdleClean(context_t
*context
);
233 extern void r700Start3D(context_t
*context
);
234 extern void r600InitAtoms(context_t
*context
);
235 extern void r700InitDraw(struct gl_context
*ctx
);
237 extern void evergreenInitAtoms(context_t
*context
);
238 extern void evergreenInitDraw(struct gl_context
*ctx
);
240 #define RADEON_D_CAPTURE 0
241 #define RADEON_D_PLAYBACK 1
242 #define RADEON_D_PLAYBACK_RAW 2
245 #endif /* __R600_CONTEXT_H__ */