src/mesa/drivers/dri/r600/r600_context.h

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /**
  31  * \file
  32  *
  33  * \author Keith Whitwell <keith@tungstengraphics.com>
  34  * \author Nicolai Haehnle <prefect_@gmx.net>
  35  */
  36
  37 #ifndef __R600_CONTEXT_H__
  38 #define __R600_CONTEXT_H__
  39
  40 #include "tnl/t_vertex.h"
  41 #include "drm.h"
  42 #include "radeon_drm.h"
  43 #include "dri_util.h"
  44 #include "texmem.h"
  45 #include "radeon_common.h"
  46
  47 #include "main/macros.h"
  48 #include "main/mtypes.h"
  49 #include "main/colormac.h"
  50
  51 #include "r700_chip.h"
  52 #include "r600_tex.h"
  53 #include "r700_oglprog.h"
  54 #include "r700_vertprog.h"
  55
  56 struct r600_context;
  57 typedef struct r600_context context_t;
  58
  59 #include "main/mm.h"
  60
  61 /************ DMA BUFFERS **************/
  62
  63 /* The blit width for texture uploads
  64  */
  65 #define R600_BLIT_WIDTH_BYTES 1024
  66 #define R600_MAX_TEXTURE_UNITS 8
  67
  68 struct r600_texture_state {
  69         int tc_count;           /* number of incoming texture coordinates from VAP */
  70 };
  71
  72 /* Perhaps more if we store programs in vmem? */
  73 /* drm_r600_cmd_header_t->vpu->count is unsigned char */
  74 #define VSF_MAX_FRAGMENT_LENGTH (255*4)
  75
  76 /* Can be tested with colormat currently. */
  77 #define VSF_MAX_FRAGMENT_TEMPS (14)
  78
  79 #define STATE_R600_WINDOW_DIMENSION (STATE_INTERNAL_DRIVER+0)
  80 #define STATE_R600_TEXRECT_FACTOR (STATE_INTERNAL_DRIVER+1)
  81
  82 extern int hw_tcl_on;
  83
  84 #define COLOR_IS_RGBA
  85 #define TAG(x) r600##x
  86 #include "tnl_dd/t_dd_vertex.h"
  87 #undef TAG
  88
  89 #define R600_FALLBACK_NONE 0
  90 #define R600_FALLBACK_TCL 1
  91 #define R600_FALLBACK_RAST 2
  92
  93 struct r600_hw_state {
  94         struct radeon_state_atom sq;
  95         struct radeon_state_atom db;
  96         struct radeon_state_atom stencil;
  97         struct radeon_state_atom db_target;
  98         struct radeon_state_atom sc;
  99         struct radeon_state_atom scissor;
 100         struct radeon_state_atom aa;
 101         struct radeon_state_atom cl;
 102         struct radeon_state_atom gb;
 103         struct radeon_state_atom ucp;
 104         struct radeon_state_atom su;
 105         struct radeon_state_atom poly;
 106         struct radeon_state_atom cb;
 107         struct radeon_state_atom clrcmp;
 108         struct radeon_state_atom blnd;
 109         struct radeon_state_atom blnd_clr;
 110         struct radeon_state_atom cb_target;
 111         struct radeon_state_atom sx;
 112         struct radeon_state_atom vgt;
 113         struct radeon_state_atom spi;
 114         struct radeon_state_atom vpt;
 115
 116         struct radeon_state_atom fs;
 117         struct radeon_state_atom vs;
 118         struct radeon_state_atom ps;
 119
 120         struct radeon_state_atom vs_consts;
 121         struct radeon_state_atom ps_consts;
 122
 123         struct radeon_state_atom vtx;
 124         struct radeon_state_atom tx;
 125         struct radeon_state_atom tx_smplr;
 126         struct radeon_state_atom tx_brdr_clr;
 127 };
 128
 129 /**
 130  * \brief R600 context structure.
 131  */
 132 struct r600_context {
 133         struct radeon_context radeon;   /* parent class, must be first */
 134
 135         /* ------ */
 136         R700_CHIP_CONTEXT hw;
 137
 138         struct r600_hw_state atoms;
 139
 140         struct r700_vertex_program *selected_vp;
 141
 142         /* Vertex buffers
 143          */
 144         GLvector4f dummy_attrib[_TNL_ATTRIB_MAX];
 145         GLvector4f *temp_attrib[_TNL_ATTRIB_MAX];
 146
 147 };
 148
 149 #define R700_CONTEXT(ctx)               ((context_t *)(ctx->DriverCtx))
 150 #define GL_CONTEXT(context)     ((GLcontext *)(context->radeon.glCtx))
 151
 152 extern GLboolean r600CreateContext(const __GLcontextModes * glVisual,
 153                                    __DRIcontextPrivate * driContextPriv,
 154                                    void *sharedContextPrivate);
 155
 156 #define R700_CONTEXT_STATES(context) ((R700_CHIP_CONTEXT *)(&context->hw))
 157
 158 #define R600_NEWPRIM( rmesa )                   \
 159 do {                                            \
 160         if ( rmesa->radeon.dma.flush )                  \
 161                 rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); \
 162 } while (0)
 163
 164 #define R600_STATECHANGE(r600, ATOM)                    \
 165 do {                                                    \
 166         R600_NEWPRIM(r600);                                     \
 167         r600->atoms.ATOM.dirty = GL_TRUE;                                       \
 168         r600->radeon.hw.is_dirty = GL_TRUE;                     \
 169 } while(0)
 170
 171 extern GLboolean r700SyncSurf(context_t *context,
 172                               struct radeon_bo *pbo,
 173                               uint32_t read_domain,
 174                               uint32_t write_domain,
 175                               uint32_t sync_type);
 176
 177 extern void r700SetupStreams(GLcontext * ctx);
 178 extern void r700Start3D(context_t *context);
 179 extern void r600InitAtoms(context_t *context);
 180
 181 #define RADEON_D_CAPTURE 0
 182 #define RADEON_D_PLAYBACK 1
 183 #define RADEON_D_PLAYBACK_RAW 2
 184 #define RADEON_D_T 3
 185
 186 #define r600PackFloat32 radeonPackFloat32
 187 #define r600PackFloat24 radeonPackFloat24
 188
 189 #endif                          /* __R600_CONTEXT_H__ */