2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
32 * \author Keith Whitwell <keith@tungstengraphics.com>
35 #include "main/glheader.h"
36 #include "main/imports.h"
37 #include "main/colormac.h"
38 #include "main/context.h"
39 #include "main/enums.h"
40 #include "main/image.h"
41 #include "main/mipmap.h"
42 #include "main/simple_list.h"
43 #include "main/texstore.h"
44 #include "main/teximage.h"
45 #include "main/texobj.h"
49 #include "r600_context.h"
50 #include "r700_state.h"
51 #include "radeon_mipmap_tree.h"
57 static unsigned int translate_wrap_mode(GLenum wrapmode
)
60 case GL_REPEAT
: return SQ_TEX_WRAP
;
61 case GL_CLAMP
: return SQ_TEX_CLAMP_HALF_BORDER
;
62 case GL_CLAMP_TO_EDGE
: return SQ_TEX_CLAMP_LAST_TEXEL
;
63 case GL_CLAMP_TO_BORDER
: return SQ_TEX_CLAMP_BORDER
;
64 case GL_MIRRORED_REPEAT
: return SQ_TEX_MIRROR
;
65 case GL_MIRROR_CLAMP_EXT
: return SQ_TEX_MIRROR_ONCE_HALF_BORDER
;
66 case GL_MIRROR_CLAMP_TO_EDGE_EXT
: return SQ_TEX_MIRROR_ONCE_LAST_TEXEL
;
67 case GL_MIRROR_CLAMP_TO_BORDER_EXT
: return SQ_TEX_MIRROR_ONCE_BORDER
;
69 radeon_error("bad wrap mode in %s", __FUNCTION__
);
76 * Update the cached hardware registers based on the current texture wrap modes.
78 * \param t Texture object whose wrap modes are to be set
80 static void r600UpdateTexWrap(radeonTexObjPtr t
)
82 struct gl_texture_object
*tObj
= &t
->base
;
84 SETfield(t
->SQ_TEX_SAMPLER0
, translate_wrap_mode(tObj
->WrapS
),
85 SQ_TEX_SAMPLER_WORD0_0__CLAMP_X_shift
, SQ_TEX_SAMPLER_WORD0_0__CLAMP_X_mask
);
87 if (tObj
->Target
!= GL_TEXTURE_1D
) {
88 SETfield(t
->SQ_TEX_SAMPLER0
, translate_wrap_mode(tObj
->WrapT
),
89 CLAMP_Y_shift
, CLAMP_Y_mask
);
91 if (tObj
->Target
== GL_TEXTURE_3D
)
92 SETfield(t
->SQ_TEX_SAMPLER0
, translate_wrap_mode(tObj
->WrapR
),
93 CLAMP_Z_shift
, CLAMP_Z_mask
);
97 static void r600SetTexDefaultState(radeonTexObjPtr t
)
99 /* Init text object to default states. */
100 t
->SQ_TEX_RESOURCE0
= 0;
101 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_2D
, DIM_shift
, DIM_mask
);
102 SETfield(t
->SQ_TEX_RESOURCE0
, ARRAY_LINEAR_GENERAL
,
103 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift
, SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask
);
104 CLEARbit(t
->SQ_TEX_RESOURCE0
, TILE_TYPE_bit
);
106 t
->SQ_TEX_RESOURCE1
= 0;
107 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
108 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
110 t
->SQ_TEX_RESOURCE2
= 0;
111 t
->SQ_TEX_RESOURCE3
= 0;
113 t
->SQ_TEX_RESOURCE4
= 0;
114 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_UNSIGNED
,
115 FORMAT_COMP_X_shift
, FORMAT_COMP_X_mask
);
116 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_UNSIGNED
,
117 FORMAT_COMP_Y_shift
, FORMAT_COMP_Y_mask
);
118 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_UNSIGNED
,
119 FORMAT_COMP_Z_shift
, FORMAT_COMP_Z_mask
);
120 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_FORMAT_COMP_UNSIGNED
,
121 FORMAT_COMP_W_shift
, FORMAT_COMP_W_mask
);
122 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_NUM_FORMAT_NORM
,
123 SQ_TEX_RESOURCE_WORD4_0__NUM_FORMAT_ALL_shift
, SQ_TEX_RESOURCE_WORD4_0__NUM_FORMAT_ALL_mask
);
124 CLEARbit(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__SRF_MODE_ALL_bit
);
125 CLEARbit(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit
);
126 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_ENDIAN_NONE
,
127 SQ_TEX_RESOURCE_WORD4_0__ENDIAN_SWAP_shift
, SQ_TEX_RESOURCE_WORD4_0__ENDIAN_SWAP_mask
);
128 SETfield(t
->SQ_TEX_RESOURCE4
, 1, REQUEST_SIZE_shift
, REQUEST_SIZE_mask
);
129 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
130 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
,
131 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
132 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
133 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
,
134 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
135 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
136 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
,
137 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
138 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
139 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
,
140 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
141 SETfield(t
->SQ_TEX_RESOURCE4
, 0, BASE_LEVEL_shift
, BASE_LEVEL_mask
); /* mip-maps */
143 t
->SQ_TEX_RESOURCE5
= 0;
144 t
->SQ_TEX_RESOURCE6
= 0;
146 SETfield(t
->SQ_TEX_RESOURCE6
, SQ_TEX_VTX_VALID_TEXTURE
,
147 SQ_TEX_RESOURCE_WORD6_0__TYPE_shift
, SQ_TEX_RESOURCE_WORD6_0__TYPE_mask
);
149 /* Initialize sampler registers */
150 t
->SQ_TEX_SAMPLER0
= 0;
151 SETfield(t
->SQ_TEX_SAMPLER0
, SQ_TEX_WRAP
, SQ_TEX_SAMPLER_WORD0_0__CLAMP_X_shift
,
152 SQ_TEX_SAMPLER_WORD0_0__CLAMP_X_mask
);
153 SETfield(t
->SQ_TEX_SAMPLER0
, SQ_TEX_WRAP
, CLAMP_Y_shift
, CLAMP_Y_mask
);
154 SETfield(t
->SQ_TEX_SAMPLER0
, SQ_TEX_WRAP
, CLAMP_Z_shift
, CLAMP_Z_mask
);
155 SETfield(t
->SQ_TEX_SAMPLER0
, SQ_TEX_XY_FILTER_POINT
, XY_MAG_FILTER_shift
, XY_MAG_FILTER_mask
);
156 SETfield(t
->SQ_TEX_SAMPLER0
, SQ_TEX_XY_FILTER_POINT
, XY_MIN_FILTER_shift
, XY_MIN_FILTER_mask
);
157 SETfield(t
->SQ_TEX_SAMPLER0
, SQ_TEX_Z_FILTER_NONE
, Z_FILTER_shift
, Z_FILTER_mask
);
158 SETfield(t
->SQ_TEX_SAMPLER0
, SQ_TEX_Z_FILTER_NONE
, MIP_FILTER_shift
, MIP_FILTER_mask
);
159 SETfield(t
->SQ_TEX_SAMPLER0
, SQ_TEX_BORDER_COLOR_TRANS_BLACK
, BORDER_COLOR_TYPE_shift
, BORDER_COLOR_TYPE_mask
);
161 t
->SQ_TEX_SAMPLER1
= 0;
162 SETfield(t
->SQ_TEX_SAMPLER1
, 0x3ff, MAX_LOD_shift
, MAX_LOD_mask
);
164 t
->SQ_TEX_SAMPLER2
= 0;
165 SETbit(t
->SQ_TEX_SAMPLER2
, SQ_TEX_SAMPLER_WORD2_0__TYPE_bit
);
170 static GLuint
aniso_filter(GLfloat anisotropy
)
172 if (anisotropy
>= 16.0) {
173 return R300_TX_MAX_ANISO_16_TO_1
;
174 } else if (anisotropy
>= 8.0) {
175 return R300_TX_MAX_ANISO_8_TO_1
;
176 } else if (anisotropy
>= 4.0) {
177 return R300_TX_MAX_ANISO_4_TO_1
;
178 } else if (anisotropy
>= 2.0) {
179 return R300_TX_MAX_ANISO_2_TO_1
;
181 return R300_TX_MAX_ANISO_1_TO_1
;
188 * Set the texture magnification and minification modes.
190 * \param t Texture whose filter modes are to be set
191 * \param minf Texture minification mode
192 * \param magf Texture magnification mode
193 * \param anisotropy Maximum anisotropy level
195 static void r600SetTexFilter(radeonTexObjPtr t
, GLenum minf
, GLenum magf
, GLfloat anisotropy
)
197 /* Force revalidation to account for switches from/to mipmapping. */
198 t
->validated
= GL_FALSE
;
200 /* Note that EXT_texture_filter_anisotropic is extremely vague about
201 * how anisotropic filtering interacts with the "normal" filter modes.
202 * When anisotropic filtering is enabled, we override min and mag
203 * filter settings completely. This includes driconf's settings.
205 if (anisotropy
>= 2.0 && (minf
!= GL_NEAREST
) && (magf
!= GL_NEAREST
)) {
206 /*t->pp_txfilter |= R300_TX_MAG_FILTER_ANISO
207 | R300_TX_MIN_FILTER_ANISO
208 | R300_TX_MIN_FILTER_MIP_LINEAR
209 | aniso_filter(anisotropy);*/
210 radeon_print(RADEON_TEXTURE
, RADEON_NORMAL
, "Using maximum anisotropy of %f\n", anisotropy
);
216 SETfield(t
->SQ_TEX_SAMPLER0
, TEX_XYFilter_Point
,
217 XY_MIN_FILTER_shift
, XY_MIN_FILTER_mask
);
218 SETfield(t
->SQ_TEX_SAMPLER0
, TEX_MipFilter_None
,
219 MIP_FILTER_shift
, MIP_FILTER_mask
);
222 SETfield(t
->SQ_TEX_SAMPLER0
, TEX_XYFilter_Linear
,
223 XY_MIN_FILTER_shift
, XY_MIN_FILTER_mask
);
224 SETfield(t
->SQ_TEX_SAMPLER0
, TEX_MipFilter_None
,
225 MIP_FILTER_shift
, MIP_FILTER_mask
);
227 case GL_NEAREST_MIPMAP_NEAREST
:
228 SETfield(t
->SQ_TEX_SAMPLER0
, TEX_XYFilter_Point
,
229 XY_MIN_FILTER_shift
, XY_MIN_FILTER_mask
);
230 SETfield(t
->SQ_TEX_SAMPLER0
, TEX_MipFilter_Point
,
231 MIP_FILTER_shift
, MIP_FILTER_mask
);
233 case GL_NEAREST_MIPMAP_LINEAR
:
234 SETfield(t
->SQ_TEX_SAMPLER0
, TEX_XYFilter_Point
,
235 XY_MIN_FILTER_shift
, XY_MIN_FILTER_mask
);
236 SETfield(t
->SQ_TEX_SAMPLER0
, TEX_MipFilter_Linear
,
237 MIP_FILTER_shift
, MIP_FILTER_mask
);
239 case GL_LINEAR_MIPMAP_NEAREST
:
240 SETfield(t
->SQ_TEX_SAMPLER0
, TEX_XYFilter_Linear
,
241 XY_MIN_FILTER_shift
, XY_MIN_FILTER_mask
);
242 SETfield(t
->SQ_TEX_SAMPLER0
, TEX_MipFilter_Point
,
243 MIP_FILTER_shift
, MIP_FILTER_mask
);
245 case GL_LINEAR_MIPMAP_LINEAR
:
246 SETfield(t
->SQ_TEX_SAMPLER0
, TEX_XYFilter_Linear
,
247 XY_MIN_FILTER_shift
, XY_MIN_FILTER_mask
);
248 SETfield(t
->SQ_TEX_SAMPLER0
, TEX_MipFilter_Linear
,
249 MIP_FILTER_shift
, MIP_FILTER_mask
);
253 /* Note we don't have 3D mipmaps so only use the mag filter setting
254 * to set the 3D texture filter mode.
258 SETfield(t
->SQ_TEX_SAMPLER0
, TEX_XYFilter_Point
,
259 XY_MAG_FILTER_shift
, XY_MAG_FILTER_mask
);
262 SETfield(t
->SQ_TEX_SAMPLER0
, TEX_XYFilter_Linear
,
263 XY_MAG_FILTER_shift
, XY_MAG_FILTER_mask
);
268 static void r600SetTexBorderColor(radeonTexObjPtr t
, const GLfloat color
[4])
270 t
->TD_PS_SAMPLER0_BORDER_ALPHA
= *((uint32_t*)&(color
[3]));
271 t
->TD_PS_SAMPLER0_BORDER_RED
= *((uint32_t*)&(color
[2]));
272 t
->TD_PS_SAMPLER0_BORDER_GREEN
= *((uint32_t*)&(color
[1]));
273 t
->TD_PS_SAMPLER0_BORDER_BLUE
= *((uint32_t*)&(color
[0]));
274 SETfield(t
->SQ_TEX_SAMPLER0
, SQ_TEX_BORDER_COLOR_REGISTER
,
275 BORDER_COLOR_TYPE_shift
, BORDER_COLOR_TYPE_mask
);
279 * Changes variables and flags for a state update, which will happen at the
280 * next UpdateTextureState
283 static void r600TexParameter(GLcontext
* ctx
, GLenum target
,
284 struct gl_texture_object
*texObj
,
285 GLenum pname
, const GLfloat
* params
)
287 radeonTexObj
* t
= radeon_tex_obj(texObj
);
290 radeon_print(RADEON_STATE
| RADEON_TEXTURE
, RADEON_VERBOSE
,
291 "%s( %s )\n", __FUNCTION__
,
292 _mesa_lookup_enum_by_nr(pname
));
295 case GL_TEXTURE_MIN_FILTER
:
296 case GL_TEXTURE_MAG_FILTER
:
297 case GL_TEXTURE_MAX_ANISOTROPY_EXT
:
298 r600SetTexFilter(t
, texObj
->MinFilter
, texObj
->MagFilter
, texObj
->MaxAnisotropy
);
301 case GL_TEXTURE_WRAP_S
:
302 case GL_TEXTURE_WRAP_T
:
303 case GL_TEXTURE_WRAP_R
:
304 r600UpdateTexWrap(t
);
307 case GL_TEXTURE_BORDER_COLOR
:
308 r600SetTexBorderColor(t
, texObj
->BorderColor
);
311 case GL_TEXTURE_BASE_LEVEL
:
312 case GL_TEXTURE_MAX_LEVEL
:
313 case GL_TEXTURE_MIN_LOD
:
314 case GL_TEXTURE_MAX_LOD
:
315 /* This isn't the most efficient solution but there doesn't appear to
316 * be a nice alternative. Since there's no LOD clamping,
317 * we just have to rely on loading the right subset of mipmap levels
318 * to simulate a clamped LOD.
321 radeon_miptree_unreference(t
->mt
);
323 t
->validated
= GL_FALSE
;
327 case GL_DEPTH_TEXTURE_MODE
:
328 if (!texObj
->Image
[0][texObj
->BaseLevel
])
330 baseFormat
= texObj
->Image
[0][texObj
->BaseLevel
]->_BaseFormat
;
331 if (baseFormat
== GL_DEPTH_COMPONENT
||
332 baseFormat
== GL_DEPTH_STENCIL
) {
333 r600SetDepthTexMode(texObj
);
336 /* If the texture isn't a depth texture, changing this
337 * state won't cause any changes to the hardware.
338 * Don't force a flush of texture state.
348 static void r600DeleteTexture(GLcontext
* ctx
, struct gl_texture_object
*texObj
)
350 context_t
* rmesa
= R700_CONTEXT(ctx
);
351 radeonTexObj
* t
= radeon_tex_obj(texObj
);
353 radeon_print(RADEON_STATE
| RADEON_TEXTURE
, RADEON_NORMAL
,
354 "%s( %p (target = %s) )\n", __FUNCTION__
,
356 _mesa_lookup_enum_by_nr(texObj
->Target
));
360 radeon_firevertices(&rmesa
->radeon
);
362 for(i
= 0; i
< R700_MAX_TEXTURE_UNITS
; ++i
)
363 if (rmesa
->hw
.textures
[i
] == t
)
364 rmesa
->hw
.textures
[i
] = 0;
368 radeon_bo_unref(t
->bo
);
373 radeon_miptree_unreference(t
->mt
);
376 _mesa_delete_texture_object(ctx
, texObj
);
380 * Allocate a new texture object.
381 * Called via ctx->Driver.NewTextureObject.
382 * Note: this function will be called during context creation to
383 * allocate the default texture objects.
384 * Fixup MaxAnisotropy according to user preference.
386 static struct gl_texture_object
*r600NewTextureObject(GLcontext
* ctx
,
390 context_t
* rmesa
= R700_CONTEXT(ctx
);
391 radeonTexObj
* t
= CALLOC_STRUCT(radeon_tex_obj
);
394 radeon_print(RADEON_STATE
| RADEON_TEXTURE
, RADEON_NORMAL
,
395 "%s( %p (target = %s) )\n", __FUNCTION__
,
396 t
, _mesa_lookup_enum_by_nr(target
));
398 _mesa_initialize_texture_object(&t
->base
, name
, target
);
399 t
->base
.MaxAnisotropy
= rmesa
->radeon
.initialMaxAnisotropy
;
401 /* Initialize hardware state */
402 r600SetTexDefaultState(t
);
403 r600UpdateTexWrap(t
);
404 r600SetTexFilter(t
, t
->base
.MinFilter
, t
->base
.MagFilter
, t
->base
.MaxAnisotropy
);
405 r600SetTexBorderColor(t
, t
->base
.BorderColor
);
410 void r600InitTextureFuncs(struct dd_function_table
*functions
)
412 /* Note: we only plug in the functions we implement in the driver
413 * since _mesa_init_driver_functions() was already called.
415 functions
->NewTextureImage
= radeonNewTextureImage
;
416 functions
->FreeTexImageData
= radeonFreeTexImageData
;
417 functions
->MapTexture
= radeonMapTexture
;
418 functions
->UnmapTexture
= radeonUnmapTexture
;
420 functions
->ChooseTextureFormat
= radeonChooseTextureFormat_mesa
;
421 functions
->TexImage1D
= radeonTexImage1D
;
422 functions
->TexImage2D
= radeonTexImage2D
;
423 functions
->TexImage3D
= radeonTexImage3D
;
424 functions
->TexSubImage1D
= radeonTexSubImage1D
;
425 functions
->TexSubImage2D
= radeonTexSubImage2D
;
426 functions
->TexSubImage3D
= radeonTexSubImage3D
;
427 functions
->GetTexImage
= radeonGetTexImage
;
428 functions
->GetCompressedTexImage
= radeonGetCompressedTexImage
;
429 functions
->NewTextureObject
= r600NewTextureObject
;
430 functions
->DeleteTexture
= r600DeleteTexture
;
431 functions
->IsTextureResident
= driIsTextureResident
;
433 functions
->TexParameter
= r600TexParameter
;
435 functions
->CompressedTexImage2D
= radeonCompressedTexImage2D
;
436 functions
->CompressedTexSubImage2D
= radeonCompressedTexSubImage2D
;
438 functions
->GenerateMipmap
= radeonGenerateMipmap
;
440 driInitTextureFormats();