2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 **************************************************************************/
33 * \author Keith Whitwell <keith@tungstengraphics.com>
35 * \todo Enable R300 texture tiling code?
38 #include "main/glheader.h"
39 #include "main/imports.h"
40 #include "main/context.h"
41 #include "main/macros.h"
42 #include "main/texformat.h"
43 #include "main/teximage.h"
44 #include "main/texobj.h"
45 #include "main/enums.h"
46 #include "main/simple_list.h"
48 #include "r600_context.h"
49 #include "r700_state.h"
50 #include "radeon_mipmap_tree.h"
53 void r600UpdateTextureState(GLcontext
* ctx
);
55 void r600UpdateTextureState(GLcontext
* ctx
)
57 context_t
*context
= R700_CONTEXT(ctx
);
58 R700_CHIP_CONTEXT
*r700
= (R700_CHIP_CONTEXT
*)(&context
->hw
);
59 struct gl_texture_unit
*texUnit
;
60 struct radeon_tex_obj
*t
;
63 for (unit
= 0; unit
< R700_MAX_TEXTURE_UNITS
; unit
++) {
64 texUnit
= &ctx
->Texture
.Unit
[unit
];
65 t
= radeon_tex_obj(ctx
->Texture
.Unit
[unit
]._Current
);
67 if (texUnit
->_ReallyEnabled
) {
70 r700
->textures
[unit
] = t
;
75 static GLboolean
r600GetTexFormat(struct gl_texture_object
*tObj
, GLuint mesa_format
)
77 radeonTexObj
*t
= radeon_tex_obj(tObj
);
79 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
80 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
81 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
82 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
84 switch (mesa_format
) /* This is mesa format. */
86 case MESA_FORMAT_RGBA8888
:
87 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
88 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
90 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
91 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
92 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
93 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
94 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
95 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
96 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
97 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
99 case MESA_FORMAT_RGBA8888_REV
:
100 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
101 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
103 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
104 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
105 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
106 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
107 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
108 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
109 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
110 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
112 case MESA_FORMAT_ARGB8888
:
113 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
114 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
116 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
117 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
118 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
119 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
120 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
121 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
122 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
123 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
125 case MESA_FORMAT_ARGB8888_REV
:
126 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
127 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
129 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
130 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
131 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
132 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
133 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
134 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
135 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
136 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
138 case MESA_FORMAT_RGB888
:
139 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8
,
140 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
142 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
143 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
144 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
145 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
146 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
147 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
148 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
149 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
151 case MESA_FORMAT_RGB565
:
152 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
153 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
155 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
156 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
157 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
158 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
159 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
160 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
161 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
162 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
164 case MESA_FORMAT_RGB565_REV
:
165 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
166 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
168 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
169 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
170 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
171 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
172 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
173 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
174 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
175 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
177 case MESA_FORMAT_ARGB4444
:
178 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_4_4_4_4
,
179 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
181 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
182 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
183 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
184 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
185 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
186 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
187 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
188 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
190 case MESA_FORMAT_ARGB4444_REV
:
191 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_4_4_4_4
,
192 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
194 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
195 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
196 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
197 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
198 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
199 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
200 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
201 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
203 case MESA_FORMAT_ARGB1555
:
204 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_1_5_5_5
,
205 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
207 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
208 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
209 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
210 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
211 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
212 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
213 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
214 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
216 case MESA_FORMAT_ARGB1555_REV
:
217 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_1_5_5_5
,
218 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
220 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
221 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
222 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
223 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
224 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
225 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
226 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
227 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
229 case MESA_FORMAT_AL88
:
230 case MESA_FORMAT_AL88_REV
: /* TODO : Check this. */
231 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8
,
232 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
234 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
235 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
236 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
237 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
238 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
239 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
240 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
241 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
243 case MESA_FORMAT_RGB332
:
244 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_3_3_2
,
245 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
247 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
248 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
249 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
250 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
251 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
252 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
253 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
254 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
256 case MESA_FORMAT_A8
: /* ZERO, ZERO, ZERO, X */
257 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8
,
258 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
260 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
261 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
262 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
263 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
264 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
265 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
266 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
267 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
269 case MESA_FORMAT_L8
: /* X, X, X, ONE */
270 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8
,
271 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
273 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
274 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
275 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
276 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
277 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
278 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
279 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
280 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
282 case MESA_FORMAT_I8
: /* X, X, X, X */
283 case MESA_FORMAT_CI8
:
284 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8
,
285 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
287 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
288 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
289 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
290 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
291 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
292 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
293 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
294 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
296 /* YUV422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
298 case MESA_FORMAT_YCBCR:
299 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
302 /* VUY422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
304 case MESA_FORMAT_YCBCR_REV:
305 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
308 case MESA_FORMAT_RGB_DXT1
: /* not supported yet */
311 case MESA_FORMAT_RGBA_DXT1
: /* not supported yet */
314 case MESA_FORMAT_RGBA_DXT3
: /* not supported yet */
317 case MESA_FORMAT_RGBA_DXT5
: /* not supported yet */
320 case MESA_FORMAT_RGBA_FLOAT32
:
321 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_32_32_32_FLOAT
,
322 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
324 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
325 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
326 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
327 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
328 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
329 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
330 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
331 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
333 case MESA_FORMAT_RGBA_FLOAT16
:
334 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_16_16_16_FLOAT
,
335 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
337 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
338 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
339 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
340 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
341 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
342 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
343 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
344 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
346 case MESA_FORMAT_RGB_FLOAT32
: /* X, Y, Z, ONE */
347 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_32_32_FLOAT
,
348 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
350 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
351 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
352 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
353 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
354 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
355 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
356 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
357 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
359 case MESA_FORMAT_RGB_FLOAT16
:
360 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_16_16_FLOAT
,
361 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
363 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
364 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
365 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
366 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
367 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
368 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
369 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
370 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
372 case MESA_FORMAT_ALPHA_FLOAT32
: /* ZERO, ZERO, ZERO, X */
373 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_FLOAT
,
374 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
376 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
377 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
378 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
379 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
380 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
381 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
382 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
383 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
385 case MESA_FORMAT_ALPHA_FLOAT16
: /* ZERO, ZERO, ZERO, X */
386 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_FLOAT
,
387 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
389 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
390 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
391 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
392 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
393 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
394 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
395 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
396 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
398 case MESA_FORMAT_LUMINANCE_FLOAT32
: /* X, X, X, ONE */
399 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_FLOAT
,
400 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
402 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
403 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
404 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
405 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
406 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
407 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
408 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
409 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
411 case MESA_FORMAT_LUMINANCE_FLOAT16
: /* X, X, X, ONE */
412 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_FLOAT
,
413 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
415 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
416 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
417 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
418 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
419 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
420 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
421 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
422 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
424 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32
:
425 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_32_FLOAT
,
426 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
428 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
429 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
430 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
431 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
432 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
433 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
434 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
435 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
437 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16
:
438 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_16_FLOAT
,
439 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
441 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
442 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
443 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
444 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
445 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
446 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
447 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
448 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
450 case MESA_FORMAT_INTENSITY_FLOAT32
: /* X, X, X, X */
451 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_FLOAT
,
452 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
454 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
455 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
456 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
457 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
458 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
459 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
460 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
461 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
463 case MESA_FORMAT_INTENSITY_FLOAT16
: /* X, X, X, X */
464 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_FLOAT
,
465 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
467 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
468 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
469 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
470 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
471 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
472 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
473 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
474 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
476 case MESA_FORMAT_Z16
:
477 case MESA_FORMAT_Z24_S8
:
478 case MESA_FORMAT_Z32
:
479 switch (mesa_format
) {
480 case MESA_FORMAT_Z16
:
481 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16
,
482 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
484 case MESA_FORMAT_Z24_S8
:
485 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_24_8
,
486 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
488 case MESA_FORMAT_Z32
:
489 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32
,
490 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
493 switch (tObj
->DepthMode
) {
494 case GL_LUMINANCE
: /* X, X, X, ONE */
495 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
496 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
497 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
498 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
499 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
500 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
501 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
502 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
504 case GL_INTENSITY
: /* X, X, X, X */
505 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
506 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
507 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
508 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
509 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
510 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
511 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
512 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
514 case GL_ALPHA
: /* ZERO, ZERO, ZERO, X */
515 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
516 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
517 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
518 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
519 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
520 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
521 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
522 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
529 /* Not supported format */
536 void r600SetDepthTexMode(struct gl_texture_object
*tObj
)
543 t
= radeon_tex_obj(tObj
);
545 r600GetTexFormat(tObj
, tObj
->Image
[0][tObj
->BaseLevel
]->TexFormat
->MesaFormat
);
550 * Compute the cached hardware register values for the given texture object.
552 * \param rmesa Context pointer
553 * \param t the r300 texture object
555 static void setup_hardware_state(context_t
*rmesa
, struct gl_texture_object
*texObj
)
557 radeonTexObj
*t
= radeon_tex_obj(texObj
);
558 const struct gl_texture_image
*firstImage
;
559 int firstlevel
= t
->mt
? t
->mt
->firstLevel
: 0;
560 GLuint uTexelPitch
, row_align
;
562 firstImage
= t
->base
.Image
[0][firstlevel
];
564 if (!t
->image_override
) {
565 if (!r600GetTexFormat(texObj
, firstImage
->TexFormat
->MesaFormat
)) {
566 _mesa_problem(NULL
, "unexpected texture format in %s",
572 switch (texObj
->Target
) {
574 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_1D
, DIM_shift
, DIM_mask
);
575 SETfield(t
->SQ_TEX_RESOURCE1
, 0, TEX_DEPTH_shift
, TEX_DEPTH_mask
);
578 case GL_TEXTURE_RECTANGLE_NV
:
579 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_2D
, DIM_shift
, DIM_mask
);
580 SETfield(t
->SQ_TEX_RESOURCE1
, 0, TEX_DEPTH_shift
, TEX_DEPTH_mask
);
583 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_3D
, DIM_shift
, DIM_mask
);
584 SETfield(t
->SQ_TEX_RESOURCE1
, firstImage
->Depth
- 1, // ???
585 TEX_DEPTH_shift
, TEX_DEPTH_mask
);
587 case GL_TEXTURE_CUBE_MAP
:
588 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_CUBEMAP
, DIM_shift
, DIM_mask
);
589 SETfield(t
->SQ_TEX_RESOURCE1
, 0, TEX_DEPTH_shift
, TEX_DEPTH_mask
);
592 _mesa_problem(NULL
, "unexpected texture target type in %s", __FUNCTION__
);
596 row_align
= rmesa
->radeon
.texture_row_align
- 1;
597 uTexelPitch
= ((firstImage
->Width
* t
->mt
->bpp
+ row_align
) & ~row_align
) / t
->mt
->bpp
;
598 uTexelPitch
= (uTexelPitch
+ R700_TEXEL_PITCH_ALIGNMENT_MASK
)
599 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK
;
605 SETfield(t
->SQ_TEX_RESOURCE0
, (uTexelPitch
/8)-1, PITCH_shift
, PITCH_mask
);
606 SETfield(t
->SQ_TEX_RESOURCE0
, firstImage
->Width
- 1,
607 TEX_WIDTH_shift
, TEX_WIDTH_mask
);
608 SETfield(t
->SQ_TEX_RESOURCE1
, firstImage
->Height
- 1,
609 TEX_HEIGHT_shift
, TEX_HEIGHT_mask
);
611 if ((t
->mt
->lastLevel
- t
->mt
->firstLevel
) > 0) {
612 t
->SQ_TEX_RESOURCE3
= t
->mt
->levels
[0].size
/ 256;
613 SETfield(t
->SQ_TEX_RESOURCE4
, t
->mt
->firstLevel
, BASE_LEVEL_shift
, BASE_LEVEL_mask
);
614 SETfield(t
->SQ_TEX_RESOURCE5
, t
->mt
->lastLevel
, LAST_LEVEL_shift
, LAST_LEVEL_mask
);
619 * Ensure the given texture is ready for rendering.
621 * Mostly this means populating the texture object's mipmap tree.
623 static GLboolean
r600_validate_texture(GLcontext
* ctx
, struct gl_texture_object
*texObj
)
625 context_t
*rmesa
= R700_CONTEXT(ctx
);
626 radeonTexObj
*t
= radeon_tex_obj(texObj
);
628 if (!radeon_validate_texture_miptree(ctx
, texObj
))
631 /* Configure the hardware registers (more precisely, the cached version
632 * of the hardware registers). */
633 setup_hardware_state(rmesa
, texObj
);
635 t
->validated
= GL_TRUE
;
640 * Ensure all enabled and complete textures are uploaded along with any buffers being used.
642 GLboolean
r600ValidateBuffers(GLcontext
* ctx
)
644 context_t
*rmesa
= R700_CONTEXT(ctx
);
645 struct radeon_renderbuffer
*rrb
;
649 radeon_cs_space_reset_bos(rmesa
->radeon
.cmdbuf
.cs
);
651 rrb
= radeon_get_colorbuffer(&rmesa
->radeon
);
653 if (rrb
&& rrb
->bo
) {
654 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
656 RADEON_GEM_DOMAIN_VRAM
);
660 rrb
= radeon_get_depthbuffer(&rmesa
->radeon
);
661 if (rrb
&& rrb
->bo
) {
662 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
664 RADEON_GEM_DOMAIN_VRAM
);
667 for (i
= 0; i
< ctx
->Const
.MaxTextureImageUnits
; ++i
) {
670 if (!ctx
->Texture
.Unit
[i
]._ReallyEnabled
)
673 if (!r600_validate_texture(ctx
, ctx
->Texture
.Unit
[i
]._Current
)) {
675 "failed to validate texture for unit %d.\n",
678 t
= radeon_tex_obj(ctx
->Texture
.Unit
[i
]._Current
);
679 if (t
->image_override
&& t
->bo
)
680 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
682 RADEON_GEM_DOMAIN_GTT
| RADEON_GEM_DOMAIN_VRAM
, 0);
684 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
686 RADEON_GEM_DOMAIN_GTT
| RADEON_GEM_DOMAIN_VRAM
, 0);
689 ret
= radeon_cs_space_check_with_bo(rmesa
->radeon
.cmdbuf
.cs
, first_elem(&rmesa
->radeon
.dma
.reserved
)->bo
, RADEON_GEM_DOMAIN_GTT
, 0);
695 void r600SetTexOffset(__DRIcontext
* pDRICtx
, GLint texname
,
696 unsigned long long offset
, GLint depth
, GLuint pitch
)
698 context_t
*rmesa
= pDRICtx
->driverPrivate
;
699 struct gl_texture_object
*tObj
=
700 _mesa_lookup_texture(rmesa
->radeon
.glCtx
, texname
);
701 radeonTexObjPtr t
= radeon_tex_obj(tObj
);
702 uint32_t pitch_val
, size
;
707 t
->image_override
= GL_TRUE
;
712 size
= pitch
;//h * w * (depth / 8);
714 radeon_bo_unref(t
->bo
);
717 t
->bo
= radeon_legacy_bo_alloc_fake(rmesa
->radeon
.radeonScreen
->bom
, size
, offset
);
718 t
->override_offset
= offset
;
722 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
723 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
725 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
726 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
727 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
728 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
729 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
730 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
731 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
732 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
737 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
738 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
740 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
741 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
742 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
743 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
744 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
745 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
746 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
747 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
751 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
752 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
754 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
755 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
756 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
757 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
758 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
759 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
760 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
761 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
766 pitch_val
= (pitch_val
+ R700_TEXEL_PITCH_ALIGNMENT_MASK
)
767 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK
;
773 SETfield(t
->SQ_TEX_RESOURCE0
, (pitch_val
/8)-1, PITCH_shift
, PITCH_mask
);
776 void r600SetTexBuffer2(__DRIcontext
*pDRICtx
, GLint target
, GLint glx_texture_format
, __DRIdrawable
*dPriv
)
778 struct gl_texture_unit
*texUnit
;
779 struct gl_texture_object
*texObj
;
780 struct gl_texture_image
*texImage
;
781 struct radeon_renderbuffer
*rb
;
782 radeon_texture_image
*rImage
;
783 radeonContextPtr radeon
;
785 struct radeon_framebuffer
*rfb
;
788 uint32_t internalFormat
, type
, format
;
791 format
= GL_UNSIGNED_BYTE
;
792 internalFormat
= (glx_texture_format
== GLX_TEXTURE_FORMAT_RGB_EXT
? 3 : 4);
794 radeon
= pDRICtx
->driverPrivate
;
795 rmesa
= pDRICtx
->driverPrivate
;
797 rfb
= dPriv
->driverPrivate
;
798 texUnit
= &radeon
->glCtx
->Texture
.Unit
[radeon
->glCtx
->Texture
.CurrentUnit
];
799 texObj
= _mesa_select_tex_object(radeon
->glCtx
, texUnit
, target
);
800 texImage
= _mesa_get_tex_image(radeon
->glCtx
, texObj
, target
, 0);
802 rImage
= get_radeon_texture_image(texImage
);
803 t
= radeon_tex_obj(texObj
);
808 radeon_update_renderbuffers(pDRICtx
, dPriv
);
809 /* back & depth buffer are useless free them right away */
810 rb
= (void*)rfb
->base
.Attachment
[BUFFER_DEPTH
].Renderbuffer
;
812 radeon_bo_unref(rb
->bo
);
815 rb
= (void*)rfb
->base
.Attachment
[BUFFER_BACK_LEFT
].Renderbuffer
;
817 radeon_bo_unref(rb
->bo
);
820 rb
= rfb
->color_rb
[0];
821 if (rb
->bo
== NULL
) {
822 /* Failed to BO for the buffer */
826 _mesa_lock_texture(radeon
->glCtx
, texObj
);
828 radeon_bo_unref(t
->bo
);
832 radeon_bo_unref(rImage
->bo
);
836 radeon_miptree_unreference(t
->mt
);
840 radeon_miptree_unreference(rImage
->mt
);
843 _mesa_init_teximage_fields(radeon
->glCtx
, target
, texImage
,
844 rb
->base
.Width
, rb
->base
.Height
, 1, 0, rb
->cpp
);
845 texImage
->RowStride
= rb
->pitch
/ rb
->cpp
;
846 texImage
->TexFormat
= radeonChooseTextureFormat(radeon
->glCtx
,
850 radeon_bo_ref(rImage
->bo
);
852 radeon_bo_ref(t
->bo
);
853 t
->image_override
= GL_TRUE
;
854 t
->override_offset
= 0;
855 pitch_val
= rb
->pitch
;
858 if (glx_texture_format
== GLX_TEXTURE_FORMAT_RGB_EXT
) {
859 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
860 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
862 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
863 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
864 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
865 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
866 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
867 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
868 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
869 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
871 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
872 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
874 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
875 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
876 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
877 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
878 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
879 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
880 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
881 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
888 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
889 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
891 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
892 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
893 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
894 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
895 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
896 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
897 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
898 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
902 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
903 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
905 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
906 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
907 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
908 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
909 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
910 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
911 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
912 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
917 pitch_val
= (pitch_val
+ R700_TEXEL_PITCH_ALIGNMENT_MASK
)
918 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK
;
924 SETfield(t
->SQ_TEX_RESOURCE0
, (pitch_val
/8)-1, PITCH_shift
, PITCH_mask
);
925 SETfield(t
->SQ_TEX_RESOURCE0
, rb
->base
.Width
- 1,
926 TEX_WIDTH_shift
, TEX_WIDTH_mask
);
927 SETfield(t
->SQ_TEX_RESOURCE1
, rb
->base
.Height
- 1,
928 TEX_HEIGHT_shift
, TEX_HEIGHT_mask
);
930 t
->validated
= GL_TRUE
;
931 _mesa_unlock_texture(radeon
->glCtx
, texObj
);
935 void r600SetTexBuffer(__DRIcontext
*pDRICtx
, GLint target
, __DRIdrawable
*dPriv
)
937 r600SetTexBuffer2(pDRICtx
, target
, GLX_TEXTURE_FORMAT_RGBA_EXT
, dPriv
);