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r600: Remove unnecessary headers.
[mesa.git] / src / mesa / drivers / dri / r600 / r600_texstate.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file
32 *
33 * \author Keith Whitwell <keith@tungstengraphics.com>
34 *
35 * \todo Enable R300 texture tiling code?
36 */
37
38 #include "main/glheader.h"
39 #include "main/imports.h"
40 #include "main/context.h"
41 #include "main/macros.h"
42 #include "main/teximage.h"
43 #include "main/texobj.h"
44 #include "main/enums.h"
45 #include "main/simple_list.h"
46
47 #include "r600_context.h"
48 #include "radeon_mipmap_tree.h"
49 #include "r600_tex.h"
50 #include "r700_fragprog.h"
51 #include "r700_vertprog.h"
52
53 void r600UpdateTextureState(GLcontext * ctx);
54
55 void r600UpdateTextureState(GLcontext * ctx)
56 {
57 context_t *context = R700_CONTEXT(ctx);
58 R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
59 struct gl_texture_unit *texUnit;
60 struct radeon_tex_obj *t;
61 GLuint unit;
62
63 R600_STATECHANGE(context, tx);
64 R600_STATECHANGE(context, tx_smplr);
65 R600_STATECHANGE(context, tx_brdr_clr);
66
67 for (unit = 0; unit < R700_MAX_TEXTURE_UNITS; unit++) {
68 texUnit = &ctx->Texture.Unit[unit];
69 t = radeon_tex_obj(ctx->Texture.Unit[unit]._Current);
70 r700->textures[unit] = NULL;
71 if (texUnit->_ReallyEnabled) {
72 if (!t)
73 continue;
74 r700->textures[unit] = t;
75 }
76 }
77 }
78
79 static GLboolean r600GetTexFormat(struct gl_texture_object *tObj, gl_format mesa_format)
80 {
81 radeonTexObj *t = radeon_tex_obj(tObj);
82
83 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
84 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
85 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
86 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
87 CLEARbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
88
89 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
90 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
91 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
92 FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
93 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
94 FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
95 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
96 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
97
98 CLEARbit(t->SQ_TEX_RESOURCE0, TILE_TYPE_bit);
99 SETfield(t->SQ_TEX_RESOURCE0, ARRAY_LINEAR_GENERAL,
100 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
101 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
102
103 switch (mesa_format) /* This is mesa format. */
104 {
105 case MESA_FORMAT_RGBA8888:
106 case MESA_FORMAT_SIGNED_RGBA8888:
107 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
108 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
109
110 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
111 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
112 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
113 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
114 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
115 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
116 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
117 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
118 if (mesa_format == MESA_FORMAT_SIGNED_RGBA8888) {
119 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
120 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
121 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
122 FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
123 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
124 FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
125 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
126 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
127 }
128 break;
129 case MESA_FORMAT_RGBA8888_REV:
130 case MESA_FORMAT_SIGNED_RGBA8888_REV:
131 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
132 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
133
134 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
135 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
136 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
137 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
138 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
139 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
140 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
141 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
142 if (mesa_format == MESA_FORMAT_SIGNED_RGBA8888_REV) {
143 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
144 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
145 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
146 FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
147 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
148 FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
149 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
150 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
151 }
152 break;
153 case MESA_FORMAT_ARGB8888:
154 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
155 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
156
157 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
158 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
159 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
160 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
161 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
162 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
163 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
164 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
165 break;
166 case MESA_FORMAT_XRGB8888:
167 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
168 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
169
170 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
171 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
172 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
173 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
174 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
175 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
176 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
177 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
178 break;
179 case MESA_FORMAT_XRGB8888_REV:
180 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
181 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
182
183 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
184 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
185 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
186 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
187 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
188 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
189 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
190 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
191 break;
192 case MESA_FORMAT_ARGB8888_REV:
193 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
194 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
195
196 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
197 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
198 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
199 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
200 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
201 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
202 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
203 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
204 break;
205 case MESA_FORMAT_RGB888:
206 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8,
207 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
208
209 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
210 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
211 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
212 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
213 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
214 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
215 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
216 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
217 break;
218 case MESA_FORMAT_RGB565:
219 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
220 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
221
222 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
223 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
224 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
225 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
226 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
227 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
228 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
229 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
230 break;
231 case MESA_FORMAT_RGB565_REV:
232 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
233 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
234
235 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
236 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
237 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
238 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
239 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
240 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
241 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
242 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
243 break;
244 case MESA_FORMAT_ARGB4444:
245 SETfield(t->SQ_TEX_RESOURCE1, FMT_4_4_4_4,
246 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
247
248 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
249 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
250 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
251 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
252 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
253 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
254 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
255 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
256 break;
257 case MESA_FORMAT_ARGB4444_REV:
258 SETfield(t->SQ_TEX_RESOURCE1, FMT_4_4_4_4,
259 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
260
261 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
262 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
263 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
264 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
265 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
266 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
267 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
268 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
269 break;
270 case MESA_FORMAT_ARGB1555:
271 SETfield(t->SQ_TEX_RESOURCE1, FMT_1_5_5_5,
272 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
273
274 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
275 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
276 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
277 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
278 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
279 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
280 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
281 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
282 break;
283 case MESA_FORMAT_ARGB1555_REV:
284 SETfield(t->SQ_TEX_RESOURCE1, FMT_1_5_5_5,
285 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
286
287 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
288 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
289 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
290 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
291 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
292 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
293 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
294 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
295 break;
296 case MESA_FORMAT_AL88:
297 case MESA_FORMAT_AL88_REV: /* TODO : Check this. */
298 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8,
299 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
300
301 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
302 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
303 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
304 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
305 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
306 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
307 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
308 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
309 break;
310 case MESA_FORMAT_RGB332:
311 SETfield(t->SQ_TEX_RESOURCE1, FMT_3_3_2,
312 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
313
314 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
315 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
316 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
317 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
318 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
319 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
320 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
321 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
322 break;
323 case MESA_FORMAT_A8: /* ZERO, ZERO, ZERO, X */
324 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
325 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
326
327 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
328 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
329 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
330 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
331 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
332 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
333 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
334 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
335 break;
336 case MESA_FORMAT_L8: /* X, X, X, ONE */
337 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
338 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
339
340 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
341 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
342 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
343 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
344 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
345 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
346 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
347 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
348 break;
349 case MESA_FORMAT_I8: /* X, X, X, X */
350 case MESA_FORMAT_CI8:
351 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
352 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
353
354 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
355 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
356 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
357 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
358 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
359 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
360 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
361 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
362 break;
363 /* YUV422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
364 /*
365 case MESA_FORMAT_YCBCR:
366 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
367 break;
368 */
369 /* VUY422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
370 /*
371 case MESA_FORMAT_YCBCR_REV:
372 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
373 break;
374 */
375 case MESA_FORMAT_RGB_DXT1: /* not supported yet */
376 case MESA_FORMAT_RGBA_DXT1: /* not supported yet */
377 case MESA_FORMAT_RGBA_DXT3: /* not supported yet */
378 case MESA_FORMAT_RGBA_DXT5: /* not supported yet */
379 return GL_FALSE;
380
381 case MESA_FORMAT_RGBA_FLOAT32:
382 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_32_32_FLOAT,
383 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
384
385 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
386 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
387 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
388 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
389 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
390 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
391 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
392 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
393 break;
394 case MESA_FORMAT_RGBA_FLOAT16:
395 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_16_16_FLOAT,
396 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
397
398 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
399 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
400 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
401 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
402 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
403 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
404 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
405 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
406 break;
407 case MESA_FORMAT_RGB_FLOAT32: /* X, Y, Z, ONE */
408 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_32_FLOAT,
409 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
410
411 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
412 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
413 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
414 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
415 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
416 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
417 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
418 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
419 break;
420 case MESA_FORMAT_RGB_FLOAT16:
421 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_16_FLOAT,
422 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
423
424 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
425 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
426 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
427 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
428 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
429 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
430 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
431 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
432 break;
433 case MESA_FORMAT_ALPHA_FLOAT32: /* ZERO, ZERO, ZERO, X */
434 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT,
435 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
436
437 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
438 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
439 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
440 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
441 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
442 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
443 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
444 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
445 break;
446 case MESA_FORMAT_ALPHA_FLOAT16: /* ZERO, ZERO, ZERO, X */
447 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT,
448 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
449
450 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
451 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
452 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
453 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
454 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
455 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
456 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
457 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
458 break;
459 case MESA_FORMAT_LUMINANCE_FLOAT32: /* X, X, X, ONE */
460 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT,
461 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
462
463 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
464 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
465 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
466 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
467 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
468 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
469 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
470 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
471 break;
472 case MESA_FORMAT_LUMINANCE_FLOAT16: /* X, X, X, ONE */
473 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT,
474 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
475
476 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
477 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
478 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
479 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
480 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
481 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
482 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
483 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
484 break;
485 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32:
486 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_FLOAT,
487 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
488
489 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
490 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
491 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
492 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
493 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
494 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
495 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
496 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
497 break;
498 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16:
499 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_FLOAT,
500 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
501
502 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
503 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
504 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
505 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
506 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
507 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
508 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
509 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
510 break;
511 case MESA_FORMAT_INTENSITY_FLOAT32: /* X, X, X, X */
512 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT,
513 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
514
515 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
516 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
517 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
518 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
519 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
520 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
521 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
522 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
523 break;
524 case MESA_FORMAT_INTENSITY_FLOAT16: /* X, X, X, X */
525 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT,
526 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
527
528 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
529 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
530 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
531 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
532 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
533 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
534 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
535 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
536 break;
537 case MESA_FORMAT_Z16:
538 case MESA_FORMAT_X8_Z24:
539 case MESA_FORMAT_S8_Z24:
540 case MESA_FORMAT_Z24_S8:
541 case MESA_FORMAT_Z32:
542 case MESA_FORMAT_S8:
543 SETbit(t->SQ_TEX_RESOURCE0, TILE_TYPE_bit);
544 SETfield(t->SQ_TEX_RESOURCE0, ARRAY_1D_TILED_THIN1,
545 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
546 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
547 switch (mesa_format) {
548 case MESA_FORMAT_Z16:
549 SETfield(t->SQ_TEX_RESOURCE1, FMT_16,
550 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
551 break;
552 case MESA_FORMAT_X8_Z24:
553 case MESA_FORMAT_S8_Z24:
554 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_24,
555 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
556 break;
557 case MESA_FORMAT_Z24_S8:
558 SETfield(t->SQ_TEX_RESOURCE1, FMT_24_8,
559 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
560 break;
561 case MESA_FORMAT_Z32:
562 SETfield(t->SQ_TEX_RESOURCE1, FMT_32,
563 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
564 break;
565 case MESA_FORMAT_S8:
566 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
567 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
568 break;
569 default:
570 break;
571 };
572 switch (tObj->DepthMode) {
573 case GL_LUMINANCE: /* X, X, X, ONE */
574 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
575 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
576 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
577 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
578 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
579 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
580 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
581 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
582 break;
583 case GL_INTENSITY: /* X, X, X, X */
584 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
585 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
586 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
587 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
588 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
589 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
590 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
591 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
592 break;
593 case GL_ALPHA: /* ZERO, ZERO, ZERO, X */
594 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
595 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
596 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
597 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
598 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
599 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
600 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
601 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
602 break;
603 default:
604 return GL_FALSE;
605 }
606 break;
607 /* EXT_texture_sRGB */
608 case MESA_FORMAT_SRGBA8:
609 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
610 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
611
612 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
613 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
614 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
615 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
616 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
617 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
618 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
619 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
620 SETbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
621 break;
622 case MESA_FORMAT_SLA8:
623 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8,
624 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
625
626 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
627 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
628 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
629 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
630 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
631 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
632 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
633 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
634 SETbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
635 break;
636 case MESA_FORMAT_SL8: /* X, X, X, ONE */
637 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
638 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
639
640 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
641 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
642 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
643 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
644 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
645 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
646 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
647 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
648 SETbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
649 break;
650 default:
651 /* Not supported format */
652 return GL_FALSE;
653 };
654
655 return GL_TRUE;
656 }
657
658 static GLuint r600_translate_shadow_func(GLenum func)
659 {
660 switch (func) {
661 case GL_NEVER:
662 return SQ_TEX_DEPTH_COMPARE_NEVER;
663 case GL_LESS:
664 return SQ_TEX_DEPTH_COMPARE_LESS;
665 case GL_LEQUAL:
666 return SQ_TEX_DEPTH_COMPARE_LESSEQUAL;
667 case GL_GREATER:
668 return SQ_TEX_DEPTH_COMPARE_GREATER;
669 case GL_GEQUAL:
670 return SQ_TEX_DEPTH_COMPARE_GREATEREQUAL;
671 case GL_NOTEQUAL:
672 return SQ_TEX_DEPTH_COMPARE_NOTEQUAL;
673 case GL_EQUAL:
674 return SQ_TEX_DEPTH_COMPARE_EQUAL;
675 case GL_ALWAYS:
676 return SQ_TEX_DEPTH_COMPARE_ALWAYS;
677 default:
678 WARN_ONCE("Unknown shadow compare function! %d", func);
679 return 0;
680 }
681 }
682
683 static INLINE uint32_t
684 S_FIXED(float value, uint32_t frac_bits)
685 {
686 return value * (1 << frac_bits);
687 }
688
689 void r600SetDepthTexMode(struct gl_texture_object *tObj)
690 {
691 radeonTexObjPtr t;
692
693 if (!tObj)
694 return;
695
696 t = radeon_tex_obj(tObj);
697
698 if(!r600GetTexFormat(tObj, tObj->Image[0][tObj->BaseLevel]->TexFormat))
699 t->validated = GL_FALSE;
700 }
701
702 /**
703 * Compute the cached hardware register values for the given texture object.
704 *
705 * \param rmesa Context pointer
706 * \param t the r300 texture object
707 */
708 static GLboolean setup_hardware_state(GLcontext * ctx, struct gl_texture_object *texObj, int unit)
709 {
710 context_t *rmesa = R700_CONTEXT(ctx);
711 radeonTexObj *t = radeon_tex_obj(texObj);
712 const struct gl_texture_image *firstImage;
713 GLuint uTexelPitch, row_align;
714
715 if (rmesa->radeon.radeonScreen->driScreen->dri2.enabled &&
716 t->image_override &&
717 t->bo)
718 return GL_TRUE;
719
720 firstImage = t->base.Image[0][t->minLod];
721
722 if (!t->image_override) {
723 if (!r600GetTexFormat(texObj, firstImage->TexFormat)) {
724 radeon_warning("unsupported texture format in %s\n",
725 __FUNCTION__);
726 return GL_FALSE;
727 }
728 }
729
730 switch (texObj->Target) {
731 case GL_TEXTURE_1D:
732 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_1D, DIM_shift, DIM_mask);
733 SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask);
734 break;
735 case GL_TEXTURE_2D:
736 case GL_TEXTURE_RECTANGLE_NV:
737 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_2D, DIM_shift, DIM_mask);
738 SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask);
739 break;
740 case GL_TEXTURE_3D:
741 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_3D, DIM_shift, DIM_mask);
742 SETfield(t->SQ_TEX_RESOURCE1, firstImage->Depth - 1, // ???
743 TEX_DEPTH_shift, TEX_DEPTH_mask);
744 break;
745 case GL_TEXTURE_CUBE_MAP:
746 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_CUBEMAP, DIM_shift, DIM_mask);
747 SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask);
748 break;
749 default:
750 radeon_error("unexpected texture target type in %s\n", __FUNCTION__);
751 return GL_FALSE;
752 }
753
754 row_align = rmesa->radeon.texture_row_align - 1;
755 uTexelPitch = (_mesa_format_row_stride(firstImage->TexFormat, firstImage->Width) + row_align) & ~row_align;
756 uTexelPitch = uTexelPitch / _mesa_get_format_bytes(firstImage->TexFormat);
757 uTexelPitch = (uTexelPitch + R700_TEXEL_PITCH_ALIGNMENT_MASK)
758 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
759
760 /* min pitch is 8 */
761 if (uTexelPitch < 8)
762 uTexelPitch = 8;
763
764 SETfield(t->SQ_TEX_RESOURCE0, (uTexelPitch/8)-1, PITCH_shift, PITCH_mask);
765 SETfield(t->SQ_TEX_RESOURCE0, firstImage->Width - 1,
766 TEX_WIDTH_shift, TEX_WIDTH_mask);
767 SETfield(t->SQ_TEX_RESOURCE1, firstImage->Height - 1,
768 TEX_HEIGHT_shift, TEX_HEIGHT_mask);
769
770 t->SQ_TEX_RESOURCE2 = get_base_teximage_offset(t) / 256;
771
772 t->SQ_TEX_RESOURCE3 = radeon_miptree_image_offset(t->mt, 0, t->minLod + 1) / 256;
773
774 SETfield(t->SQ_TEX_RESOURCE4, 0, BASE_LEVEL_shift, BASE_LEVEL_mask);
775 SETfield(t->SQ_TEX_RESOURCE5, t->maxLod - t->minLod, LAST_LEVEL_shift, LAST_LEVEL_mask);
776
777 SETfield(t->SQ_TEX_SAMPLER1,
778 S_FIXED(CLAMP(t->base.MinLod - t->minLod, 0, 15), 6),
779 MIN_LOD_shift, MIN_LOD_mask);
780 SETfield(t->SQ_TEX_SAMPLER1,
781 S_FIXED(CLAMP(t->base.MaxLod - t->minLod, 0, 15), 6),
782 MAX_LOD_shift, MAX_LOD_mask);
783 SETfield(t->SQ_TEX_SAMPLER1,
784 S_FIXED(CLAMP(ctx->Texture.Unit[unit].LodBias + t->base.LodBias, -16, 16), 6),
785 SQ_TEX_SAMPLER_WORD1_0__LOD_BIAS_shift, SQ_TEX_SAMPLER_WORD1_0__LOD_BIAS_mask);
786
787 if(texObj->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB)
788 {
789 SETfield(t->SQ_TEX_SAMPLER0, r600_translate_shadow_func(texObj->CompareFunc), DEPTH_COMPARE_FUNCTION_shift, DEPTH_COMPARE_FUNCTION_mask);
790 }
791 else
792 {
793 CLEARfield(t->SQ_TEX_SAMPLER0, DEPTH_COMPARE_FUNCTION_mask);
794 }
795
796 return GL_TRUE;
797 }
798
799 /**
800 * Ensure the given texture is ready for rendering.
801 *
802 * Mostly this means populating the texture object's mipmap tree.
803 */
804 static GLboolean r600_validate_texture(GLcontext * ctx, struct gl_texture_object *texObj, int unit)
805 {
806 radeonTexObj *t = radeon_tex_obj(texObj);
807
808 if (!radeon_validate_texture_miptree(ctx, texObj))
809 return GL_FALSE;
810
811 /* Configure the hardware registers (more precisely, the cached version
812 * of the hardware registers). */
813 if (!setup_hardware_state(ctx, texObj, unit))
814 return GL_FALSE;
815
816 t->validated = GL_TRUE;
817 return GL_TRUE;
818 }
819
820 /**
821 * Ensure all enabled and complete textures are uploaded along with any buffers being used.
822 */
823 GLboolean r600ValidateBuffers(GLcontext * ctx)
824 {
825 context_t *rmesa = R700_CONTEXT(ctx);
826 struct radeon_renderbuffer *rrb;
827 struct radeon_bo *pbo;
828 int i;
829 int ret;
830
831 radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs);
832
833 rrb = radeon_get_colorbuffer(&rmesa->radeon);
834 /* color buffer */
835 if (rrb && rrb->bo) {
836 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
837 rrb->bo, 0,
838 RADEON_GEM_DOMAIN_VRAM);
839 }
840
841 /* depth buffer */
842 rrb = radeon_get_depthbuffer(&rmesa->radeon);
843 if (rrb && rrb->bo) {
844 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
845 rrb->bo, 0,
846 RADEON_GEM_DOMAIN_VRAM);
847 }
848
849 for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) {
850 radeonTexObj *t;
851
852 if (!ctx->Texture.Unit[i]._ReallyEnabled)
853 continue;
854
855 if (!r600_validate_texture(ctx, ctx->Texture.Unit[i]._Current, i)) {
856 radeon_warning("failed to validate texture for unit %d.\n", i);
857 }
858 t = radeon_tex_obj(ctx->Texture.Unit[i]._Current);
859 if (t->image_override && t->bo)
860 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
861 t->bo,
862 RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
863 else if (t->mt->bo)
864 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
865 t->mt->bo,
866 RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
867 }
868
869 pbo = (struct radeon_bo *)r700GetActiveFpShaderBo(ctx);
870 if (pbo) {
871 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, pbo,
872 RADEON_GEM_DOMAIN_GTT, 0);
873 }
874
875 pbo = (struct radeon_bo *)r700GetActiveVpShaderBo(ctx);
876 if (pbo) {
877 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, pbo,
878 RADEON_GEM_DOMAIN_GTT, 0);
879 }
880
881 ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs, first_elem(&rmesa->radeon.dma.reserved)->bo, RADEON_GEM_DOMAIN_GTT, 0);
882 if (ret)
883 return GL_FALSE;
884 return GL_TRUE;
885 }
886
887 void r600SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
888 unsigned long long offset, GLint depth, GLuint pitch)
889 {
890 context_t *rmesa = pDRICtx->driverPrivate;
891 struct gl_texture_object *tObj =
892 _mesa_lookup_texture(rmesa->radeon.glCtx, texname);
893 radeonTexObjPtr t = radeon_tex_obj(tObj);
894 const struct gl_texture_image *firstImage;
895 uint32_t pitch_val, size, row_align;
896
897 if (!tObj)
898 return;
899
900 t->image_override = GL_TRUE;
901
902 if (!offset)
903 return;
904
905 firstImage = t->base.Image[0][t->minLod];
906 row_align = rmesa->radeon.texture_row_align - 1;
907 size = ((_mesa_format_row_stride(firstImage->TexFormat, firstImage->Width) + row_align) & ~row_align) * firstImage->Height;
908 if (t->bo) {
909 radeon_bo_unref(t->bo);
910 t->bo = NULL;
911 }
912 t->bo = radeon_legacy_bo_alloc_fake(rmesa->radeon.radeonScreen->bom, size, offset);
913 t->override_offset = offset;
914 pitch_val = pitch;
915 switch (depth) {
916 case 32:
917 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
918 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
919
920 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
921 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
922 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
923 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
924 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
925 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
926 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
927 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
928 pitch_val /= 4;
929 break;
930 case 24:
931 default:
932 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
933 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
934
935 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
936 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
937 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
938 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
939 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
940 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
941 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
942 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
943 pitch_val /= 4;
944 break;
945 case 16:
946 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
947 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
948
949 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
950 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
951 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
952 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
953 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
954 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
955 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
956 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
957 pitch_val /= 2;
958 break;
959 }
960
961 pitch_val = (pitch_val + R700_TEXEL_PITCH_ALIGNMENT_MASK)
962 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
963
964 /* min pitch is 8 */
965 if (pitch_val < 8)
966 pitch_val = 8;
967
968 SETfield(t->SQ_TEX_RESOURCE0, (pitch_val/8)-1, PITCH_shift, PITCH_mask);
969 }
970
971 void r600SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_format, __DRIdrawable *dPriv)
972 {
973 struct gl_texture_unit *texUnit;
974 struct gl_texture_object *texObj;
975 struct gl_texture_image *texImage;
976 struct radeon_renderbuffer *rb;
977 radeon_texture_image *rImage;
978 radeonContextPtr radeon;
979 context_t *rmesa;
980 struct radeon_framebuffer *rfb;
981 radeonTexObjPtr t;
982 uint32_t pitch_val;
983 uint32_t internalFormat, type, format;
984
985 type = GL_BGRA;
986 format = GL_UNSIGNED_BYTE;
987 internalFormat = (glx_texture_format == __DRI_TEXTURE_FORMAT_RGB ? 3 : 4);
988
989 radeon = pDRICtx->driverPrivate;
990 rmesa = pDRICtx->driverPrivate;
991
992 rfb = dPriv->driverPrivate;
993 texUnit = &radeon->glCtx->Texture.Unit[radeon->glCtx->Texture.CurrentUnit];
994 texObj = _mesa_select_tex_object(radeon->glCtx, texUnit, target);
995 texImage = _mesa_get_tex_image(radeon->glCtx, texObj, target, 0);
996
997 rImage = get_radeon_texture_image(texImage);
998 t = radeon_tex_obj(texObj);
999 if (t == NULL) {
1000 return;
1001 }
1002
1003 radeon_update_renderbuffers(pDRICtx, dPriv, GL_TRUE);
1004 rb = rfb->color_rb[0];
1005 if (rb->bo == NULL) {
1006 /* Failed to BO for the buffer */
1007 return;
1008 }
1009
1010 _mesa_lock_texture(radeon->glCtx, texObj);
1011 if (t->bo) {
1012 radeon_bo_unref(t->bo);
1013 t->bo = NULL;
1014 }
1015 if (rImage->bo) {
1016 radeon_bo_unref(rImage->bo);
1017 rImage->bo = NULL;
1018 }
1019
1020 radeon_miptree_unreference(&t->mt);
1021 radeon_miptree_unreference(&rImage->mt);
1022
1023 _mesa_init_teximage_fields(radeon->glCtx, target, texImage,
1024 rb->base.Width, rb->base.Height, 1, 0, rb->cpp);
1025 texImage->RowStride = rb->pitch / rb->cpp;
1026
1027 rImage->bo = rb->bo;
1028 radeon_bo_ref(rImage->bo);
1029 t->bo = rb->bo;
1030 radeon_bo_ref(t->bo);
1031 t->image_override = GL_TRUE;
1032 t->override_offset = 0;
1033 pitch_val = rb->pitch;
1034 switch (rb->cpp) {
1035 case 4:
1036 if (glx_texture_format == __DRI_TEXTURE_FORMAT_RGB) {
1037 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
1038 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1039
1040 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1041 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1042 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1043 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1044 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1045 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1046 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
1047 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1048 } else {
1049 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
1050 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1051
1052 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1053 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1054 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1055 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1056 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1057 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1058 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
1059 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1060 }
1061 pitch_val /= 4;
1062 break;
1063 case 3:
1064 default:
1065 // FMT_8_8_8 ???
1066 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
1067 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1068
1069 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
1070 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1071 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1072 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1073 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1074 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1075 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
1076 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1077 pitch_val /= 4;
1078 break;
1079 case 2:
1080 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
1081 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1082
1083 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1084 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1085 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1086 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1087 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1088 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1089 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
1090 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1091 pitch_val /= 2;
1092 break;
1093 }
1094
1095 pitch_val = (pitch_val + R700_TEXEL_PITCH_ALIGNMENT_MASK)
1096 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
1097
1098 /* min pitch is 8 */
1099 if (pitch_val < 8)
1100 pitch_val = 8;
1101
1102 SETfield(t->SQ_TEX_RESOURCE0, (pitch_val/8)-1, PITCH_shift, PITCH_mask);
1103 SETfield(t->SQ_TEX_RESOURCE0, rb->base.Width - 1,
1104 TEX_WIDTH_shift, TEX_WIDTH_mask);
1105 SETfield(t->SQ_TEX_RESOURCE1, rb->base.Height - 1,
1106 TEX_HEIGHT_shift, TEX_HEIGHT_mask);
1107
1108 t->validated = GL_TRUE;
1109 _mesa_unlock_texture(radeon->glCtx, texObj);
1110 return;
1111 }
1112
1113 void r600SetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv)
1114 {
1115 r600SetTexBuffer2(pDRICtx, target, __DRI_TEXTURE_FORMAT_RGBA, dPriv);
1116 }