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r600: remove (now) dead code
[mesa.git] / src / mesa / drivers / dri / r600 / r600_texstate.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file
32 *
33 * \author Keith Whitwell <keith@tungstengraphics.com>
34 *
35 * \todo Enable R300 texture tiling code?
36 */
37
38 #include "main/glheader.h"
39 #include "main/imports.h"
40 #include "main/context.h"
41 #include "main/macros.h"
42 #include "main/teximage.h"
43 #include "main/texobj.h"
44 #include "main/enums.h"
45 #include "main/simple_list.h"
46
47 #include "r600_context.h"
48 #include "r700_state.h"
49 #include "radeon_mipmap_tree.h"
50 #include "r600_tex.h"
51 #include "r700_fragprog.h"
52 #include "r700_vertprog.h"
53
54 void r600UpdateTextureState(GLcontext * ctx);
55
56 void r600UpdateTextureState(GLcontext * ctx)
57 {
58 context_t *context = R700_CONTEXT(ctx);
59 R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
60 struct gl_texture_unit *texUnit;
61 struct radeon_tex_obj *t;
62 GLuint unit;
63
64 R600_STATECHANGE(context, tx);
65 R600_STATECHANGE(context, tx_smplr);
66 R600_STATECHANGE(context, tx_brdr_clr);
67
68 for (unit = 0; unit < R700_MAX_TEXTURE_UNITS; unit++) {
69 texUnit = &ctx->Texture.Unit[unit];
70 t = radeon_tex_obj(ctx->Texture.Unit[unit]._Current);
71 r700->textures[unit] = NULL;
72 if (texUnit->_ReallyEnabled) {
73 if (!t)
74 continue;
75 r700->textures[unit] = t;
76 }
77 }
78 }
79
80 static GLboolean r600GetTexFormat(struct gl_texture_object *tObj, gl_format mesa_format)
81 {
82 radeonTexObj *t = radeon_tex_obj(tObj);
83
84 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
85 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
86 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
87 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
88
89 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
90 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
91 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
92 FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
93 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
94 FORMAT_COMP_X_shift, FORMAT_COMP_Z_mask);
95 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
96 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
97
98 switch (mesa_format) /* This is mesa format. */
99 {
100 case MESA_FORMAT_RGBA8888:
101 case MESA_FORMAT_SIGNED_RGBA8888:
102 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
103 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
104
105 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
106 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
107 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
108 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
109 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
110 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
111 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
112 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
113 if (mesa_format == MESA_FORMAT_SIGNED_RGBA8888) {
114 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
115 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
116 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
117 FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
118 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
119 FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
120 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
121 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
122 }
123 break;
124 case MESA_FORMAT_RGBA8888_REV:
125 case MESA_FORMAT_SIGNED_RGBA8888_REV:
126 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
127 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
128
129 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
130 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
131 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
132 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
133 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
134 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
135 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
136 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
137 if (mesa_format == MESA_FORMAT_SIGNED_RGBA8888_REV) {
138 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
139 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
140 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
141 FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
142 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
143 FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
144 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
145 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
146 }
147 break;
148 case MESA_FORMAT_ARGB8888:
149 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
150 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
151
152 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
153 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
154 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
155 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
156 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
157 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
158 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
159 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
160 break;
161 case MESA_FORMAT_ARGB8888_REV:
162 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
163 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
164
165 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
166 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
167 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
168 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
169 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
170 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
171 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
172 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
173 break;
174 case MESA_FORMAT_RGB888:
175 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8,
176 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
177
178 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
179 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
180 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
181 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
182 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
183 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
184 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
185 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
186 break;
187 case MESA_FORMAT_RGB565:
188 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
189 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
190
191 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
192 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
193 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
194 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
195 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
196 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
197 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
198 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
199 break;
200 case MESA_FORMAT_RGB565_REV:
201 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
202 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
203
204 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
205 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
206 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
207 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
208 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
209 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
210 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
211 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
212 break;
213 case MESA_FORMAT_ARGB4444:
214 SETfield(t->SQ_TEX_RESOURCE1, FMT_4_4_4_4,
215 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
216
217 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
218 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
219 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
220 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
221 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
222 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
223 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
224 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
225 break;
226 case MESA_FORMAT_ARGB4444_REV:
227 SETfield(t->SQ_TEX_RESOURCE1, FMT_4_4_4_4,
228 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
229
230 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
231 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
232 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
233 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
234 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
235 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
236 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
237 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
238 break;
239 case MESA_FORMAT_ARGB1555:
240 SETfield(t->SQ_TEX_RESOURCE1, FMT_1_5_5_5,
241 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
242
243 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
244 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
245 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
246 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
247 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
248 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
249 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
250 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
251 break;
252 case MESA_FORMAT_ARGB1555_REV:
253 SETfield(t->SQ_TEX_RESOURCE1, FMT_1_5_5_5,
254 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
255
256 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
257 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
258 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
259 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
260 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
261 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
262 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
263 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
264 break;
265 case MESA_FORMAT_AL88:
266 case MESA_FORMAT_AL88_REV: /* TODO : Check this. */
267 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8,
268 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
269
270 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
271 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
272 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
273 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
274 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
275 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
276 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
277 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
278 break;
279 case MESA_FORMAT_RGB332:
280 SETfield(t->SQ_TEX_RESOURCE1, FMT_3_3_2,
281 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
282
283 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
284 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
285 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
286 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
287 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
288 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
289 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
290 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
291 break;
292 case MESA_FORMAT_A8: /* ZERO, ZERO, ZERO, X */
293 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
294 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
295
296 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
297 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
298 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
299 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
300 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
301 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
302 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
303 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
304 break;
305 case MESA_FORMAT_L8: /* X, X, X, ONE */
306 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
307 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
308
309 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
310 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
311 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
312 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
313 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
314 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
315 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
316 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
317 break;
318 case MESA_FORMAT_I8: /* X, X, X, X */
319 case MESA_FORMAT_CI8:
320 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
321 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
322
323 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
324 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
325 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
326 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
327 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
328 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
329 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
330 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
331 break;
332 /* YUV422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
333 /*
334 case MESA_FORMAT_YCBCR:
335 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
336 break;
337 */
338 /* VUY422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
339 /*
340 case MESA_FORMAT_YCBCR_REV:
341 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
342 break;
343 */
344 case MESA_FORMAT_RGB_DXT1: /* not supported yet */
345
346 break;
347 case MESA_FORMAT_RGBA_DXT1: /* not supported yet */
348
349 break;
350 case MESA_FORMAT_RGBA_DXT3: /* not supported yet */
351
352 break;
353 case MESA_FORMAT_RGBA_DXT5: /* not supported yet */
354
355 break;
356 case MESA_FORMAT_RGBA_FLOAT32:
357 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_32_32_FLOAT,
358 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
359
360 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
361 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
362 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
363 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
364 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
365 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
366 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
367 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
368 break;
369 case MESA_FORMAT_RGBA_FLOAT16:
370 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_16_16_FLOAT,
371 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
372
373 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
374 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
375 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
376 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
377 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
378 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
379 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
380 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
381 break;
382 case MESA_FORMAT_RGB_FLOAT32: /* X, Y, Z, ONE */
383 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_32_FLOAT,
384 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
385
386 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
387 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
388 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
389 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
390 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
391 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
392 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
393 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
394 break;
395 case MESA_FORMAT_RGB_FLOAT16:
396 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_16_FLOAT,
397 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
398
399 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
400 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
401 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
402 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
403 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
404 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
405 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
406 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
407 break;
408 case MESA_FORMAT_ALPHA_FLOAT32: /* ZERO, ZERO, ZERO, X */
409 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT,
410 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
411
412 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
413 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
414 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
415 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
416 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
417 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
418 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
419 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
420 break;
421 case MESA_FORMAT_ALPHA_FLOAT16: /* ZERO, ZERO, ZERO, X */
422 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT,
423 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
424
425 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
426 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
427 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
428 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
429 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
430 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
431 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
432 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
433 break;
434 case MESA_FORMAT_LUMINANCE_FLOAT32: /* X, X, X, ONE */
435 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT,
436 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
437
438 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
439 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
440 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
441 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
442 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
443 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
444 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
445 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
446 break;
447 case MESA_FORMAT_LUMINANCE_FLOAT16: /* X, X, X, ONE */
448 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT,
449 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
450
451 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
452 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
453 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
454 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
455 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
456 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
457 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
458 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
459 break;
460 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32:
461 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_FLOAT,
462 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
463
464 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
465 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
466 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
467 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
468 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
469 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
470 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
471 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
472 break;
473 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16:
474 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_FLOAT,
475 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
476
477 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
478 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
479 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
480 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
481 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
482 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
483 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
484 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
485 break;
486 case MESA_FORMAT_INTENSITY_FLOAT32: /* X, X, X, X */
487 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT,
488 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
489
490 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
491 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
492 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
493 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
494 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
495 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
496 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
497 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
498 break;
499 case MESA_FORMAT_INTENSITY_FLOAT16: /* X, X, X, X */
500 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT,
501 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
502
503 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
504 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
505 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
506 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
507 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
508 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
509 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
510 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
511 break;
512 case MESA_FORMAT_Z16:
513 case MESA_FORMAT_X8_Z24:
514 case MESA_FORMAT_S8_Z24:
515 case MESA_FORMAT_Z24_S8:
516 case MESA_FORMAT_Z32:
517 case MESA_FORMAT_S8:
518 switch (mesa_format) {
519 case MESA_FORMAT_Z16:
520 SETfield(t->SQ_TEX_RESOURCE1, FMT_16,
521 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
522 break;
523 case MESA_FORMAT_X8_Z24:
524 case MESA_FORMAT_S8_Z24:
525 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_24,
526 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
527 break;
528 case MESA_FORMAT_Z24_S8:
529 SETfield(t->SQ_TEX_RESOURCE1, FMT_24_8,
530 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
531 break;
532 case MESA_FORMAT_Z32:
533 SETfield(t->SQ_TEX_RESOURCE1, FMT_32,
534 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
535 break;
536 case MESA_FORMAT_S8:
537 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
538 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
539 break;
540 default:
541 break;
542 };
543 switch (tObj->DepthMode) {
544 case GL_LUMINANCE: /* X, X, X, ONE */
545 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
546 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
547 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
548 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
549 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
550 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
551 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
552 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
553 break;
554 case GL_INTENSITY: /* X, X, X, X */
555 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
556 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
557 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
558 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
559 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
560 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
561 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
562 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
563 break;
564 case GL_ALPHA: /* ZERO, ZERO, ZERO, X */
565 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
566 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
567 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
568 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
569 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
570 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
571 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
572 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
573 break;
574 default:
575 return GL_FALSE;
576 }
577 break;
578 /* EXT_texture_sRGB */
579 case MESA_FORMAT_SRGBA8:
580 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
581 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
582
583 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
584 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
585 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
586 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
587 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
588 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
589 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
590 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
591 SETbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
592 break;
593 case MESA_FORMAT_SLA8:
594 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8,
595 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
596
597 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
598 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
599 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
600 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
601 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
602 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
603 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
604 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
605 SETbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
606 break;
607 case MESA_FORMAT_SL8: /* X, X, X, ONE */
608 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
609 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
610
611 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
612 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
613 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
614 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
615 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
616 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
617 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
618 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
619 SETbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
620 break;
621 default:
622 /* Not supported format */
623 return GL_FALSE;
624 };
625
626 return GL_TRUE;
627 }
628
629 void r600SetDepthTexMode(struct gl_texture_object *tObj)
630 {
631 radeonTexObjPtr t;
632
633 if (!tObj)
634 return;
635
636 t = radeon_tex_obj(tObj);
637
638 r600GetTexFormat(tObj, tObj->Image[0][tObj->BaseLevel]->TexFormat);
639
640 }
641
642 /**
643 * Compute the cached hardware register values for the given texture object.
644 *
645 * \param rmesa Context pointer
646 * \param t the r300 texture object
647 */
648 static void setup_hardware_state(context_t *rmesa, struct gl_texture_object *texObj)
649 {
650 radeonTexObj *t = radeon_tex_obj(texObj);
651 const struct gl_texture_image *firstImage;
652 GLuint uTexelPitch, row_align;
653
654 if (rmesa->radeon.radeonScreen->driScreen->dri2.enabled &&
655 t->image_override &&
656 t->bo)
657 return;
658
659 firstImage = t->base.Image[0][t->minLod];
660
661 if (!t->image_override) {
662 if (!r600GetTexFormat(texObj, firstImage->TexFormat)) {
663 radeon_error("unexpected texture format in %s\n",
664 __FUNCTION__);
665 return;
666 }
667 }
668
669 switch (texObj->Target) {
670 case GL_TEXTURE_1D:
671 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_1D, DIM_shift, DIM_mask);
672 SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask);
673 break;
674 case GL_TEXTURE_2D:
675 case GL_TEXTURE_RECTANGLE_NV:
676 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_2D, DIM_shift, DIM_mask);
677 SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask);
678 break;
679 case GL_TEXTURE_3D:
680 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_3D, DIM_shift, DIM_mask);
681 SETfield(t->SQ_TEX_RESOURCE1, firstImage->Depth - 1, // ???
682 TEX_DEPTH_shift, TEX_DEPTH_mask);
683 break;
684 case GL_TEXTURE_CUBE_MAP:
685 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_CUBEMAP, DIM_shift, DIM_mask);
686 SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask);
687 break;
688 default:
689 radeon_error("unexpected texture target type in %s\n", __FUNCTION__);
690 return;
691 }
692
693 row_align = rmesa->radeon.texture_row_align - 1;
694 uTexelPitch = (_mesa_format_row_stride(firstImage->TexFormat, firstImage->Width) + row_align) & ~row_align;
695 uTexelPitch = uTexelPitch / _mesa_get_format_bytes(firstImage->TexFormat);
696 uTexelPitch = (uTexelPitch + R700_TEXEL_PITCH_ALIGNMENT_MASK)
697 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
698
699 /* min pitch is 8 */
700 if (uTexelPitch < 8)
701 uTexelPitch = 8;
702
703 SETfield(t->SQ_TEX_RESOURCE0, (uTexelPitch/8)-1, PITCH_shift, PITCH_mask);
704 SETfield(t->SQ_TEX_RESOURCE0, firstImage->Width - 1,
705 TEX_WIDTH_shift, TEX_WIDTH_mask);
706 SETfield(t->SQ_TEX_RESOURCE1, firstImage->Height - 1,
707 TEX_HEIGHT_shift, TEX_HEIGHT_mask);
708
709 if ((t->maxLod - t->minLod) > 0) {
710 t->SQ_TEX_RESOURCE3 = t->mt->levels[t->minLod].size / 256;
711 SETfield(t->SQ_TEX_RESOURCE4, 0, BASE_LEVEL_shift, BASE_LEVEL_mask);
712 SETfield(t->SQ_TEX_RESOURCE5, t->maxLod - t->minLod, LAST_LEVEL_shift, LAST_LEVEL_mask);
713 }
714 }
715
716 /**
717 * Ensure the given texture is ready for rendering.
718 *
719 * Mostly this means populating the texture object's mipmap tree.
720 */
721 static GLboolean r600_validate_texture(GLcontext * ctx, struct gl_texture_object *texObj)
722 {
723 context_t *rmesa = R700_CONTEXT(ctx);
724 radeonTexObj *t = radeon_tex_obj(texObj);
725
726 if (!radeon_validate_texture_miptree(ctx, texObj))
727 return GL_FALSE;
728
729 /* Configure the hardware registers (more precisely, the cached version
730 * of the hardware registers). */
731 setup_hardware_state(rmesa, texObj);
732
733 t->validated = GL_TRUE;
734 return GL_TRUE;
735 }
736
737 /**
738 * Ensure all enabled and complete textures are uploaded along with any buffers being used.
739 */
740 GLboolean r600ValidateBuffers(GLcontext * ctx)
741 {
742 context_t *rmesa = R700_CONTEXT(ctx);
743 struct radeon_renderbuffer *rrb;
744 struct radeon_bo *pbo;
745 int i;
746 int ret;
747
748 radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs);
749
750 rrb = radeon_get_colorbuffer(&rmesa->radeon);
751 /* color buffer */
752 if (rrb && rrb->bo) {
753 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
754 rrb->bo, 0,
755 RADEON_GEM_DOMAIN_VRAM);
756 }
757
758 /* depth buffer */
759 rrb = radeon_get_depthbuffer(&rmesa->radeon);
760 if (rrb && rrb->bo) {
761 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
762 rrb->bo, 0,
763 RADEON_GEM_DOMAIN_VRAM);
764 }
765
766 for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) {
767 radeonTexObj *t;
768
769 if (!ctx->Texture.Unit[i]._ReallyEnabled)
770 continue;
771
772 if (!r600_validate_texture(ctx, ctx->Texture.Unit[i]._Current)) {
773 radeon_warning("failed to validate texture for unit %d.\n", i);
774 }
775 t = radeon_tex_obj(ctx->Texture.Unit[i]._Current);
776 if (t->image_override && t->bo)
777 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
778 t->bo,
779 RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
780 else if (t->mt->bo)
781 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
782 t->mt->bo,
783 RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
784 }
785
786 pbo = (struct radeon_bo *)r700GetActiveFpShaderBo(ctx);
787 if (pbo) {
788 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, pbo,
789 RADEON_GEM_DOMAIN_GTT, 0);
790 }
791
792 pbo = (struct radeon_bo *)r700GetActiveVpShaderBo(ctx);
793 if (pbo) {
794 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, pbo,
795 RADEON_GEM_DOMAIN_GTT, 0);
796 }
797
798 ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs, first_elem(&rmesa->radeon.dma.reserved)->bo, RADEON_GEM_DOMAIN_GTT, 0);
799 if (ret)
800 return GL_FALSE;
801 return GL_TRUE;
802 }
803
804 void r600SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
805 unsigned long long offset, GLint depth, GLuint pitch)
806 {
807 context_t *rmesa = pDRICtx->driverPrivate;
808 struct gl_texture_object *tObj =
809 _mesa_lookup_texture(rmesa->radeon.glCtx, texname);
810 radeonTexObjPtr t = radeon_tex_obj(tObj);
811 const struct gl_texture_image *firstImage;
812 uint32_t pitch_val, size, row_align;
813
814 if (!tObj)
815 return;
816
817 t->image_override = GL_TRUE;
818
819 if (!offset)
820 return;
821
822 firstImage = t->base.Image[0][t->minLod];
823 row_align = rmesa->radeon.texture_row_align - 1;
824 size = ((_mesa_format_row_stride(firstImage->TexFormat, firstImage->Width) + row_align) & ~row_align) * firstImage->Height;
825 if (t->bo) {
826 radeon_bo_unref(t->bo);
827 t->bo = NULL;
828 }
829 t->bo = radeon_legacy_bo_alloc_fake(rmesa->radeon.radeonScreen->bom, size, offset);
830 t->override_offset = offset;
831 pitch_val = pitch;
832 switch (depth) {
833 case 32:
834 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
835 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
836
837 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
838 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
839 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
840 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
841 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
842 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
843 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
844 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
845 pitch_val /= 4;
846 break;
847 case 24:
848 default:
849 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
850 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
851
852 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
853 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
854 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
855 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
856 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
857 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
858 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
859 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
860 pitch_val /= 4;
861 break;
862 case 16:
863 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
864 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
865
866 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
867 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
868 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
869 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
870 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
871 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
872 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
873 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
874 pitch_val /= 2;
875 break;
876 }
877
878 pitch_val = (pitch_val + R700_TEXEL_PITCH_ALIGNMENT_MASK)
879 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
880
881 /* min pitch is 8 */
882 if (pitch_val < 8)
883 pitch_val = 8;
884
885 SETfield(t->SQ_TEX_RESOURCE0, (pitch_val/8)-1, PITCH_shift, PITCH_mask);
886 }
887
888 void r600SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_format, __DRIdrawable *dPriv)
889 {
890 struct gl_texture_unit *texUnit;
891 struct gl_texture_object *texObj;
892 struct gl_texture_image *texImage;
893 struct radeon_renderbuffer *rb;
894 radeon_texture_image *rImage;
895 radeonContextPtr radeon;
896 context_t *rmesa;
897 struct radeon_framebuffer *rfb;
898 radeonTexObjPtr t;
899 uint32_t pitch_val;
900 uint32_t internalFormat, type, format;
901
902 type = GL_BGRA;
903 format = GL_UNSIGNED_BYTE;
904 internalFormat = (glx_texture_format == GLX_TEXTURE_FORMAT_RGB_EXT ? 3 : 4);
905
906 radeon = pDRICtx->driverPrivate;
907 rmesa = pDRICtx->driverPrivate;
908
909 rfb = dPriv->driverPrivate;
910 texUnit = &radeon->glCtx->Texture.Unit[radeon->glCtx->Texture.CurrentUnit];
911 texObj = _mesa_select_tex_object(radeon->glCtx, texUnit, target);
912 texImage = _mesa_get_tex_image(radeon->glCtx, texObj, target, 0);
913
914 rImage = get_radeon_texture_image(texImage);
915 t = radeon_tex_obj(texObj);
916 if (t == NULL) {
917 return;
918 }
919
920 radeon_update_renderbuffers(pDRICtx, dPriv, GL_TRUE);
921 rb = rfb->color_rb[0];
922 if (rb->bo == NULL) {
923 /* Failed to BO for the buffer */
924 return;
925 }
926
927 _mesa_lock_texture(radeon->glCtx, texObj);
928 if (t->bo) {
929 radeon_bo_unref(t->bo);
930 t->bo = NULL;
931 }
932 if (rImage->bo) {
933 radeon_bo_unref(rImage->bo);
934 rImage->bo = NULL;
935 }
936
937 radeon_miptree_unreference(&t->mt);
938 radeon_miptree_unreference(&rImage->mt);
939
940 _mesa_init_teximage_fields(radeon->glCtx, target, texImage,
941 rb->base.Width, rb->base.Height, 1, 0, rb->cpp);
942 texImage->RowStride = rb->pitch / rb->cpp;
943
944 rImage->bo = rb->bo;
945 radeon_bo_ref(rImage->bo);
946 t->bo = rb->bo;
947 radeon_bo_ref(t->bo);
948 t->image_override = GL_TRUE;
949 t->override_offset = 0;
950 pitch_val = rb->pitch;
951 switch (rb->cpp) {
952 case 4:
953 if (glx_texture_format == GLX_TEXTURE_FORMAT_RGB_EXT) {
954 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
955 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
956
957 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
958 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
959 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
960 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
961 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
962 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
963 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
964 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
965 } else {
966 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
967 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
968
969 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
970 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
971 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
972 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
973 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
974 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
975 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
976 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
977 }
978 pitch_val /= 4;
979 break;
980 case 3:
981 default:
982 // FMT_8_8_8 ???
983 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
984 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
985
986 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
987 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
988 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
989 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
990 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
991 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
992 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
993 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
994 pitch_val /= 4;
995 break;
996 case 2:
997 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
998 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
999
1000 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1001 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1002 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1003 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1004 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1005 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1006 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
1007 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1008 pitch_val /= 2;
1009 break;
1010 }
1011
1012 pitch_val = (pitch_val + R700_TEXEL_PITCH_ALIGNMENT_MASK)
1013 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
1014
1015 /* min pitch is 8 */
1016 if (pitch_val < 8)
1017 pitch_val = 8;
1018
1019 SETfield(t->SQ_TEX_RESOURCE0, (pitch_val/8)-1, PITCH_shift, PITCH_mask);
1020 SETfield(t->SQ_TEX_RESOURCE0, rb->base.Width - 1,
1021 TEX_WIDTH_shift, TEX_WIDTH_mask);
1022 SETfield(t->SQ_TEX_RESOURCE1, rb->base.Height - 1,
1023 TEX_HEIGHT_shift, TEX_HEIGHT_mask);
1024
1025 t->validated = GL_TRUE;
1026 _mesa_unlock_texture(radeon->glCtx, texObj);
1027 return;
1028 }
1029
1030 void r600SetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv)
1031 {
1032 r600SetTexBuffer2(pDRICtx, target, GLX_TEXTURE_FORMAT_RGBA_EXT, dPriv);
1033 }