projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
Merge branch 'glsl-to-tgsi'
[mesa.git] / src / mesa / drivers / dri / r600 / r600_texstate.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file
32 *
33 * \author Keith Whitwell <keith@tungstengraphics.com>
34 *
35 * \todo Enable R300 texture tiling code?
36 */
37
38 #include "main/glheader.h"
39 #include "main/imports.h"
40 #include "main/context.h"
41 #include "main/macros.h"
42 #include "main/teximage.h"
43 #include "main/texobj.h"
44 #include "main/enums.h"
45 #include "main/simple_list.h"
46
47 #include "r600_context.h"
48 #include "radeon_mipmap_tree.h"
49 #include "r600_tex.h"
50 #include "r700_fragprog.h"
51 #include "r700_vertprog.h"
52
53 #include "evergreen_tex.h"
54
55 void r600UpdateTextureState(struct gl_context * ctx);
56
57 void r600UpdateTextureState(struct gl_context * ctx)
58 {
59 context_t *context = R700_CONTEXT(ctx);
60 R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
61 struct gl_texture_unit *texUnit;
62 struct radeon_tex_obj *t;
63 GLuint unit;
64
65 R600_STATECHANGE(context, tx);
66 R600_STATECHANGE(context, tx_smplr);
67 R600_STATECHANGE(context, tx_brdr_clr);
68
69 for (unit = 0; unit < R700_MAX_TEXTURE_UNITS; unit++) {
70 texUnit = &ctx->Texture.Unit[unit];
71 t = radeon_tex_obj(ctx->Texture.Unit[unit]._Current);
72 r700->textures[unit] = NULL;
73 if (texUnit->_ReallyEnabled) {
74 if (!t)
75 continue;
76 r700->textures[unit] = t;
77 }
78 }
79 }
80
81 static GLboolean r600GetTexFormat(struct gl_texture_object *tObj, gl_format mesa_format)
82 {
83 radeonTexObj *t = radeon_tex_obj(tObj);
84
85 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
86 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
87 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
88 CLEARfield(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
89 CLEARbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
90
91 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
92 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
93 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
94 FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
95 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
96 FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
97 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_UNSIGNED,
98 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
99
100 CLEARbit(t->SQ_TEX_RESOURCE0, TILE_TYPE_bit);
101 SETfield(t->SQ_TEX_RESOURCE0, ARRAY_LINEAR_GENERAL,
102 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
103 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
104
105 switch (mesa_format) /* This is mesa format. */
106 {
107 case MESA_FORMAT_RGBA8888:
108 case MESA_FORMAT_SIGNED_RGBA8888:
109 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
110 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
111
112 #ifdef MESA_BIG_ENDIAN
113 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
114 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
115 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
116 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
117 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
118 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
119 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
120 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
121 #else
122 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
123 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
124 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
125 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
126 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
127 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
128 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
129 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
130 #endif
131 if (mesa_format == MESA_FORMAT_SIGNED_RGBA8888) {
132 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
133 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
134 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
135 FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
136 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
137 FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
138 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
139 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
140 }
141 break;
142 case MESA_FORMAT_RGBA8888_REV:
143 case MESA_FORMAT_SIGNED_RGBA8888_REV:
144 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
145 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
146
147 #ifdef MESA_BIG_ENDIAN
148 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
149 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
150 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
151 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
152 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
153 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
154 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
155 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
156 #else
157 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
158 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
159 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
160 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
161 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
162 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
163 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
164 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
165 #endif
166 if (mesa_format == MESA_FORMAT_SIGNED_RGBA8888_REV) {
167 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
168 FORMAT_COMP_X_shift, FORMAT_COMP_X_mask);
169 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
170 FORMAT_COMP_Y_shift, FORMAT_COMP_Y_mask);
171 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
172 FORMAT_COMP_Z_shift, FORMAT_COMP_Z_mask);
173 SETfield(t->SQ_TEX_RESOURCE4, SQ_FORMAT_COMP_SIGNED,
174 FORMAT_COMP_W_shift, FORMAT_COMP_W_mask);
175 }
176 break;
177 case MESA_FORMAT_ARGB8888:
178 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
179 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
180
181 #ifdef MESA_BIG_ENDIAN
182 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
183 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
184 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
185 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
186 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
187 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
188 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
189 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
190 #else
191 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
192 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
193 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
194 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
195 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
196 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
197 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
198 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
199 #endif
200 break;
201 case MESA_FORMAT_XRGB8888:
202 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
203 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
204
205 #ifdef MESA_BIG_ENDIAN
206 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
207 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
208 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
209 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
210 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
211 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
212 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
213 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
214 #else
215 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
216 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
217 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
218 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
219 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
220 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
221 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
222 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
223 #endif
224 break;
225 case MESA_FORMAT_XRGB8888_REV:
226 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
227 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
228
229 #ifdef MESA_BIG_ENDIAN
230 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
231 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
232 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
233 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
234 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
235 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
236 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
237 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
238 #else
239 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
240 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
241 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
242 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
243 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
244 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
245 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
246 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
247 #endif
248 break;
249 case MESA_FORMAT_ARGB8888_REV:
250 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
251 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
252
253 #ifdef MESA_BIG_ENDIAN
254 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
255 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
256 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
257 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
258 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
259 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
260 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
261 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
262 #else
263 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
264 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
265 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
266 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
267 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
268 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
269 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
270 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
271 #endif
272 break;
273 case MESA_FORMAT_RGB888:
274 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8,
275 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
276
277 #ifdef MESA_BIG_ENDIAN
278 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
279 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
280 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
281 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
282 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
283 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
284 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
285 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
286 #else
287 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
288 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
289 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
290 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
291 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
292 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
293 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
294 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
295 #endif
296 break;
297 case MESA_FORMAT_RGB565:
298 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
299 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
300
301 #ifdef MESA_BIG_ENDIAN
302 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
303 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
304 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
305 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
306 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
307 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
308 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
309 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
310 #else
311 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
312 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
313 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
314 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
315 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
316 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
317 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
318 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
319 #endif
320
321 break;
322 case MESA_FORMAT_RGB565_REV:
323 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
324 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
325
326 #ifdef MESA_BIG_ENDIAN
327 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
328 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
329 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
330 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
331 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
332 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
333 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
334 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
335 #else
336 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
337 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
338 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
339 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
340 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
341 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
342 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
343 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
344 #endif
345 break;
346 case MESA_FORMAT_ARGB4444:
347 SETfield(t->SQ_TEX_RESOURCE1, FMT_4_4_4_4,
348 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
349
350 #ifdef MESA_BIG_ENDIAN
351 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
352 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
353 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
354 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
355 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
356 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
357 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
358 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
359 #else
360 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
361 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
362 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
363 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
364 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
365 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
366 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
367 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
368 #endif
369 break;
370 case MESA_FORMAT_ARGB4444_REV:
371 SETfield(t->SQ_TEX_RESOURCE1, FMT_4_4_4_4,
372 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
373 #ifdef MESA_BIG_ENDIAN
374 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
375 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
376 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
377 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
378 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
379 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
380 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
381 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
382 #else
383 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
384 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
385 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
386 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
387 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
388 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
389 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
390 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
391 #endif
392 break;
393 case MESA_FORMAT_ARGB1555:
394 SETfield(t->SQ_TEX_RESOURCE1, FMT_1_5_5_5,
395 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
396 #ifdef MESA_BIG_ENDIAN
397 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
398 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
399 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
400 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
401 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
402 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
403 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
404 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
405 #else
406 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
407 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
408 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
409 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
410 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
411 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
412 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
413 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
414 #endif
415 break;
416 case MESA_FORMAT_ARGB1555_REV:
417 SETfield(t->SQ_TEX_RESOURCE1, FMT_1_5_5_5,
418 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
419 #ifdef MESA_BIG_ENDIAN
420 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
421 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
422 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
423 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
424 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
425 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
426 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
427 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
428 #else
429 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
430 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
431 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
432 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
433 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
434 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
435 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
436 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
437 #endif
438 break;
439 case MESA_FORMAT_AL88:
440 case MESA_FORMAT_AL88_REV: /* TODO : Check this. */
441 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8,
442 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
443
444 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
445 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
446 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
447 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
448 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
449 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
450 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
451 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
452 break;
453 case MESA_FORMAT_RGB332:
454 SETfield(t->SQ_TEX_RESOURCE1, FMT_3_3_2,
455 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
456
457 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
458 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
459 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
460 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
461 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
462 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
463 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
464 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
465 break;
466 case MESA_FORMAT_A8: /* ZERO, ZERO, ZERO, X */
467 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
468 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
469
470 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
471 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
472 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
473 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
474 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
475 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
476 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
477 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
478 break;
479 case MESA_FORMAT_L8: /* X, X, X, ONE */
480 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
481 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
482
483 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
484 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
485 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
486 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
487 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
488 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
489 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
490 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
491 break;
492 case MESA_FORMAT_I8: /* X, X, X, X */
493 case MESA_FORMAT_CI8:
494 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
495 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
496
497 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
498 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
499 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
500 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
501 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
502 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
503 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
504 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
505 break;
506 /* YUV422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
507 /*
508 case MESA_FORMAT_YCBCR:
509 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
510 break;
511 */
512 /* VUY422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
513 /*
514 case MESA_FORMAT_YCBCR_REV:
515 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
516 break;
517 */
518 case MESA_FORMAT_RGB_DXT1: /* not supported yet */
519 case MESA_FORMAT_RGBA_DXT1: /* not supported yet */
520 case MESA_FORMAT_RGBA_DXT3: /* not supported yet */
521 case MESA_FORMAT_RGBA_DXT5: /* not supported yet */
522 return GL_FALSE;
523
524 case MESA_FORMAT_RGBA_FLOAT32:
525 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_32_32_FLOAT,
526 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
527
528 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
529 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
530 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
531 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
532 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
533 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
534 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
535 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
536 break;
537 case MESA_FORMAT_RGBA_FLOAT16:
538 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_16_16_FLOAT,
539 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
540
541 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
542 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
543 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
544 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
545 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
546 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
547 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
548 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
549 break;
550 case MESA_FORMAT_RGB_FLOAT32: /* X, Y, Z, ONE */
551 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_32_FLOAT,
552 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
553
554 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
555 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
556 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
557 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
558 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
559 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
560 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
561 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
562 break;
563 case MESA_FORMAT_RGB_FLOAT16:
564 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_16_FLOAT,
565 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
566
567 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
568 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
569 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
570 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
571 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
572 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
573 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
574 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
575 break;
576 case MESA_FORMAT_ALPHA_FLOAT32: /* ZERO, ZERO, ZERO, X */
577 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT,
578 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
579
580 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
581 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
582 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
583 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
584 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
585 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
586 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
587 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
588 break;
589 case MESA_FORMAT_ALPHA_FLOAT16: /* ZERO, ZERO, ZERO, X */
590 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT,
591 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
592
593 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
594 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
595 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
596 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
597 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
598 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
599 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
600 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
601 break;
602 case MESA_FORMAT_LUMINANCE_FLOAT32: /* X, X, X, ONE */
603 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT,
604 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
605
606 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
607 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
608 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
609 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
610 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
611 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
612 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
613 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
614 break;
615 case MESA_FORMAT_LUMINANCE_FLOAT16: /* X, X, X, ONE */
616 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT,
617 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
618
619 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
620 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
621 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
622 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
623 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
624 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
625 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
626 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
627 break;
628 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32:
629 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_32_FLOAT,
630 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
631
632 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
633 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
634 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
635 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
636 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
637 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
638 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
639 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
640 break;
641 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16:
642 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_16_FLOAT,
643 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
644
645 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
646 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
647 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
648 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
649 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
650 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
651 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
652 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
653 break;
654 case MESA_FORMAT_INTENSITY_FLOAT32: /* X, X, X, X */
655 SETfield(t->SQ_TEX_RESOURCE1, FMT_32_FLOAT,
656 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
657
658 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
659 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
660 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
661 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
662 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
663 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
664 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
665 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
666 break;
667 case MESA_FORMAT_INTENSITY_FLOAT16: /* X, X, X, X */
668 SETfield(t->SQ_TEX_RESOURCE1, FMT_16_FLOAT,
669 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
670
671 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
672 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
673 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
674 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
675 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
676 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
677 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
678 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
679 break;
680 case MESA_FORMAT_Z16:
681 case MESA_FORMAT_X8_Z24:
682 case MESA_FORMAT_S8_Z24:
683 case MESA_FORMAT_Z24_S8:
684 case MESA_FORMAT_Z32:
685 case MESA_FORMAT_S8:
686 SETbit(t->SQ_TEX_RESOURCE0, TILE_TYPE_bit);
687 SETfield(t->SQ_TEX_RESOURCE0, ARRAY_1D_TILED_THIN1,
688 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_shift,
689 SQ_TEX_RESOURCE_WORD0_0__TILE_MODE_mask);
690 switch (mesa_format) {
691 case MESA_FORMAT_Z16:
692 SETfield(t->SQ_TEX_RESOURCE1, FMT_16,
693 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
694 break;
695 case MESA_FORMAT_X8_Z24:
696 case MESA_FORMAT_S8_Z24:
697 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_24,
698 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
699 break;
700 case MESA_FORMAT_Z24_S8:
701 SETfield(t->SQ_TEX_RESOURCE1, FMT_24_8,
702 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
703 break;
704 case MESA_FORMAT_Z32:
705 SETfield(t->SQ_TEX_RESOURCE1, FMT_32,
706 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
707 break;
708 case MESA_FORMAT_S8:
709 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
710 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
711 break;
712 default:
713 break;
714 };
715 switch (tObj->Sampler.DepthMode) {
716 case GL_LUMINANCE: /* X, X, X, ONE */
717 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
718 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
719 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
720 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
721 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
722 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
723 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
724 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
725 break;
726 case GL_INTENSITY: /* X, X, X, X */
727 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
728 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
729 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
730 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
731 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
732 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
733 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
734 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
735 break;
736 case GL_ALPHA: /* ZERO, ZERO, ZERO, X */
737 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
738 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
739 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
740 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
741 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_0,
742 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
743 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
744 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
745 break;
746 default:
747 return GL_FALSE;
748 }
749 break;
750 /* EXT_texture_sRGB */
751 case MESA_FORMAT_SARGB8:
752 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
753 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
754
755 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
756 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
757 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
758 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
759 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
760 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
761 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
762 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
763 SETbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
764 break;
765 case MESA_FORMAT_SLA8:
766 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8,
767 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
768
769 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
770 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
771 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
772 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
773 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
774 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
775 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
776 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
777 SETbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
778 break;
779 case MESA_FORMAT_SL8: /* X, X, X, ONE */
780 SETfield(t->SQ_TEX_RESOURCE1, FMT_8,
781 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
782
783 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
784 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
785 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
786 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
787 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
788 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
789 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
790 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
791 SETbit(t->SQ_TEX_RESOURCE4, SQ_TEX_RESOURCE_WORD4_0__FORCE_DEGAMMA_bit);
792 break;
793 default:
794 /* Not supported format */
795 return GL_FALSE;
796 };
797
798 return GL_TRUE;
799 }
800
801 static GLuint r600_translate_shadow_func(GLenum func)
802 {
803 switch (func) {
804 case GL_NEVER:
805 return SQ_TEX_DEPTH_COMPARE_NEVER;
806 case GL_LESS:
807 return SQ_TEX_DEPTH_COMPARE_LESS;
808 case GL_LEQUAL:
809 return SQ_TEX_DEPTH_COMPARE_LESSEQUAL;
810 case GL_GREATER:
811 return SQ_TEX_DEPTH_COMPARE_GREATER;
812 case GL_GEQUAL:
813 return SQ_TEX_DEPTH_COMPARE_GREATEREQUAL;
814 case GL_NOTEQUAL:
815 return SQ_TEX_DEPTH_COMPARE_NOTEQUAL;
816 case GL_EQUAL:
817 return SQ_TEX_DEPTH_COMPARE_EQUAL;
818 case GL_ALWAYS:
819 return SQ_TEX_DEPTH_COMPARE_ALWAYS;
820 default:
821 WARN_ONCE("Unknown shadow compare function! %d", func);
822 return 0;
823 }
824 }
825
826 static INLINE uint32_t
827 S_FIXED(float value, uint32_t frac_bits)
828 {
829 return value * (1 << frac_bits);
830 }
831
832 void r600SetDepthTexMode(struct gl_texture_object *tObj)
833 {
834 radeonTexObjPtr t;
835
836 if (!tObj)
837 return;
838
839 t = radeon_tex_obj(tObj);
840
841 if(!r600GetTexFormat(tObj, tObj->Image[0][tObj->BaseLevel]->TexFormat))
842 t->validated = GL_FALSE;
843 }
844
845 /**
846 * Compute the cached hardware register values for the given texture object.
847 *
848 * \param rmesa Context pointer
849 * \param t the r300 texture object
850 */
851 static GLboolean setup_hardware_state(struct gl_context * ctx, struct gl_texture_object *texObj, int unit)
852 {
853 context_t *rmesa = R700_CONTEXT(ctx);
854 radeonTexObj *t = radeon_tex_obj(texObj);
855 const struct gl_texture_image *firstImage;
856 GLuint uTexelPitch, row_align;
857
858 if (rmesa->radeon.radeonScreen->driScreen->dri2.enabled &&
859 t->image_override &&
860 t->bo)
861 return GL_TRUE;
862
863 firstImage = t->base.Image[0][t->minLod];
864
865 if (!t->image_override) {
866 if (!r600GetTexFormat(texObj, firstImage->TexFormat)) {
867 radeon_warning("unsupported texture format in %s\n",
868 __FUNCTION__);
869 return GL_FALSE;
870 }
871 }
872
873 switch (texObj->Target) {
874 case GL_TEXTURE_1D:
875 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_1D, DIM_shift, DIM_mask);
876 SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask);
877 break;
878 case GL_TEXTURE_2D:
879 case GL_TEXTURE_RECTANGLE_NV:
880 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_2D, DIM_shift, DIM_mask);
881 SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask);
882 break;
883 case GL_TEXTURE_3D:
884 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_3D, DIM_shift, DIM_mask);
885 SETfield(t->SQ_TEX_RESOURCE1, firstImage->Depth - 1, // ???
886 TEX_DEPTH_shift, TEX_DEPTH_mask);
887 break;
888 case GL_TEXTURE_CUBE_MAP:
889 SETfield(t->SQ_TEX_RESOURCE0, SQ_TEX_DIM_CUBEMAP, DIM_shift, DIM_mask);
890 SETfield(t->SQ_TEX_RESOURCE1, 0, TEX_DEPTH_shift, TEX_DEPTH_mask);
891 break;
892 default:
893 radeon_error("unexpected texture target type in %s\n", __FUNCTION__);
894 return GL_FALSE;
895 }
896
897 row_align = rmesa->radeon.texture_row_align - 1;
898 uTexelPitch = (_mesa_format_row_stride(firstImage->TexFormat, firstImage->Width) + row_align) & ~row_align;
899 uTexelPitch = uTexelPitch / _mesa_get_format_bytes(firstImage->TexFormat);
900 uTexelPitch = (uTexelPitch + R700_TEXEL_PITCH_ALIGNMENT_MASK)
901 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
902
903 /* min pitch is 8 */
904 if (uTexelPitch < 8)
905 uTexelPitch = 8;
906
907 SETfield(t->SQ_TEX_RESOURCE0, (uTexelPitch/8)-1, PITCH_shift, PITCH_mask);
908 SETfield(t->SQ_TEX_RESOURCE0, firstImage->Width - 1,
909 TEX_WIDTH_shift, TEX_WIDTH_mask);
910 SETfield(t->SQ_TEX_RESOURCE1, firstImage->Height - 1,
911 TEX_HEIGHT_shift, TEX_HEIGHT_mask);
912
913 t->SQ_TEX_RESOURCE2 = get_base_teximage_offset(t) / 256;
914
915 t->SQ_TEX_RESOURCE3 = radeon_miptree_image_offset(t->mt, 0, t->minLod + 1) / 256;
916
917 SETfield(t->SQ_TEX_RESOURCE4, 0, BASE_LEVEL_shift, BASE_LEVEL_mask);
918 SETfield(t->SQ_TEX_RESOURCE5, t->maxLod - t->minLod, LAST_LEVEL_shift, LAST_LEVEL_mask);
919
920 SETfield(t->SQ_TEX_SAMPLER1,
921 S_FIXED(CLAMP(t->base.Sampler.MinLod - t->minLod, 0, 15), 6),
922 MIN_LOD_shift, MIN_LOD_mask);
923 SETfield(t->SQ_TEX_SAMPLER1,
924 S_FIXED(CLAMP(t->base.Sampler.MaxLod - t->minLod, 0, 15), 6),
925 MAX_LOD_shift, MAX_LOD_mask);
926 SETfield(t->SQ_TEX_SAMPLER1,
927 S_FIXED(CLAMP(ctx->Texture.Unit[unit].LodBias + t->base.Sampler.LodBias, -16, 16), 6),
928 SQ_TEX_SAMPLER_WORD1_0__LOD_BIAS_shift, SQ_TEX_SAMPLER_WORD1_0__LOD_BIAS_mask);
929
930 if(texObj->Sampler.CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB)
931 {
932 SETfield(t->SQ_TEX_SAMPLER0, r600_translate_shadow_func(texObj->Sampler.CompareFunc), DEPTH_COMPARE_FUNCTION_shift, DEPTH_COMPARE_FUNCTION_mask);
933 }
934 else
935 {
936 CLEARfield(t->SQ_TEX_SAMPLER0, DEPTH_COMPARE_FUNCTION_mask);
937 }
938
939 return GL_TRUE;
940 }
941
942 /**
943 * Ensure the given texture is ready for rendering.
944 *
945 * Mostly this means populating the texture object's mipmap tree.
946 */
947 static GLboolean r600_validate_texture(struct gl_context * ctx, struct gl_texture_object *texObj, int unit)
948 {
949 radeonTexObj *t = radeon_tex_obj(texObj);
950
951 if (!radeon_validate_texture_miptree(ctx, texObj))
952 return GL_FALSE;
953
954 /* Configure the hardware registers (more precisely, the cached version
955 * of the hardware registers). */
956 if (!setup_hardware_state(ctx, texObj, unit))
957 return GL_FALSE;
958
959 t->validated = GL_TRUE;
960 return GL_TRUE;
961 }
962
963 /**
964 * Ensure all enabled and complete textures are uploaded along with any buffers being used.
965 */
966 GLboolean r600ValidateBuffers(struct gl_context * ctx)
967 {
968 context_t *rmesa = R700_CONTEXT(ctx);
969 struct radeon_renderbuffer *rrb;
970 struct radeon_bo *pbo;
971 int i;
972 int ret;
973
974 radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs);
975
976 rrb = radeon_get_colorbuffer(&rmesa->radeon);
977 /* color buffer */
978 if (rrb && rrb->bo) {
979 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
980 rrb->bo, 0,
981 RADEON_GEM_DOMAIN_VRAM);
982 }
983
984 /* depth buffer */
985 rrb = radeon_get_depthbuffer(&rmesa->radeon);
986 if (rrb && rrb->bo) {
987 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
988 rrb->bo, 0,
989 RADEON_GEM_DOMAIN_VRAM);
990 }
991
992 for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) {
993 radeonTexObj *t;
994
995 if (!ctx->Texture.Unit[i]._ReallyEnabled)
996 continue;
997
998 if (!r600_validate_texture(ctx, ctx->Texture.Unit[i]._Current, i)) {
999 radeon_warning("failed to validate texture for unit %d.\n", i);
1000 }
1001 t = radeon_tex_obj(ctx->Texture.Unit[i]._Current);
1002 if (t->image_override && t->bo)
1003 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
1004 t->bo,
1005 RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
1006 else if (t->mt->bo)
1007 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs,
1008 t->mt->bo,
1009 RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0);
1010 }
1011
1012 pbo = (struct radeon_bo *)r700GetActiveFpShaderBo(ctx);
1013 if (pbo) {
1014 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, pbo,
1015 RADEON_GEM_DOMAIN_GTT, 0);
1016 }
1017
1018 pbo = (struct radeon_bo *)r700GetActiveVpShaderBo(ctx);
1019 if (pbo) {
1020 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, pbo,
1021 RADEON_GEM_DOMAIN_GTT, 0);
1022 }
1023
1024 pbo = (struct radeon_bo *)r700GetActiveFpShaderConstBo(ctx);
1025 if (pbo) {
1026 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, pbo,
1027 RADEON_GEM_DOMAIN_GTT, 0);
1028 }
1029
1030 pbo = (struct radeon_bo *)r700GetActiveVpShaderConstBo(ctx);
1031 if (pbo) {
1032 radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, pbo,
1033 RADEON_GEM_DOMAIN_GTT, 0);
1034 }
1035
1036 ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs, first_elem(&rmesa->radeon.dma.reserved)->bo, RADEON_GEM_DOMAIN_GTT, 0);
1037 if (ret)
1038 return GL_FALSE;
1039 return GL_TRUE;
1040 }
1041
1042 void r600SetTexOffset(__DRIcontext * pDRICtx, GLint texname,
1043 unsigned long long offset, GLint depth, GLuint pitch)
1044 {
1045 context_t *rmesa = pDRICtx->driverPrivate;
1046 struct gl_texture_object *tObj =
1047 _mesa_lookup_texture(rmesa->radeon.glCtx, texname);
1048 radeonTexObjPtr t = radeon_tex_obj(tObj);
1049 const struct gl_texture_image *firstImage;
1050 uint32_t pitch_val, size, row_align;
1051
1052 if (!tObj)
1053 return;
1054
1055 if(rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_CEDAR)
1056 {
1057 evergreenSetTexOffset(pDRICtx, texname, offset, depth, pitch);
1058 return;
1059 }
1060
1061 t->image_override = GL_TRUE;
1062
1063 if (!offset)
1064 return;
1065
1066 firstImage = t->base.Image[0][t->minLod];
1067 row_align = rmesa->radeon.texture_row_align - 1;
1068 size = ((_mesa_format_row_stride(firstImage->TexFormat, firstImage->Width) + row_align) & ~row_align) * firstImage->Height;
1069 if (t->bo) {
1070 radeon_bo_unref(t->bo);
1071 t->bo = NULL;
1072 }
1073 t->bo = radeon_legacy_bo_alloc_fake(rmesa->radeon.radeonScreen->bom, size, offset);
1074 t->override_offset = offset;
1075 pitch_val = pitch;
1076 switch (depth) {
1077 case 32:
1078 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
1079 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1080
1081 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1082 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1083 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1084 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1085 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1086 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1087 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
1088 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1089 pitch_val /= 4;
1090 break;
1091 case 24:
1092 default:
1093 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
1094 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1095
1096 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1097 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1098 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1099 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1100 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1101 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1102 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
1103 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1104 pitch_val /= 4;
1105 break;
1106 case 16:
1107 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
1108 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1109
1110 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1111 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1112 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1113 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1114 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1115 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1116 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
1117 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1118 pitch_val /= 2;
1119 break;
1120 }
1121
1122 pitch_val = (pitch_val + R700_TEXEL_PITCH_ALIGNMENT_MASK)
1123 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
1124
1125 /* min pitch is 8 */
1126 if (pitch_val < 8)
1127 pitch_val = 8;
1128
1129 SETfield(t->SQ_TEX_RESOURCE0, (pitch_val/8)-1, PITCH_shift, PITCH_mask);
1130 }
1131
1132 void r600SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_format, __DRIdrawable *dPriv)
1133 {
1134 struct gl_texture_unit *texUnit;
1135 struct gl_texture_object *texObj;
1136 struct gl_texture_image *texImage;
1137 struct radeon_renderbuffer *rb;
1138 radeon_texture_image *rImage;
1139 radeonContextPtr radeon;
1140 context_t *rmesa;
1141 struct radeon_framebuffer *rfb;
1142 radeonTexObjPtr t;
1143 uint32_t pitch_val;
1144 gl_format texFormat;
1145
1146 radeon = pDRICtx->driverPrivate;
1147 rmesa = pDRICtx->driverPrivate;
1148
1149 if(rmesa->radeon.radeonScreen->chip_family >= CHIP_FAMILY_CEDAR)
1150 {
1151 evergreenSetTexBuffer(pDRICtx, target, glx_texture_format, dPriv);
1152 return;
1153 }
1154
1155 rfb = dPriv->driverPrivate;
1156 texUnit = &radeon->glCtx->Texture.Unit[radeon->glCtx->Texture.CurrentUnit];
1157 texObj = _mesa_select_tex_object(radeon->glCtx, texUnit, target);
1158 texImage = _mesa_get_tex_image(radeon->glCtx, texObj, target, 0);
1159
1160 rImage = get_radeon_texture_image(texImage);
1161 t = radeon_tex_obj(texObj);
1162 if (t == NULL) {
1163 return;
1164 }
1165
1166 radeon_update_renderbuffers(pDRICtx, dPriv, GL_TRUE);
1167 rb = rfb->color_rb[0];
1168 if (rb->bo == NULL) {
1169 /* Failed to BO for the buffer */
1170 return;
1171 }
1172
1173 _mesa_lock_texture(radeon->glCtx, texObj);
1174 if (t->bo) {
1175 radeon_bo_unref(t->bo);
1176 t->bo = NULL;
1177 }
1178 if (rImage->bo) {
1179 radeon_bo_unref(rImage->bo);
1180 rImage->bo = NULL;
1181 }
1182
1183 radeon_miptree_unreference(&t->mt);
1184 radeon_miptree_unreference(&rImage->mt);
1185
1186 rImage->bo = rb->bo;
1187 radeon_bo_ref(rImage->bo);
1188 t->bo = rb->bo;
1189 radeon_bo_ref(t->bo);
1190 t->image_override = GL_TRUE;
1191 t->override_offset = 0;
1192 pitch_val = rb->pitch;
1193 switch (rb->cpp) {
1194 case 4:
1195 if (glx_texture_format == __DRI_TEXTURE_FORMAT_RGB) {
1196 texFormat = MESA_FORMAT_RGB888;
1197 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
1198 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1199
1200 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1201 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1202 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1203 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1204 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1205 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1206 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
1207 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1208 } else {
1209 texFormat = MESA_FORMAT_ARGB8888;
1210 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
1211 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1212
1213 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1214 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1215 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1216 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1217 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1218 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1219 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
1220 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1221 }
1222 pitch_val /= 4;
1223 break;
1224 case 3:
1225 default:
1226 // FMT_8_8_8 ???
1227 texFormat = MESA_FORMAT_RGB888;
1228 SETfield(t->SQ_TEX_RESOURCE1, FMT_8_8_8_8,
1229 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1230
1231 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_W,
1232 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1233 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1234 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1235 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1236 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1237 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
1238 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1239 pitch_val /= 4;
1240 break;
1241 case 2:
1242 texFormat = MESA_FORMAT_RGB565;
1243 SETfield(t->SQ_TEX_RESOURCE1, FMT_5_6_5,
1244 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask);
1245
1246 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Z,
1247 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask);
1248 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_Y,
1249 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask);
1250 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_X,
1251 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask);
1252 SETfield(t->SQ_TEX_RESOURCE4, SQ_SEL_1,
1253 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask);
1254 pitch_val /= 2;
1255 break;
1256 }
1257
1258 _mesa_init_teximage_fields(radeon->glCtx, target, texImage,
1259 rb->base.Width, rb->base.Height, 1, 0,
1260 rb->cpp, texFormat);
1261 texImage->RowStride = rb->pitch / rb->cpp;
1262
1263 pitch_val = (pitch_val + R700_TEXEL_PITCH_ALIGNMENT_MASK)
1264 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK;
1265
1266 /* min pitch is 8 */
1267 if (pitch_val < 8)
1268 pitch_val = 8;
1269
1270 SETfield(t->SQ_TEX_RESOURCE0, (pitch_val/8)-1, PITCH_shift, PITCH_mask);
1271 SETfield(t->SQ_TEX_RESOURCE0, rb->base.Width - 1,
1272 TEX_WIDTH_shift, TEX_WIDTH_mask);
1273 SETfield(t->SQ_TEX_RESOURCE1, rb->base.Height - 1,
1274 TEX_HEIGHT_shift, TEX_HEIGHT_mask);
1275
1276 t->validated = GL_TRUE;
1277 _mesa_unlock_texture(radeon->glCtx, texObj);
1278 return;
1279 }
1280
1281 void r600SetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPriv)
1282 {
1283 r600SetTexBuffer2(pDRICtx, target, __DRI_TEXTURE_FORMAT_RGBA, dPriv);
1284 }