2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 **************************************************************************/
33 * \author Keith Whitwell <keith@tungstengraphics.com>
35 * \todo Enable R300 texture tiling code?
38 #include "main/glheader.h"
39 #include "main/imports.h"
40 #include "main/context.h"
41 #include "main/macros.h"
42 #include "main/texformat.h"
43 #include "main/teximage.h"
44 #include "main/texobj.h"
45 #include "main/enums.h"
46 #include "main/simple_list.h"
48 #include "r600_context.h"
49 #include "r700_state.h"
50 #include "radeon_mipmap_tree.h"
53 void r600UpdateTextureState(GLcontext
* ctx
);
55 void r600UpdateTextureState(GLcontext
* ctx
)
57 context_t
*context
= R700_CONTEXT(ctx
);
58 R700_CHIP_CONTEXT
*r700
= (R700_CHIP_CONTEXT
*)(&context
->hw
);
59 struct gl_texture_unit
*texUnit
;
60 struct radeon_tex_obj
*t
;
63 R600_STATECHANGE(context
, tx
);
64 R600_STATECHANGE(context
, tx_smplr
);
65 R600_STATECHANGE(context
, tx_brdr_clr
);
67 for (unit
= 0; unit
< R700_MAX_TEXTURE_UNITS
; unit
++) {
68 texUnit
= &ctx
->Texture
.Unit
[unit
];
69 t
= radeon_tex_obj(ctx
->Texture
.Unit
[unit
]._Current
);
71 if (texUnit
->_ReallyEnabled
) {
74 r700
->textures
[unit
] = t
;
79 static GLboolean
r600GetTexFormat(struct gl_texture_object
*tObj
, GLuint mesa_format
)
81 radeonTexObj
*t
= radeon_tex_obj(tObj
);
83 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
84 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
85 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
86 CLEARfield(t
->SQ_TEX_RESOURCE4
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
88 switch (mesa_format
) /* This is mesa format. */
90 case MESA_FORMAT_RGBA8888
:
91 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
92 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
94 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
95 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
96 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
97 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
98 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
99 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
100 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
101 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
103 case MESA_FORMAT_RGBA8888_REV
:
104 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
105 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
107 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
108 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
109 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
110 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
111 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
112 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
113 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
114 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
116 case MESA_FORMAT_ARGB8888
:
117 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
118 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
120 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
121 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
122 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
123 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
124 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
125 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
126 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
127 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
129 case MESA_FORMAT_ARGB8888_REV
:
130 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
131 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
133 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
134 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
135 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
136 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
137 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
138 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
139 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
140 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
142 case MESA_FORMAT_RGB888
:
143 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8
,
144 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
146 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
147 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
148 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
149 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
150 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
151 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
152 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
153 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
155 case MESA_FORMAT_RGB565
:
156 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
157 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
159 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
160 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
161 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
162 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
163 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
164 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
165 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
166 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
168 case MESA_FORMAT_RGB565_REV
:
169 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
170 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
172 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
173 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
174 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
175 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
176 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
177 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
178 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
179 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
181 case MESA_FORMAT_ARGB4444
:
182 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_4_4_4_4
,
183 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
185 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
186 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
187 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
188 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
189 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
190 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
191 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
192 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
194 case MESA_FORMAT_ARGB4444_REV
:
195 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_4_4_4_4
,
196 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
198 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
199 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
200 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
201 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
202 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
203 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
204 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
205 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
207 case MESA_FORMAT_ARGB1555
:
208 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_1_5_5_5
,
209 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
211 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
212 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
213 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
214 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
215 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
216 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
217 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
218 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
220 case MESA_FORMAT_ARGB1555_REV
:
221 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_1_5_5_5
,
222 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
224 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
225 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
226 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
227 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
228 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
229 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
230 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
231 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
233 case MESA_FORMAT_AL88
:
234 case MESA_FORMAT_AL88_REV
: /* TODO : Check this. */
235 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8
,
236 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
238 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
239 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
240 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
241 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
242 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
243 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
244 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
245 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
247 case MESA_FORMAT_RGB332
:
248 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_3_3_2
,
249 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
251 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
252 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
253 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
254 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
255 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
256 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
257 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
258 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
260 case MESA_FORMAT_A8
: /* ZERO, ZERO, ZERO, X */
261 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8
,
262 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
264 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
265 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
266 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
267 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
268 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
269 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
270 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
271 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
273 case MESA_FORMAT_L8
: /* X, X, X, ONE */
274 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8
,
275 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
277 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
278 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
279 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
280 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
281 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
282 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
283 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
284 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
286 case MESA_FORMAT_I8
: /* X, X, X, X */
287 case MESA_FORMAT_CI8
:
288 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8
,
289 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
291 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
292 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
293 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
294 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
295 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
296 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
297 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
298 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
300 /* YUV422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
302 case MESA_FORMAT_YCBCR:
303 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
306 /* VUY422 TODO conversion */ /* X, Y, Z, ONE, G8R8_G8B8 */
308 case MESA_FORMAT_YCBCR_REV:
309 t->SQ_TEX_RESOURCE1.bitfields.DATA_FORMAT = ;
312 case MESA_FORMAT_RGB_DXT1
: /* not supported yet */
315 case MESA_FORMAT_RGBA_DXT1
: /* not supported yet */
318 case MESA_FORMAT_RGBA_DXT3
: /* not supported yet */
321 case MESA_FORMAT_RGBA_DXT5
: /* not supported yet */
324 case MESA_FORMAT_RGBA_FLOAT32
:
325 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_32_32_32_FLOAT
,
326 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
328 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
329 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
330 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
331 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
332 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
333 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
334 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
335 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
337 case MESA_FORMAT_RGBA_FLOAT16
:
338 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_16_16_16_FLOAT
,
339 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
341 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
342 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
343 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
344 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
345 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
346 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
347 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
348 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
350 case MESA_FORMAT_RGB_FLOAT32
: /* X, Y, Z, ONE */
351 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_32_32_FLOAT
,
352 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
354 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
355 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
356 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
357 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
358 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
359 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
360 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
361 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
363 case MESA_FORMAT_RGB_FLOAT16
:
364 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_16_16_FLOAT
,
365 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
367 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
368 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
369 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
370 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
371 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
372 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
373 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
374 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
376 case MESA_FORMAT_ALPHA_FLOAT32
: /* ZERO, ZERO, ZERO, X */
377 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_FLOAT
,
378 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
380 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
381 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
382 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
383 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
384 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
385 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
386 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
387 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
389 case MESA_FORMAT_ALPHA_FLOAT16
: /* ZERO, ZERO, ZERO, X */
390 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_FLOAT
,
391 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
393 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
394 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
395 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
396 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
397 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
398 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
399 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
400 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
402 case MESA_FORMAT_LUMINANCE_FLOAT32
: /* X, X, X, ONE */
403 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_FLOAT
,
404 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
406 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
407 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
408 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
409 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
410 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
411 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
412 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
413 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
415 case MESA_FORMAT_LUMINANCE_FLOAT16
: /* X, X, X, ONE */
416 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_FLOAT
,
417 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
419 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
420 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
421 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
422 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
423 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
424 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
425 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
426 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
428 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT32
:
429 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_32_FLOAT
,
430 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
432 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
433 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
434 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
435 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
436 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
437 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
438 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
439 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
441 case MESA_FORMAT_LUMINANCE_ALPHA_FLOAT16
:
442 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_16_FLOAT
,
443 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
445 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
446 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
447 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
448 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
449 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
450 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
451 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
452 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
454 case MESA_FORMAT_INTENSITY_FLOAT32
: /* X, X, X, X */
455 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32_FLOAT
,
456 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
458 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
459 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
460 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
461 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
462 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
463 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
464 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
465 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
467 case MESA_FORMAT_INTENSITY_FLOAT16
: /* X, X, X, X */
468 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16_FLOAT
,
469 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
471 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
472 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
473 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
474 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
475 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
476 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
477 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
478 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
480 case MESA_FORMAT_Z16
:
481 case MESA_FORMAT_Z24_S8
:
482 case MESA_FORMAT_Z32
:
483 switch (mesa_format
) {
484 case MESA_FORMAT_Z16
:
485 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_16
,
486 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
488 case MESA_FORMAT_Z24_S8
:
489 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_24_8
,
490 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
492 case MESA_FORMAT_Z32
:
493 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_32
,
494 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
497 switch (tObj
->DepthMode
) {
498 case GL_LUMINANCE
: /* X, X, X, ONE */
499 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
500 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
501 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
502 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
503 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
504 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
505 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
506 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
508 case GL_INTENSITY
: /* X, X, X, X */
509 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
510 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
511 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
512 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
513 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
514 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
515 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
516 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
518 case GL_ALPHA
: /* ZERO, ZERO, ZERO, X */
519 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
520 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
521 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
522 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
523 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_0
,
524 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
525 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
526 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
533 /* Not supported format */
540 void r600SetDepthTexMode(struct gl_texture_object
*tObj
)
547 t
= radeon_tex_obj(tObj
);
549 r600GetTexFormat(tObj
, tObj
->Image
[0][tObj
->BaseLevel
]->TexFormat
->MesaFormat
);
554 * Compute the cached hardware register values for the given texture object.
556 * \param rmesa Context pointer
557 * \param t the r300 texture object
559 static void setup_hardware_state(context_t
*rmesa
, struct gl_texture_object
*texObj
)
561 radeonTexObj
*t
= radeon_tex_obj(texObj
);
562 const struct gl_texture_image
*firstImage
;
563 int firstlevel
= t
->mt
? t
->mt
->firstLevel
: 0;
564 GLuint uTexelPitch
, row_align
;
566 firstImage
= t
->base
.Image
[0][firstlevel
];
568 if (!t
->image_override
) {
569 if (!r600GetTexFormat(texObj
, firstImage
->TexFormat
->MesaFormat
)) {
570 _mesa_problem(NULL
, "unexpected texture format in %s",
576 switch (texObj
->Target
) {
578 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_1D
, DIM_shift
, DIM_mask
);
579 SETfield(t
->SQ_TEX_RESOURCE1
, 0, TEX_DEPTH_shift
, TEX_DEPTH_mask
);
582 case GL_TEXTURE_RECTANGLE_NV
:
583 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_2D
, DIM_shift
, DIM_mask
);
584 SETfield(t
->SQ_TEX_RESOURCE1
, 0, TEX_DEPTH_shift
, TEX_DEPTH_mask
);
587 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_3D
, DIM_shift
, DIM_mask
);
588 SETfield(t
->SQ_TEX_RESOURCE1
, firstImage
->Depth
- 1, // ???
589 TEX_DEPTH_shift
, TEX_DEPTH_mask
);
591 case GL_TEXTURE_CUBE_MAP
:
592 SETfield(t
->SQ_TEX_RESOURCE0
, SQ_TEX_DIM_CUBEMAP
, DIM_shift
, DIM_mask
);
593 SETfield(t
->SQ_TEX_RESOURCE1
, 0, TEX_DEPTH_shift
, TEX_DEPTH_mask
);
596 _mesa_problem(NULL
, "unexpected texture target type in %s", __FUNCTION__
);
600 row_align
= rmesa
->radeon
.texture_row_align
- 1;
601 uTexelPitch
= ((firstImage
->Width
* t
->mt
->bpp
+ row_align
) & ~row_align
) / t
->mt
->bpp
;
602 uTexelPitch
= (uTexelPitch
+ R700_TEXEL_PITCH_ALIGNMENT_MASK
)
603 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK
;
609 SETfield(t
->SQ_TEX_RESOURCE0
, (uTexelPitch
/8)-1, PITCH_shift
, PITCH_mask
);
610 SETfield(t
->SQ_TEX_RESOURCE0
, firstImage
->Width
- 1,
611 TEX_WIDTH_shift
, TEX_WIDTH_mask
);
612 SETfield(t
->SQ_TEX_RESOURCE1
, firstImage
->Height
- 1,
613 TEX_HEIGHT_shift
, TEX_HEIGHT_mask
);
615 if ((t
->mt
->lastLevel
- t
->mt
->firstLevel
) > 0) {
616 t
->SQ_TEX_RESOURCE3
= t
->mt
->levels
[0].size
/ 256;
617 SETfield(t
->SQ_TEX_RESOURCE4
, t
->mt
->firstLevel
, BASE_LEVEL_shift
, BASE_LEVEL_mask
);
618 SETfield(t
->SQ_TEX_RESOURCE5
, t
->mt
->lastLevel
, LAST_LEVEL_shift
, LAST_LEVEL_mask
);
623 * Ensure the given texture is ready for rendering.
625 * Mostly this means populating the texture object's mipmap tree.
627 static GLboolean
r600_validate_texture(GLcontext
* ctx
, struct gl_texture_object
*texObj
)
629 context_t
*rmesa
= R700_CONTEXT(ctx
);
630 radeonTexObj
*t
= radeon_tex_obj(texObj
);
632 if (!radeon_validate_texture_miptree(ctx
, texObj
))
635 /* Configure the hardware registers (more precisely, the cached version
636 * of the hardware registers). */
637 setup_hardware_state(rmesa
, texObj
);
639 t
->validated
= GL_TRUE
;
644 * Ensure all enabled and complete textures are uploaded along with any buffers being used.
646 GLboolean
r600ValidateBuffers(GLcontext
* ctx
)
648 context_t
*rmesa
= R700_CONTEXT(ctx
);
649 struct radeon_renderbuffer
*rrb
;
653 radeon_cs_space_reset_bos(rmesa
->radeon
.cmdbuf
.cs
);
655 rrb
= radeon_get_colorbuffer(&rmesa
->radeon
);
657 if (rrb
&& rrb
->bo
) {
658 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
660 RADEON_GEM_DOMAIN_VRAM
);
664 rrb
= radeon_get_depthbuffer(&rmesa
->radeon
);
665 if (rrb
&& rrb
->bo
) {
666 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
668 RADEON_GEM_DOMAIN_VRAM
);
671 for (i
= 0; i
< ctx
->Const
.MaxTextureImageUnits
; ++i
) {
674 if (!ctx
->Texture
.Unit
[i
]._ReallyEnabled
)
677 if (!r600_validate_texture(ctx
, ctx
->Texture
.Unit
[i
]._Current
)) {
679 "failed to validate texture for unit %d.\n",
682 t
= radeon_tex_obj(ctx
->Texture
.Unit
[i
]._Current
);
683 if (t
->image_override
&& t
->bo
)
684 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
686 RADEON_GEM_DOMAIN_GTT
| RADEON_GEM_DOMAIN_VRAM
, 0);
688 radeon_cs_space_add_persistent_bo(rmesa
->radeon
.cmdbuf
.cs
,
690 RADEON_GEM_DOMAIN_GTT
| RADEON_GEM_DOMAIN_VRAM
, 0);
693 ret
= radeon_cs_space_check_with_bo(rmesa
->radeon
.cmdbuf
.cs
, first_elem(&rmesa
->radeon
.dma
.reserved
)->bo
, RADEON_GEM_DOMAIN_GTT
, 0);
699 void r600SetTexOffset(__DRIcontext
* pDRICtx
, GLint texname
,
700 unsigned long long offset
, GLint depth
, GLuint pitch
)
702 context_t
*rmesa
= pDRICtx
->driverPrivate
;
703 struct gl_texture_object
*tObj
=
704 _mesa_lookup_texture(rmesa
->radeon
.glCtx
, texname
);
705 radeonTexObjPtr t
= radeon_tex_obj(tObj
);
706 uint32_t pitch_val
, size
;
711 t
->image_override
= GL_TRUE
;
716 size
= pitch
;//h * w * (depth / 8);
718 radeon_bo_unref(t
->bo
);
721 t
->bo
= radeon_legacy_bo_alloc_fake(rmesa
->radeon
.radeonScreen
->bom
, size
, offset
);
722 t
->override_offset
= offset
;
726 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
727 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
729 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
730 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
731 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
732 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
733 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
734 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
735 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
736 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
741 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
742 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
744 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
745 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
746 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
747 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
748 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
749 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
750 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
751 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
755 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
756 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
758 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
759 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
760 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
761 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
762 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
763 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
764 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
765 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
770 pitch_val
= (pitch_val
+ R700_TEXEL_PITCH_ALIGNMENT_MASK
)
771 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK
;
777 SETfield(t
->SQ_TEX_RESOURCE0
, (pitch_val
/8)-1, PITCH_shift
, PITCH_mask
);
780 void r600SetTexBuffer2(__DRIcontext
*pDRICtx
, GLint target
, GLint glx_texture_format
, __DRIdrawable
*dPriv
)
782 struct gl_texture_unit
*texUnit
;
783 struct gl_texture_object
*texObj
;
784 struct gl_texture_image
*texImage
;
785 struct radeon_renderbuffer
*rb
;
786 radeon_texture_image
*rImage
;
787 radeonContextPtr radeon
;
789 struct radeon_framebuffer
*rfb
;
792 uint32_t internalFormat
, type
, format
;
795 format
= GL_UNSIGNED_BYTE
;
796 internalFormat
= (glx_texture_format
== GLX_TEXTURE_FORMAT_RGB_EXT
? 3 : 4);
798 radeon
= pDRICtx
->driverPrivate
;
799 rmesa
= pDRICtx
->driverPrivate
;
801 rfb
= dPriv
->driverPrivate
;
802 texUnit
= &radeon
->glCtx
->Texture
.Unit
[radeon
->glCtx
->Texture
.CurrentUnit
];
803 texObj
= _mesa_select_tex_object(radeon
->glCtx
, texUnit
, target
);
804 texImage
= _mesa_get_tex_image(radeon
->glCtx
, texObj
, target
, 0);
806 rImage
= get_radeon_texture_image(texImage
);
807 t
= radeon_tex_obj(texObj
);
812 radeon_update_renderbuffers(pDRICtx
, dPriv
);
813 /* back & depth buffer are useless free them right away */
814 rb
= (void*)rfb
->base
.Attachment
[BUFFER_DEPTH
].Renderbuffer
;
816 radeon_bo_unref(rb
->bo
);
819 rb
= (void*)rfb
->base
.Attachment
[BUFFER_BACK_LEFT
].Renderbuffer
;
821 radeon_bo_unref(rb
->bo
);
824 rb
= rfb
->color_rb
[0];
825 if (rb
->bo
== NULL
) {
826 /* Failed to BO for the buffer */
830 _mesa_lock_texture(radeon
->glCtx
, texObj
);
832 radeon_bo_unref(t
->bo
);
836 radeon_bo_unref(rImage
->bo
);
840 radeon_miptree_unreference(t
->mt
);
844 radeon_miptree_unreference(rImage
->mt
);
847 _mesa_init_teximage_fields(radeon
->glCtx
, target
, texImage
,
848 rb
->base
.Width
, rb
->base
.Height
, 1, 0, rb
->cpp
);
849 texImage
->RowStride
= rb
->pitch
/ rb
->cpp
;
850 texImage
->TexFormat
= radeonChooseTextureFormat(radeon
->glCtx
,
854 radeon_bo_ref(rImage
->bo
);
856 radeon_bo_ref(t
->bo
);
857 t
->image_override
= GL_TRUE
;
858 t
->override_offset
= 0;
859 pitch_val
= rb
->pitch
;
862 if (glx_texture_format
== GLX_TEXTURE_FORMAT_RGB_EXT
) {
863 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
864 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
866 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
867 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
868 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
869 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
870 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
871 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
872 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
873 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
875 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
876 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
878 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
879 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
880 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
881 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
882 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
883 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
884 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
885 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
892 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_8_8_8_8
,
893 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
895 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_W
,
896 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
897 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
898 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
899 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
900 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
901 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
902 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
906 SETfield(t
->SQ_TEX_RESOURCE1
, FMT_5_6_5
,
907 SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_shift
, SQ_TEX_RESOURCE_WORD1_0__DATA_FORMAT_mask
);
909 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Z
,
910 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_X_mask
);
911 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_Y
,
912 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Y_mask
);
913 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_X
,
914 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_Z_mask
);
915 SETfield(t
->SQ_TEX_RESOURCE4
, SQ_SEL_1
,
916 SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_shift
, SQ_TEX_RESOURCE_WORD4_0__DST_SEL_W_mask
);
921 pitch_val
= (pitch_val
+ R700_TEXEL_PITCH_ALIGNMENT_MASK
)
922 & ~R700_TEXEL_PITCH_ALIGNMENT_MASK
;
928 SETfield(t
->SQ_TEX_RESOURCE0
, (pitch_val
/8)-1, PITCH_shift
, PITCH_mask
);
929 SETfield(t
->SQ_TEX_RESOURCE0
, rb
->base
.Width
- 1,
930 TEX_WIDTH_shift
, TEX_WIDTH_mask
);
931 SETfield(t
->SQ_TEX_RESOURCE1
, rb
->base
.Height
- 1,
932 TEX_HEIGHT_shift
, TEX_HEIGHT_mask
);
934 t
->validated
= GL_TRUE
;
935 _mesa_unlock_texture(radeon
->glCtx
, texObj
);
939 void r600SetTexBuffer(__DRIcontext
*pDRICtx
, GLint target
, __DRIdrawable
*dPriv
)
941 r600SetTexBuffer2(pDRICtx
, target
, GLX_TEXTURE_FORMAT_RGBA_EXT
, dPriv
);